blob: f14ae0190eb4dfed72a8d6b78cac2c446de37c69 (
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WARNING: adding this patch causes copysign1.c and mzero3.c to fail...
diff -urN gcc-4.1.2/gcc/config/arm/arm.md-original gcc-4.1.2/gcc/config/arm/arm.md
--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-12 12:48:14.000000000 +1000
+++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-12 12:49:53.000000000 +1000
@@ -2985,14 +2985,14 @@
(define_expand "negsf2"
[(set (match_operand:SF 0 "s_register_operand" "")
(neg:SF (match_operand:SF 1 "s_register_operand" "")))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
""
)
(define_expand "negdf2"
[(set (match_operand:DF 0 "s_register_operand" "")
(neg:DF (match_operand:DF 1 "s_register_operand" "")))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"")
;; abssi2 doesn't really clobber the condition codes if a different register
@@ -4097,7 +4097,7 @@
[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
(match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))]
"TARGET_ARM
- && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP))
+ && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP || TARGET_MAVERICK))
&& !TARGET_IWMMXT"
"*
switch (which_alternative)
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