From afcb8e0076e2b1e8c78d7c8c34c29ec2447dc02a Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Wed, 14 Apr 2010 12:23:31 +0200 Subject: [PATCH 6/6] OMAP3: remove ES1 cache workaround, it falsely triggers on xM37xx ES1 silicon --- cpu/arm_cortexa8/omap3/cache.S | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/cpu/arm_cortexa8/omap3/cache.S b/cpu/arm_cortexa8/omap3/cache.S index 0f63815..a2d1b09 100644 --- a/cpu/arm_cortexa8/omap3/cache.S +++ b/cpu/arm_cortexa8/omap3/cache.S @@ -134,7 +134,6 @@ l2_cache_enable: @ ES2 onwards we can disable/enable L2 ourselves bl get_cpu_rev cmp r0, #CPU_3XX_ES20 - blt l2_cache_disable_EARLIER_THAN_ES2 mrc 15, 0, r3, cr1, cr0, 1 orr r3, r3, #2 mcr 15, 0, r3, cr1, cr0, 1 @@ -165,7 +164,6 @@ l2_cache_disable: @ ES2 onwards we can disable/enable L2 ourselves bl get_cpu_rev cmp r0, #CPU_3XX_ES20 - blt l2_cache_disable_EARLIER_THAN_ES2 mrc 15, 0, r3, cr1, cr0, 1 bic r3, r3, #2 mcr 15, 0, r3, cr1, cr0, 1 -- 1.6.6.1