Path: news.gmane.org!not-for-mail From: "Kirill A. Shutemov" Newsgroups: gmane.linux.ports.arm.kernel Subject: [PATCH 1/2] ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size Date: Wed, 2 Sep 2009 19:11:52 +0300 Lines: 39 Approved: news@gmane.org Message-ID: <1251907913-16261-1-git-send-email-kirill__21953.4654439942$1251897245$gmane$org@shutemov.name> NNTP-Posting-Host: lo.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Trace: ger.gmane.org 1251897245 21910 80.91.229.12 (2 Sep 2009 13:14:05 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Wed, 2 Sep 2009 13:14:05 +0000 (UTC) Cc: Bityutskiy Artem , "Kirill A. Shutemov" , Siarhei Siamashka , Moiseichuk Leonid , Koskinen Aaro To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Original-X-From: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org Wed Sep 02 15:13:57 2009 Return-path: Envelope-to: linux-arm-kernel@m.gmane.org Original-Received: from bombadil.infradead.org ([18.85.46.34]) by lo.gmane.org with esmtp (Exim 4.50) id 1Mipeu-0000ZH-G2 for linux-arm-kernel@m.gmane.org; Wed, 02 Sep 2009 15:13:56 +0200 Original-Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1MipdW-00035E-AP; Wed, 02 Sep 2009 13:12:30 +0000 Original-Received: from mail-bw0-f222.google.com ([209.85.218.222]) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1Mipd1-00031v-Ga for linux-arm-kernel@lists.infradead.org; Wed, 02 Sep 2009 13:12:04 +0000 Original-Received: by bwz22 with SMTP id 22so735896bwz.18 for ; Wed, 02 Sep 2009 06:11:56 -0700 (PDT) Original-Received: by 10.204.34.199 with SMTP id m7mr6687295bkd.48.1251897116013; Wed, 02 Sep 2009 06:11:56 -0700 (PDT) Original-Received: from localhost.localdomain (viktor.cosmicparrot.net [217.152.255.14]) by mx.google.com with ESMTPS id c28sm2027077fka.19.2009.09.02.06.11.54 (version=SSLv3 cipher=RC4-MD5); Wed, 02 Sep 2009 06:11:55 -0700 (PDT) X-Mailer: git-send-email 1.6.3.4 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.5 (LGPL) ) MR-646709E3 X-CRM114-CacheID: sfid-20090902_091159_726883_CEFBECD2 X-CRM114-Status: UNSURE ( 8.83 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -4.6 (----) X-Spam-Report: SpamAssassin version 3.2.5 on bombadil.infradead.org summary: Content analysis details: (-4.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.6 BAYES_00 BODY: Bayesian spam probability is 0 to 1% [score: 0.0000] -2.0 AWL AWL: From: address is in the auto white-list X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Original-Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org Xref: news.gmane.org gmane.linux.ports.arm.kernel:65017 Archived-At: Currently kernel believes that all ARM CPUs have L1_CACHE_SHIFT == 5. It's not true at least for CPUs based on Cortex-A8. List of CPUs with cache line size != 32 should be expanded later. Signed-off-by: Kirill A. Shutemov --- arch/arm/include/asm/cache.h | 2 +- arch/arm/mm/Kconfig | 5 +++++ 2 files changed, 6 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index feaa75f..2ee7743 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -4,7 +4,7 @@ #ifndef __ASMARM_CACHE_H #define __ASMARM_CACHE_H -#define L1_CACHE_SHIFT 5 +#define L1_CACHE_SHIFT (CONFIG_ARM_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 83c025e..3c37d4c 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -771,3 +771,8 @@ config CACHE_XSC3L2 select OUTER_CACHE help This option enables the L2 cache on XScale3. + +config ARM_L1_CACHE_SHIFT + int + default 6 if ARCH_OMAP3 + default 5 -- 1.6.3.4