diff -NbBur linux-2.6.25-rc4-orig/arch/arm/mach-pxa/devices.c linux-2.6.25-rc4/arch/arm/mach-pxa/devices.c --- linux-2.6.25-rc4-orig/arch/arm/mach-pxa/devices.c 2008-03-08 18:25:54.000000000 +0100 +++ linux-2.6.25-rc4/arch/arm/mach-pxa/devices.c 2008-03-08 16:22:35.000000000 +0100 @@ -396,6 +396,31 @@ #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) +static struct resource pxa27x_resource_keypad[] = { + [0] = { + .start = 0x41500000, + .end = 0x4150004c, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_KEYPAD, + .end = IRQ_KEYPAD, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device pxa27x_device_keypad = { + .name = "pxa27x-keypad", + .id = -1, + .resource = pxa27x_resource_keypad, + .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), +}; + +void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) +{ + pxa_register_device(&pxa27x_device_keypad, info); +} + static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); static struct resource pxa27x_resource_ohci[] = { diff -NbBur linux-2.6.25-rc4-orig/arch/arm/mach-pxa/devices.h linux-2.6.25-rc4/arch/arm/mach-pxa/devices.h --- linux-2.6.25-rc4-orig/arch/arm/mach-pxa/devices.h 2008-03-08 18:25:54.000000000 +0100 +++ linux-2.6.25-rc4/arch/arm/mach-pxa/devices.h 2008-03-08 16:22:35.000000000 +0100 @@ -14,6 +14,7 @@ extern struct platform_device pxa27x_device_i2c_power; extern struct platform_device pxa27x_device_ohci; +extern struct platform_device pxa27x_device_keypad; extern struct platform_device pxa25x_device_ssp; extern struct platform_device pxa25x_device_nssp; diff -NbBur linux-2.6.25-rc4-orig/arch/arm/mach-pxa/mainstone.c linux-2.6.25-rc4/arch/arm/mach-pxa/mainstone.c --- linux-2.6.25-rc4-orig/arch/arm/mach-pxa/mainstone.c 2008-03-08 18:25:54.000000000 +0100 +++ linux-2.6.25-rc4/arch/arm/mach-pxa/mainstone.c 2008-03-08 16:11:42.000000000 +0100 @@ -46,6 +46,7 @@ #include #include #include +#include #include "generic.h" #include "devices.h" @@ -460,6 +461,72 @@ .init = mainstone_ohci_init, }; +#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES) +static unsigned int mainstone_matrix_keys[] = { + KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), + KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), + KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), + KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), + KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), + KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), + KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), + KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), + KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), + + KEY(0, 4, KEY_DOT), /* . */ + KEY(1, 4, KEY_CLOSE), /* @ */ + KEY(4, 4, KEY_SLASH), + KEY(5, 4, KEY_BACKSLASH), + KEY(0, 5, KEY_HOME), + KEY(1, 5, KEY_LEFTSHIFT), + KEY(2, 5, KEY_SPACE), + KEY(3, 5, KEY_SPACE), + KEY(4, 5, KEY_ENTER), + KEY(5, 5, KEY_BACKSPACE), + + KEY(0, 6, KEY_UP), + KEY(1, 6, KEY_DOWN), + KEY(2, 6, KEY_LEFT), + KEY(3, 6, KEY_RIGHT), + KEY(4, 6, KEY_SELECT), +}; + +struct pxa27x_keypad_platform_data mainstone_keypad_info = { + .matrix_key_rows = 6, + .matrix_key_cols = 7, + .matrix_key_map = mainstone_matrix_keys, + .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys), + + .enable_rotary0 = 1, + .rotary0_up_key = KEY_UP, + .rotary0_down_key = KEY_DOWN, + + .debounce_interval = 30, +}; + +static void __init mainstone_init_keypad(void) +{ + pxa_gpio_mode(100 | GPIO_ALT_FN_1_IN); /* MKIN0 */ + pxa_gpio_mode(101 | GPIO_ALT_FN_1_IN); /* MKIN1 */ + pxa_gpio_mode(102 | GPIO_ALT_FN_1_IN); /* MKIN2 */ + pxa_gpio_mode( 97 | GPIO_ALT_FN_3_IN); /* MKIN3 */ + pxa_gpio_mode( 98 | GPIO_ALT_FN_3_IN); /* MKIN4 */ + pxa_gpio_mode( 99 | GPIO_ALT_FN_3_IN); /* MKIN5 */ + pxa_gpio_mode(103 | GPIO_ALT_FN_2_OUT); /* MKOUT0 */ + pxa_gpio_mode(104 | GPIO_ALT_FN_2_OUT); /* MKOUT1 */ + pxa_gpio_mode(105 | GPIO_ALT_FN_2_OUT); /* MKOUT2 */ + pxa_gpio_mode(106 | GPIO_ALT_FN_2_OUT); /* MKOUT3 */ + pxa_gpio_mode(107 | GPIO_ALT_FN_2_OUT); /* MKOUT4 */ + pxa_gpio_mode(108 | GPIO_ALT_FN_2_OUT); /* MKOUT5 */ + pxa_gpio_mode( 93 | GPIO_ALT_FN_1_IN); /* DKIN0 */ + pxa_gpio_mode( 94 | GPIO_ALT_FN_1_IN); /* DKIN1 */ + + pxa_set_keypad_info(&mainstone_keypad_info); +} +#else +static inline void mainstone_init_keypad(void) { } +#endif + static void __init mainstone_init(void) { int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ @@ -520,6 +587,8 @@ pxa_set_mci_info(&mainstone_mci_platform_data); pxa_set_ficp_info(&mainstone_ficp_platform_data); pxa_set_ohci_info(&mainstone_ohci_platform_data); + + mainstone_init_keypad(); } diff -NbBur linux-2.6.25-rc4-orig/arch/arm/mach-pxa/pxa27x.c linux-2.6.25-rc4/arch/arm/mach-pxa/pxa27x.c --- linux-2.6.25-rc4-orig/arch/arm/mach-pxa/pxa27x.c 2008-03-08 18:25:54.000000000 +0100 +++ linux-2.6.25-rc4/arch/arm/mach-pxa/pxa27x.c 2008-03-08 16:22:35.000000000 +0100 @@ -151,7 +151,7 @@ INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev), INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), - INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL), + INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev), INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), diff -NbBur linux-2.6.25-rc4-orig/arch/arm/mach-pxa/pxa3xx.c linux-2.6.25-rc4/arch/arm/mach-pxa/pxa3xx.c --- linux-2.6.25-rc4-orig/arch/arm/mach-pxa/pxa3xx.c 2008-03-08 18:25:54.000000000 +0100 +++ linux-2.6.25-rc4/arch/arm/mach-pxa/pxa3xx.c 2008-03-08 16:22:35.000000000 +0100 @@ -185,6 +185,7 @@ PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev), PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev), + PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev), PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/akita.h linux-2.6.25-rc4/include/asm-arm/arch/akita.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/akita.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/akita.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,32 @@ +/* + * Hardware specific definitions for SL-C1000 (Akita) + * + * Copyright (c) 2005 Richard Purdie + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/* Akita IO Expander GPIOs */ + +#define AKITA_IOEXP_RESERVED_7 (1 << 7) +#define AKITA_IOEXP_IR_ON (1 << 6) +#define AKITA_IOEXP_AKIN_PULLUP (1 << 5) +#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4) +#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3) +#define AKITA_IOEXP_MIC_BIAS (1 << 2) +#define AKITA_IOEXP_RESERVED_1 (1 << 1) +#define AKITA_IOEXP_RESERVED_0 (1 << 0) + +/* Direction Bitfield 0=output 1=input */ +#define AKITA_IOEXP_IO_DIR 0 +/* Default Values */ +#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP) + +extern struct platform_device akitaioexp_device; + +void akita_set_ioexp(struct device *dev, unsigned char bitmask); +void akita_reset_ioexp(struct device *dev, unsigned char bitmask); + diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/audio.h linux-2.6.25-rc4/include/asm-arm/arch/audio.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/audio.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/audio.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,15 @@ +#ifndef __ASM_ARCH_AUDIO_H__ +#define __ASM_ARCH_AUDIO_H__ + +#include +#include + +typedef struct { + int (*startup)(struct snd_pcm_substream *, void *); + void (*shutdown)(struct snd_pcm_substream *, void *); + void (*suspend)(void *); + void (*resume)(void *); + void *priv; +} pxa2xx_audio_ops_t; + +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/bitfield.h linux-2.6.25-rc4/include/asm-arm/arch/bitfield.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/bitfield.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/bitfield.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,113 @@ +/* + * FILE bitfield.h + * + * Version 1.1 + * Author Copyright (c) Marc A. Viredaz, 1998 + * DEC Western Research Laboratory, Palo Alto, CA + * Date April 1998 (April 1997) + * System Advanced RISC Machine (ARM) + * Language C or ARM Assembly + * Purpose Definition of macros to operate on bit fields. + */ + + + +#ifndef __BITFIELD_H +#define __BITFIELD_H + +#ifndef __ASSEMBLY__ +#define UData(Data) ((unsigned long) (Data)) +#else +#define UData(Data) (Data) +#endif + + +/* + * MACRO: Fld + * + * Purpose + * The macro "Fld" encodes a bit field, given its size and its shift value + * with respect to bit 0. + * + * Note + * A more intuitive way to encode bit fields would have been to use their + * mask. However, extracting size and shift value information from a bit + * field's mask is cumbersome and might break the assembler (255-character + * line-size limit). + * + * Input + * Size Size of the bit field, in number of bits. + * Shft Shift value of the bit field with respect to bit 0. + * + * Output + * Fld Encoded bit field. + */ + +#define Fld(Size, Shft) (((Size) << 16) + (Shft)) + + +/* + * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit + * + * Purpose + * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return + * the size, shift value, mask, aligned mask, and first bit of a + * bit field. + * + * Input + * Field Encoded bit field (using the macro "Fld"). + * + * Output + * FSize Size of the bit field, in number of bits. + * FShft Shift value of the bit field with respect to bit 0. + * FMsk Mask for the bit field. + * FAlnMsk Mask for the bit field, aligned on bit 0. + * F1stBit First bit of the bit field. + */ + +#define FSize(Field) ((Field) >> 16) +#define FShft(Field) ((Field) & 0x0000FFFF) +#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) +#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) +#define F1stBit(Field) (UData (1) << FShft (Field)) + + +/* + * MACRO: FInsrt + * + * Purpose + * The macro "FInsrt" inserts a value into a bit field by shifting the + * former appropriately. + * + * Input + * Value Bit-field value. + * Field Encoded bit field (using the macro "Fld"). + * + * Output + * FInsrt Bit-field value positioned appropriately. + */ + +#define FInsrt(Value, Field) \ + (UData (Value) << FShft (Field)) + + +/* + * MACRO: FExtr + * + * Purpose + * The macro "FExtr" extracts the value of a bit field by masking and + * shifting it appropriately. + * + * Input + * Data Data containing the bit-field to be extracted. + * Field Encoded bit field (using the macro "Fld"). + * + * Output + * FExtr Bit-field value. + */ + +#define FExtr(Data, Field) \ + ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) + + +#endif /* __BITFIELD_H */ diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/cm-x270.h linux-2.6.25-rc4/include/asm-arm/arch/cm-x270.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/cm-x270.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/cm-x270.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,50 @@ +/* + * linux/include/asm/arch-pxa/cm-x270.h + * + * Copyright Compulab Ltd., 2003, 2007 + * Mike Rapoport + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + +/* CM-x270 device physical addresses */ +#define CMX270_CS1_PHYS (PXA_CS1_PHYS) +#define MARATHON_PHYS (PXA_CS2_PHYS) +#define CMX270_IDE104_PHYS (PXA_CS3_PHYS) +#define CMX270_IT8152_PHYS (PXA_CS4_PHYS) + +/* Statically mapped regions */ +#define CMX270_VIRT_BASE (0xe8000000) +#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE) +#define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M) + +/* GPIO related definitions */ +#define GPIO_IT8152_IRQ (22) + +#define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ) +#define PME_IRQ IRQ_GPIO(0) +#define CMX270_IDE_IRQ IRQ_GPIO(100) +#define CMX270_GPIRQ1 IRQ_GPIO(101) +#define CMX270_TOUCHIRQ IRQ_GPIO(96) +#define CMX270_ETHIRQ IRQ_GPIO(10) +#define CMX270_GFXIRQ IRQ_GPIO(95) +#define CMX270_NANDIRQ IRQ_GPIO(89) +#define CMX270_MMC_IRQ IRQ_GPIO(83) + +/* PCMCIA related definitions */ +#define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x))) +#define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x))) + +#define PCMCIA_S0_CD_VALID IRQ_GPIO(84) +#define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES + +#define PCMCIA_S1_CD_VALID IRQ_GPIO(83) +#define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES + +#define PCMCIA_S0_RDYINT IRQ_GPIO(82) +#define PCMCIA_S1_RDYINT IRQ_GPIO(81) + +#define PCMCIA_RESET_GPIO 53 diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/colibri.h linux-2.6.25-rc4/include/asm-arm/arch/colibri.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/colibri.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/colibri.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,19 @@ +#ifndef _COLIBRI_H_ +#define _COLIBRI_H_ + +/* physical memory regions */ +#define COLIBRI_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ +#define COLIBRI_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ +#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */ + +/* virtual memory regions */ +#define COLIBRI_DISK_VIRT 0xF0000000 /* Disk On Chip region */ + +/* size of flash */ +#define COLIBRI_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ + +/* Ethernet Controller Davicom DM9000 */ +#define GPIO_DM9000 114 +#define COLIBRI_ETH_IRQ IRQ_GPIO(GPIO_DM9000) + +#endif /* _COLIBRI_H_ */ diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/corgi.h linux-2.6.25-rc4/include/asm-arm/arch/corgi.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/corgi.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/corgi.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,109 @@ +/* + * Hardware specific definitions for SL-C7xx series of PDAs + * + * Copyright (c) 2004-2005 Richard Purdie + * + * Based on Sharp's 2.4 kernel patches + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef __ASM_ARCH_CORGI_H +#define __ASM_ARCH_CORGI_H 1 + + +/* + * Corgi (Non Standard) GPIO Definitions + */ +#define CORGI_GPIO_KEY_INT (0) /* Keyboard Interrupt */ +#define CORGI_GPIO_AC_IN (1) /* Charger Detection */ +#define CORGI_GPIO_WAKEUP (3) /* System wakeup notification? */ +#define CORGI_GPIO_AK_INT (4) /* Headphone Jack Control Interrupt */ +#define CORGI_GPIO_TP_INT (5) /* Touch Panel Interrupt */ +#define CORGI_GPIO_nSD_WP (7) /* SD Write Protect? */ +#define CORGI_GPIO_nSD_DETECT (9) /* MMC/SD Card Detect */ +#define CORGI_GPIO_nSD_INT (10) /* SD Interrupt for SDIO? */ +#define CORGI_GPIO_MAIN_BAT_LOW (11) /* Main Battery Low Notification */ +#define CORGI_GPIO_BAT_COVER (11) /* Battery Cover Detect */ +#define CORGI_GPIO_LED_ORANGE (13) /* Orange LED Control */ +#define CORGI_GPIO_CF_CD (14) /* Compact Flash Card Detect */ +#define CORGI_GPIO_CHRG_FULL (16) /* Charging Complete Notification */ +#define CORGI_GPIO_CF_IRQ (17) /* Compact Flash Interrupt */ +#define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */ +#define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */ +#define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */ +#define CORGI_GPIO_IR_ON (22) /* Enable IR Transciever */ +#define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */ +#define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */ +#define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */ +#define CORGI_GPIO_DISCHARGE_ON (42) /* Enable battery Discharge */ +#define CORGI_GPIO_CHRG_UKN (43) /* Unknown Charging (Bypass Control?) */ +#define CORGI_GPIO_HSYNC (44) /* LCD HSync Pulse */ +#define CORGI_GPIO_USB_PULLUP (45) /* USB show presence to host */ + + +/* + * Corgi Keyboard Definitions + */ +#define CORGI_KEY_STROBE_NUM (12) +#define CORGI_KEY_SENSE_NUM (8) +#define CORGI_GPIO_ALL_STROBE_BIT (0x00003ffc) +#define CORGI_GPIO_HIGH_SENSE_BIT (0xfc000000) +#define CORGI_GPIO_HIGH_SENSE_RSHIFT (26) +#define CORGI_GPIO_LOW_SENSE_BIT (0x00000003) +#define CORGI_GPIO_LOW_SENSE_LSHIFT (6) +#define CORGI_GPIO_STROBE_BIT(a) GPIO_bit(66+(a)) +#define CORGI_GPIO_SENSE_BIT(a) GPIO_bit(58+(a)) +#define CORGI_GAFR_ALL_STROBE_BIT (0x0ffffff0) +#define CORGI_GAFR_HIGH_SENSE_BIT (0xfff00000) +#define CORGI_GAFR_LOW_SENSE_BIT (0x0000000f) +#define CORGI_GPIO_KEY_SENSE(a) (58+(a)) +#define CORGI_GPIO_KEY_STROBE(a) (66+(a)) + + +/* + * Corgi Interrupts + */ +#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) +#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) +#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) +#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) +#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) +#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) +#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) +#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) +#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) +#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ +#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) +#define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ + + +/* + * Corgi SCOOP GPIOs and Config + */ +#define CORGI_SCP_LED_GREEN SCOOP_GPCR_PA11 +#define CORGI_SCP_SWA SCOOP_GPCR_PA12 /* Hinge Switch A */ +#define CORGI_SCP_SWB SCOOP_GPCR_PA13 /* Hinge Switch B */ +#define CORGI_SCP_MUTE_L SCOOP_GPCR_PA14 +#define CORGI_SCP_MUTE_R SCOOP_GPCR_PA15 +#define CORGI_SCP_AKIN_PULLUP SCOOP_GPCR_PA16 +#define CORGI_SCP_APM_ON SCOOP_GPCR_PA17 +#define CORGI_SCP_BACKLIGHT_CONT SCOOP_GPCR_PA18 +#define CORGI_SCP_MIC_BIAS SCOOP_GPCR_PA19 + +#define CORGI_SCOOP_IO_DIR ( CORGI_SCP_LED_GREEN | CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R | \ + CORGI_SCP_AKIN_PULLUP | CORGI_SCP_APM_ON | CORGI_SCP_BACKLIGHT_CONT | \ + CORGI_SCP_MIC_BIAS ) +#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) + + +/* + * Shared data structures + */ +extern struct platform_device corgiscoop_device; +extern struct platform_device corgissp_device; + +#endif /* __ASM_ARCH_CORGI_H */ + diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/debug-macro.S linux-2.6.25-rc4/include/asm-arm/arch/debug-macro.S --- linux-2.6.25-rc4-orig/include/asm-arm/arch/debug-macro.S 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/debug-macro.S 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,25 @@ +/* linux/include/asm-arm/arch-pxa/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include "hardware.h" + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x40000000 @ physical + movne \rx, #io_p2v(0x40000000) @ virtual + orr \rx, \rx, #0x00100000 + .endm + +#define UART_SHIFT 2 +#include diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/dma.h linux-2.6.25-rc4/include/asm-arm/arch/dma.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/dma.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/dma.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,50 @@ +/* + * linux/include/asm-arm/arch-pxa/dma.h + * + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* + * Descriptor structure for PXA's DMA engine + * Note: this structure must always be aligned to a 16-byte boundary. + */ + +typedef struct pxa_dma_desc { + volatile u32 ddadr; /* Points to the next descriptor + flags */ + volatile u32 dsadr; /* DSADR value for the current transfer */ + volatile u32 dtadr; /* DTADR value for the current transfer */ + volatile u32 dcmd; /* DCMD value for the current transfer */ +} pxa_dma_desc; + +typedef enum { + DMA_PRIO_HIGH = 0, + DMA_PRIO_MEDIUM = 1, + DMA_PRIO_LOW = 2 +} pxa_dma_prio; + +#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) +#define HAVE_ARCH_PCI_SET_DMA_MASK 1 +#endif + +/* + * DMA registration + */ + +int __init pxa_init_dma(int num_ch); + +int pxa_request_dma (char *name, + pxa_dma_prio prio, + void (*irq_handler)(int, void *), + void *data); + +void pxa_free_dma (int dma_ch); + +#endif /* _ASM_ARCH_DMA_H */ diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/entry-macro.S linux-2.6.25-rc4/include/asm-arm/arch/entry-macro.S --- linux-2.6.25-rc4-orig/include/asm-arm/arch/entry-macro.S 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/entry-macro.S 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,57 @@ +/* + * include/asm-arm/arch-pxa/entry-macro.S + * + * Low-level IRQ helper macros for PXA-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include +#include + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mrc p15, 0, \tmp, c0, c0, 0 @ CPUID + mov \tmp, \tmp, lsr #13 + and \tmp, \tmp, #0x7 @ Core G + cmp \tmp, #1 + bhi 1004f + + mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 + add \base, \base, #0x00d00000 + ldr \irqstat, [\base, #0] @ ICIP + ldr \irqnr, [\base, #4] @ ICMR + b 1002f + +1004: + mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 + mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 + ands \irqnr, \irqstat, \irqnr + beq 1003f + rsb \irqstat, \irqnr, #0 + and \irqstat, \irqstat, \irqnr + clz \irqnr, \irqstat + rsb \irqnr, \irqnr, #31 + add \irqnr, \irqnr, #32 + b 1001f +1003: + mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP + mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR +1002: + ands \irqnr, \irqstat, \irqnr + beq 1001f + rsb \irqstat, \irqnr, #0 + and \irqstat, \irqstat, \irqnr + clz \irqnr, \irqstat + rsb \irqnr, \irqnr, #31 +1001: + .endm diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/gpio.h linux-2.6.25-rc4/include/asm-arm/arch/gpio.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/gpio.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/gpio.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,65 @@ +/* + * linux/include/asm-arm/arch-pxa/gpio.h + * + * PXA GPIO wrappers for arch-neutral GPIO calls + * + * Written by Philipp Zabel + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_PXA_GPIO_H +#define __ASM_ARCH_PXA_GPIO_H + +#include +#include +#include + +#include + + +/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). + * Those cases currently cause holes in the GPIO number space. + */ +#define NR_BUILTIN_GPIO 128 + +static inline int gpio_get_value(unsigned gpio) +{ + if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) + return GPLR(gpio) & GPIO_bit(gpio); + else + return __gpio_get_value(gpio); +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ + if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) { + if (value) + GPSR(gpio) = GPIO_bit(gpio); + else + GPCR(gpio) = GPIO_bit(gpio); + } else { + __gpio_set_value(gpio, value); + } +} + +#define gpio_cansleep __gpio_cansleep + +#define gpio_to_irq(gpio) IRQ_GPIO(gpio) +#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) + + +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/hardware.h linux-2.6.25-rc4/include/asm-arm/arch/hardware.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/hardware.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/hardware.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,216 @@ +/* + * linux/include/asm-arm/arch-pxa/hardware.h + * + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* + * We requires absolute addresses. + */ +#define PCIO_BASE 0 + +/* + * Workarounds for at least 2 errata so far require this. + * The mapping is set in mach-pxa/generic.c. + */ +#define UNCACHED_PHYS_0 0xff000000 +#define UNCACHED_ADDR UNCACHED_PHYS_0 + +/* + * Intel PXA2xx internal register mapping: + * + * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff + * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff + * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff + * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff + * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff + * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff + * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff + * + * Note that not all PXA2xx chips implement all those addresses, and the + * kernel only maps the minimum needed range of this mapping. + */ +#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) +#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) + +#ifndef __ASSEMBLY__ + +# define __REG(x) (*((volatile u32 *)io_p2v(x))) + +/* With indexed regs we don't want to feed the index through io_p2v() + especially if it is a variable, otherwise horrible code will result. */ +# define __REG2(x,y) \ + (*(volatile u32 *)((u32)&__REG(x) + (y))) + +# define __PREG(x) (io_v2p((u32)&(x))) + +#else + +# define __REG(x) io_p2v(x) +# define __PREG(x) io_v2p(x) + +#endif + +#ifndef __ASSEMBLY__ + +#ifdef CONFIG_PXA25x +#define __cpu_is_pxa21x(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xf3f; \ + _id == 0x212; \ + }) + +#define __cpu_is_pxa25x(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x2d0 || _id == 0x290; \ + }) +#else +#define __cpu_is_pxa21x(id) (0) +#define __cpu_is_pxa25x(id) (0) +#endif + +#ifdef CONFIG_PXA27x +#define __cpu_is_pxa27x(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x411; \ + }) +#else +#define __cpu_is_pxa27x(id) (0) +#endif + +#ifdef CONFIG_CPU_PXA300 +#define __cpu_is_pxa300(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x688; \ + }) +#else +#define __cpu_is_pxa300(id) (0) +#endif + +#ifdef CONFIG_CPU_PXA310 +#define __cpu_is_pxa310(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x689; \ + }) +#else +#define __cpu_is_pxa310(id) (0) +#endif + +#ifdef CONFIG_CPU_PXA320 +#define __cpu_is_pxa320(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x603 || _id == 0x682; \ + }) +#else +#define __cpu_is_pxa320(id) (0) +#endif + +#define cpu_is_pxa21x() \ + ({ \ + __cpu_is_pxa21x(read_cpuid_id()); \ + }) + +#define cpu_is_pxa25x() \ + ({ \ + __cpu_is_pxa25x(read_cpuid_id()); \ + }) + +#define cpu_is_pxa27x() \ + ({ \ + __cpu_is_pxa27x(read_cpuid_id()); \ + }) + +#define cpu_is_pxa300() \ + ({ \ + __cpu_is_pxa300(read_cpuid_id()); \ + }) + +#define cpu_is_pxa310() \ + ({ \ + __cpu_is_pxa310(read_cpuid_id()); \ + }) + +#define cpu_is_pxa320() \ + ({ \ + __cpu_is_pxa320(read_cpuid_id()); \ + }) + +/* + * CPUID Core Generation Bit + * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x + * == 0x3 for pxa300/pxa310/pxa320 + */ +#define __cpu_is_pxa2xx(id) \ + ({ \ + unsigned int _id = (id) >> 13 & 0x7; \ + _id <= 0x2; \ + }) + +#define __cpu_is_pxa3xx(id) \ + ({ \ + unsigned int _id = (id) >> 13 & 0x7; \ + _id == 0x3; \ + }) + +#define cpu_is_pxa2xx() \ + ({ \ + __cpu_is_pxa2xx(read_cpuid_id()); \ + }) + +#define cpu_is_pxa3xx() \ + ({ \ + __cpu_is_pxa3xx(read_cpuid_id()); \ + }) + +/* + * Handy routine to set GPIO alternate functions + */ +extern int pxa_gpio_mode( int gpio_mode ); + +/* + * Return GPIO level, nonzero means high, zero is low + */ +extern int pxa_gpio_get_value(unsigned gpio); + +/* + * Set output GPIO level + */ +extern void pxa_gpio_set_value(unsigned gpio, int value); + +/* + * Routine to enable or disable CKEN + */ +static inline void __deprecated pxa_set_cken(int clock, int enable) +{ + extern void __pxa_set_cken(int clock, int enable); + __pxa_set_cken(clock, enable); +} + +/* + * return current memory and LCD clock frequency in units of 10kHz + */ +extern unsigned int get_memclk_frequency_10khz(void); + +#endif + +#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) +#define PCIBIOS_MIN_IO 0 +#define PCIBIOS_MIN_MEM 0 +#define pcibios_assign_all_busses() 1 +#endif + +#endif /* _ASM_ARCH_HARDWARE_H */ diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/i2c.h linux-2.6.25-rc4/include/asm-arm/arch/i2c.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/i2c.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/i2c.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,77 @@ +/* + * i2c_pxa.h + * + * Copyright (C) 2002 Intrinsyc Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef _I2C_PXA_H_ +#define _I2C_PXA_H_ + +#if 0 +#define DEF_TIMEOUT 3 +#else +/* need a longer timeout if we're dealing with the fact we may well be + * looking at a multi-master environment +*/ +#define DEF_TIMEOUT 32 +#endif + +#define BUS_ERROR (-EREMOTEIO) +#define XFER_NAKED (-ECONNREFUSED) +#define I2C_RETRY (-2000) /* an error has occurred retry transmit */ + +/* ICR initialize bit values +* +* 15. FM 0 (100 Khz operation) +* 14. UR 0 (No unit reset) +* 13. SADIE 0 (Disables the unit from interrupting on slave addresses +* matching its slave address) +* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration +* in master mode) +* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) +* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) +* 9. IRFIE 1 (Enable interrupts from full buffer received) +* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) +* 7. GCD 1 (Disables i2c unit response to general call messages as a slave) +* 6. IUE 0 (Disable unit until we change settings) +* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL) +* 4. MA 0 (Only send stop with the ICR stop bit) +* 3. TB 0 (We are not transmitting a byte initially) +* 2. ACKNAK 0 (Send an ACK after the unit receives a byte) +* 1. STOP 0 (Do not send a STOP) +* 0. START 0 (Do not send a START) +* +*/ +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) + +/* I2C status register init values + * + * 10. BED 1 (Clear bus error detected) + * 9. SAD 1 (Clear slave address detected) + * 7. IRF 1 (Clear IDBR Receive Full) + * 6. ITE 1 (Clear IDBR Transmit Empty) + * 5. ALD 1 (Clear Arbitration Loss Detected) + * 4. SSD 1 (Clear Slave Stop Detected) + */ +#define I2C_ISR_INIT 0x7FF /* status register init */ + +struct i2c_slave_client; + +struct i2c_pxa_platform_data { + unsigned int slave_addr; + struct i2c_slave_client *slave; + unsigned int class; + int use_pio; +}; + +extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); + +#ifdef CONFIG_PXA27x +extern void pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info); +#endif + +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/idp.h linux-2.6.25-rc4/include/asm-arm/arch/idp.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/idp.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/idp.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,199 @@ +/* + * linux/include/asm-arm/arch-pxa/idp.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Copyright (c) 2001 Cliff Brake, Accelent Systems Inc. + * + * 2001-09-13: Cliff Brake + * Initial code + * + * 2005-02-15: Cliff Brake + * + * Changes for 2.6 kernel. + */ + + +/* + * Note: this file must be safe to include in assembly files + * + * Support for the Vibren PXA255 IDP requires rev04 or later + * IDP hardware. + */ + + +#define IDP_FLASH_PHYS (PXA_CS0_PHYS) +#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS) +#define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS) +#define IDP_IDE_PHYS (PXA_CS5_PHYS + 0x03000000) +#define IDP_ETH_PHYS (PXA_CS5_PHYS + 0x03400000) +#define IDP_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000) +#define IDP_CPLD_PHYS (PXA_CS5_PHYS + 0x03C00000) + + +/* + * virtual memory map + */ + +#define IDP_COREVOLT_VIRT (0xf0000000) +#define IDP_COREVOLT_SIZE (1*1024*1024) + +#define IDP_CPLD_VIRT (IDP_COREVOLT_VIRT + IDP_COREVOLT_SIZE) +#define IDP_CPLD_SIZE (1*1024*1024) + +#if (IDP_CPLD_VIRT + IDP_CPLD_SIZE) > 0xfc000000 +#error Your custom IO space is getting a bit large !! +#endif + +#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT) +#define CPLD_V2P(x) ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS) + +#ifndef __ASSEMBLY__ +# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x))) +#else +# define __CPLD_REG(x) CPLD_P2V(x) +#endif + +/* board level registers in the CPLD: (offsets from CPLD_VIRT) */ + +#define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00) +#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04) +#define _IDP_CPLD_LED_CONTROL (IDP_CPLD_PHYS + 0x08) +#define _IDP_CPLD_KB_COL_HIGH (IDP_CPLD_PHYS + 0x0C) +#define _IDP_CPLD_KB_COL_LOW (IDP_CPLD_PHYS + 0x10) +#define _IDP_CPLD_PCCARD_EN (IDP_CPLD_PHYS + 0x14) +#define _IDP_CPLD_GPIOH_DIR (IDP_CPLD_PHYS + 0x18) +#define _IDP_CPLD_GPIOH_VALUE (IDP_CPLD_PHYS + 0x1C) +#define _IDP_CPLD_GPIOL_DIR (IDP_CPLD_PHYS + 0x20) +#define _IDP_CPLD_GPIOL_VALUE (IDP_CPLD_PHYS + 0x24) +#define _IDP_CPLD_PCCARD_PWR (IDP_CPLD_PHYS + 0x28) +#define _IDP_CPLD_MISC_CTRL (IDP_CPLD_PHYS + 0x2C) +#define _IDP_CPLD_LCD (IDP_CPLD_PHYS + 0x30) +#define _IDP_CPLD_FLASH_WE (IDP_CPLD_PHYS + 0x34) + +#define _IDP_CPLD_KB_ROW (IDP_CPLD_PHYS + 0x50) +#define _IDP_CPLD_PCCARD0_STATUS (IDP_CPLD_PHYS + 0x54) +#define _IDP_CPLD_PCCARD1_STATUS (IDP_CPLD_PHYS + 0x58) +#define _IDP_CPLD_MISC_STATUS (IDP_CPLD_PHYS + 0x5C) + +/* FPGA register virtual addresses */ + +#define IDP_CPLD_REV __CPLD_REG(_IDP_CPLD_REV) +#define IDP_CPLD_PERIPH_PWR __CPLD_REG(_IDP_CPLD_PERIPH_PWR) +#define IDP_CPLD_LED_CONTROL __CPLD_REG(_IDP_CPLD_LED_CONTROL) +#define IDP_CPLD_KB_COL_HIGH __CPLD_REG(_IDP_CPLD_KB_COL_HIGH) +#define IDP_CPLD_KB_COL_LOW __CPLD_REG(_IDP_CPLD_KB_COL_LOW) +#define IDP_CPLD_PCCARD_EN __CPLD_REG(_IDP_CPLD_PCCARD_EN) +#define IDP_CPLD_GPIOH_DIR __CPLD_REG(_IDP_CPLD_GPIOH_DIR) +#define IDP_CPLD_GPIOH_VALUE __CPLD_REG(_IDP_CPLD_GPIOH_VALUE) +#define IDP_CPLD_GPIOL_DIR __CPLD_REG(_IDP_CPLD_GPIOL_DIR) +#define IDP_CPLD_GPIOL_VALUE __CPLD_REG(_IDP_CPLD_GPIOL_VALUE) +#define IDP_CPLD_PCCARD_PWR __CPLD_REG(_IDP_CPLD_PCCARD_PWR) +#define IDP_CPLD_MISC_CTRL __CPLD_REG(_IDP_CPLD_MISC_CTRL) +#define IDP_CPLD_LCD __CPLD_REG(_IDP_CPLD_LCD) +#define IDP_CPLD_FLASH_WE __CPLD_REG(_IDP_CPLD_FLASH_WE) + +#define IDP_CPLD_KB_ROW __CPLD_REG(_IDP_CPLD_KB_ROW) +#define IDP_CPLD_PCCARD0_STATUS __CPLD_REG(_IDP_CPLD_PCCARD0_STATUS) +#define IDP_CPLD_PCCARD1_STATUS __CPLD_REG(_IDP_CPLD_PCCARD1_STATUS) +#define IDP_CPLD_MISC_STATUS __CPLD_REG(_IDP_CPLD_MISC_STATUS) + + +/* + * Bit masks for various registers + */ + +// IDP_CPLD_PCCARD_PWR +#define PCC0_PWR0 (1 << 0) +#define PCC0_PWR1 (1 << 1) +#define PCC0_PWR2 (1 << 2) +#define PCC0_PWR3 (1 << 3) +#define PCC1_PWR0 (1 << 4) +#define PCC1_PWR1 (1 << 5) +#define PCC1_PWR2 (1 << 6) +#define PCC1_PWR3 (1 << 7) + +// IDP_CPLD_PCCARD_EN +#define PCC0_RESET (1 << 6) +#define PCC1_RESET (1 << 7) +#define PCC0_ENABLE (1 << 0) +#define PCC1_ENABLE (1 << 1) + +// IDP_CPLD_PCCARDx_STATUS +#define _PCC_WRPROT (1 << 7) // 7-4 read as low true +#define _PCC_RESET (1 << 6) +#define _PCC_IRQ (1 << 5) +#define _PCC_INPACK (1 << 4) +#define PCC_BVD2 (1 << 3) +#define PCC_BVD1 (1 << 2) +#define PCC_VS2 (1 << 1) +#define PCC_VS1 (1 << 0) + +#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x))) + +/* A listing of interrupts used by external hardware devices */ + +#define TOUCH_PANEL_IRQ IRQ_GPIO(5) +#define IDE_IRQ IRQ_GPIO(21) + +#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING + +#define ETHERNET_IRQ IRQ_GPIO(4) +#define ETHERNET_IRQ_EDGE IRQT_RISING + +#define IDE_IRQ_EDGE IRQT_RISING + +#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) +#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE + +#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) +#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE + +#define PCMCIA_S0_RDYINT IRQ_GPIO(19) +#define PCMCIA_S1_RDYINT IRQ_GPIO(22) + + +/* + * Macros for LED Driver + */ + +/* leds 0 = ON */ +#define IDP_HB_LED (1<<5) +#define IDP_BUSY_LED (1<<6) + +#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED) + +/* + * macros for MTD driver + */ + +#define FLASH_WRITE_PROTECT_DISABLE() ((IDP_CPLD_FLASH_WE) &= ~(0x1)) +#define FLASH_WRITE_PROTECT_ENABLE() ((IDP_CPLD_FLASH_WE) |= (0x1)) + +/* + * macros for matrix keyboard driver + */ + +#define KEYBD_MATRIX_NUMBER_INPUTS 7 +#define KEYBD_MATRIX_NUMBER_OUTPUTS 14 + +#define KEYBD_MATRIX_INVERT_OUTPUT_LOGIC FALSE +#define KEYBD_MATRIX_INVERT_INPUT_LOGIC FALSE + +#define KEYBD_MATRIX_SETTLING_TIME_US 100 +#define KEYBD_MATRIX_KEYSTATE_DEBOUNCE_CONSTANT 2 + +#define KEYBD_MATRIX_SET_OUTPUTS(outputs) \ +{\ + IDP_CPLD_KB_COL_LOW = outputs;\ + IDP_CPLD_KB_COL_HIGH = outputs >> 7;\ +} + +#define KEYBD_MATRIX_GET_INPUTS(inputs) \ +{\ + inputs = (IDP_CPLD_KB_ROW & 0x7f);\ +} + + diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/io.h linux-2.6.25-rc4/include/asm-arm/arch/io.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/io.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/io.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,20 @@ +/* + * linux/include/asm-arm/arch-pxa/io.h + * + * Copied from asm/arch/sa1100/io.h + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#include + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We don't actually have real ISA nor PCI buses, but there is so many + * drivers out there that might just work if we fake them... + */ +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) + +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/irda.h linux-2.6.25-rc4/include/asm-arm/arch/irda.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/irda.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/irda.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,17 @@ +#ifndef ASMARM_ARCH_IRDA_H +#define ASMARM_ARCH_IRDA_H + +/* board specific transceiver capabilities */ + +#define IR_OFF 1 +#define IR_SIRMODE 2 +#define IR_FIRMODE 4 + +struct pxaficp_platform_data { + int transceiver_cap; + void (*transceiver_mode)(struct device *dev, int mode); +}; + +extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); + +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/irqs.h linux-2.6.25-rc4/include/asm-arm/arch/irqs.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/irqs.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/irqs.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,257 @@ +/* + * linux/include/asm-arm/arch-pxa/irqs.h + * + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + +#define PXA_IRQ(x) (x) + +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) +#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ +#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ +#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ +#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */ +#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ +#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */ +#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ +#endif + +#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ +#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ +#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ +#define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */ +#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */ +#define IRQ_USB PXA_IRQ(11) /* USB Service */ +#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */ +#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */ +#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */ +#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */ +#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */ +#define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request (PXA25x) */ +#define IRQ_SSP2 PXA_IRQ(16) /* SSP2 interrupt (PXA27x) */ +#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */ +#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */ +#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */ +#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */ +#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */ +#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/ +#define IRQ_MMC PXA_IRQ(23) /* MMC Status/Error Detection */ +#define IRQ_SSP PXA_IRQ(24) /* SSP Service Request */ +#define IRQ_DMA PXA_IRQ(25) /* DMA Channel Service Request */ +#define IRQ_OST0 PXA_IRQ(26) /* OS Timer match 0 */ +#define IRQ_OST1 PXA_IRQ(27) /* OS Timer match 1 */ +#define IRQ_OST2 PXA_IRQ(28) /* OS Timer match 2 */ +#define IRQ_OST3 PXA_IRQ(29) /* OS Timer match 3 */ +#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ +#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ + +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) +#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ +#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ +#endif + +#ifdef CONFIG_PXA3xx +#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */ +#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ +#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ +#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ +#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */ +#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ +#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ +#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ +#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ +#define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */ +#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ +#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ +#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ +#endif + +#define PXA_GPIO_IRQ_BASE (64) +#define PXA_GPIO_IRQ_NUM (128) + +#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) +#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) + +#define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE) +#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) + +/* + * The next 16 interrupts are for board specific purposes. Since + * the kernel can only run on one machine at a time, we can re-use + * these. If you need more, increase IRQ_BOARD_END, but keep it + * within sensible limits. + */ +#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) +#define IRQ_BOARD_END (IRQ_BOARD_START + 16) + +#define IRQ_SA1111_START (IRQ_BOARD_END) +#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) +#define IRQ_GPAIN1 (IRQ_BOARD_END + 1) +#define IRQ_GPAIN2 (IRQ_BOARD_END + 2) +#define IRQ_GPAIN3 (IRQ_BOARD_END + 3) +#define IRQ_GPBIN0 (IRQ_BOARD_END + 4) +#define IRQ_GPBIN1 (IRQ_BOARD_END + 5) +#define IRQ_GPBIN2 (IRQ_BOARD_END + 6) +#define IRQ_GPBIN3 (IRQ_BOARD_END + 7) +#define IRQ_GPBIN4 (IRQ_BOARD_END + 8) +#define IRQ_GPBIN5 (IRQ_BOARD_END + 9) +#define IRQ_GPCIN0 (IRQ_BOARD_END + 10) +#define IRQ_GPCIN1 (IRQ_BOARD_END + 11) +#define IRQ_GPCIN2 (IRQ_BOARD_END + 12) +#define IRQ_GPCIN3 (IRQ_BOARD_END + 13) +#define IRQ_GPCIN4 (IRQ_BOARD_END + 14) +#define IRQ_GPCIN5 (IRQ_BOARD_END + 15) +#define IRQ_GPCIN6 (IRQ_BOARD_END + 16) +#define IRQ_GPCIN7 (IRQ_BOARD_END + 17) +#define IRQ_MSTXINT (IRQ_BOARD_END + 18) +#define IRQ_MSRXINT (IRQ_BOARD_END + 19) +#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) +#define IRQ_TPTXINT (IRQ_BOARD_END + 21) +#define IRQ_TPRXINT (IRQ_BOARD_END + 22) +#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) +#define SSPXMTINT (IRQ_BOARD_END + 24) +#define SSPRCVINT (IRQ_BOARD_END + 25) +#define SSPROR (IRQ_BOARD_END + 26) +#define AUDXMTDMADONEA (IRQ_BOARD_END + 32) +#define AUDRCVDMADONEA (IRQ_BOARD_END + 33) +#define AUDXMTDMADONEB (IRQ_BOARD_END + 34) +#define AUDRCVDMADONEB (IRQ_BOARD_END + 35) +#define AUDTFSR (IRQ_BOARD_END + 36) +#define AUDRFSR (IRQ_BOARD_END + 37) +#define AUDTUR (IRQ_BOARD_END + 38) +#define AUDROR (IRQ_BOARD_END + 39) +#define AUDDTS (IRQ_BOARD_END + 40) +#define AUDRDD (IRQ_BOARD_END + 41) +#define AUDSTO (IRQ_BOARD_END + 42) +#define IRQ_USBPWR (IRQ_BOARD_END + 43) +#define IRQ_HCIM (IRQ_BOARD_END + 44) +#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) +#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) +#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) +#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) +#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) +#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) +#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) +#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) +#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) +#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) + +#define IRQ_LOCOMO_START (IRQ_BOARD_END) +#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0) +#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1) +#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2) +#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3) +#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4) +#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5) +#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6) +#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7) +#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8) +#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9) +#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10) +#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11) +#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12) +#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13) +#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14) +#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15) +#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16) +#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) +#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) +#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) +#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20) +#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) + +/* + * Figure out the MAX IRQ number. + * + * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. + * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1 + * Otherwise, we have the standard IRQs only. + */ +#ifdef CONFIG_SA1111 +#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) +#elif defined(CONFIG_SHARP_LOCOMO) +#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) +#elif defined(CONFIG_ARCH_LUBBOCK) || \ + defined(CONFIG_MACH_LOGICPD_PXA270) || \ + defined(CONFIG_MACH_MAINSTONE) || \ + defined(CONFIG_MACH_PCM027) +#define NR_IRQS (IRQ_BOARD_END) +#else +#define NR_IRQS (IRQ_BOARD_START) +#endif + +/* + * Board specific IRQs. Define them here. + * Do not surround them with ifdefs. + */ +#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x)) +#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0) +#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1) +#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */ +#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3) +#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4) +#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5) +#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ +#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) + +#define LPD270_IRQ(x) (IRQ_BOARD_START + (x)) +#define LPD270_USBC_IRQ LPD270_IRQ(2) +#define LPD270_ETHERNET_IRQ LPD270_IRQ(3) +#define LPD270_AC97_IRQ LPD270_IRQ(4) + +#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) +#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) +#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) +#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) +#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) +#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) +#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) +#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) +#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) +#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) +#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) +#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) +#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) +#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) +#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) + +/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */ +#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0) +#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) +#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) +#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) + +/* phyCORE-PXA270 (PCM027) Interrupts */ +#define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) +#define PCM027_BTDET_IRQ PCM027_IRQ(0) +#define PCM027_FF_RI_IRQ PCM027_IRQ(1) +#define PCM027_MMCDET_IRQ PCM027_IRQ(2) +#define PCM027_PM_5V_IRQ PCM027_IRQ(3) + +/* ITE8152 irqs */ +/* add IT8152 IRQs beyond BOARD_END */ +#ifdef CONFIG_PCI_HOST_ITE8152 +#define IT8152_IRQ(x) (IRQ_GPIO(IRQ_BOARD_END) + 1 + (x)) + +/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ +#define IT8152_LD_IRQ_COUNT 9 +#define IT8152_LP_IRQ_COUNT 16 +#define IT8152_PD_IRQ_COUNT 15 + +/* Priorities: */ +#define IT8152_PD_IRQ(i) IT8152_IRQ(i) +#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT) +#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT) + +#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1) + +#undef NR_IRQS +#define NR_IRQS (IT8152_LAST_IRQ+1) +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/littleton.h linux-2.6.25-rc4/include/asm-arm/arch/littleton.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/littleton.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/littleton.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,6 @@ +#ifndef __ASM_ARCH_ZYLONITE_H +#define __ASM_ARCH_ZYLONITE_H + +#define LITTLETON_ETH_PHYS 0x30000000 + +#endif /* __ASM_ARCH_ZYLONITE_H */ diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/lpd270.h linux-2.6.25-rc4/include/asm-arm/arch/lpd270.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/lpd270.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/lpd270.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,38 @@ +/* + * include/asm-arm/arch-pxa/lpd270.h + * + * Author: Lennert Buytenhek + * Created: Feb 10, 2006 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_LPD270_H +#define __ASM_ARCH_LPD270_H + +#define LPD270_CPLD_PHYS PXA_CS2_PHYS +#define LPD270_CPLD_VIRT 0xf0000000 +#define LPD270_CPLD_SIZE 0x00100000 + +#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) + +/* CPLD registers */ +#define LPD270_CPLD_REG(x) ((unsigned long)(LPD270_CPLD_VIRT + (x))) +#define LPD270_CONTROL LPD270_CPLD_REG(0x00) +#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) +#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) +#define LPD270_CPLD_REVISION LPD270_CPLD_REG(0x14) +#define LPD270_EEPROM_SPI_ITF LPD270_CPLD_REG(0x20) +#define LPD270_MODE_PINS LPD270_CPLD_REG(0x24) +#define LPD270_EGPIO LPD270_CPLD_REG(0x30) +#define LPD270_INT_MASK LPD270_CPLD_REG(0x40) +#define LPD270_INT_STATUS LPD270_CPLD_REG(0x50) + +#define LPD270_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */ +#define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ +#define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */ + + +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/lubbock.h linux-2.6.25-rc4/include/asm-arm/arch/lubbock.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/lubbock.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/lubbock.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,40 @@ +/* + * linux/include/asm-arm/arch-pxa/lubbock.h + * + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define LUBBOCK_ETH_PHYS PXA_CS3_PHYS + +#define LUBBOCK_FPGA_PHYS PXA_CS2_PHYS +#define LUBBOCK_FPGA_VIRT (0xf0000000) +#define LUB_P2V(x) ((x) - LUBBOCK_FPGA_PHYS + LUBBOCK_FPGA_VIRT) +#define LUB_V2P(x) ((x) - LUBBOCK_FPGA_VIRT + LUBBOCK_FPGA_PHYS) + +#ifndef __ASSEMBLY__ +# define __LUB_REG(x) (*((volatile unsigned long *)LUB_P2V(x))) +#else +# define __LUB_REG(x) LUB_P2V(x) +#endif + +/* FPGA register virtual addresses */ +#define LUB_WHOAMI __LUB_REG(LUBBOCK_FPGA_PHYS + 0x000) +#define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010) +#define LUB_DISC_BLNK_LED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x040) +#define LUB_CONF_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x050) +#define LUB_USER_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x060) +#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080) +#define LUB_MISC_RD __LUB_REG(LUBBOCK_FPGA_PHYS + 0x090) +#define LUB_IRQ_MASK_EN __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0c0) +#define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0) +#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100) + +#ifndef __ASSEMBLY__ +extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set); +#endif diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/magician.h linux-2.6.25-rc4/include/asm-arm/arch/magician.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/magician.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/magician.h 2008-03-08 16:11:19.000000000 +0100 @@ -0,0 +1,111 @@ +/* + * GPIO and IRQ definitions for HTC Magician PDA phones + * + * Copyright (c) 2007 Philipp Zabel + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _MAGICIAN_H_ +#define _MAGICIAN_H_ + +#include + +/* + * PXA GPIOs + */ + +#define GPIO0_MAGICIAN_KEY_POWER 0 +#define GPIO9_MAGICIAN_UNKNOWN 9 +#define GPIO10_MAGICIAN_GSM_IRQ 10 +#define GPIO11_MAGICIAN_GSM_OUT1 11 +#define GPIO13_MAGICIAN_CPLD_IRQ 13 +#define GPIO18_MAGICIAN_UNKNOWN 18 +#define GPIO22_MAGICIAN_VIBRA_EN 22 +#define GPIO26_MAGICIAN_GSM_POWER 26 +#define GPIO27_MAGICIAN_USBC_PUEN 27 +#define GPIO30_MAGICIAN_nCHARGE_EN 30 +#define GPIO37_MAGICIAN_KEY_HANGUP 37 +#define GPIO38_MAGICIAN_KEY_CONTACTS 38 +#define GPIO40_MAGICIAN_GSM_OUT2 40 +#define GPIO48_MAGICIAN_UNKNOWN 48 +#define GPIO56_MAGICIAN_UNKNOWN 56 +#define GPIO57_MAGICIAN_CAM_RESET 57 +#define GPIO83_MAGICIAN_nIR_EN 83 +#define GPIO86_MAGICIAN_GSM_RESET 86 +#define GPIO87_MAGICIAN_GSM_SELECT 87 +#define GPIO90_MAGICIAN_KEY_CALENDAR 90 +#define GPIO91_MAGICIAN_KEY_CAMERA 91 +#define GPIO93_MAGICIAN_KEY_UP 93 +#define GPIO94_MAGICIAN_KEY_DOWN 94 +#define GPIO95_MAGICIAN_KEY_LEFT 95 +#define GPIO96_MAGICIAN_KEY_RIGHT 96 +#define GPIO97_MAGICIAN_KEY_ENTER 97 +#define GPIO98_MAGICIAN_KEY_RECORD 98 +#define GPIO99_MAGICIAN_HEADPHONE_IN 99 +#define GPIO100_MAGICIAN_KEY_VOL_UP 100 +#define GPIO101_MAGICIAN_KEY_VOL_DOWN 101 +#define GPIO102_MAGICIAN_KEY_PHONE 102 +#define GPIO103_MAGICIAN_LED_KP 103 +#define GPIO104_MAGICIAN_LCD_POWER_1 104 +#define GPIO105_MAGICIAN_LCD_POWER_2 105 +#define GPIO106_MAGICIAN_LCD_POWER_3 106 +#define GPIO107_MAGICIAN_DS1WM_IRQ 107 +#define GPIO108_MAGICIAN_GSM_READY 108 +#define GPIO114_MAGICIAN_UNKNOWN 114 +#define GPIO115_MAGICIAN_nPEN_IRQ 115 +#define GPIO116_MAGICIAN_nCAM_EN 116 +#define GPIO119_MAGICIAN_UNKNOWN 119 +#define GPIO120_MAGICIAN_UNKNOWN 120 + +/* + * PXA GPIO alternate function mode & direction + */ + +#define GPIO0_MAGICIAN_KEY_POWER_MD (0 | GPIO_IN) +#define GPIO9_MAGICIAN_UNKNOWN_MD (9 | GPIO_IN) +#define GPIO10_MAGICIAN_GSM_IRQ_MD (10 | GPIO_IN) +#define GPIO11_MAGICIAN_GSM_OUT1_MD (11 | GPIO_OUT) +#define GPIO13_MAGICIAN_CPLD_IRQ_MD (13 | GPIO_IN) +#define GPIO18_MAGICIAN_UNKNOWN_MD (18 | GPIO_OUT) +#define GPIO22_MAGICIAN_VIBRA_EN_MD (22 | GPIO_OUT) +#define GPIO26_MAGICIAN_GSM_POWER_MD (26 | GPIO_OUT) +#define GPIO27_MAGICIAN_USBC_PUEN_MD (27 | GPIO_OUT) +#define GPIO30_MAGICIAN_nCHARGE_EN_MD (30 | GPIO_OUT) +#define GPIO37_MAGICIAN_KEY_HANGUP_MD (37 | GPIO_OUT) +#define GPIO38_MAGICIAN_KEY_CONTACTS_MD (38 | GPIO_OUT) +#define GPIO40_MAGICIAN_GSM_OUT2_MD (40 | GPIO_OUT) +#define GPIO48_MAGICIAN_UNKNOWN_MD (48 | GPIO_OUT) +#define GPIO56_MAGICIAN_UNKNOWN_MD (56 | GPIO_OUT) +#define GPIO57_MAGICIAN_CAM_RESET_MD (57 | GPIO_OUT) +#define GPIO83_MAGICIAN_nIR_EN_MD (83 | GPIO_OUT) +#define GPIO86_MAGICIAN_GSM_RESET_MD (86 | GPIO_OUT) +#define GPIO87_MAGICIAN_GSM_SELECT_MD (87 | GPIO_OUT) +#define GPIO90_MAGICIAN_KEY_CALENDAR_MD (90 | GPIO_OUT) +#define GPIO91_MAGICIAN_KEY_CAMERA_MD (91 | GPIO_OUT) +#define GPIO93_MAGICIAN_KEY_UP_MD (93 | GPIO_IN) +#define GPIO94_MAGICIAN_KEY_DOWN_MD (94 | GPIO_IN) +#define GPIO95_MAGICIAN_KEY_LEFT_MD (95 | GPIO_IN) +#define GPIO96_MAGICIAN_KEY_RIGHT_MD (96 | GPIO_IN) +#define GPIO97_MAGICIAN_KEY_ENTER_MD (97 | GPIO_IN) +#define GPIO98_MAGICIAN_KEY_RECORD_MD (98 | GPIO_IN) +#define GPIO99_MAGICIAN_HEADPHONE_IN_MD (99 | GPIO_IN) +#define GPIO100_MAGICIAN_KEY_VOL_UP_MD (100 | GPIO_IN) +#define GPIO101_MAGICIAN_KEY_VOL_DOWN_MD (101 | GPIO_IN) +#define GPIO102_MAGICIAN_KEY_PHONE_MD (102 | GPIO_IN) +#define GPIO103_MAGICIAN_LED_KP_MD (103 | GPIO_OUT) +#define GPIO104_MAGICIAN_LCD_POWER_1_MD (104 | GPIO_OUT) +#define GPIO105_MAGICIAN_LCD_POWER_2_MD (105 | GPIO_OUT) +#define GPIO106_MAGICIAN_LCD_POWER_3_MD (106 | GPIO_OUT) +#define GPIO107_MAGICIAN_DS1WM_IRQ_MD (107 | GPIO_IN) +#define GPIO108_MAGICIAN_GSM_READY_MD (108 | GPIO_IN) +#define GPIO114_MAGICIAN_UNKNOWN_MD (114 | GPIO_OUT) +#define GPIO115_MAGICIAN_nPEN_IRQ_MD (115 | GPIO_IN) +#define GPIO116_MAGICIAN_nCAM_EN_MD (116 | GPIO_OUT) +#define GPIO119_MAGICIAN_UNKNOWN_MD (119 | GPIO_OUT) +#define GPIO120_MAGICIAN_UNKNOWN_MD (120 | GPIO_OUT) + +#endif /* _MAGICIAN_H_ */ diff -NbBur linux-2.6.25-rc4-orig/include/asm-arm/arch/mainstone.h linux-2.6.25-rc4/include/asm-arm/arch/mainstone.h --- linux-2.6.25-rc4-orig/include/asm-arm/arch/mainstone.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.25-rc4/include/asm-arm/arch/mainstone.h 2008-02-26 01:20:20.000000000 +0100 @@ -0,0 +1,120 @@ +/* + * linux/include/asm-arm/arch-pxa/mainstone.h + * + * Author: Nicolas Pitre + * Created: Nov 14, 2002 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ASM_ARCH_MAINSTONE_H +#define ASM_ARCH_MAINSTONE_H + +#define MST_ETH_PHYS PXA_CS4_PHYS + +#define MST_FPGA_PHYS PXA_CS2_PHYS +#define MST_FPGA_VIRT (0xf0000000) +#define MST_P2V(x) ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT) +#define MST_V2P(x) ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS) + +#ifndef __ASSEMBLY__ +# define __MST_REG(x) (*((volatile unsigned long *)MST_P2V(x))) +#else +# define __MST_REG(x) MST_P2V(x) +#endif + +/* board level registers in the FPGA */ + +#define MST_LEDDAT1 __MST_REG(0x08000010) +#define MST_LEDDAT2 __MST_REG(0x08000014) +#define MST_LEDCTRL __MST_REG(0x08000040) +#define MST_GPSWR __MST_REG(0x08000060) +#define MST_MSCWR1 __MST_REG(0x08000080) +#define MST_MSCWR2 __MST_REG(0x08000084) +#define MST_MSCWR3 __MST_REG(0x08000088) +#define MST_MSCRD __MST_REG(0x08000090) +#define MST_INTMSKENA __MST_REG(0x080000c0) +#define MST_INTSETCLR __MST_REG(0x080000d0) +#define MST_PCMCIA0 __MST_REG(0x080000e0) +#define MST_PCMCIA1 __MST_REG(0x080000e4) + +#define MST_MSCWR1_CAMERA_ON (1 << 15) /* Camera interface power control */ +#define MST_MSCWR1_CAMERA_SEL (1 << 14) /* Camera interface mux control */ +#define MST_MSCWR1_LCD_CTL (1 << 13) /* General-purpose LCD control */ +#define MST_MSCWR1_MS_ON (1 << 12) /* Memory Stick power control */ +#define MST_MSCWR1_MMC_ON (1 << 11) /* MultiMediaCard* power control */ +#define MST_MSCWR1_MS_SEL (1 << 10) /* SD/MS multiplexer control */ +#define MST_MSCWR1_BB_SEL (1 << 9) /* PCMCIA/Baseband multiplexer */ +#define MST_MSCWR1_BT_ON (1 << 8) /* Bluetooth UART transceiver */ +#define MST_MSCWR1_BTDTR (1 << 7) /* Bluetooth UART DTR */ + +#define MST_MSCWR1_IRDA_MASK (3 << 5) /* IrDA transceiver mode */ +#define MST_MSCWR1_IRDA_FULL (0 << 5) /* full distance power */ +#define MST_MSCWR1_IRDA_OFF (1 << 5) /* shutdown */ +#define MST_MSCWR1_IRDA_MED (2 << 5) /* 2/3 distance power */ +#define MST_MSCWR1_IRDA_LOW (3 << 5) /* 1/3 distance power */ + +#define MST_MSCWR1_IRDA_FIR (1 << 4) /* IrDA transceiver SIR/FIR */ +#define MST_MSCWR1_GREENLED (1 << 3) /* LED D1 control */ +#define MST_MSCWR1_PDC_CTL (1 << 2) /* reserved */ +#define MST_MSCWR1_MTR_ON (1 << 1) /* Silent alert motor */ +#define MST_MSCWR1_SYSRESET (1 << 0) /* System reset */ + +#define MST_MSCWR2_USB_OTG_RST (1 << 6) /* USB On The Go reset */ +#define MST_MSCWR2_USB_OTG_SEL (1 << 5) /* USB On The Go control */ +#define MST_MSCWR2_nUSBC_SC (1 << 4) /* USB client soft connect control */ +#define MST_MSCWR2_I2S_SPKROFF (1 << 3) /* I2S CODEC amplifier control */ +#define MST_MSCWR2_AC97_SPKROFF (1 << 2) /* AC97 CODEC amplifier control */ +#define MST_MSCWR2_RADIO_PWR (1 << 1) /* Radio module power control */ +#define MST_MSCWR2_RADIO_WAKE (1 << 0) /* Radio module wake-up signal */ + +#define MST_MSCWR3_GPIO_RESET_EN (1 << 2) /* Enable GPIO Reset */ +#define MST_MSCWR3_GPIO_RESET (1 << 1) /* Initiate a GPIO Reset */ +#define MST_MSCWR3_COMMS_SW_RESET (1 << 0) /* Communications Processor Reset Control */ + +#define MST_MSCRD_nPENIRQ (1 << 9) /* ADI7873* nPENIRQ signal */ +#define MST_MSCRD_nMEMSTK_CD (1 << 8) /* Memory Stick detection signal */ +#define MST_MSCRD_nMMC_CD (1 << 7) /* SD/MMC card detection signal */ +#define MST_MSCRD_nUSIM_CD (1 <<