Index: linux-2.6.21/arch/arm/mach-pxa/pxa27x.c =================================================================== --- linux-2.6.21.orig/arch/arm/mach-pxa/pxa27x.c 2007-09-21 23:57:40.000000000 -0300 +++ linux-2.6.21/arch/arm/mach-pxa/pxa27x.c 2007-09-21 23:57:49.000000000 -0300 @@ -22,6 +22,10 @@ #include #include +#ifdef CONFIG_PXA_EZX +#include +#endif + #include "generic.h" /* Crystal clock: 13MHz */ @@ -156,7 +160,13 @@ break; case PM_SUSPEND_MEM: /* set resume return address */ +#ifdef CONFIG_PXA_EZX + /* set EZX flags for blob - WM */ + *(unsigned long *)(phys_to_virt(RESUME_ADDR)) = virt_to_phys(pxa_cpu_resume); + *(unsigned long *)(phys_to_virt(FLAG_ADDR)) = SLEEP_FLAG; +#else PSPR = virt_to_phys(pxa_cpu_resume); +#endif pxa_cpu_suspend(PWRMODE_SLEEP); break; } Index: linux-2.6.21/arch/arm/mach-pxa/pm.c =================================================================== --- linux-2.6.21.orig/arch/arm/mach-pxa/pm.c 2007-09-21 23:57:40.000000000 -0300 +++ linux-2.6.21/arch/arm/mach-pxa/pm.c 2007-09-21 23:57:49.000000000 -0300 @@ -24,6 +24,10 @@ #include #include +#ifdef CONFIG_PXA_EZX +#include +#endif + /* * Debug macros @@ -152,8 +156,12 @@ } /* ensure not to come back here if it wasn't intended */ +#ifdef CONFIG_PXA_EZX + *(unsigned long *)(phys_to_virt(RESUME_ADDR)) = 0; + *(unsigned long *)(phys_to_virt(FLAG_ADDR)) = OFF_FLAG; +#else PSPR = 0; - +#endif /* restore registers */ RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); Index: linux-2.6.21/arch/arm/mach-pxa/ezx.c =================================================================== --- linux-2.6.21.orig/arch/arm/mach-pxa/ezx.c 2007-09-21 23:57:48.000000000 -0300 +++ linux-2.6.21/arch/arm/mach-pxa/ezx.c 2007-09-22 00:07:34.000000000 -0300 @@ -19,6 +19,7 @@ #include #include #include +#include #include "generic.h" @@ -122,8 +123,53 @@ &ezxbp_device, }; +/* PM */ +extern int bp_handshake_passed(void); + +static void ezx_reboot_poweroff(char mode) +{ + *(unsigned long *)(phys_to_virt(BPSIG_ADDR)) = NO_FLAG; + cpu_proc_fin(); + +#ifdef CONFIG_EZX_BP + if (pxa_gpio_get_value(GPIO_BB_WDI) == 0) { + *(unsigned long *)(phys_to_virt(BPSIG_ADDR)) = WDI_FLAG; + + /* reset BP */ + pxa_gpio_set_value(GPIO_BB_RESET, 0); + mdelay(1); + pxa_gpio_set_value(GPIO_BB_RESET, 1); + + if (mode == 'z') { + arch_reset('h'); + while(1); + } + } +#endif + if (mode == 'z') + /* Panic! Ask PCAP to turn both processors off */ + pxa_gpio_set_value(GPIO_WDI_AP, 0); + else + arm_machine_restart(mode); + + while(1); +} + +static inline void ezx_poweroff(void) +{ + ezx_reboot_poweroff('z'); +} + +static inline void ezx_restart(char mode) +{ + ezx_reboot_poweroff(mode); +} + static int __init ezx_init(void) { + pm_power_off = ezx_poweroff; + arm_pm_restart = ezx_restart; + CKEN = CKEN9_OSTIMER | CKEN22_MEMC; pxa_gpio_mode(GPIO_ICL_FFRXD_MD);