--- linux-2.6.5/kernel/printk.c~heh 2004-04-03 22:38:24.000000000 -0500 +++ linux-2.6.5/kernel/printk.c 2004-04-30 20:57:36.000000000 -0400 @@ -832,3 +832,25 @@ printk_ratelimit_burst); } EXPORT_SYMBOL(printk_ratelimit); + +#include + +static void +show_msg_info(int key, struct pt_regs *regs, struct tty_struct *tty) +{ + call_console_drivers(log_end - logged_chars, log_end); +} + +static struct sysrq_key_op msg_info_op = { + .handler = show_msg_info, + .help_msg = "Dumpmsgs", + .action_msg = "Kernel Messages", +}; + +static int __init dbg_init(void) +{ + register_sysrq_key('d', &msg_info_op); + return 0; +} + +__initcall(dbg_init); --- linux-2.6.5/kernel/resource.c~heh 2004-04-03 22:37:36.000000000 -0500 +++ linux-2.6.5/kernel/resource.c 2004-04-30 20:57:36.000000000 -0400 @@ -179,6 +179,8 @@ { struct resource *tmp, **p; + BUG_ON(old->child); + p = &old->parent->child; for (;;) { tmp = *p; @@ -409,6 +411,47 @@ EXPORT_SYMBOL(adjust_resource); /* + * Given an existing resource, change its start and size to match the + * arguments. Returns -EBUSY if it can't fit. Existing children of + * the resource are assumed to be immutable. + */ +int reallocate_resource(struct resource *res, unsigned long start, unsigned long size) +{ + struct resource *tmp, *parent = res->parent; + unsigned long end = start + size - 1; + int result = -EBUSY; + + write_lock(&resource_lock); + + if ((start < parent->start) || (end > parent->end)) + goto out; + + for (tmp = res->child; tmp; tmp = tmp->sibling) { + if ((tmp->start < start) || (tmp->end > end)) + goto out; + } + + if (res->sibling && (res->sibling->start <= end)) + goto out; + + tmp = parent->child; + if (tmp != res) { + while (tmp->sibling != res) + tmp = tmp->sibling; + if (start <= tmp->end) + goto out; + } + + res->start = start; + res->end = end; + result = 0; + + out: + write_unlock(&resource_lock); + return result; +} + +/* * This is compatibility stuff for IO resources. * * Note how this, unlike the above, knows about --- linux-2.6.5/include/asm-arm/mach/irq.h~heh 2004-04-03 22:36:54.000000000 -0500 +++ linux-2.6.5/include/asm-arm/mach/irq.h 2004-04-30 20:57:36.000000000 -0400 @@ -14,6 +14,19 @@ struct pt_regs; struct seq_file; +/* + * Architectures are expected to define NR_IRQ_DEVICES and + * NR_IRQ_DEVICE_SHIFT if they wish to use dynamic IRQs. + */ +#ifndef NR_IRQ_DEVICES +#define NR_IRQ_DEVICES 1 +#endif +#define NR_IRQ_PER_DEVICE (1 << (NR_IRQ_DEVICE_SHIFT - 1)) + +#define IRQ_DEVICE(i) ((i) >> NR_IRQ_DEVICE_SHIFT) +#define IRQ_INDEX(i) ((i) & (NR_IRQ_PER_GROUP - 1)) +#define TO_IRQ(g,i) (((g) << NR_IRQ_DEVICE_SHIFT) + (i)) + typedef void (*irq_handler_t)(unsigned int, struct irqdesc *, struct pt_regs *); typedef void (*irq_control_t)(unsigned int); --- linux-2.6.5/include/asm-arm/arch-pxa/uncompress.h~heh 2004-04-03 22:36:17.000000000 -0500 +++ linux-2.6.5/include/asm-arm/arch-pxa/uncompress.h 2004-04-30 20:57:36.000000000 -0400 @@ -12,6 +12,7 @@ #define FFUART ((volatile unsigned long *)0x40100000) #define BTUART ((volatile unsigned long *)0x40200000) #define STUART ((volatile unsigned long *)0x40700000) +#define HWUART ((volatile unsigned long *)0x41600000) #define UART FFUART --- linux-2.6.5/include/asm-arm/arch-pxa/dma.h~heh 2004-04-03 22:38:18.000000000 -0500 +++ linux-2.6.5/include/asm-arm/arch-pxa/dma.h 2004-04-30 20:57:36.000000000 -0400 @@ -22,11 +22,11 @@ * Note: this structure must always be aligned to a 16-byte boundary. */ -typedef struct { - volatile u32 ddadr; /* Points to the next descriptor + flags */ - volatile u32 dsadr; /* DSADR value for the current transfer */ - volatile u32 dtadr; /* DTADR value for the current transfer */ - volatile u32 dcmd; /* DCMD value for the current transfer */ +typedef struct pxa_dma_desc { + u32 ddadr; /* Points to the next descriptor + flags */ + u32 dsadr; /* DSADR value for the current transfer */ + u32 dtadr; /* DTADR value for the current transfer */ + u32 dcmd; /* DCMD value for the current transfer */ } pxa_dma_desc; /* --- linux-2.6.5/include/asm-arm/arch-pxa/serial.h~heh 2004-04-03 22:37:06.000000000 -0500 +++ linux-2.6.5/include/asm-arm/arch-pxa/serial.h 2004-04-30 20:57:36.000000000 -0400 @@ -43,6 +43,15 @@ io_type: SERIAL_IO_MEM, \ irq: IRQ_BTUART, \ flags: STD_COM_FLAGS, \ + }, { \ + type: PORT_PXA, \ + xmit_fifo_size: 64, \ + baud_base: BAUD_BASE, \ + iomem_base: &HWUART, \ + iomem_reg_shift: 2, \ + io_type: SERIAL_IO_MEM, \ + irq: IRQ_HWUART, \ + flags: STD_COM_FLAGS, \ } #define EXTRA_SERIAL_PORT_DEFNS --- linux-2.6.5/include/asm-arm/arch-pxa/pxa-regs.h~heh 2004-04-03 22:37:36.000000000 -0500 +++ linux-2.6.5/include/asm-arm/arch-pxa/pxa-regs.h 2004-04-30 20:57:36.000000000 -0400 @@ -124,26 +124,26 @@ #define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ #define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ #define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ -#define DRCMR15 __REG(0x4000013c) /* Reserved */ -#define DRCMR16 __REG(0x40000140) /* Reserved */ +#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for NSSP receive Request */ +#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for NSSP transmit Request */ #define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ #define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ #define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ #define DRCMR20 __REG(0x40000150) /* Request to Channel Map Register for STUART transmit Request */ #define DRCMR21 __REG(0x40000154) /* Request to Channel Map Register for MMC receive Request */ #define DRCMR22 __REG(0x40000158) /* Request to Channel Map Register for MMC transmit Request */ -#define DRCMR23 __REG(0x4000015c) /* Reserved */ -#define DRCMR24 __REG(0x40000160) /* Reserved */ +#define DRCMR23 __REG(0x4000015c) /* Request to Channel Map Register for ASSP receive Request */ +#define DRCMR24 __REG(0x40000160) /* Request to Channel Map Register for ASSP transmit Request */ #define DRCMR25 __REG(0x40000164) /* Request to Channel Map Register for USB endpoint 1 Request */ #define DRCMR26 __REG(0x40000168) /* Request to Channel Map Register for USB endpoint 2 Request */ #define DRCMR27 __REG(0x4000016C) /* Request to Channel Map Register for USB endpoint 3 Request */ #define DRCMR28 __REG(0x40000170) /* Request to Channel Map Register for USB endpoint 4 Request */ -#define DRCMR29 __REG(0x40000174) /* Reserved */ +#define DRCMR29 __REG(0x40000174) /* Request to Channel Map Register for HWUART receive Request */ #define DRCMR30 __REG(0x40000178) /* Request to Channel Map Register for USB endpoint 6 Request */ #define DRCMR31 __REG(0x4000017C) /* Request to Channel Map Register for USB endpoint 7 Request */ #define DRCMR32 __REG(0x40000180) /* Request to Channel Map Register for USB endpoint 8 Request */ #define DRCMR33 __REG(0x40000184) /* Request to Channel Map Register for USB endpoint 9 Request */ -#define DRCMR34 __REG(0x40000188) /* Reserved */ +#define DRCMR34 __REG(0x40000188) /* Request to Channel Map Register for HWUART transmit Request */ #define DRCMR35 __REG(0x4000018C) /* Request to Channel Map Register for USB endpoint 11 Request */ #define DRCMR36 __REG(0x40000190) /* Request to Channel Map Register for USB endpoint 12 Request */ #define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ @@ -163,12 +163,16 @@ #define DRCMRTXPCDR DRCMR12 #define DRCMRRXSSDR DRCMR13 #define DRCMRTXSSDR DRCMR14 +#define DRCMRRXNSSPDR DRCMR15 +#define DRCMRTXNSSPDR DRCMR16 #define DRCMRRXICDR DRCMR17 #define DRCMRTXICDR DRCMR18 #define DRCMRRXSTRBR DRCMR19 #define DRCMRTXSTTHR DRCMR20 #define DRCMRRXMMC DRCMR21 #define DRCMRTXMMC DRCMR22 +#define DRCMRRXASSPDR DRCMR23 +#define DRCMRTXASSPDR DRCMR24 #define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ #define DRCMR_CHLNUM 0x0f /* mask for Channel Number (read / write) */ @@ -303,6 +307,22 @@ #define BTDLL __REG(0x40200000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ #define BTDLH __REG(0x40200004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ +/* Hardware UART (HWUART) */ +#define HWUART HWRBR +#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */ +#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */ +#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */ +#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */ +#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */ +#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */ +#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */ +#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */ +#define HWMSR __REG(0x41600018) /* Reserved */ +#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */ +#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */ +#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ +#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ + /* Standard UART (STUART) */ #define STUART STRBR #define STRBR __REG(0x40700000) /* Receive Buffer Register (read only) */ @@ -1078,6 +1098,111 @@ /* + * NSSP Serial Port Registers (Network SSP) + */ + +#define NSSCR0 __REG(0x41400000) /* NSSP Control Register 0 */ +#define NSSCR1 __REG(0x41400004) /* NSSP Control Register 1 */ +#define NSSSR __REG(0x41400008) /* NSSP Status Register */ +#define NSSITR __REG(0x4140000C) /* NSSP Interrupt Test Register */ +#define NSSDR __REG(0x41400010) /* (Write / Read) NSSP Data Write Register/NSSP Data Read Register */ +#define NSSTO __REG(0x41400028) /* NSSP Time Out Register */ +#define NSSPSP __REG(0x4140002C) /* NSSP Programable Serial Port Register*/ + + +/* + * ASSP Serial Port Registers (Audio SSP) + */ + +#define ASSCR0 __REG(0x41500000) /* ASSP Control Register 0 */ +#define ASSCR1 __REG(0x41500004) /* ASSP Control Register 1 */ +#define ASSSR __REG(0x41500008) /* ASSP Status Register */ +#define ASSITR __REG(0x4150000C) /* ASSP Interrupt Test Register */ +#define ASSDR __REG(0x41500010) /* (Write / Read) ASSP Data Write Register/ASSP Data Read Register */ +#define ASSTO __REG(0x41500028) /* ASSP Time Out Register */ +#define ASSPSP __REG(0x4150002C) /* ASSP Programable Serial Port Register*/ + + +/* + * Bit definitions for SSP, NSSP and ASSP registers + * - note that some bits are only available on the NSSP and ASSP + */ + +#define SSCR0_EDSS (1 << 20) /* ext. data size select */ +#define SSCR0_SCR_MASK 0x000fff00 /* [19:8] secrial clock rate */ +#define SSCR0_SCR(x) (((x)<<8) & XSSCR0_SCR_MASK) +#define SSCR0_SSE (1 << 7) /* sync ser port enable */ +#define SSCR0_FRF_MASK 0x00000030 /* [5:4] frame format */ +#define SSCR0_FRF(x) (((x)<<4) & XSSCR0_FRF_MASK) +#define SSCR0_FRF_SPI 0x00000000 /* ser peripheral i/f */ +#define SSCR0_FRF_TISSP 0x00000010 /* TI sync ser port */ +#define SSCR0_FRF_MICROWAVE 0x00000020 /* microwire */ +#define SSCR0_FRF_PSP 0x00000030 /* prog ser protocol */ +#define SSCR0_DSS_MASK 0x0000000f /* data size select */ +#define SSCR0_DSS(x) ((x) & XSSCR0_DSS_MASK) + +#define SSCR1_TTELP (1 << 31) /* tx hi-z later phase */ +#define SSCR1_TTE (1 << 30) /* tx hi-z enable */ +#define SSCR1_EBCEI (1 << 29) /* bit count error int mask */ +#define SSCR1_SCFR (1 << 28) /* slave clock free running */ +#define SSCR1_SCLKDIR (1 << 25) /* ssp clock direction */ +#define SSCR1_SFRMDIR (1 << 24) /* ssp frame direction */ +#define SSCR1_RWOT (1 << 23) /* rx without transmit */ +#define SSCR1_TSRE (1 << 21) /* tx req enable */ +#define SSCR1_RSRE (1 << 20) /* rx req enable */ +#define SSCR1_TINTE (1 << 19) /* timeout int enable */ +#define SSCR1_STRF (1 << 15) /* select fifo for efwr */ +#define SSCR1_EFWR (1 << 14) /* fifo write/read enable */ +#define SSCR1_RFT_MASK 0x00003c00 /* [13:10] rx fifo threshold */ +#define SSCR1_RFT(x) (((x)<<10) & XSSCR1_RFT_MASK) +#define SSCR1_TFT_MASK 0x000003c0 /* [9:6] tx fifo threshold */ +#define SSCR1_TFT(x) (((x)<<6) & XSSCR1_TFT_MASK) +#define SSCR1_MWDS (1 << 5) /* microwire tx data size */ +#define SSCR1_SPH (1 << 4) /* SPI SSPSCLK phase */ +#define SSCR1_SPO (1 << 3) /* motorolla SPI polarity */ +#define SSCR1_LBM (1 << 2) /* loop-back mode */ +#define SSCR1_TIE (1 << 1) /* tx fifo int enable */ +#define SSCR1_RIE (1 << 0) /* rx fifo int enable */ + +#define SSPSP_DMYSTOP_MASK 0x01800000 /* [24:23] dummy stop */ +#define SSPSP_DMYSTOP(x) (((x)<<23) & XSSPSP_DMYSTOP_MASK) +#define SSPSP_SFRMWDTH_MASK 0x007f0000 /* [22:16] serial frame width */ +#define SSPSP_SFRMWDTH(x) (((x)<<16) & XSSPSP_SFRMWDTH_MASK) +#define SSPSP_SFRMDLY_MASK 0x0000fe00 /* [15:9] serial frame delay */ +#define SSPSP_SFRMDLY(x) (((x)<<9) & XSSPSP_SFRMDLY_MASK) +#define SSPSP_DMYSTRT_MASK 0x00000180 /* [8:7] dummy start */ +#define SSPSP_DMYSTRT(x) (((x)<<7) & XSSPSP_DMYSTRT_MASK) +#define SSPSP_STRTDLY_MASK 0x00000070 /* [6:4] three-bit start delay */ +#define SSPSP_STRTDLY(x) (((x)<<4) & XSSPSP_STRTDLY_MASK) +#define SSPSP_ETDS (1 << 3) /* end of tx data state */ +#define SSPSP_SFRMP (1 << 2) /* serial frame polarity */ +#define SSPSP_SCMODE_MASK 0x00000003 /* bit-rate clock mode */ +#define SSPSP_SCMODE(x) ((x) & XSSPSP_SCMODE_MASK) + +#define SSTO_TIMEOUT_MASK 0x00ffffff /* [23:0] timeout */ +#define SSTO_TIMEOUT(x) ((x) & XSSTO_TIMEOUT_MASK) + +#define SSITR_TROR (1 << 7) /* test rx fifo overrun */ +#define SSITR_TRFS (1 << 6) /* test rx fifo serv req */ +#define SSITR_TTFS (1 << 5) /* test tx fifo serv req */ + +#define SSSR_BCE (1 << 23) /* bit count error */ +#define SSSR_CSS (1 << 22) /* clock sync stat */ +#define SSSR_TUR (1 << 21) /* tx fifo underrun */ +#define SSSR_TINT (1 << 19) /* rx timeout int */ +#define SSSR_RFL_MASK 0x0000f000 /* rx fifo level */ +#define SSSR_RFL(x) (((x)<<16) & XSSSR_RFL_MASK) +#define SSSR_TFL_MASK 0x00000f00 /* tx fifo level */ +#define SSSR_TFL(x) (((x)<<8) & XSSSR_TFL_MASK) +#define SSSR_ROR (1 << 7) /* rx fifo overrun */ +#define SSSR_RFS (1 << 6) /* rx fifo serv request */ +#define SSSR_TFS (1 << 5) /* tx fifo serv req */ +#define SSSR_BSY (1 << 4) /* SSP busy */ +#define SSSR_RNE (1 << 3) /* rx fifo not empty */ +#define SSSR_TNF (1 << 2) /* tx fifo not full */ + + +/* * MultiMediaCard (MMC) controller */ @@ -1122,6 +1247,7 @@ #define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ #define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ #define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ +#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */ #define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */ #define CKEN2_AC97 (1 << 2) /* AC97 Unit Clock Enable */ #define CKEN1_PWM1 (1 << 1) /* PWM1 Clock Enable */ --- linux-2.6.5/include/asm-arm/page.h~heh 2004-04-03 22:36:25.000000000 -0500 +++ linux-2.6.5/include/asm-arm/page.h 2004-04-30 20:57:36.000000000 -0400 @@ -92,6 +92,14 @@ # endif #endif +#ifdef CONFIG_CPU_COPY_V6 +# ifdef _USER +# define MULTI_USER 1 +# else +# define _USER v6 +# endif +#endif + #ifndef _USER #error Unknown user operations model #endif --- linux-2.6.5/include/asm-arm/thread_info.h~heh 2004-04-03 22:37:06.000000000 -0500 +++ linux-2.6.5/include/asm-arm/thread_info.h 2004-04-30 20:57:36.000000000 -0400 @@ -108,8 +108,8 @@ #define TI_CPU 20 #define TI_CPU_DOMAIN 24 #define TI_CPU_SAVE 28 -#define TI_USED_MATH 76 -#define TI_FPSTATE (TI_USED_MATH+16) +#define TI_USED_CP 76 +#define TI_FPSTATE (TI_USED_CP+16) #endif --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/asm-arm/rtc.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/rtc.h + * + * Copyright (C) 2003 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef ASMARM_RTC_H +#define ASMARM_RTC_H + +struct module; + +struct rtc_ops { + struct module *owner; + int (*open)(void); + void (*release)(void); + int (*ioctl)(unsigned int, unsigned long); + + void (*read_time)(struct rtc_time *); + int (*set_time)(struct rtc_time *); + void (*read_alarm)(struct rtc_wkalrm *); + int (*set_alarm)(struct rtc_wkalrm *); + int (*proc)(char *buf); +}; + +void rtc_time_to_tm(unsigned long, struct rtc_time *); +int rtc_tm_to_time(struct rtc_time *, unsigned long *); +void rtc_next_alarm_time(struct rtc_time *, struct rtc_time *, struct rtc_time *); +void rtc_update(unsigned long, unsigned long); +int register_rtc(struct rtc_ops *); +void unregister_rtc(struct rtc_ops *); + +static inline int rtc_periodic_alarm(struct rtc_time *tm) +{ + return (tm->tm_year == -1) || + ((unsigned)tm->tm_mon >= 12) || + ((unsigned)(tm->tm_mday - 1) >= 31) || + ((unsigned)tm->tm_hour > 23) || + ((unsigned)tm->tm_min > 59) || + ((unsigned)tm->tm_sec > 59); +} + +#endif --- linux-2.6.5/include/linux/serial.h~heh 2004-04-03 22:36:26.000000000 -0500 +++ linux-2.6.5/include/linux/serial.h 2004-04-30 20:57:36.000000000 -0400 @@ -81,17 +81,6 @@ #define SERIAL_IO_HUB6 1 #define SERIAL_IO_MEM 2 -struct serial_uart_config { - char *name; - int dfl_xmit_fifo_size; - int flags; -}; - -#define UART_CLEAR_FIFO 0x01 -#define UART_USE_FIFO 0x02 -#define UART_STARTECH 0x04 -#define UART_NATSEMI 0x08 - /* * Definitions for async_struct (and serial_struct) flags field */ --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/i2c-pxa.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,76 @@ +/* + * i2c_pxa.h + * + * Copyright (C) 2002 Intrinsyc Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef _I2C_PXA_H_ +#define _I2C_PXA_H_ + +struct i2c_algo_pxa_data +{ + void (*write_byte) (u8 value); + u8 (*read_byte) (void); + void (*start) (void); + void (*repeat_start) (void); + void (*stop) (void); + void (*abort) (void); + int (*wait_bus_not_busy) (void); + int (*wait_for_interrupt) (int wait_type); + void (*transfer) (int lastbyte, int receive, int midbyte); + void (*reset) (void); + + int udelay; + int timeout; +}; + +#define DEF_TIMEOUT 3 +#define BUS_ERROR (-EREMOTEIO) +#define ACK_DELAY 0 /* time to delay before checking bus error */ +#define MAX_MESSAGES 65536 /* maximum number of messages to send */ + +#define I2C_SLEEP_TIMEOUT 2 /* time to sleep for on i2c transactions */ +#define I2C_RETRY (-2000) /* an error has occurred retry transmit */ +#define I2C_TRANSMIT 1 +#define I2C_RECEIVE 0 +#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */ +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) /* ICR initialization value */ +/* ICR initialize bit values +* +* 15. FM 0 (100 Khz operation) +* 14. UR 0 (No unit reset) +* 13. SADIE 0 (Disables the unit from interrupting on slave addresses +* matching its slave address) +* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration +* in master mode) +* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) +* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) +* 9. IRFIE 1 (Enable interrupts from full buffer received) +* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) +* 7. GCD 1 (Disables i2c unit response to general call messages as a slave) +* 6. IUE 0 (Disable unit until we change settings) +* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL) +* 4. MA 0 (Only send stop with the ICR stop bit) +* 3. TB 0 (We are not transmitting a byte initially) +* 2. ACKNAK 0 (Send an ACK after the unit receives a byte) +* 1. STOP 0 (Do not send a STOP) +* 0. START 0 (Do not send a START) +* +*/ + +#define I2C_ISR_INIT 0x7FF /* status register init */ +/* I2C status register init values + * + * 10. BED 1 (Clear bus error detected) + * 9. SAD 1 (Clear slave address detected) + * 7. IRF 1 (Clear IDBR Receive Full) + * 6. ITE 1 (Clear IDBR Transmit Empty) + * 5. ALD 1 (Clear Arbitration Loss Detected) + * 4. SSD 1 (Clear Slave Stop Detected) + */ + +#endif --- linux-2.6.5/include/linux/ioport.h~heh 2004-04-03 22:36:26.000000000 -0500 +++ linux-2.6.5/include/linux/ioport.h 2004-04-30 20:57:36.000000000 -0400 @@ -99,6 +99,7 @@ void (*alignf)(void *, struct resource *, unsigned long, unsigned long), void *alignf_data); +extern int reallocate_resource(struct resource *res, unsigned long start, unsigned long size); int adjust_resource(struct resource *res, unsigned long start, unsigned long size); --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/switches.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,74 @@ +/* + * linux/include/linux/switches.h + * + * Copyright (C) 2000 John Dorsey + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * 23 October 2000 - created. + */ + +#if !defined(_LINUX_SWITCHES_H) +#define _LINUX_SWITCHES_H + +#define SWITCHES_MASK_SIZE (128) + +typedef unsigned long switches_bitfield; + +#define SWITCHES_BITS (sizeof(switches_bitfield) * 8) +#define SWITCHES_NUM_FIELDS (SWITCHES_MASK_SIZE / SWITCHES_BITS) +#define SWITCHES_FIELD_SELECT(i) ((i) / SWITCHES_BITS) +#define SWITCHES_FIELD_MASK(i) ((switches_bitfield)(1 << (i) % \ + SWITCHES_BITS)) + +typedef struct switches_mask_t { + unsigned int count; + switches_bitfield events[SWITCHES_NUM_FIELDS]; + switches_bitfield states[SWITCHES_NUM_FIELDS]; +} switches_mask_t; + +#define SWITCHES_ZERO(m) \ +do { \ + unsigned int sz_i; \ + (m)->count = 0; \ + for(sz_i = 0; sz_i < SWITCHES_NUM_FIELDS; ++sz_i) \ + (m)->events[sz_i] = (m)->states[sz_i] = 0; \ +} while (0) + +/* `s' is the state of the switch, either 0 or non-zero: */ +#define SWITCHES_SET(m, i, s) \ +do { \ + ((m)->events[SWITCHES_FIELD_SELECT((i))] |= \ + SWITCHES_FIELD_MASK((i))); \ + if(s) \ + ((m)->states[SWITCHES_FIELD_SELECT((i))] |= \ + SWITCHES_FIELD_MASK((i))); \ + else \ + ((m)->states[SWITCHES_FIELD_SELECT((i))] &= \ + ~SWITCHES_FIELD_MASK((i))); \ + ++((m)->count); \ +} while (0) + +/* Should only use to clear an event set by SWITCHES_SET(): */ +#define SWITCHES_CLEAR(m, i) \ +do { \ + ((m)->events[SWITCHES_FIELD_SELECT((i))] &= \ + ~SWITCHES_FIELD_MASK((i))); \ + ((m)->states[SWITCHES_FIELD_SELECT((i))] &= \ + ~SWITCHES_FIELD_MASK((i))); \ + --((m)->count); \ +} + +#define SWITCHES_COUNT(m) ((m)->count) + +/* Returns 0 or non-zero: */ +#define SWITCHES_EVENT(m, i) \ +((m)->events[SWITCHES_FIELD_SELECT((i))] & SWITCHES_FIELD_MASK((i))) + +/* Returns 0 or non-zero: */ +#define SWITCHES_STATE(m, i) \ +((m)->states[SWITCHES_FIELD_SELECT((i))] & SWITCHES_FIELD_MASK((i))) + +#endif /* !defined(_LINUX_SWITCHES_H) */ --- linux-2.6.5/include/linux/serial_reg.h~heh 2004-04-03 22:37:38.000000000 -0500 +++ linux-2.6.5/include/linux/serial_reg.h 2004-04-30 20:57:36.000000000 -0400 @@ -121,6 +121,7 @@ /* * These are the definitions for the Modem Control Register */ +#define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C750) */ #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ #define UART_MCR_OUT2 0x08 /* Out2 complement */ #define UART_MCR_OUT1 0x04 /* Out1 complement */ @@ -156,6 +157,21 @@ #define UART_FCR_PXAR32 0xc0 /* receive FIFO treshold = 32 */ /* + * The Intel PXA2xx chip defines those bits + */ +#define UART_IER_DMAE 0x80 /* DMA Requests Enable */ +#define UART_IER_UUE 0x40 /* UART Unit Enable */ +#define UART_IER_NRZE 0x20 /* NRZ coding Enable */ +#define UART_IER_RTOIE 0x10 /* Receiver Time Out Interrupt Enable */ + +#define UART_IIR_TOD 0x08 /* Character Timeout Indication Detected */ + +#define UART_FCR_PXAR1 0x00 /* receive FIFO treshold = 1 */ +#define UART_FCR_PXAR8 0x40 /* receive FIFO treshold = 8 */ +#define UART_FCR_PXAR16 0x80 /* receive FIFO treshold = 16 */ +#define UART_FCR_PXAR32 0xc0 /* receive FIFO treshold = 32 */ + +/* * These are the definitions for the Extended Features Register * (StarTech 16C660 only, when DLAB=1) */ --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/mmc/card.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,83 @@ +/* + * linux/include/linux/mmc/card.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Card driver specific definitions. + */ +#ifndef LINUX_MMC_CARD_H +#define LINUX_MMC_CARD_H + +#include + +struct mmc_cid { + unsigned int manfid; + unsigned int serial; + char prod_name[8]; + unsigned char hwrev; + unsigned char fwrev; + unsigned char month; + unsigned char year; +}; + +struct mmc_csd { + unsigned char mmc_prot; + unsigned short cmdclass; + unsigned short tacc_clks; + unsigned int tacc_ns; + unsigned int max_dtr; + unsigned int read_blkbits; + unsigned int capacity; +}; + +struct mmc_host; + +/* + * MMC device + */ +struct mmc_card { + struct list_head node; /* node in hosts devices list */ + struct mmc_host *host; /* the host this device belongs to */ + struct device dev; /* the device */ + unsigned int rca; /* relative card address of device */ + unsigned int state; /* (our) card state */ +#define MMC_STATE_PRESENT (1<<0) +#define MMC_STATE_DEAD (1<<1) + struct mmc_cid cid; /* card identification */ + struct mmc_csd csd; /* card specific */ +}; + +#define mmc_card_dead(c) ((c)->state & MMC_STATE_DEAD) +#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) + +#define mmc_card_name(c) ((c)->cid.prod_name) +#define mmc_card_id(c) ((c)->dev.bus_id) + +#define mmc_list_to_card(l) container_of(l, struct mmc_card, node) +#define mmc_get_drvdata(c) dev_get_drvdata(&(c)->dev) +#define mmc_set_drvdata(c,d) dev_set_drvdata(&(c)->dev, d) + +/* + * MMC device driver (e.g., Flash card, I/O card...) + */ +struct mmc_driver { + struct device_driver drv; + int (*probe)(struct mmc_card *); + void (*remove)(struct mmc_card *); + int (*suspend)(struct mmc_card *, u32); + int (*resume)(struct mmc_card *); +}; + +extern int mmc_register_driver(struct mmc_driver *); +extern void mmc_unregister_driver(struct mmc_driver *); + +static inline int mmc_card_claim_host(struct mmc_card *card) +{ + return __mmc_claim_host(card->host, card); +} + +#define mmc_card_release_host(c) mmc_release_host((c)->host) + +#endif --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/mmc/mmc.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,88 @@ +/* + * linux/include/linux/mmc/mmc.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef MMC_H +#define MMC_H + +#include +#include +#include + +struct request; +struct mmc_data; +struct mmc_request; + +struct mmc_command { + u32 opcode; + u32 arg; + u32 resp[4]; + unsigned int flags; /* expected response type */ +#define MMC_RSP_NONE (0 << 0) +#define MMC_RSP_SHORT (1 << 0) +#define MMC_RSP_LONG (2 << 0) +#define MMC_RSP_MASK (3 << 0) +#define MMC_RSP_CRC (1 << 3) /* expect valid crc */ +#define MMC_RSP_BUSY (1 << 4) /* card may send busy */ + + unsigned int retries; /* max number of retries */ + unsigned int error; /* command error */ + +#define MMC_ERR_NONE 0 +#define MMC_ERR_TIMEOUT 1 +#define MMC_ERR_BADCRC 2 +#define MMC_ERR_FIFO 3 +#define MMC_ERR_FAILED 4 +#define MMC_ERR_INVALID 5 + + struct mmc_data *data; /* data segment associated with cmd */ + struct mmc_request *req; /* assoicated request */ +}; + +struct mmc_data { + unsigned int timeout_ns; /* data timeout (in ns, max 80ms) */ + unsigned int timeout_clks; /* data timeout (in clocks) */ + unsigned int blksz_bits; /* data block size */ + unsigned int blocks; /* number of blocks */ + struct request *rq; /* request structure */ + unsigned int error; /* data error */ + unsigned int flags; + +#define MMC_DATA_WRITE (1 << 8) +#define MMC_DATA_READ (1 << 9) +#define MMC_DATA_STREAM (1 << 10) + + unsigned int bytes_xfered; + + struct mmc_command *stop; /* stop command */ + struct mmc_request *req; /* assoicated request */ +}; + +struct mmc_request { + struct mmc_command *cmd; + struct mmc_data *data; + struct mmc_command *stop; + + void *done_data; /* completion data */ + void (*done)(struct mmc_request *);/* completion function */ +}; + +struct mmc_host; +struct mmc_card; + +extern int mmc_wait_for_req(struct mmc_host *, struct mmc_request *); +extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int); + +extern int __mmc_claim_host(struct mmc_host *host, struct mmc_card *card); + +static inline void mmc_claim_host(struct mmc_host *host) +{ + __mmc_claim_host(host, (struct mmc_card *)-1); +} + +extern void mmc_release_host(struct mmc_host *host); + +#endif --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/mmc/host.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,67 @@ +/* + * linux/include/linux/mmc/host.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Host driver specific definitions. + */ +#ifndef LINUX_MMC_HOST_H +#define LINUX_MMC_HOST_H + +#include + +struct mmc_ios { + unsigned int clock; /* clock rate */ + unsigned short vdd; /* supply (units of 10mV) */ + unsigned char bus_mode; /* command output mode */ + +#define MMC_BUSMODE_OPENDRAIN 1 +#define MMC_BUSMODE_PUSHPULL 2 + + unsigned char power_mode; /* power supply mode */ + +#define MMC_POWER_OFF 0 +#define MMC_POWER_UP 1 +#define MMC_POWER_ON 2 +}; + +struct mmc_host_ops { + void (*request)(struct mmc_host *host, struct mmc_request *req); + void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); +}; + +struct mmc_card; + +struct mmc_host { + struct device *dev; + struct mmc_host_ops *ops; + unsigned int f_min; + unsigned int f_max; + u32 ocr_avail; + + /* private data */ + unsigned int host_num; /* host number */ + struct mmc_ios ios; /* current io bus settings */ + u32 ocr; /* the current OCR setting */ + + struct list_head cards; /* devices attached to this host */ + + wait_queue_head_t wq; + spinlock_t lock; /* card_busy lock */ + struct mmc_card *card_busy; /* the MMC card claiming host */ + struct mmc_card *card_selected; /* the selected MMC card */ +}; + +extern int mmc_init_host(struct mmc_host *); +extern int mmc_add_host(struct mmc_host *); +extern void mmc_remove_host(struct mmc_host *); +extern int mmc_suspend_host(struct mmc_host *, u32); +extern int mmc_resume_host(struct mmc_host *); + +extern void mmc_detect_change(struct mmc_host *); +extern void mmc_request_done(struct mmc_host *, struct mmc_request *); + +#endif + --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/mmc/protocol.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,203 @@ +/* + * Header for MultiMediaCard (MMC) + * + * Copyright 2002 Hewlett-Packard Company + * + * Use consistent with the GNU GPL is permitted, + * provided that this copyright notice is + * preserved in its entirety in all copies and derived works. + * + * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, + * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS + * FITNESS FOR ANY PARTICULAR PURPOSE. + * + * Many thanks to Alessandro Rubini and Jonathan Corbet! + * + * Based strongly on code by: + * + * Author: Yong-iL Joh + * Date : $Date: 2002/06/18 12:37:30 $ + * + * Author: Andrew Christian + * 15 May 2002 + */ + +#ifndef MMC_MMC_PROTOCOL_H +#define MMC_MMC_PROTOCOL_H + +/* Standard MMC commands (3.1) type argument response */ + /* class 1 */ +#define MMC_GO_IDLE_STATE 0 /* bc */ +#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ +#define MMC_ALL_SEND_CID 2 /* bcr R2 */ +#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ +#define MMC_SET_DSR 4 /* bc [31:16] RCA */ +#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ +#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ +#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ +#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ +#define MMC_STOP_TRANSMISSION 12 /* ac R1b */ +#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ +#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ + + /* class 2 */ +#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ +#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ +#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ + + /* class 3 */ +#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ + + /* class 4 */ +#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ +#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ +#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ +#define MMC_PROGRAM_CID 26 /* adtc R1 */ +#define MMC_PROGRAM_CSD 27 /* adtc R1 */ + + /* class 6 */ +#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ +#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ +#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ + + /* class 5 */ +#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ +#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ +#define MMC_ERASE 37 /* ac R1b */ + + /* class 9 */ +#define MMC_FAST_IO 39 /* ac R4 */ +#define MMC_GO_IRQ_STATE 40 /* bcr R5 */ + + /* class 7 */ +#define MMC_LOCK_UNLOCK 42 /* adtc R1b */ + + /* class 8 */ +#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ +#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1b */ + +/* + MMC status in R1 + Type + e : error bit + s : status bit + r : detected and set for the actual command response + x : detected and set during command execution. the host must poll + the card by sending status command in order to read these bits. + Clear condition + a : according to the card state + b : always related to the previous command. Reception of + a valid command will clear it (with a delay of one command) + c : clear by read + */ + +#define R1_OUT_OF_RANGE (1 << 31) /* er, c */ +#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ +#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ +#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ +#define R1_ERASE_PARAM (1 << 27) /* ex, c */ +#define R1_WP_VIOLATION (1 << 26) /* erx, c */ +#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ +#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ +#define R1_COM_CRC_ERROR (1 << 23) /* er, b */ +#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ +#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ +#define R1_CC_ERROR (1 << 20) /* erx, c */ +#define R1_ERROR (1 << 19) /* erx, c */ +#define R1_UNDERRUN (1 << 18) /* ex, c */ +#define R1_OVERRUN (1 << 17) /* ex, c */ +#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ +#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ +#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ +#define R1_ERASE_RESET (1 << 13) /* sr, c */ +#define R1_STATUS(x) (x & 0xFFFFE000) +#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ +#define R1_READY_FOR_DATA (1 << 8) /* sx, a */ +#define R1_APP_CMD (1 << 7) /* sr, c */ + +/* These are unpacked versions of the actual responses */ + +struct _mmc_csd { + u8 csd_structure; + u8 spec_vers; + u8 taac; + u8 nsac; + u8 tran_speed; + u16 ccc; + u8 read_bl_len; + u8 read_bl_partial; + u8 write_blk_misalign; + u8 read_blk_misalign; + u8 dsr_imp; + u16 c_size; + u8 vdd_r_curr_min; + u8 vdd_r_curr_max; + u8 vdd_w_curr_min; + u8 vdd_w_curr_max; + u8 c_size_mult; + union { + struct { /* MMC system specification version 3.1 */ + u8 erase_grp_size; + u8 erase_grp_mult; + } v31; + struct { /* MMC system specification version 2.2 */ + u8 sector_size; + u8 erase_grp_size; + } v22; + } erase; + u8 wp_grp_size; + u8 wp_grp_enable; + u8 default_ecc; + u8 r2w_factor; + u8 write_bl_len; + u8 write_bl_partial; + u8 file_format_grp; + u8 copy; + u8 perm_write_protect; + u8 tmp_write_protect; + u8 file_format; + u8 ecc; +}; + +#define MMC_VDD_145_150 0x00000001 /* VDD voltage 1.45 - 1.50 */ +#define MMC_VDD_150_155 0x00000002 /* VDD voltage 1.50 - 1.55 */ +#define MMC_VDD_155_160 0x00000004 /* VDD voltage 1.55 - 1.60 */ +#define MMC_VDD_160_165 0x00000008 /* VDD voltage 1.60 - 1.65 */ +#define MMC_VDD_165_170 0x00000010 /* VDD voltage 1.65 - 1.70 */ +#define MMC_VDD_17_18 0x00000020 /* VDD voltage 1.7 - 1.8 */ +#define MMC_VDD_18_19 0x00000040 /* VDD voltage 1.8 - 1.9 */ +#define MMC_VDD_19_20 0x00000080 /* VDD voltage 1.9 - 2.0 */ +#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ +#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ +#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ +#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ +#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ +#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ +#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ +#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ +#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ +#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ +#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ +#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ +#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ +#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ +#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ +#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ +#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ + + +/* + * CSD field definitions + */ + +#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ +#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ +#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 */ + +#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ +#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ +#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ +#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 */ + +#endif /* MMC_MMC_PROTOCOL_H */ + --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/l3/algo-bit.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,39 @@ +/* + * linux/include/linux/l3/algo-bit.h + * + * Copyright (C) 2001 Russell King, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + * L3 Bus bit-banging algorithm. Derived from i2c-algo-bit.h by + * Simon G. Vogl. + */ +#ifndef L3_ALGO_BIT_H +#define L3_ALGO_BIT_H 1 + +#include + +struct l3_algo_bit_data { + void (*setdat) (void *data, int state); + void (*setclk) (void *data, int state); + void (*setmode)(void *data, int state); + void (*setdir) (void *data, int in); /* set data direction */ + int (*getdat) (void *data); + + void *data; + + /* bus timings (us) */ + int data_hold; + int data_setup; + int clock_high; + int mode_hold; + int mode_setup; + int mode; +}; + +int l3_bit_add_bus(struct l3_adapter *); +int l3_bit_del_bus(struct l3_adapter *); + +#endif --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/l3/l3.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,95 @@ +/* + * linux/include/linux/l3/l3.h + * + * Copyright (C) 2001 Russell King, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + * Derived from i2c.h by Simon G. Vogl + */ +#ifndef L3_H +#define L3_H + +struct l3_msg { + unsigned char addr; /* slave address */ + unsigned char flags; +#define L3_M_RD 0x01 +#define L3_M_NOADDR 0x02 + unsigned short len; /* msg length */ + unsigned char *buf; /* pointer to msg data */ +}; + +#ifdef __KERNEL__ + +#include +#include + +struct l3_adapter; + +struct l3_algorithm { + /* textual description */ + char name[32]; + + /* perform bus transactions */ + int (*xfer)(struct l3_adapter *, struct l3_msg msgs[], int num); +}; + +struct semaphore; + +/* + * l3_adapter is the structure used to identify a physical L3 bus along + * with the access algorithms necessary to access it. + */ +struct l3_adapter { + /* + * This name is used to uniquely identify the adapter. + * It should be the same as the module name. + */ + char name[32]; + + /* + * the algorithm to access the bus + */ + struct l3_algorithm *algo; + + /* + * Algorithm specific data + */ + void *algo_data; + + /* + * This may be NULL, or should point to the module struct + */ + struct module *owner; + + /* + * private data for the adapter + */ + void *data; + + /* + * Our lock. Unlike the i2c layer, we allow this to be used for + * other stuff, like the i2c layer lock. Some people implement + * i2c stuff using the same signals as the l3 bus. + */ + struct semaphore *lock; + + /* + * List of all adapters. + */ + struct list_head adapters; +}; + +extern int l3_add_adapter(struct l3_adapter *); +extern int l3_del_adapter(struct l3_adapter *); +extern void l3_put_adapter(struct l3_adapter *); +extern struct l3_adapter *l3_get_adapter(const char *name); + +extern int l3_write(struct l3_adapter *, int, const char *, int); +extern int l3_read(struct l3_adapter *, int, char *, int); + +#endif + +#endif /* L3_H */ --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/include/linux/l3/uda1341.h 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,61 @@ +/* + * linux/include/linux/l3/uda1341.h + * + * Philips UDA1341 mixer device driver + * + * Copyright (c) 2000 Nicolas Pitre + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + */ + +#define UDA1341_NAME "uda1341" + +struct uda1341_cfg { + unsigned int fs:16; + unsigned int format:3; +}; + +#define FMT_I2S 0 +#define FMT_LSB16 1 +#define FMT_LSB18 2 +#define FMT_LSB20 3 +#define FMT_MSB 4 +#define FMT_LSB16MSB 5 +#define FMT_LSB18MSB 6 +#define FMT_LSB20MSB 7 + +#define L3_UDA1341_CONFIGURE 0x13410001 + +struct l3_gain { + unsigned int left:8; + unsigned int right:8; + unsigned int unused:8; + unsigned int channel:8; +}; + +#define L3_SET_VOLUME 0x13410002 +#define L3_SET_TREBLE 0x13410003 +#define L3_SET_BASS 0x13410004 +#define L3_SET_GAIN 0x13410005 + +struct l3_agc { + unsigned int level:8; + unsigned int enable:1; + unsigned int attack:7; + unsigned int decay:8; + unsigned int channel:8; +}; + +#define L3_INPUT_AGC 0x13410006 + +struct uda1341; + +int uda1341_configure(struct uda1341 *uda, struct uda1341_cfg *conf); +int uda1341_mixer_ctl(struct uda1341 *uda, int cmd, void *arg); +int uda1341_open(struct uda1341 *uda); +void uda1341_close(struct uda1341 *uda); + +struct uda1341 *uda1341_attach(const char *adapter); +void uda1341_detach(struct uda1341 *uda); + --- linux-2.6.5/include/linux/i2c-id.h~heh 2004-04-03 22:36:16.000000000 -0500 +++ linux-2.6.5/include/linux/i2c-id.h 2004-04-30 20:57:36.000000000 -0400 @@ -187,6 +187,7 @@ #define I2C_ALGO_BITHS 0x130000 /* enhanced bit style adapters */ #define I2C_ALGO_OCP_IOP3XX 0x140000 /* XSCALE IOP3XX On-chip I2C alg */ +#define I2C_ALGO_PXA 0x200000 /* Intel PXA I2C algorithm */ #define I2C_ALGO_EXP 0x800000 /* experimental */ #define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */ --- linux-2.6.5/include/linux/serial_core.h~heh 2004-04-03 22:36:18.000000000 -0500 +++ linux-2.6.5/include/linux/serial_core.h 2004-04-30 20:57:36.000000000 -0400 @@ -17,7 +17,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * - * $Id: serial_core.h,v 1.49 2002/07/20 18:06:32 rmk Exp $ + * $Id: serial_core.h,v 1.53 2002/08/02 12:55:08 rmk Exp $ */ /* @@ -159,8 +159,6 @@ spinlock_t lock; /* port lock */ unsigned int iobase; /* in/out[bwl] */ char *membase; /* read/write[bwl] */ - unsigned int irq; /* irq number */ - unsigned int uartclk; /* base uart clock */ unsigned char fifosize; /* tx fifo size */ unsigned char x_char; /* xon/xoff char */ unsigned char regshift; /* reg offset shift */ @@ -172,6 +170,7 @@ unsigned int read_status_mask; /* driver specific */ unsigned int ignore_status_mask; /* driver specific */ + struct uart_info *info; /* pointer to parent info */ struct uart_icount icount; /* statistics */ @@ -182,7 +181,6 @@ unsigned int flags; -#define UPF_HUP_NOTIFY (1 << 0) #define UPF_FOURPORT (1 << 1) #define UPF_SAK (1 << 2) #define UPF_SPD_MASK (0x1030) @@ -212,9 +210,12 @@ unsigned int timeout; /* character-based timeout */ unsigned int type; /* port type */ struct uart_ops *ops; + unsigned int uartclk; /* base uart clock */ unsigned int custom_divisor; + unsigned int irq; /* irq number */ unsigned int line; /* port index */ unsigned long mapbase; /* for ioremap */ + struct device *dev; /* parent device */ unsigned char hub6; /* this should be in the 8250 driver */ unsigned char unused[3]; }; --- linux-2.6.5/include/linux/vmalloc.h~heh 2004-04-03 22:38:23.000000000 -0500 +++ linux-2.6.5/include/linux/vmalloc.h 2004-04-30 20:57:36.000000000 -0400 @@ -35,6 +35,8 @@ * Lowlevel-APIs (not for driver use!) */ extern struct vm_struct *get_vm_area(unsigned long size, unsigned long flags); +extern struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags, + unsigned long start, unsigned long end); extern struct vm_struct *remove_vm_area(void *addr); extern int map_vm_area(struct vm_struct *area, pgprot_t prot, struct page ***pages); --- linux-2.6.5/include/linux/mm.h~heh 2004-04-03 22:36:15.000000000 -0500 +++ linux-2.6.5/include/linux/mm.h 2004-04-30 20:57:36.000000000 -0400 @@ -655,5 +655,12 @@ int in_gate_area(struct task_struct *task, unsigned long addr); #endif +#ifndef __arm__ +#define memc_update_addr(x,y,z) +#define memc_update_mm(x) +#define memc_clear(x,y) +#endif + #endif /* __KERNEL__ */ #endif /* _LINUX_MM_H */ + --- linux-2.6.5/init/do_mounts.c~heh 2004-04-03 22:36:56.000000000 -0500 +++ linux-2.6.5/init/do_mounts.c 2004-04-30 20:57:36.000000000 -0400 @@ -391,7 +391,7 @@ root_device_name += 5; } - is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR; + is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR || MAJOR(ROOT_DEV) == 31; if (initrd_load()) goto out; --- linux-2.6.5/fs/binfmt_aout.c~heh 2004-04-03 22:36:26.000000000 -0500 +++ linux-2.6.5/fs/binfmt_aout.c 2004-04-30 20:57:36.000000000 -0400 @@ -432,7 +432,11 @@ else send_sig(SIGTRAP, current, 0); } +#ifndef __arm__ return 0; +#else + return regs->ARM_r0; +#endif } static int load_aout_library(struct file *file) @@ -462,8 +466,11 @@ /* For QMAGIC, the starting address is 0x20 into the page. We mask this off to get the starting address for the page */ - - start_addr = ex.a_entry & 0xfffff000; +#ifndef __arm__ + start_addr = ex.a_entry & 0xfffff000; +#else + start_addr = ex.a_entry & 0xffff8000; +#endif if ((N_TXTOFF(ex) & ~PAGE_MASK) != 0) { static unsigned long error_time; --- linux-2.6.5/mm/slab.c~heh 2004-04-03 22:37:41.000000000 -0500 +++ linux-2.6.5/mm/slab.c 2004-04-30 20:57:36.000000000 -0400 @@ -2115,12 +2115,12 @@ * * Called with disabled ints. */ -static inline void __cache_free (kmem_cache_t *cachep, void* objp) +static inline void __cache_free (kmem_cache_t *cachep, void* objp, void *caller) { struct array_cache *ac = ac_data(cachep); check_irq_off(); - objp = cache_free_debugcheck(cachep, objp, __builtin_return_address(0)); + objp = cache_free_debugcheck(cachep, objp, caller /*__builtin_return_address(0)*/); if (likely(ac->avail < ac->limit)) { STATS_INC_FREEHIT(cachep); @@ -2289,7 +2289,7 @@ unsigned long flags; local_irq_save(flags); - __cache_free(cachep, objp); + __cache_free(cachep, objp, __builtin_return_address(0)); local_irq_restore(flags); } @@ -2312,7 +2312,7 @@ local_irq_save(flags); kfree_debugcheck(objp); c = GET_PAGE_CACHE(virt_to_page(objp)); - __cache_free(c, (void*)objp); + __cache_free(c, (void*)objp, __builtin_return_address(0)); local_irq_restore(flags); } --- /dev/null 2003-09-23 18:19:32.000000000 -0400 +++ linux-2.6.5/Documentation/l3/structure 2004-04-30 20:57:36.000000000 -0400 @@ -0,0 +1,36 @@ +L3 Bus Driver +------------- + +The structure of the driver is as follows: + + +----------+ +----------+ +----------+ + | client 1 | | client 2 | | client 3 | + +-----^----+ +----^-----+ +----^-----+ + | | | + +-----v--------------v---------------v-----+ + | | + +-----^-------+ +-------^-----+ + | | core | | + +-----v----+ | | +----v-----+ + | device | | | | device | + | driver 1 | | | | driver 2 | + +-----^----+ | | +----^-----+ + | | services | | + +-----v-------+ +-------v-----+ + | | + +-----------------^----^-------------------+ + | | + | +-v---------+ + | | algorithm | + | | driver | + | +-v---------+ + | | + +-v----v-+ + | bus | + | driver | + +--------+ + +Clients talk to the core to attach device drivers and bus adapters, and +to instruct device drivers to perform actions. Device drivers then talk +to the core to perform L3 bus transactions via the algorithm driver and +ultimately bus driver. --- linux-2.6.5/arch/arm/kernel/debug.S~heh 2004-04-03 22:36:55.000000000 -0500 +++ linux-2.6.5/arch/arm/kernel/debug.S 2004-04-30 20:57:36.000000000 -0400 @@ -192,6 +192,20 @@ @ if all ports are inactive, then there is nothing we can do moveq pc, lr + ldr r1, [\rx, #UTCR2] + teq r1, #5 + movne r1, #0 + strne r1, [\rx, #UTCR3] + movne r1, #8 + strne r1, [\rx, #UTCR0] + movne r1, #5 + strne r1, [\rx, #UTCR2] + movne r1, #0 + strne r1, [\rx, #UTCR1] + movne r1, #3 + strne r1, [\rx, #UTCR3] + movne r1, #255 + strne r1, [\rx, #UTSR0] .endm .macro senduart,rd,rx @@ -287,7 +301,7 @@ #elif defined(CONFIG_ARCH_INTEGRATOR) -#include +#include .macro addruart,rx mrc p15, 0, \rx, c1, c0 @@ -298,7 +312,7 @@ .endm .macro senduart,rd,rx - strb \rd, [\rx, #AMBA_UARTDR] + strb \rd, [\rx, #UART01x_DR] .endm .macro waituart,rd,rx --- linux-2.6.5/arch/arm/kernel/entry-armv.S~heh 2004-04-03 22:36:54.000000000 -0500 +++ linux-2.6.5/arch/arm/kernel/entry-armv.S 2004-04-30 20:57:36.000000000 -0400 @@ -1181,6 +1181,9 @@ * get out of that mode without clobbering one register. */ vector_FIQ: disable_fiq + mrs r13, spsr + orr r13, r13, #PSR_F_BIT + msr spsr, r13 subs pc, lr, #4 /*============================================================================= --- linux-2.6.5/arch/arm/kernel/irq.c~heh 2004-04-03 22:36:12.000000000 -0500 +++ linux-2.6.5/arch/arm/kernel/irq.c 2004-04-30 20:57:36.000000000 -0400 @@ -47,12 +47,36 @@ #define MAX_IRQ_CNT 100000 static volatile unsigned long irq_err_count; -static spinlock_t irq_controller_lock; static LIST_HEAD(irq_pending); struct irqdesc irq_desc[NR_IRQS]; void (*init_arch_irq)(void) __initdata = NULL; +#if NR_IRQ_DEVICES > 1 +struct irq_device { + spinlock_t lock; + int nr_irqs; + struct irq_desc *irqs; +}; + +static struct irq_device irq_devices[NR_IRQ_DEVICES] = { + [0] = { + .lock = SPIN_LOCK_UNLOCKED, + .nr_irqs = NR_IRQS, + .irqs = irq_desc, + }, +}; +#define IRQ_LOCK(irq) (&irq_devices[IRQ_DEVICE(irq)].lock) +#define IRQ_DESC(irq) (&irq_devices[IRQ_DEVICE(irq)].irqs[IRQ_INDEX(irq)]) +#define IRQ_VALID(irq) (IRQ_DEVICE(irq) < NR_IRQ_DEVICES && \ + IRQ_INDEX(irq) < irq_devices[IRQ_DEVICE(irq)].nr_irqs) +#else +static spinlock_t irq_controller_lock = SPIN_LOCK_UNLOCKED; +#define IRQ_LOCK(irq) (&irq_controller_lock) +#define IRQ_DESC(irq) (&irq_desc[irq]) +#define IRQ_VALID(irq) ((irq) < NR_IRQS) +#endif + /* * Dummy mask/unmask handler */ @@ -95,13 +119,13 @@ */ void disable_irq(unsigned int irq) { - struct irqdesc *desc = irq_desc + irq; + struct irqdesc *desc = IRQ_DESC(irq); unsigned long flags; - spin_lock_irqsave(&irq_controller_lock, flags); + spin_lock_irqsave(IRQ_LOCK(irq), flags); desc->disable_depth++; list_del_init(&desc->pend); - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } /** @@ -116,10 +140,10 @@ */ void enable_irq(unsigned int irq) { - struct irqdesc *desc = irq_desc + irq; + struct irqdesc *desc = IRQ_DESC(irq); unsigned long flags; - spin_lock_irqsave(&irq_controller_lock, flags); + spin_lock_irqsave(IRQ_LOCK(irq), flags); if (unlikely(!desc->disable_depth)) { printk("enable_irq(%u) unbalanced from %p\n", irq, __builtin_return_address(0)); @@ -140,7 +164,7 @@ list_add(&desc->pend, &irq_pending); } } - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } /* @@ -148,24 +172,24 @@ */ void enable_irq_wake(unsigned int irq) { - struct irqdesc *desc = irq_desc + irq; + struct irqdesc *desc = IRQ_DESC(irq); unsigned long flags; - spin_lock_irqsave(&irq_controller_lock, flags); + spin_lock_irqsave(IRQ_LOCK(irq), flags); if (desc->chip->wake) desc->chip->wake(irq, 1); - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } void disable_irq_wake(unsigned int irq) { - struct irqdesc *desc = irq_desc + irq; + struct irqdesc *desc = IRQ_DESC(irq); unsigned long flags; - spin_lock_irqsave(&irq_controller_lock, flags); + spin_lock_irqsave(IRQ_LOCK(irq), flags); if (desc->chip->wake) desc->chip->wake(irq, 0); - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } int show_interrupts(struct seq_file *p, void *v) @@ -175,8 +199,8 @@ unsigned long flags; if (i < NR_IRQS) { - spin_lock_irqsave(&irq_controller_lock, flags); - action = irq_desc[i].action; + spin_lock_irqsave(IRQ_LOCK(irq), flags); + action = IRQ_DESC(i)->action; if (!action) goto unlock; @@ -187,7 +211,7 @@ seq_putc(p, '\n'); unlock: - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } else if (i == NR_IRQS) { #ifdef CONFIG_ARCH_ACORN show_fiq_list(p, v); @@ -259,7 +283,7 @@ unsigned int status; int retval = 0; - spin_unlock(&irq_controller_lock); + spin_unlock(IRQ_LOCK(irq)); if (!(action->flags & SA_INTERRUPT)) local_irq_enable(); @@ -274,7 +298,7 @@ if (status & SA_SAMPLE_RANDOM) add_interrupt_randomness(irq); - spin_lock_irq(&irq_controller_lock); + spin_lock_irq(IRQ_LOCK(irq)); return retval; } @@ -455,7 +479,7 @@ desc = &bad_irq_desc; irq_enter(); - spin_lock(&irq_controller_lock); + spin_lock(IRQ_LOCK(irq)); desc->handle(irq, desc, regs); /* @@ -464,7 +488,7 @@ if (!list_empty(&irq_pending)) do_pending_irqs(regs); - spin_unlock(&irq_controller_lock); + spin_unlock(IRQ_LOCK(irq)); irq_exit(); } @@ -473,7 +497,7 @@ struct irqdesc *desc; unsigned long flags; - if (irq >= NR_IRQS) { + if (!IRQ_VALID(irq)) { printk(KERN_ERR "Trying to install handler for IRQ%d\n", irq); return; } @@ -481,12 +505,12 @@ if (handle == NULL) handle = do_bad_IRQ; - desc = irq_desc + irq; + desc = IRQ_DESC(irq); if (is_chained && desc->chip == &bad_chip) printk(KERN_WARNING "Trying to install chained handler for IRQ%d\n", irq); - spin_lock_irqsave(&irq_controller_lock, flags); + spin_lock_irqsave(IRQ_LOCK(irq), flags); if (handle == do_bad_IRQ) { desc->chip->mask(irq); desc->chip->ack(irq); @@ -499,7 +523,7 @@ desc->disable_depth = 0; desc->chip->unmask(irq); } - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } void set_irq_chip(unsigned int irq, struct irqchip *chip) @@ -507,7 +531,7 @@ struct irqdesc *desc; unsigned long flags; - if (irq >= NR_IRQS) { + if (!IRQ_VALID(irq)) { printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); return; } @@ -515,10 +539,10 @@ if (chip == NULL) chip = &bad_chip; - desc = irq_desc + irq; - spin_lock_irqsave(&irq_controller_lock, flags); + desc = IRQ_DESC(irq); + spin_lock_irqsave(IRQ_LOCK(irq), flags); desc->chip = chip; - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } int set_irq_type(unsigned int irq, unsigned int type) @@ -527,16 +551,21 @@ unsigned long flags; int ret = -ENXIO; - if (irq >= NR_IRQS) { + if (!IRQ_VALID(irq)) { printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); return -ENODEV; } - desc = irq_desc + irq; + desc = IRQ_DESC(irq); + if (!desc->action && desc->handle != do_bad_IRQ) { + printk(KERN_ERR "Setting type of unclaimed IRQ%d from ", irq); + print_symbol("%s\n", (unsigned long)__builtin_return_address(0)); + } + if (desc->chip->type) { - spin_lock_irqsave(&irq_controller_lock, flags); + spin_lock_irqsave(IRQ_LOCK(irq), flags); ret = desc->chip->type(irq, type); - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } return ret; @@ -547,17 +576,17 @@ struct irqdesc *desc; unsigned long flags; - if (irq >= NR_IRQS) { + if (!IRQ_VALID(irq)) { printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); return; } - desc = irq_desc + irq; - spin_lock_irqsave(&irq_controller_lock, flags); + desc = IRQ_DESC(irq); + spin_lock_irqsave(IRQ_LOCK(irq), flags); desc->valid = (iflags & IRQF_VALID) != 0; desc->probe_ok = (iflags & IRQF_PROBE) != 0; desc->noautoenable = (iflags & IRQF_NOAUTOEN) != 0; - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); } int setup_irq(unsigned int irq, struct irqaction *new) @@ -587,13 +616,13 @@ /* * The following block of code has to be executed atomically */ - desc = irq_desc + irq; - spin_lock_irqsave(&irq_controller_lock, flags); + desc = IRQ_DESC(irq); + spin_lock_irqsave(IRQ_LOCK(irq), flags); p = &desc->action; if ((old = *p) != NULL) { /* Can't share interrupts unless both agree to */ if (!(old->flags & new->flags & SA_SHIRQ)) { - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); return -EBUSY; } @@ -618,7 +647,7 @@ } } - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); return 0; } @@ -659,7 +688,7 @@ unsigned long retval; struct irqaction *action; - if (irq >= NR_IRQS || !irq_desc[irq].valid || !handler || + if (!IRQ_VALID(irq) || !IRQ_DESC(irq)->valid || !handler || (irq_flags & SA_SHIRQ && !dev_id)) return -EINVAL; @@ -700,14 +729,14 @@ struct irqaction * action, **p; unsigned long flags; - if (irq >= NR_IRQS || !irq_desc[irq].valid) { + if (!IRQ_VALID(irq) || !IRQ_DESC(irq)->valid) { printk(KERN_ERR "Trying to free IRQ%d\n",irq); dump_stack(); return; } - spin_lock_irqsave(&irq_controller_lock, flags); - for (p = &irq_desc[irq].action; (action = *p) != NULL; p = &action->next) { + spin_lock_irqsave(IRQ_LOCK(irq), flags); + for (p = &IRQ_DESC(irq)->action; (action = *p) != NULL; p = &action->next) { if (action->dev_id != dev_id) continue; @@ -715,7 +744,7 @@ *p = action->next; break; } - spin_unlock_irqrestore(&irq_controller_lock, flags); + spin_unlock_irqrestore(IRQ_LOCK(irq), flags); if (!action) { printk(KERN_ERR "Trying to free free IRQ%d\n",irq); @@ -747,19 +776,18 @@ * first snaffle up any unassigned but * probe-able interrupts */ - spin_lock_irq(&irq_controller_lock); for (i = 0; i < NR_IRQS; i++) { - if (!irq_desc[i].probe_ok || irq_desc[i].action) - continue; - - irq_desc[i].probing = 1; - irq_desc[i].triggered = 0; - if (irq_desc[i].chip->type) - irq_desc[i].chip->type(i, IRQT_PROBE); - irq_desc[i].chip->unmask(i); - irqs += 1; + spin_lock_irq(IRQ_LOCK(i)); + if (irq_desc[i].probe_ok && !irq_desc[i].action) { + irq_desc[i].probing = 1; + irq_desc[i].triggered = 0; + if (irq_desc[i].chip->type) + irq_desc[i].chip->type(i, IRQT_PROBE); + irq_desc[i].chip->unmask(i); + irqs += 1; + } + spin_unlock_irq(IRQ_LOCK(i)); } - spin_unlock_irq(&irq_controller_lock); /* * wait for spurious interrupts to mask themselves out again @@ -770,14 +798,14 @@ /* * now filter out any obviously spurious interrupts */ - spin_lock_irq(&irq_controller_lock); for (i = 0; i < NR_IRQS; i++) { + spin_lock_irq(IRQ_LOCK(i)); if (irq_desc[i].probing && irq_desc[i].triggered) { irq_desc[i].probing = 0; irqs -= 1; } + spin_unlock_irq(IRQ_LOCK(i)); } - spin_unlock_irq(&irq_controller_lock); return irqs; } @@ -788,11 +816,13 @@ { unsigned int mask = 0, i; - spin_lock_irq(&irq_controller_lock); - for (i = 0; i < 16 && i < NR_IRQS; i++) - if (irq_desc[i].probing && irq_desc[i].triggered) + for (i = 0; i < 16 && i < NR_IRQS; i++) { + struct irqdesc *desc = IRQ_DESC(i); + spin_lock_irq(IRQ_LOCK(i)); + if (desc->probing && desc->triggered) mask |= 1 << i; - spin_unlock_irq(&irq_controller_lock); + spin_unlock_irq(IRQ_LOCK(i)); + } up(&probe_sem); @@ -813,23 +843,21 @@ * look at the interrupts, and find exactly one * that we were probing has been triggered */ - spin_lock_irq(&irq_controller_lock); for (i = 0; i < NR_IRQS; i++) { - if (irq_desc[i].probing && - irq_desc[i].triggered) { + struct irqdesc *desc = IRQ_DESC(i); + + spin_lock_irq(IRQ_LOCK(i)); + if (desc->probing && desc->triggered) { if (irq_found != NO_IRQ) { + spin_unlock_irq(IRQ_LOCK(i)); irq_found = NO_IRQ; - goto out; + break; } irq_found = i; } + spin_unlock_irq(IRQ_LOCK(i)); } -