From 48b5a924917292f153ace40ff72bdbcaf420fb3f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jeremy=20Lain=C3=A9?= Date: Wed, 9 Sep 2009 20:21:06 +0200 Subject: linux-2.6.29: add devicetree for boc02 --- recipes/linux/linux-2.6.29/boc01/boc02.dts | 344 +++++++++++++++++++++++++++++ 1 file changed, 344 insertions(+) create mode 100644 recipes/linux/linux-2.6.29/boc01/boc02.dts (limited to 'recipes') diff --git a/recipes/linux/linux-2.6.29/boc01/boc02.dts b/recipes/linux/linux-2.6.29/boc01/boc02.dts new file mode 100644 index 0000000000..fb0b5fb0a5 --- /dev/null +++ b/recipes/linux/linux-2.6.29/boc01/boc02.dts @@ -0,0 +1,344 @@ +/* + * Bolloré telecom CPE v01 Device Tree Source + * + * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. + * Copyright 2008, 2009 Bolloré telecom. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "MPC8313ERDB"; + compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet1 = &enet1; + serial0 = &serial0; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8313@0 { + device_type = "cpu"; + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <16384>; + i-cache-size = <16384>; + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; // 128MB at 0 + }; + + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; + reg = <0xe0005000 0x1000>; + interrupts = <77 0x8>; + interrupt-parent = <&ipic>; + + // CS0 and CS1 are swapped when + // booting from nand, but the + // addresses are the same. + ranges = <0x0 0x0 0xfe000000 0x00800000 + 0x1 0x0 0xe2800000 0x00008000 + 0x2 0x0 0xf0000000 0x00020000 + 0x3 0x0 0xfa000000 0x00008000>; + + flash@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x800000>; + bank-width = <2>; + device-width = <1>; + }; + + nand@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8313-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <0x1 0x0 0x2000>; + + kernel@0 { + reg = <0x0 0x400000>; + read-only; + }; + + fs@400000 { + reg = <0x400000 0x4000000>; + }; + + appli@4400000 { + reg = <0x4400000 0x3c00000>; + }; + }; + }; + + soc8313@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0x0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + sleep-nexus { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + sleep = <&pmc 0x03000000>; + ranges; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 0x8>; + interrupt-parent = <&ipic>; + dfsrr; + rtc@6f { + compatible = "isl12024"; + reg = <0x6f>; + }; + dtt@49 { + compatible = "national,lm73"; + reg = <0x49>; + }; + at24@50 { + compatible = "at24,24c32"; + reg = <0x50>; + }; + at24@57 { + compatible = "at24,isl12024"; + reg = <0x57>; + }; + }; + + crypto@30000 { + compatible = "fsl,sec2.2", "fsl,sec2.1", + "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <11 0x8>; + interrupt-parent = <&ipic>; + fsl,num-channels = <1>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x4c>; + fsl,descriptor-types-mask = <0x0122003f>; + }; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <15 0x8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + spi@7000 { + cell-index = <0>; + compatible = "fsl,spi"; + reg = <0x7000 0x1000>; + interrupts = <16 0x8>; + interrupt-parent = <&ipic>; + mode = "cpu"; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&ipic>; + interrupts = <38 0x8>; + phy_type = "utmi_wide"; + sleep = <&pmc 0x00300000>; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 0x8 36 0x8 37 0x8>; + interrupt-parent = <&ipic>; + fixed-link = <1 1 100 0 0>; + sleep = <&pmc 0x10000000>; + fsl,magic-packet; + }; + + serial0: serial@4600 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <10 0x8>; + interrupt-parent = <&ipic>; + }; + + /* IPIC + * interrupts cell = + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + device_type = "ipic"; + }; + + pmc: power@b00 { + compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; + reg = <0xb00 0x100 0xa00 0x100>; + interrupts = <80 8>; + interrupt-parent = <&ipic>; + fsl,mpc8313-wakeup-timer = <>m1>; + + /* Remove this (or change to "okay") if you have + * a REVA3 or later board, if you apply one of the + * workarounds listed in section 8.5 of the board + * manual, or if you are adapting this device tree + * to a different board. + */ + status = "okay"; + }; + + gtm1: timer@500 { + compatible = "fsl,mpc8313-gtm", "fsl,gtm"; + reg = <0x500 0x100>; + interrupts = <72 8 78 8 84 8 90 8>; + interrupt-parent = <&ipic>; + }; + + timer@600 { + compatible = "fsl,mpc8313-gtm", "fsl,gtm"; + reg = <0x600 0x100>; + interrupts = <91 8 79 8 85 8 73 8>; + interrupt-parent = <&ipic>; + }; + + wakeup@27000 { + compatible = "fsl,wakeup-it", "fsl,gtm"; + reg = <0x27000 0x100>; + interrupts = <17 8 19 8>; + interrupt-parent = <&ipic>; + }; + + }; + + sleep-nexus { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + sleep = <&pmc 0x00010000>; + ranges; + + pci0: pci@e0008500 { + cell-index = <1>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0F - PCI slot */ + 0x7800 0x0 0x0 0x1 &ipic 48 0x8 + 0x7800 0x0 0x0 0x2 &ipic 48 0x8 + 0x7800 0x0 0x0 0x3 &ipic 48 0x8 + 0x7800 0x0 0x0 0x4 &ipic 48 0x8>; + interrupt-parent = <&ipic>; + interrupts = <66 0x8>; + bus-range = <0x0 0x0>; + ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 + 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; + clock-frequency = <66666666>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008500 0x100>; + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; + + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8313-dma", "fsl,elo-dma"; + reg = <0xe00082a8 4>; + ranges = <0 0xe0008100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + + dma-channel@0 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + }; + + dma-channel@80 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0x80 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <1>; + }; + + dma-channel@100 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0x100 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <2>; + }; + + dma-channel@180 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <3>; + }; + }; + }; +}; -- cgit v1.2.3 From ec1461ce16b91c008d22000f6a471b2b106669ce Mon Sep 17 00:00:00 2001 From: Graham Gower Date: Tue, 11 Aug 2009 21:32:03 +0000 Subject: glibc: Build glibc 2.9 with glibc-ports 2.9 This combination of glibc-2.9 with glibc-ports-2.7 fails to build on mipsel. The reason we have been using glibc-ports 2.7 was that glibc-ports 2.9 was not tagged or we didn't see it for various reasons. Build glibc 2.9 with glibc-port 2.9 and drop the three ARM patches as they have been applied to the upstream glibc-ports tree: http://sourceware.org/git/?p=glibc-ports.git;a=commitdiff;h=7272ed4e474a398b8ce1e7374cdaa8592b840e2a http://sourceware.org/git/?p=glibc-ports.git;a=commitdiff;h=e6e41f0f4963bfb0c0e32f8263ae028b288b5453 Patchwork: http://patchwork.openembedded.org/patch/933/ Signed-off-By: Graham Gower Signed-off-By: Holger Hans Peter Acked-by: Khem Raj --- recipes/glibc/glibc-2.9/glibc-2.9-use-_begin.patch | 28 ++++++++++++++++++++++ recipes/glibc/glibc_2.9.bb | 12 ++++------ 2 files changed, 32 insertions(+), 8 deletions(-) create mode 100644 recipes/glibc/glibc-2.9/glibc-2.9-use-_begin.patch (limited to 'recipes') diff --git a/recipes/glibc/glibc-2.9/glibc-2.9-use-_begin.patch b/recipes/glibc/glibc-2.9/glibc-2.9-use-_begin.patch new file mode 100644 index 0000000000..8d36a0524e --- /dev/null +++ b/recipes/glibc/glibc-2.9/glibc-2.9-use-_begin.patch @@ -0,0 +1,28 @@ +From 7c8a67320e26b8c11108bf0a3410d3aef9cf3486 Mon Sep 17 00:00:00 2001 +From: Ulrich Drepper +Date: Sat, 31 Jan 2009 00:21:15 +0000 +Subject: [PATCH] * elf/Makefile (ld.so): Adjust the sed script to insert _begin in to newer linker scripts. +--- +diff --git a/elf/Makefile b/elf/Makefile +index 8079fe9..e44ff1d 100644 +--- a/elf/Makefile ++++ b/elf/Makefile +@@ -1,4 +1,4 @@ +-# Copyright (C) 1995-2007, 2008 Free Software Foundation, Inc. ++# Copyright (C) 1995-2007, 2008, 2009 Free Software Foundation, Inc. + # This file is part of the GNU C Library. + + # The GNU C Library is free software; you can redistribute it and/or +@@ -304,7 +304,7 @@ $(objpfx)ld.so: $(objpfx)librtld.os $(ld-map) + $(LDFLAGS-rtld) -Wl,-z,defs -Wl,--verbose 2>&1 | \ + LC_ALL=C \ + sed -e '/^=========/,/^=========/!d;/^=========/d' \ +- -e 's/\. = 0 + SIZEOF_HEADERS;/& _begin = . - SIZEOF_HEADERS;/' \ ++ -e 's/\. = .* + SIZEOF_HEADERS;/& _begin = . - SIZEOF_HEADERS;/' \ + > $@.lds + $(LINK.o) -nostdlib -nostartfiles -shared -o $@ \ + $(LDFLAGS-rtld) -Wl,-z,defs $(z-now-$(bind-now)) \ +-- +1.6.3.2 + + diff --git a/recipes/glibc/glibc_2.9.bb b/recipes/glibc/glibc_2.9.bb index eb157506c6..c3ebc167aa 100644 --- a/recipes/glibc/glibc_2.9.bb +++ b/recipes/glibc/glibc_2.9.bb @@ -5,7 +5,7 @@ ARM_INSTRUCTION_SET = "arm" PACKAGES_DYNAMIC = "libc6*" RPROVIDES_${PN}-dev = "libc6-dev virtual-libc-dev" -PR = "${INC_PR}.1" +PR = "${INC_PR}.2" # the -isystem in bitbake.conf screws up glibc do_stage BUILD_CPPFLAGS = "-I${STAGING_INCDIR_NATIVE}" @@ -43,7 +43,7 @@ RDEPENDS_${PN}-dev = "linux-libc-headers-dev" # file://arm-ioperm.patch;patch=1;pnum=0 \ # file://ldd.patch;patch=1;pnum=0 \ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/glibc/glibc-${PV}.tar.bz2 \ - ftp://ftp.gnu.org/pub/gnu/glibc/glibc-ports-2.7.tar.bz2 \ + ftp://ftp.gnu.org/pub/gnu/glibc/glibc-ports-${PV}.tar.bz2 \ ftp://ftp.gnu.org/pub/gnu/glibc/glibc-libidn-${PV}.tar.bz2 \ file://nscd-init.patch;patch=1;pnum=0 \ file://arm-memcpy.patch;patch=1 \ @@ -55,9 +55,6 @@ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/glibc/glibc-${PV}.tar.bz2 \ file://glibc-check_pf.patch;patch=1;pnum=0 \ file://ldd-unbash.patch;patch=1 \ file://glibc-arm-IO-acquire-lock-fix.diff;patch=1 \ - file://local-args6.diff;patch=1 \ - file://arm-check-pf.patch;patch=1 \ - file://arm-lowlevellock-include-tls.patch;patch=1 \ file://generic-bits_select.h \ file://generic-bits_types.h \ file://generic-bits_typesizes.h \ @@ -66,10 +63,9 @@ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/glibc/glibc-${PV}.tar.bz2 \ file://generate-supported.mk \ file://march-i686.patch;patch=1;pnum=0 \ file://tls_i486.patch;patch=1 \ - file://glibc-arm-no-asm-page.patch;patch=1 \ + file://glibc-2.9-use-_begin.patch;patch=1 \ " - # Build fails on sh3 and sh4 without additional patches SRC_URI_append_sh3 = " file://no-z-defs.patch;patch=1" SRC_URI_append_sh4 = " file://no-z-defs.patch;patch=1" @@ -92,7 +88,7 @@ EXTRA_OECONF += "${@get_glibc_fpu_setting(bb, d)}" do_munge() { # Integrate ports and libidn into tree - mv ${WORKDIR}/glibc-ports-2.7 ${S}/ports + mv ${WORKDIR}/glibc-ports-${PV} ${S}/ports mv ${WORKDIR}/glibc-libidn-${PV} ${S}/libidn # Ports isn't really working... Fix it -- cgit v1.2.3 From 3a8e482ccc5b6c2912dc9f6cb2a7598423f9152b Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Thu, 10 Sep 2009 15:18:48 +0200 Subject: quake2: fix QA errors --- recipes/quake/quake2_svn.bb | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/quake/quake2_svn.bb b/recipes/quake/quake2_svn.bb index 31491ad419..a01def898d 100644 --- a/recipes/quake/quake2_svn.bb +++ b/recipes/quake/quake2_svn.bb @@ -5,6 +5,7 @@ DEPENDS = "libsdl-x11 libxxf86dga" SRCREV = "205" PV = "0.16.1+svnr${SRCREV}" +PR = "r1" SRC_URI = "svn://svn.icculus.org/quake2/;module=trunk \ file://quake2-arm.patch;patch=1" @@ -14,7 +15,7 @@ S = "${WORKDIR}/trunk" export BUILD_SDLQUAKE2=YES export OSTYPE=Linux export ARCH=${TARGET_ARCH} -export BASE_CFLAGS="${TARGET_CC_ARCH} -Wall -pipe -Dstricmp=strcasecmp" +export BASE_CFLAGS="${TARGET_CC_ARCH} ${LDFLAGS} -Wall -pipe -Dstricmp=strcasecmp" export OPT_CFLAGS="-O3 -ffast-math -funroll-loops -fomit-frame-pointer -fexpensive-optimizations" do_compile() { -- cgit v1.2.3 From dd5c666d2182d6d839bde4ba4737bbea65680854 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Thu, 10 Sep 2009 18:53:51 +0200 Subject: freeimage: fix QA errors --- recipes/ogre/freeimage_3.11.0.bb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'recipes') diff --git a/recipes/ogre/freeimage_3.11.0.bb b/recipes/ogre/freeimage_3.11.0.bb index 2d7f4f0688..49b0848474 100644 --- a/recipes/ogre/freeimage_3.11.0.bb +++ b/recipes/ogre/freeimage_3.11.0.bb @@ -1,10 +1,14 @@ LICENSE = "MIT" do_unpack[depends] += "unzip-native:do_populate_staging" +PR = "r1" + SRC_URI = "${SOURCEFORGE_MIRROR}/freeimage/FreeImage3110.zip" S = "${WORKDIR}/FreeImage/" +TARGET_CC_ARCH += "${LDFLAGS}" + do_configure() { sed -i -e /^CC/d \ -e /^CXX\ /d \ -- cgit v1.2.3 From 5a881d0d782cb69b7754f7438ba66b703f4884ba Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Thu, 10 Sep 2009 12:49:38 -0700 Subject: cherokee: Add new version 0.99.24 * Use INC_PR * Add new recipe for 0.99.24 * Add --with-mysql configure option to point to staging area. Otherwise with build machines having local installation of mysql-dev, cherokee configures itself to use the headers from /usr/include/mysql Signed-off-by: Khem Raj Signed-off-by: Cliff Brake --- recipes/cherokee/cherokee.inc | 1 + recipes/cherokee/cherokee_0.4.29.bb | 2 +- recipes/cherokee/cherokee_0.5.3.bb | 3 +-- recipes/cherokee/cherokee_0.5.5.bb | 3 +-- recipes/cherokee/cherokee_0.98.0.bb | 2 +- recipes/cherokee/cherokee_0.99.24.bb | 12 ++++++++++++ 6 files changed, 17 insertions(+), 6 deletions(-) create mode 100644 recipes/cherokee/cherokee_0.99.24.bb (limited to 'recipes') diff --git a/recipes/cherokee/cherokee.inc b/recipes/cherokee/cherokee.inc index 58ffe1ac94..16ecfbfe1f 100644 --- a/recipes/cherokee/cherokee.inc +++ b/recipes/cherokee/cherokee.inc @@ -4,6 +4,7 @@ HOMEPAGE = "http://www.cherokee-project.com/" SECTION = "network" LICENSE = "GPL" DEPENDS = "libpcre gnutls" +INC_PR = "r7" SRC_URI = "http://www.cherokee-project.com/download/0.5/${PV}/cherokee-${PV}.tar.gz \ file://cherokee.init " diff --git a/recipes/cherokee/cherokee_0.4.29.bb b/recipes/cherokee/cherokee_0.4.29.bb index 42eae684e7..a2c43e3c78 100644 --- a/recipes/cherokee/cherokee_0.4.29.bb +++ b/recipes/cherokee/cherokee_0.4.29.bb @@ -8,7 +8,7 @@ SRC_URI = "http://www.0x50.org/download/0.4/${PV}/${P}.tar.gz \ file://Makefile.in.patch;patch=1 \ file://Makefile.cget.patch;patch=1 \ file://util.patch;patch=1" -PR = "r1" +PR = "${INC_PR}.0" inherit autotools diff --git a/recipes/cherokee/cherokee_0.5.3.bb b/recipes/cherokee/cherokee_0.5.3.bb index 1fe9df46c0..a6e14e75c8 100644 --- a/recipes/cherokee/cherokee_0.5.3.bb +++ b/recipes/cherokee/cherokee_0.5.3.bb @@ -1,11 +1,10 @@ -PR = "r7" - SRC_URI_append = "file://configure.patch;patch=1 \ file://Makefile.in.patch;patch=1 \ file://Makefile.cget.patch;patch=1 \ file://util.patch;patch=1" require cherokee.inc +PR = "${INC_PR}.0" do_configure() { gnu-configize diff --git a/recipes/cherokee/cherokee_0.5.5.bb b/recipes/cherokee/cherokee_0.5.5.bb index 73b4d52418..c12f519622 100644 --- a/recipes/cherokee/cherokee_0.5.5.bb +++ b/recipes/cherokee/cherokee_0.5.5.bb @@ -1,5 +1,3 @@ -PR = "r4" - SRC_URI_append = "file://configure.in.patch;patch=1 \ file://Makefile.am.patch;patch=1" @@ -9,3 +7,4 @@ do_install_prepend () { } require cherokee.inc +PR = "${INC_PR}.0" diff --git a/recipes/cherokee/cherokee_0.98.0.bb b/recipes/cherokee/cherokee_0.98.0.bb index a8ebaa8f72..264e7a54af 100644 --- a/recipes/cherokee/cherokee_0.98.0.bb +++ b/recipes/cherokee/cherokee_0.98.0.bb @@ -1,6 +1,6 @@ require cherokee.inc -PR = "r1" +PR = "${INC_PR}.0" SRC_URI = "http://www.cherokee-project.com/download/0.98/${PV}/cherokee-${PV}.tar.gz \ file://cherokee.init " diff --git a/recipes/cherokee/cherokee_0.99.24.bb b/recipes/cherokee/cherokee_0.99.24.bb new file mode 100644 index 0000000000..b5d016006f --- /dev/null +++ b/recipes/cherokee/cherokee_0.99.24.bb @@ -0,0 +1,12 @@ +require cherokee.inc + +PR = "${INC_PR}.0" + +SRC_URI = "http://www.cherokee-project.com/download/0.99/${PV}/cherokee-${PV}.tar.gz \ + file://cherokee.init " + +CONFFILES_${PN} = " \ +${sysconfdir}/cherokee/cherokee.conf \ +${sysconfdir}/init.d/cherokee \ +" +EXTRA_OECONF += "--with-mysql=${STAGING_INCDIR}/mysql" -- cgit v1.2.3 From b76c22a5c61a06c64c0baefec048690cf0c88806 Mon Sep 17 00:00:00 2001 From: Henning Heinold Date: Fri, 11 Sep 2009 01:12:10 +0200 Subject: directfb: update to version 1.4.2 --- .../directfb/directfb-1.4.2/ts_lib_autotools.patch | 22 ++++++++++++++++++ recipes/directfb/directfb_1.4.2.bb | 26 ++++++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 recipes/directfb/directfb-1.4.2/ts_lib_autotools.patch create mode 100644 recipes/directfb/directfb_1.4.2.bb (limited to 'recipes') diff --git a/recipes/directfb/directfb-1.4.2/ts_lib_autotools.patch b/recipes/directfb/directfb-1.4.2/ts_lib_autotools.patch new file mode 100644 index 0000000000..414d48c2d6 --- /dev/null +++ b/recipes/directfb/directfb-1.4.2/ts_lib_autotools.patch @@ -0,0 +1,22 @@ +--- + configure.in | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +Index: DirectFB-1.4.1/configure.in +=================================================================== +--- DirectFB-1.4.1.orig/configure.in 2009-06-26 23:30:03.000000000 +0200 ++++ DirectFB-1.4.1/configure.in 2009-07-13 00:23:19.558669631 +0200 +@@ -1334,8 +1334,11 @@ + + enable_tslib=no + if test "$checkfor_tslib" = "yes"; then +- PKG_CHECK_MODULES([TSLIB], [tslib-0.0], enable_tslib=yes, enable_tslib=no +- AC_MSG_WARN([*** no tslib -- tslib driver will not be built.])) ++ PKG_CHECK_MODULES([TSLIB], [tslib-1.0 >= 1.0.0], [enable_tslib=yes], [enable_tslib=no]) ++ if test "$enable_tslib" = "no"; then ++ PKG_CHECK_MODULES([TSLIB], [tslib-0.0], [enable_tslib=yes], [enable_tslib=no, ++ AC_MSG_WARN([*** no tslib -- tslib driver will not be built.])]) ++ fi + fi + + enable_ucb1x00_ts=no diff --git a/recipes/directfb/directfb_1.4.2.bb b/recipes/directfb/directfb_1.4.2.bb new file mode 100644 index 0000000000..1e15186cd3 --- /dev/null +++ b/recipes/directfb/directfb_1.4.2.bb @@ -0,0 +1,26 @@ +require directfb.inc + +RV = "1.4-0" + +DEPENDS += "sysfsutils" + +SRC_URI = " \ + http://directfb.org/downloads/Core/DirectFB-1.4/DirectFB-${PV}.tar.gz \ + file://directfb-1.2.x-fix-pkgconfig-cflags.patch;patch=1 \ + file://mkdfiff.patch;patch=1 \ + file://dont-use-linux-config.patch;patch=1 \ + file://ts_lib_autotools.patch;patch=1 \ +" + +EXTRA_OECONF = "\ + --enable-freetype=yes \ + --enable-zlib \ + --with-gfxdrivers=none \ + --disable-sdl \ + --disable-vnc \ + --disable-x11 \ +" + +LDFLAGS_append = "" + +LEAD_SONAME = "libdirectfb-1.4.so.0" -- cgit v1.2.3 From fae7226fa006e8157fd802cd50f6643fa56060bb Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Thu, 10 Sep 2009 17:50:59 -0700 Subject: uclibc-initial: Move the compile stuff to do_compile * Currently all work is done in do_stage. On Henning's suggestion I refactored it. * For 0.9.30 onwards installing pregen and install_dev built almost whole uclibc. We only needed libc headers so replaced with install_headers Signed-off-by: Khem Raj --- recipes/uclibc/uclibc-initial_0.9.28.bb | 16 ++++++++-------- recipes/uclibc/uclibc-initial_0.9.29.bb | 12 ++++++------ recipes/uclibc/uclibc-initial_0.9.30.1.bb | 17 +++++++---------- recipes/uclibc/uclibc-initial_0.9.30.bb | 16 +++++++--------- recipes/uclibc/uclibc-initial_git.bb | 13 ++++++------- recipes/uclibc/uclibc-initial_nptl.bb | 12 ++++++------ 6 files changed, 40 insertions(+), 46 deletions(-) (limited to 'recipes') diff --git a/recipes/uclibc/uclibc-initial_0.9.28.bb b/recipes/uclibc/uclibc-initial_0.9.28.bb index dbd90fc862..6e82dcd50a 100644 --- a/recipes/uclibc/uclibc-initial_0.9.28.bb +++ b/recipes/uclibc/uclibc-initial_0.9.28.bb @@ -10,11 +10,6 @@ do_stage() { make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ pregen install_dev - make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - libc/sysdeps/linux/${TARGET_ARCH}/crt1.o \ - libc/sysdeps/linux/${TARGET_ARCH}/crti.o \ - libc/sysdeps/linux/${TARGET_ARCH}/crtn.o install -d ${CROSS_DIR}/${TARGET_SYS} ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include @@ -22,8 +17,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h install -m 644 libc/sysdeps/linux/${TARGET_ARCH}/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib - ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ - -o ${UCLIBC_STAGE_PREFIX}/lib/libc.so + install -m 644 libc/libc.so ${UCLIBC_STAGE_PREFIX}/lib } @@ -32,5 +26,11 @@ do_install() { } do_compile () { - : + make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + libc/sysdeps/linux/${TARGET_ARCH}/crt1.o \ + libc/sysdeps/linux/${TARGET_ARCH}/crti.o \ + libc/sysdeps/linux/${TARGET_ARCH}/crtn.o + ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ + -o lib/libc.so } diff --git a/recipes/uclibc/uclibc-initial_0.9.29.bb b/recipes/uclibc/uclibc-initial_0.9.29.bb index 98ef7b291a..964f319783 100644 --- a/recipes/uclibc/uclibc-initial_0.9.29.bb +++ b/recipes/uclibc/uclibc-initial_0.9.29.bb @@ -10,9 +10,6 @@ do_stage() { make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ pregen install_dev - make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - lib/crt1.o lib/crti.o lib/crtn.o install -d ${CROSS_DIR}/${TARGET_SYS} ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include @@ -20,8 +17,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib - ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ - -o ${UCLIBC_STAGE_PREFIX}/lib/libc.so + install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib } @@ -30,5 +26,9 @@ do_install() { } do_compile () { - : + make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + lib/crt1.o lib/crti.o lib/crtn.o + ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ + -o lib/libc.so } diff --git a/recipes/uclibc/uclibc-initial_0.9.30.1.bb b/recipes/uclibc/uclibc-initial_0.9.30.1.bb index d0edf93693..5c803b99c6 100644 --- a/recipes/uclibc/uclibc-initial_0.9.30.1.bb +++ b/recipes/uclibc/uclibc-initial_0.9.30.1.bb @@ -9,20 +9,13 @@ do_stage() { # Install initial headers into the cross dir make V=1 CC="${CC}" PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - pregen install_dev - make V=1 CC="${CC}" PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - lib/crt1.o lib/crti.o lib/crtn.o - - install -d ${CROSS_DIR}/${TARGET_SYS} + install_headers ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib - ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ - -o ${UCLIBC_STAGE_PREFIX}/lib/libc.so - + install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib } do_install() { @@ -30,5 +23,9 @@ do_install() { } do_compile () { - : + make V=1 CC="${CC}" PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + lib/crt1.o lib/crti.o lib/crtn.o + ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ + -o lib/libc.so } diff --git a/recipes/uclibc/uclibc-initial_0.9.30.bb b/recipes/uclibc/uclibc-initial_0.9.30.bb index 98ef7b291a..7cd953605b 100644 --- a/recipes/uclibc/uclibc-initial_0.9.30.bb +++ b/recipes/uclibc/uclibc-initial_0.9.30.bb @@ -9,20 +9,14 @@ do_stage() { # Install initial headers into the cross dir make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - pregen install_dev - make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - lib/crt1.o lib/crti.o lib/crtn.o + install-headers - install -d ${CROSS_DIR}/${TARGET_SYS} ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib - ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ - -o ${UCLIBC_STAGE_PREFIX}/lib/libc.so - + install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib } do_install() { @@ -30,5 +24,9 @@ do_install() { } do_compile () { - : + make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + lib/crt1.o lib/crti.o lib/crtn.o + ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ + -o lib/libc.so } diff --git a/recipes/uclibc/uclibc-initial_git.bb b/recipes/uclibc/uclibc-initial_git.bb index 38b85ef36f..6c91762723 100644 --- a/recipes/uclibc/uclibc-initial_git.bb +++ b/recipes/uclibc/uclibc-initial_git.bb @@ -10,17 +10,12 @@ do_stage() { make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ install_headers - make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - lib/crt1.o lib/crti.o lib/crtn.o - ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib - ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ - -o ${UCLIBC_STAGE_PREFIX}/lib/libc.so + install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib } do_install() { @@ -28,5 +23,9 @@ do_install() { } do_compile () { - : + make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + lib/crt1.o lib/crti.o lib/crtn.o + ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ + -o lib/libc.so } diff --git a/recipes/uclibc/uclibc-initial_nptl.bb b/recipes/uclibc/uclibc-initial_nptl.bb index 3da8417e52..cca3c1e688 100644 --- a/recipes/uclibc/uclibc-initial_nptl.bb +++ b/recipes/uclibc/uclibc-initial_nptl.bb @@ -14,16 +14,12 @@ do_stage() { ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include # This conflicts with the c++ version of this header - make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - lib/crt1.o lib/crti.o lib/crtn.o V=1 rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib + install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib - ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ - -o ${UCLIBC_STAGE_PREFIX}/lib/libc.so } do_install() { @@ -31,5 +27,9 @@ do_install() { } do_compile () { - : + make PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + lib/crt1.o lib/crti.o lib/crtn.o V=1 + ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ + -o lib/libc.so } -- cgit v1.2.3 From bcc5de7935874cb2e5673526398ddf3a08e9812f Mon Sep 17 00:00:00 2001 From: Henning Heinold Date: Fri, 11 Sep 2009 03:22:24 +0200 Subject: eject: inherit gettext to honour USE_NLS --- recipes/eject/eject_2.1.5.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/eject/eject_2.1.5.bb b/recipes/eject/eject_2.1.5.bb index 7cf7188899..6d53aee9a7 100644 --- a/recipes/eject/eject_2.1.5.bb +++ b/recipes/eject/eject_2.1.5.bb @@ -1,7 +1,7 @@ DESCRIPTION = "Eject allows removable media (typically a CD-ROM, floppy disk, tape, or JAZ or ZIP disk) to be ejected under software control." LICENSE = "GPLv2" -inherit autotools +inherit autotools gettext SRC_URI = "http://ca.geocities.com/jefftranter@rogers.com/eject-${PV}.tar.gz" -- cgit v1.2.3 From a74a29fb4084d201f664aa00d7d5f0891d6d4822 Mon Sep 17 00:00:00 2001 From: Henning Heinold Date: Fri, 11 Sep 2009 03:23:54 +0200 Subject: disko: update to newer git rev * stole some input form the disko-oe-git, but rework some stuff --- recipes/disko/disko.inc | 24 ++++++++++++++ recipes/disko/disko_git.bb | 26 +++------------ recipes/disko/files/linkpath.patch | 23 +++++--------- recipes/disko/files/pkgconfig.patch | 63 +++++++++++++++++++------------------ 4 files changed, 69 insertions(+), 67 deletions(-) create mode 100644 recipes/disko/disko.inc (limited to 'recipes') diff --git a/recipes/disko/disko.inc b/recipes/disko/disko.inc new file mode 100644 index 0000000000..8f531c5a5a --- /dev/null +++ b/recipes/disko/disko.inc @@ -0,0 +1,24 @@ +DESCRIPTION = "Disko is an application framework, that can be used to develop GUI applications for embedded devices." +LICENSE = "GPL" + +DEPENDS = "sqlite3 libpng jpeg curl alsa-lib freetype libxml2 libsigc++-2.0 openssl" + +inherit scons pkgconfig + +ARM_INSTRUCTION_SET = "arm" +LD = ${CXX} + +#workaround for disko which creates .pc inside install +do_install_append () { + +for i in `find ${S}/ ${D}/${libdir}/pkgconfig -name "*.pc" -type f` ; do \ + sed -i -e 's:${D}::g' $i + done +} + +scons_do_stage_append () { + STAGE_PKG_SEARCHPATH="${S}/ ${@['','${WORKDIR}/staging-pkg/'][bb.data.inherits_class('packaged-staging',d)]}" + for i in `find ${STAGE_PKG_SEARCHPATH} -name "*.pc" -type f` ; do \ + sed -i -e 's:${STAGING_DIR_HOST}::g' $i + done +} diff --git a/recipes/disko/disko_git.bb b/recipes/disko/disko_git.bb index a48ec15d39..9aa378ee5c 100644 --- a/recipes/disko/disko_git.bb +++ b/recipes/disko/disko_git.bb @@ -1,38 +1,22 @@ DESCRIPTION = "Disko is an application framework, that can be used to develop GUI applications for embedded devices. It is closely connected to the DirectFB" LICENSE = "GPL" -PV = "1.1.5+gitr${SRCREV}" +PV = "1.6.0+gitr${SRCREV}" PR = "r0" -DEPENDS = "sqlite3 libpng jpeg curl alsa-lib taglib directfb libxml2 virtual/libx11 libsigc++-2.0 hal \ - libxv libxxf86vm" +require disko.inc + +DEPENDS += "taglib directfb virtual/libx11 hal libxv libxxf86vm" SRC_URI = "git://www.diskohq.org/disko.git;protocol=git \ file://linkpath.patch;patch=1 \ file://pkgconfig.patch;patch=1 \ " -SRCREV = "ed1d2905be5ae4fff37c498847c298fa501bbde1" +SRCREV = "2aa9912fc32fcf24574e5053201e967dd59bceca" S = "${WORKDIR}/git" -inherit scons pkgconfig - do_compile() { ${STAGING_BINDIR_NATIVE}/scons ${PARALLEL_MAKE} graphics=all PREFIX=${prefix} prefix=${prefix} || \ oefatal "scons build execution failed." } - -#workaround for disko which creates .pc inside install -do_install_append () { - -for i in `find ${S}/ ${D}/${libdir}/pkgconfig -name "*.pc" -type f` ; do \ - sed -i -e 's:${D}::g' $i - done -} - -scons_do_stage_append () { - STAGE_PKG_SEARCHPATH="${S}/ ${@['','${WORKDIR}/staging-pkg/'][bb.data.inherits_class('packaged-staging',d)]}" - for i in `find ${STAGE_PKG_SEARCHPATH} -name "*.pc" -type f` ; do \ - sed -i -e 's:${STAGING_DIR_HOST}::g' $i - done -} diff --git a/recipes/disko/files/linkpath.patch b/recipes/disko/files/linkpath.patch index c28540848e..e38b0748c4 100644 --- a/recipes/disko/files/linkpath.patch +++ b/recipes/disko/files/linkpath.patch @@ -1,22 +1,15 @@ Index: git/SConstruct =================================================================== ---- git.orig/SConstruct 2009-07-14 20:45:56.924100368 +0200 -+++ git/SConstruct 2009-07-14 20:46:27.553677127 +0200 -@@ -131,7 +131,7 @@ - if os.environ.has_key('CXXFLAGS'): - env['CCFLAGS'] = [os.environ['CXXFLAGS'].split()] - if os.environ.has_key('LD'): -- env['LINK'] = [os.environ['LD'].split()] -+ env['LINK'] = [os.environ['CXX'].split()] - if os.environ.has_key('LDFLAGS'): - env['LINKFLAGS'] = [os.environ['LDFLAGS'].split()] - -@@ -156,7 +156,7 @@ +--- git.orig/SConstruct 2009-09-11 01:44:37.000000000 +0200 ++++ git/SConstruct 2009-09-11 01:52:26.265319426 +0200 +@@ -161,8 +161,8 @@ + idir_inc = idir_prefix + '/include/disko' idir_data = idir_prefix + '/share/disko' - # link with -rpath --env['LINKFLAGS'].append('-Wl,-rpath=' + env['prefix'] + '/lib/disko') -+env['LINKFLAGS'].append('-Wl,-rpath-link=' + env['prefix'] + '/lib/disko') +-# link with -rpath +-# env['LINKFLAGS'].extend(['-Wl,-rpath=' + env['prefix'] + '/lib/disko']) ++# link with -rpath-link ++# env['LINKFLAGS'].extend(['-Wl,-rpath-link==' + env['prefix'] + '/lib/disko']) # extra flags if env['messages']: diff --git a/recipes/disko/files/pkgconfig.patch b/recipes/disko/files/pkgconfig.patch index 4bf50dcfa4..3e4a84bfe8 100644 --- a/recipes/disko/files/pkgconfig.patch +++ b/recipes/disko/files/pkgconfig.patch @@ -1,60 +1,60 @@ Index: git/SConstruct =================================================================== ---- git.orig/SConstruct 2009-07-14 23:53:04.460889326 +0200 -+++ git/SConstruct 2009-07-14 23:56:23.408030317 +0200 -@@ -542,6 +542,7 @@ +--- git.orig/SConstruct 2009-09-11 01:53:54.000000000 +0200 ++++ git/SConstruct 2009-09-11 02:08:12.789878911 +0200 +@@ -585,6 +585,7 @@ ####################################################################### # TODO: handle disko_pc_libs # if 'install' in BUILD_TARGETS: + PKG_CCFLAGS = '' disko_pc = open('disko.pc', 'w') - disko_pc_requires = 'libxml-2.0 >= 2.6, libcurl, sigc++-2.0, libpng >= 1.2, freetype2' + disko_pc_requires = 'libxml-2.0 >= 2.6, sigc++-2.0, libpng >= 1.2, freetype2' if env['LIBPATH']: -@@ -559,31 +560,43 @@ +@@ -610,30 +611,43 @@ + if env.has_key('libdl'): + disko_pc_libs += ' -ldl' - if env.has_key('libiconv'): - disko_pc_libs += ' -liconv' + if('fbdev' in env['graphics']): -+ PKG_CCFLAGS += '-D__HAVE_FBDEV__ ' - ++ PKG_CCFLAGS += '-D__HAVE_FBDEV__ ' ++ if 'dfb' in env['graphics']: disko_pc_requires += ', directfb' -+ PKG_CCFLAGS += '-D__HAVE_DIRECTFB__ ' ++ PKG_CCFLAGS += '-D__HAVE_DIRECTFB__ ' if 'x11' in env['graphics']: disko_pc_requires += ', x11, xv, xxf86vm' -+ PKG_CCFLAGS += '-D__HAVE_XLIB__ ' -+ PKG_CCFLAGS += '-D__ENABLE_MMSFB_X11_CORE__ ' -+ PKG_CCFLAGS += '-D__ENABLE_MMSFBSURFACE_X11_CORE__ ' ++ PKG_CCFLAGS += '-D__HAVE_XLIB__ ' ++ PKG_CCFLAGS += '-D__ENABLE_MMSFB_X11_CORE__ ' ++ PKG_CCFLAGS += '-D__ENABLE_MMSFBSURFACE_X11_CORE__ ' - if env['media'] != 'none': + if env['media'] and env['media'] != 'none': disko_pc_requires += ', alsa' - if not env['big_lib']: + if not env['big_lib'] and not env['static_lib']: disko_pc_libs += ' -lmmsmedia' -+ PKG_CCFLAGS += '-D__HAVE_MMSMEDIA__ -D__HAVE_MIXER__ ' ++ PKG_CCFLAGS += '-D__HAVE_MMSMEDIA__ -D__HAVE_MIXER__ ' if 'xine' in env['media']: if('x11' in env['graphics']): disko_pc_requires += ', libxine >= 1.1.15' else: disko_pc_requires += ', libxine' -+ PKG_CCFLAGS += '-D__HAVE_XINE__ ' -+ if conf.checkXineBlDvb(): -+ PKG_CCFLAGS += '-D__HAVE_XINE_BLDVB__ ' ++ PKG_CCFLAGS += '-D__HAVE_XINE__ ' ++ if conf.checkXineBlDvb(): ++ PKG_CCFLAGS += '-D__HAVE_XINE_BLDVB__ ' if 'gstreamer' in env['media']: disko_pc_requires += ', gstreamer-0.10' -+ PKG_CCFLAGS += '-D__HAVE_GSTREAMER__ ' ++ PKG_CCFLAGS += '-D__HAVE_GSTREAMER__ ' if env['enable_flash']: - disko_pc_requires += ', swfdec-0.8' - if not env['big_lib']: + disko_pc_requires += ', swfdec-' + swfdecversion + if not env['big_lib'] and not env['static_lib']: disko_pc_libs += ' -lmmsflash' -+ PKG_CCFLAGS += '-D__HAVE_MMSFLASH__ ' ++ PKG_CCFLAGS += '-D__HAVE_MMSFLASH__ ' if env['enable_sip']: disko_pc_requires += ', libpj' -@@ -591,18 +604,32 @@ +@@ -641,18 +655,32 @@ disko_pc_libs += ' -lmmssip' if('uuid' in env['LIBS']): disko_pc_requires += ', uuid' @@ -87,17 +87,18 @@ Index: git/SConstruct disko_pc.write('prefix=' + env['prefix'] + '\n') disko_pc.write('exec_prefix=${prefix}\n') -@@ -614,12 +641,7 @@ +@@ -664,13 +692,7 @@ disko_pc.write('Requires: ' + disko_pc_requires + '\n') disko_pc.write('Libs: -L${libdir} ' + disko_pc_libs + '\n') disko_pc.write('Cflags: -I${includedir}/ ') - for ccflag in env['CCFLAGS']: -- disko_pc.write(' ') -- if(type(ccflag).__name__ == 'str'): -- disko_pc.write(ccflag) -- else: -- disko_pc.write(' '.join(ccflag)) -+ disko_pc.write(PKG_CCFLAGS) +- if type(ccflag).__name__ == 'str' and not ccflag.startswith('-isystem'): +- disko_pc.write(' ') +- if(type(ccflag).__name__ == 'str'): +- disko_pc.write(ccflag) +- else: +- disko_pc.write(' '.join(ccflag)) ++ disko_pc.write(PKG_CCFLAGS) disko_pc.write('\n') disko_pc.close() -- cgit v1.2.3 From 50d8ec53a4424cf9fc80c6f3e80f9ffbe3b19a18 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Tue, 8 Sep 2009 20:41:56 -0700 Subject: images: Rename native-sdk-console-image.bb as native-sdk-image.bb tasks: Rename task-native-sdk.bb as task-sdk-native.bb Signed-off-by: Khem Raj --- recipes/images/native-sdk-console-image.bb | 2 -- recipes/images/native-sdk-image.bb | 2 ++ recipes/tasks/task-native-sdk.bb | 14 -------------- recipes/tasks/task-sdk-native.bb | 14 ++++++++++++++ 4 files changed, 16 insertions(+), 16 deletions(-) delete mode 100644 recipes/images/native-sdk-console-image.bb create mode 100644 recipes/images/native-sdk-image.bb delete mode 100644 recipes/tasks/task-native-sdk.bb create mode 100644 recipes/tasks/task-sdk-native.bb (limited to 'recipes') diff --git a/recipes/images/native-sdk-console-image.bb b/recipes/images/native-sdk-console-image.bb deleted file mode 100644 index df05fb4d6b..0000000000 --- a/recipes/images/native-sdk-console-image.bb +++ /dev/null @@ -1,2 +0,0 @@ -require console-image.bb -IMAGE_INSTALL += "task-native-sdk" diff --git a/recipes/images/native-sdk-image.bb b/recipes/images/native-sdk-image.bb new file mode 100644 index 0000000000..df05fb4d6b --- /dev/null +++ b/recipes/images/native-sdk-image.bb @@ -0,0 +1,2 @@ +require console-image.bb +IMAGE_INSTALL += "task-native-sdk" diff --git a/recipes/tasks/task-native-sdk.bb b/recipes/tasks/task-native-sdk.bb deleted file mode 100644 index 387e7b56fe..0000000000 --- a/recipes/tasks/task-native-sdk.bb +++ /dev/null @@ -1,14 +0,0 @@ -DESCRIPTION = "Packages required for native (on-device) SDK" -LICENSE = "MIT" -DEPENDS = "virtual/libc gcc binutils make patch patchutils diffstat diffutils automake flex bison gawk sed grep" -RDEPENDS = "gcc-symlinks g++-symlinks cpp cpp-symlinks binutils-symlinks \ - make virtual-libc-dev \ - task-proper-tools perl-modules flex flex-dev bison gawk sed grep autoconf automake make \ - patch patchutils diffstat diffutils libstdc++-dev" - -RECOMMENDS = " g77-symlinks gfortran-symlinks " - -PR = "r6" - -ALLOW_EMPTY = "1" -PACKAGES = "${PN}" diff --git a/recipes/tasks/task-sdk-native.bb b/recipes/tasks/task-sdk-native.bb new file mode 100644 index 0000000000..387e7b56fe --- /dev/null +++ b/recipes/tasks/task-sdk-native.bb @@ -0,0 +1,14 @@ +DESCRIPTION = "Packages required for native (on-device) SDK" +LICENSE = "MIT" +DEPENDS = "virtual/libc gcc binutils make patch patchutils diffstat diffutils automake flex bison gawk sed grep" +RDEPENDS = "gcc-symlinks g++-symlinks cpp cpp-symlinks binutils-symlinks \ + make virtual-libc-dev \ + task-proper-tools perl-modules flex flex-dev bison gawk sed grep autoconf automake make \ + patch patchutils diffstat diffutils libstdc++-dev" + +RECOMMENDS = " g77-symlinks gfortran-symlinks " + +PR = "r6" + +ALLOW_EMPTY = "1" +PACKAGES = "${PN}" -- cgit v1.2.3 From d3fc551eb32ff334fcea7cfe20a6f76b20c65c21 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Tue, 8 Sep 2009 20:43:46 -0700 Subject: console-image.bb: Require console-base-image * Get rid of code duplication. Signed-off-by: Khem Raj --- recipes/images/console-image.bb | 20 +++----------------- 1 file changed, 3 insertions(+), 17 deletions(-) (limited to 'recipes') diff --git a/recipes/images/console-image.bb b/recipes/images/console-image.bb index 9707881402..c3d3f17c39 100644 --- a/recipes/images/console-image.bb +++ b/recipes/images/console-image.bb @@ -1,24 +1,10 @@ #Angstrom bootstrap image +require console-base-image.bb -IMAGE_PREPROCESS_COMMAND = "create_etc_timestamp" - -ANGSTROM_EXTRA_INSTALL ?= "" - -SPLASH ?= "" -ZZAPSPLASH = ' ${@base_contains("MACHINE_FEATURES", "screen", "psplash-zap", "",d)}' - -DEPENDS = "task-base-extended \ - ${SPLASH} \ - ${ZZAPSPLASH} \ +DEPENDS += "task-base-extended \ " -IMAGE_INSTALL = "task-base-extended \ - ${ANGSTROM_EXTRA_INSTALL} \ - ${SPLASH} \ - ${ZZAPSPLASH} \ +IMAGE_INSTALL += "task-base-extended \ " export IMAGE_BASENAME = "console-image" -IMAGE_LINGUAS = "" - -inherit image -- cgit v1.2.3 From ad856cde593366bcd0d6cf4c6dfec12ec58c0b20 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Tue, 8 Sep 2009 20:45:43 -0700 Subject: binutils-cross: Do not install libibery.a in wrong place * This interferes with canadian cross build of binutils because it finds cross libiberty.a where as it needs the target one. Signed-off-by: Khem Raj --- recipes/binutils/binutils-cross.inc | 7 ------- recipes/binutils/binutils_cvs.bb | 28 +++++++++++++++++++++++++++- 2 files changed, 27 insertions(+), 8 deletions(-) (limited to 'recipes') diff --git a/recipes/binutils/binutils-cross.inc b/recipes/binutils/binutils-cross.inc index 384d18cfa7..5808c1fbda 100644 --- a/recipes/binutils/binutils-cross.inc +++ b/recipes/binutils/binutils-cross.inc @@ -22,13 +22,6 @@ do_stage () { rmdir ${CROSS_DIR}/${libdir} || : rmdir ${CROSS_DIR}/${libdir}64 || : rmdir ${CROSS_DIR}/${prefix} || : - - # We want to move this into the target specific location - mkdir -p ${STAGING_DIR_TARGET}/lib - mv -f ${CROSS_DIR}/lib/libiberty.a ${STAGING_DIR_TARGET}/lib || \ - mv -f ${CROSS_DIR}/lib64/libiberty.a ${STAGING_DIR_TARGET}/lib - rmdir ${CROSS_DIR}/lib || : - rmdir ${CROSS_DIR}/lib64 || : } do_install () { diff --git a/recipes/binutils/binutils_cvs.bb b/recipes/binutils/binutils_cvs.bb index ad4dd2b474..88dcd78c90 100644 --- a/recipes/binutils/binutils_cvs.bb +++ b/recipes/binutils/binutils_cvs.bb @@ -21,8 +21,34 @@ do_compile () { oe_runmake all-ld all-binutils all-gas } do_install () { - oe_runmake install-ld install-binutils install-gas + autotools_do_install install-ld install-binutils install-gas + + # We don't really need these, so we'll remove them... + rm -rf ${D}${libdir}/ldscripts + + # Fix the /usr/${TARGET_SYS}/bin/* links + for l in ${D}${prefix}/${TARGET_SYS}/bin/*; do + rm -f $l + ln -sf `echo ${prefix}/${TARGET_SYS}/bin \ + | tr -s / \ + | sed -e 's,^/,,' -e 's,[^/]*,..,g'`${bindir}/${TARGET_PREFIX}`basename $l` $l + done + + # Install the libiberty header + install -d ${D}${includedir} + install -m 644 ${S}/include/ansidecl.h ${D}${includedir} + install -m 644 ${S}/include/libiberty.h ${D}${includedir} + + cd ${D}${bindir} + + # Symlinks for ease of running these on the native target + for p in ${TARGET_SYS}-* ; do + ln -sf $p `echo $p | sed -e s,${TARGET_SYS}-,,` + done + + rm ${D}${bindir}/ar ${D}${bindir}/strings } + do_stage () { oe_libinstall -so -a -C opcodes libopcodes ${STAGING_LIBDIR}/ oe_libinstall -a -C libiberty libiberty ${STAGING_LIBDIR}/ -- cgit v1.2.3 From 2aaa2e297f98a239a628706124615a7816a6b662 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Tue, 8 Sep 2009 20:49:09 -0700 Subject: gcc-configure-common: Dont fiddle with NATIVE_SYSTEM_HEADER_DIR * This does not work on canadian cross build of target gcc. Signed-off-by: Khem Raj --- recipes/gcc/gcc-4.4.1.inc | 43 ------------------------------------ recipes/gcc/gcc-configure-common.inc | 7 ------ 2 files changed, 50 deletions(-) (limited to 'recipes') diff --git a/recipes/gcc/gcc-4.4.1.inc b/recipes/gcc/gcc-4.4.1.inc index 9bc4d17dd6..f32f749ce6 100644 --- a/recipes/gcc/gcc-4.4.1.inc +++ b/recipes/gcc/gcc-4.4.1.inc @@ -30,46 +30,3 @@ EXTRA_OECONF_BASE = " --enable-libssp \ --disable-libmudflap" EXTRA_OECONF_append_linux-uclibc = " ${@base_contains('TARGET_ARCH', 'powerpc', '--disable-decimal-float --without-long-double-128', '',d)}" -do_configure () { - # Setup these vars for cross building only - # ... because foo_FOR_TARGET apparently gets misinterpreted inside the - # gcc build stuff when the build is producing a cross compiler - i.e. - # when the 'current' target is the 'host' system, and the host is not - # the target (because the build is actually making a cross compiler!) - if [ "${BUILD_SYS}" != "${HOST_SYS}" ]; then - export CC_FOR_TARGET="${CC}" - export GCC_FOR_TARGET="${CC}" - export CXX_FOR_TARGET="${CXX}" - export AS_FOR_TARGET="${HOST_PREFIX}as" - export LD_FOR_TARGET="${HOST_PREFIX}ld" - export NM_FOR_TARGET="${HOST_PREFIX}nm" - export AR_FOR_TARGET="${HOST_PREFIX}ar" - export GFORTRAN_FOR_TARGET="gfortran" - export RANLIB_FOR_TARGET="${HOST_PREFIX}ranlib" - fi - export CC_FOR_BUILD="${BUILD_CC}" - export CXX_FOR_BUILD="${BUILD_CXX}" - export CFLAGS_FOR_BUILD="${BUILD_CFLAGS}" - export CPPFLAGS_FOR_BUILD="${BUILD_CPPFLAGS}" - export CXXFLAGS_FOR_BUILD="${BUILD_CXXFLAGS}" - export LDFLAGS_FOR_BUILD="${BUILD_LDFLAGS}" - export ARCH_FLAGS_FOR_TARGET="${ARCH_FLAGS_FOR_TARGET}" - - # Make sure LDFLAGS are honored. - sed -i 's/^LDFLAGS = $/LDFLAGS = @LDFLAGS@/' ${S}/Makefile.in - sed -i 's/^LDFLAGS = $/LDFLAGS = @LDFLAGS@/' ${S}/Makefile.tpl - - (cd ${S} && gnu-configize) || die "failure running gnu-configize" - - # splice our idea of where the headers live into gcc's world - #echo "NATIVE_SYSTEM_HEADER_DIR = ${layout_includedir}" > ${T}/t-oe - #sed 's%^tmake_file=.*$%& ${T}/t-oe%' < ${S}/gcc/Makefile.in >${S}/gcc/Makefile.in.new - #mv ${S}/gcc/Makefile.in.new ${S}/gcc/Makefile.in - - #echo "#define STANDARD_INCLUDE_DIR \"${layout_includedir}\"" >> ${S}/gcc/defaults.h - - oe_runconf - - # make sure that no @LDFLAG@ is left in the generated Makefile - sed -i "s/@LDFLAGS@//g" ${B}/Makefile -} diff --git a/recipes/gcc/gcc-configure-common.inc b/recipes/gcc/gcc-configure-common.inc index 1c605a132d..7315a20cf9 100644 --- a/recipes/gcc/gcc-configure-common.inc +++ b/recipes/gcc/gcc-configure-common.inc @@ -81,13 +81,6 @@ do_configure () { (cd ${S} && gnu-configize) || die "failure running gnu-configize" - # splice our idea of where the headers live into gcc's world - echo "NATIVE_SYSTEM_HEADER_DIR = ${layout_includedir}" > ${T}/t-oe - sed 's%^tmake_file=.*$%& ${T}/t-oe%' < ${S}/gcc/Makefile.in >${S}/gcc/Makefile.in.new - mv ${S}/gcc/Makefile.in.new ${S}/gcc/Makefile.in - - echo "#define STANDARD_INCLUDE_DIR \"${layout_includedir}\"" >> ${S}/gcc/defaults.h - oe_runconf # make sure that no @LDFLAG@ is left in the generated Makefile -- cgit v1.2.3 From 8050c52cb58da79cb2849f34905fbcfa64fbf58b Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Thu, 10 Sep 2009 19:21:33 -0700 Subject: native-sdk-image.bb: Use IMAGE_BASENAME = "native-sdk-image" Signed-off-by: Khem Raj --- recipes/images/native-sdk-image.bb | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'recipes') diff --git a/recipes/images/native-sdk-image.bb b/recipes/images/native-sdk-image.bb index df05fb4d6b..5d7968fc4a 100644 --- a/recipes/images/native-sdk-image.bb +++ b/recipes/images/native-sdk-image.bb @@ -1,2 +1,3 @@ -require console-image.bb -IMAGE_INSTALL += "task-native-sdk" +require console-image.bb +IMAGE_INSTALL += "task-sdk-native" +export IMAGE_BASENAME = "native-sdk-image" -- cgit v1.2.3 From 01407868c7671f8f5afdf8e29ee0315e16bef059 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Thu, 10 Sep 2009 19:22:46 -0700 Subject: gcc-configure-cross.inc: Export more binutils * Export AS_FOR_TARGET OBJDUMP_FOR_TARGET OBJCOPY_FOR_TARGET STRIP_FOR_TARGET Signed-off-by: Khem Raj --- recipes/gcc/gcc-configure-cross.inc | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/gcc/gcc-configure-cross.inc b/recipes/gcc/gcc-configure-cross.inc index aa4174edc4..b526ff3cc4 100644 --- a/recipes/gcc/gcc-configure-cross.inc +++ b/recipes/gcc/gcc-configure-cross.inc @@ -7,12 +7,16 @@ EXTRA_OECONF_PATHS = "--with-local-prefix=${STAGING_DIR_TARGET}${layout_prefix} --with-sysroot=${STAGING_DIR_TARGET} \ --with-build-sysroot=${STAGING_DIR_TARGET}" -do_compile_prepend () { +do_configure_prepend () { export CC="${BUILD_CC}" export AR_FOR_TARGET="${TARGET_SYS}-ar" + export AS_FOR_TARGET="${TARGET_SYS}-as" export RANLIB_FOR_TARGET="${TARGET_SYS}-ranlib" export LD_FOR_TARGET="${TARGET_SYS}-ld" export NM_FOR_TARGET="${TARGET_SYS}-nm" + export OBJDUMP_FOR_TARGET="${TARGET_SYS}-objdump" + export OBJCOPY_FOR_TARGET="${TARGET_SYS}-objcopy" + export STRIP_FOR_TARGET="${TARGET_SYS}-strip" export CC_FOR_TARGET="${CCACHE} ${TARGET_SYS}-gcc ${TARGET_CC_ARCH}" } -- cgit v1.2.3 From 2b1928ff76811b5f4e734ddbf21aacdfcd54e68c Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Fri, 11 Sep 2009 08:41:51 +0200 Subject: task-native-sdk: fix upgrade paths after task renaming --- recipes/tasks/task-sdk-native.bb | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/tasks/task-sdk-native.bb b/recipes/tasks/task-sdk-native.bb index 387e7b56fe..35ddf788fd 100644 --- a/recipes/tasks/task-sdk-native.bb +++ b/recipes/tasks/task-sdk-native.bb @@ -7,8 +7,9 @@ RDEPENDS = "gcc-symlinks g++-symlinks cpp cpp-symlinks binutils-symlinks \ patch patchutils diffstat diffutils libstdc++-dev" RECOMMENDS = " g77-symlinks gfortran-symlinks " +RPROVIDES_${PN} = "task-native-sdk" -PR = "r6" +PR = "r7" ALLOW_EMPTY = "1" PACKAGES = "${PN}" -- cgit v1.2.3 From d13e15663fb6ccd34dd7214178e3d1caf645179f Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Fri, 11 Sep 2009 09:05:21 +0200 Subject: linux-omap: add 2.6.31 --- ...0001-OMAP3-Enable-DSS2-for-OMAP3EVM-board.patch | 42 ++++++++-------- .../dss2/0004-OMAP-Add-VRAM-manager.patch | 34 ++++--------- recipes/linux/linux-omap_2.6.31.bb | 58 ++++++++++++++++++++++ recipes/linux/linux-omap_git.bb | 6 +-- 4 files changed, 91 insertions(+), 49 deletions(-) create mode 100644 recipes/linux/linux-omap_2.6.31.bb (limited to 'recipes') diff --git a/recipes/linux/linux-omap-2.6.31/dss2/0001-OMAP3-Enable-DSS2-for-OMAP3EVM-board.patch b/recipes/linux/linux-omap-2.6.31/dss2/0001-OMAP3-Enable-DSS2-for-OMAP3EVM-board.patch index 9a4ea8b9ad..0167fe2a55 100644 --- a/recipes/linux/linux-omap-2.6.31/dss2/0001-OMAP3-Enable-DSS2-for-OMAP3EVM-board.patch +++ b/recipes/linux/linux-omap-2.6.31/dss2/0001-OMAP3-Enable-DSS2-for-OMAP3EVM-board.patch @@ -1,20 +1,17 @@ -From 798f9b1bc478c7ded724fc190c65e413c2401314 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath -Date: Tue, 11 Aug 2009 15:52:04 +0530 -Subject: [PATCH 1/5] OMAP3: Enable DSS2 for OMAP3EVM board +Date: Thu, 10 Sep 2009 15:11:34 +0000 (+0530) +Subject: OMAP3: Enable DSS2 for OMAP3EVM board +X-Git-Url: http://arago-project.org/git/people/?p=vaibhav%2Fti-psp-omap-video.git;a=commitdiff_plain;h=1022536cf655419eac21299eac837f57f8f72eef + +OMAP3: Enable DSS2 for OMAP3EVM board Tested - - Validated all three outut interfaces (LCD, DVI and TV) + TODO: - - Support for Backlight control range (0 - 100) - Enable selection for both S-Video and Composite TV out - DVI color (VPLL2_DEV_GRP should be equal to 0x7) - -Signed-off-by: Vaibhav Hiremath --- - arch/arm/configs/omap3_evm_defconfig | 51 +++++++- - arch/arm/mach-omap2/board-omap3evm.c | 234 ++++++++++++++++++++++++++++++++-- - 2 files changed, 273 insertions(+), 12 deletions(-) diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig index d5ff477..ba395a2 100644 @@ -79,7 +76,7 @@ index d5ff477..ba395a2 100644 # diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c -index c0cb29d..0bc26b3 100644 +index 35f6075..5bc4bfe 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -22,6 +22,7 @@ @@ -271,9 +268,9 @@ index c0cb29d..0bc26b3 100644 + }, +}; - static struct omap_uart_platform_data omap3_evm_uart_config __initdata = { - .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), -@@ -143,6 +313,14 @@ static int omap3evm_twl_gpio_setup(struct device *dev, + static struct twl4030_hsmmc_info mmc[] = { + { +@@ -139,6 +309,14 @@ static int omap3evm_twl_gpio_setup(struct device *dev, * the P2 connector; notably LEDA for the LCD backlight. */ @@ -288,7 +285,7 @@ index c0cb29d..0bc26b3 100644 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; -@@ -194,6 +372,47 @@ static struct twl4030_madc_platform_data omap3evm_madc_data = { +@@ -190,6 +368,47 @@ static struct twl4030_madc_platform_data omap3evm_madc_data = { .irq_line = 1, }; @@ -336,7 +333,7 @@ index c0cb29d..0bc26b3 100644 static struct twl4030_platform_data omap3evm_twldata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, -@@ -203,6 +422,8 @@ static struct twl4030_platform_data omap3evm_twldata = { +@@ -199,6 +418,8 @@ static struct twl4030_platform_data omap3evm_twldata = { .madc = &omap3evm_madc_data, .usb = &omap3evm_usb_data, .gpio = &omap3evm_gpio_data, @@ -345,7 +342,7 @@ index c0cb29d..0bc26b3 100644 }; static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = { -@@ -223,15 +444,6 @@ static int __init omap3_evm_i2c_init(void) +@@ -219,15 +440,6 @@ static int __init omap3_evm_i2c_init(void) return 0; } @@ -361,20 +358,24 @@ index c0cb29d..0bc26b3 100644 static void ads7846_dev_init(void) { if (gpio_request(OMAP3_EVM_TS_GPIO, "ADS7846 pendown") < 0) -@@ -287,11 +499,10 @@ static void __init omap3_evm_init_irq(void) - } +@@ -275,7 +487,6 @@ struct spi_board_info omap3evm_spi_board_info[] = { + }; static struct omap_board_config_kernel omap3_evm_config[] __initdata = { - { OMAP_TAG_LCD, &omap3_evm_lcd_config }, }; + static void __init omap3_evm_init_irq(void) +@@ -289,7 +500,7 @@ static void __init omap3_evm_init_irq(void) + } + static struct platform_device *omap3_evm_devices[] __initdata = { - &omap3_evm_lcd_device, + &omap3_evm_dss_device, &omap3evm_smc911x_device, }; -@@ -314,6 +525,7 @@ static void __init omap3_evm_init(void) +@@ -310,6 +521,7 @@ static void __init omap3_evm_init(void) usb_musb_init(); usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61); ads7846_dev_init(); @@ -382,6 +383,3 @@ index c0cb29d..0bc26b3 100644 } static void __init omap3_evm_map_io(void) --- -1.6.2.4 - diff --git a/recipes/linux/linux-omap-2.6.31/dss2/0004-OMAP-Add-VRAM-manager.patch b/recipes/linux/linux-omap-2.6.31/dss2/0004-OMAP-Add-VRAM-manager.patch index 13fe0b0234..47eab0fa7d 100644 --- a/recipes/linux/linux-omap-2.6.31/dss2/0004-OMAP-Add-VRAM-manager.patch +++ b/recipes/linux/linux-omap-2.6.31/dss2/0004-OMAP-Add-VRAM-manager.patch @@ -1,7 +1,9 @@ -From cb8ce54283e64bd30636b7bcd2d7bb4e200825d2 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen -Date: Fri, 7 Aug 2009 12:01:55 +0300 -Subject: [PATCH 04/18] OMAP: Add VRAM manager +Date: Fri, 7 Aug 2009 09:01:55 +0000 (+0300) +Subject: OMAP: Add VRAM manager +X-Git-Url: http://arago-project.org/git/people/?p=vaibhav%2Fti-psp-omap-video.git;a=commitdiff_plain;h=9e5a02f69fe2261ac928aa956add6f1c9f48386d + +OMAP: Add VRAM manager Add a Video RAM manager for OMAP 2 and 3 platforms. VRAM manager is used to allocate large continuous blocks of SDRAM or SRAM. The features VRAM @@ -20,33 +22,20 @@ and boot parameter overrides kernel config and board file. Signed-off-by: Tomi Valkeinen --- - arch/arm/mach-omap2/io.c | 2 + - arch/arm/plat-omap/include/mach/vram.h | 63 +++ - arch/arm/plat-omap/sram.c | 8 + - drivers/video/Kconfig | 1 + - drivers/video/Makefile | 1 + - drivers/video/omap2/Kconfig | 2 + - drivers/video/omap2/Makefile | 1 + - drivers/video/omap2/vram.c | 655 ++++++++++++++++++++++++++++++++ - 8 files changed, 733 insertions(+), 0 deletions(-) - create mode 100644 arch/arm/plat-omap/include/mach/vram.h - create mode 100644 drivers/video/omap2/Kconfig - create mode 100644 drivers/video/omap2/Makefile - create mode 100644 drivers/video/omap2/vram.c diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c -index 49199a3..f837063 100644 +index 4a08ad3..e5dd736 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c -@@ -32,6 +32,7 @@ - #include +@@ -33,6 +33,7 @@ #include #include + #include +#include #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ #include "clock.h" -@@ -240,6 +241,7 @@ void __init omap2_map_common_io(void) +@@ -246,6 +247,7 @@ void __init omap2_map_common_io(void) omap2_check_revision(); omap_sram_init(); omapfb_reserve_sdram(); @@ -124,7 +113,7 @@ index 0000000..fe72f81 + +#endif diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c -index 5eae787..c9b89cd 100644 +index 925f647..cda311b 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -28,6 +28,7 @@ @@ -849,6 +838,3 @@ index 0000000..634ce23 + omap_vram_sram_start = start; + omap_vram_sram_size = size; +} --- -1.6.2.4 - diff --git a/recipes/linux/linux-omap_2.6.31.bb b/recipes/linux/linux-omap_2.6.31.bb new file mode 100644 index 0000000000..cf7f69318f --- /dev/null +++ b/recipes/linux/linux-omap_2.6.31.bb @@ -0,0 +1,58 @@ +require linux.inc + +DESCRIPTION = "Linux kernel for OMAP processors" +KERNEL_IMAGETYPE = "uImage" + +COMPATIBLE_MACHINE = "omap5912osk|omap1710h3|omap2430sdp|omap2420h4|beagleboard|omap3evm|omap3-pandora|overo|omapzoom" + +DEFAULT_PREFERENCE = "-1" +DEFAULT_PREFERENCE_omapzoom2 = "1" + +SRCREV = "52a962f09ab2306a2ac6e22c2d3bac1a76ac" + +# The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc +#PV = "2.6.30+2.6.31-rc8+gitr${SRCREV}" +PV = "2.6.31" + +SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git;protocol=git \ + file://defconfig" + +SRC_URI_append = " \ + file://ehci-phy-reset.patch;patch=1 \ + file://ehci.patch;patch=1 \ + file://0001-implement-TIF_RESTORE_SIGMASK-support-and-enable-the.patch;patch=1 \ + file://cache/l1cache-shift.patch;patch=1 \ + file://cache/copy-page-tweak.patch;patch=1 \ + file://dss2/0001-OMAP2-Add-funcs-for-writing-SMS_ROT_-registers.patch;patch=1 \ + file://dss2/0002-OMAP-OMAPFB-split-omapfb.h.patch;patch=1 \ + file://dss2/0003-OMAP-OMAPFB-add-omapdss-device.patch;patch=1 \ + file://dss2/0004-OMAP-Add-VRAM-manager.patch;patch=1 \ + file://dss2/0005-OMAP-Add-support-for-VRFB-rotation-engine.patch;patch=1 \ + file://dss2/0006-OMAP-DSS2-Documentation-for-DSS2.patch;patch=1 \ + file://dss2/0007-OMAP-DSS2-Display-Subsystem-Driver-core.patch;patch=1 \ + file://dss2/0008-OMAP-DSS2-Add-more-core-files.patch;patch=1 \ + file://dss2/0009-OMAP-DSS2-DISPC.patch;patch=1 \ + file://dss2/0010-OMAP-DSS2-DPI-driver.patch;patch=1 \ + file://dss2/0011-OMAP-DSS2-Video-encoder-driver.patch;patch=1 \ + file://dss2/0012-OMAP-DSS2-RFBI-driver.patch;patch=1 \ + file://dss2/0013-OMAP-DSS2-SDI-driver.patch;patch=1 \ + file://dss2/0014-OMAP-DSS2-DSI-driver.patch;patch=1 \ + file://dss2/0015-OMAP-DSS2-omapfb-driver.patch;patch=1 \ + file://dss2/0016-OMAP-DSS2-Add-DPI-panel-drivers.patch;patch=1 \ + file://dss2/0017-OMAP-DSS2-Taal-DSI-command-mode-panel-driver.patch;patch=1 \ + file://dss2/0001-OMAP3-Enable-DSS2-for-OMAP3EVM-board.patch;patch=1 \ + file://dss2/0002-V4L2-Added-New-V4L2-CIDs-for-omap-devices-V4L2-IOCT.patch;patch=1 \ + file://dss2/0003-V4L2-Updated-v4l2_common-for-new-V4L2-CIDs.patch;patch=1 \ + file://dss2/0004-OMAP2-3-V4L2-Add-support-for-OMAP2-3-V4L2-driver-on.patch;patch=1 \ + file://expansion-boards/tincantools-zippy.patch;patch=1 \ + file://madc/madc-driver.patch;patch=1 \ + file://madc/madc.patch;patch=1 \ +" + +SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ +" + +S = "${WORKDIR}/git" + +module_autoload_ohci-hcd_omap5912osk = "ohci-hcd" + diff --git a/recipes/linux/linux-omap_git.bb b/recipes/linux/linux-omap_git.bb index f19840d4f4..65aa1187db 100644 --- a/recipes/linux/linux-omap_git.bb +++ b/recipes/linux/linux-omap_git.bb @@ -8,13 +8,13 @@ COMPATIBLE_MACHINE = "omap5912osk|omap1710h3|omap2430sdp|omap2420h4|beagleboard| DEFAULT_PREFERENCE = "-1" DEFAULT_PREFERENCE_omapzoom2 = "1" -SRCREV = "3777b1e9ffb6e0901be93cbe201ae8e96003179b" +SRCREV = "52a962f09ab2306a2ac6e22c2d3bac1a76ac" FILESPATHPKG_prepend = "linux-omap-2.6.31:" # The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc -PV = "2.6.30+2.6.31-rc8+gitr${SRCREV}" -PR = "r0" +#PV = "2.6.30+2.6.31-rc8+gitr${SRCREV}" +PV = "2.6.31" SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git;protocol=git \ file://defconfig" -- cgit v1.2.3 From 4c014833555dcd14ccdd9fd3f0f864fb4b62631e Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Mon, 7 Sep 2009 17:36:29 +0200 Subject: linux-omap-psp 2.6.29: add shiva support --- .../linux-omap-psp-2.6.29/omap3517-evm/defconfig | 1493 ++++++++++++++++++++ .../linux/linux-omap-psp-2.6.29/shiva-bits.diff | 11 + recipes/linux/linux-omap-psp_2.6.29.bb | 11 +- 3 files changed, 1512 insertions(+), 3 deletions(-) create mode 100644 recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig create mode 100644 recipes/linux/linux-omap-psp-2.6.29/shiva-bits.diff (limited to 'recipes') diff --git a/recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig b/recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig new file mode 100644 index 0000000000..3092f7b098 --- /dev/null +++ b/recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig @@ -0,0 +1,1493 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.29-omap1 +# Mon Sep 7 19:18:57 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +# CONFIG_FREEZER is not set + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_W90X900 is not set + +# +# TI OMAP Implementations +# +CONFIG_ARCH_OMAP_OTG=y +# CONFIG_ARCH_OMAP1 is not set +# CONFIG_ARCH_OMAP2 is not set +CONFIG_ARCH_OMAP3=y + +# +# OMAP Feature Selections +# +# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set +# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set +# CONFIG_OMAP_RESET_CLOCKS is not set +CONFIG_OMAP_BOOT_TAG=y +CONFIG_OMAP_BOOT_REASON=y +# CONFIG_OMAP_COMPONENT_VERSION is not set +# CONFIG_OMAP_GPIO_SWITCH is not set +CONFIG_OMAP_MUX=y +# CONFIG_OMAP_MUX_DEBUG is not set +CONFIG_OMAP_MUX_WARNINGS=y +# CONFIG_OMAP_MCBSP is not set +# CONFIG_OMAP_MBOX_FWK is not set +# CONFIG_OMAP_MPU_TIMER is not set +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_32K_TIMER_HZ=128 +CONFIG_OMAP_TICK_GPTIMER=1 +CONFIG_OMAP_DM_TIMER=y +# CONFIG_OMAP_LL_DEBUG_UART1 is not set +# CONFIG_OMAP_LL_DEBUG_UART2 is not set +CONFIG_OMAP_LL_DEBUG_UART3=y +CONFIG_OMAP_SERIAL_WAKE=y +CONFIG_ARCH_OMAP34XX=y +CONFIG_ARCH_OMAP3430=y +CONFIG_ARCH_OMAP35XX=y + +# +# OMAP Board Type +# +# CONFIG_MACH_NOKIA_RX51 is not set +# CONFIG_MACH_OMAP_LDP is not set +# CONFIG_MACH_OMAP_3430SDP is not set +# CONFIG_MACH_OMAP3EVM is not set +CONFIG_MACH_OMAP3517EVM=y + +# +# OMAP3 EVM Power Modules +# +# CONFIG_OMAP3EVM_TWL4030 is not set +# CONFIG_OMAP3EVM_TPS65023 is not set +# CONFIG_OMAP3EVM_TPS65073 is not set +# CONFIG_MACH_OMAP3_BEAGLE is not set +# CONFIG_MACH_OVERO is not set +# CONFIG_MACH_OMAP3_PANDORA is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT is not set +CONFIG_HZ=128 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_UNEVICTABLE_LRU=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE=" debug " +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_COMPAT_NET_DEV_OPS=y +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +# CONFIG_WIRELESS is not set +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_OMAP_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_OMAP2=y +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +CONFIG_SMSC_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +CONFIG_TI_DAVINCI_EMAC=y +# CONFIG_DM9000 is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_OMAP_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEOBUF_GEN=y +CONFIG_VIDEOBUF_DMA_SG=y +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +CONFIG_VIDEO_OMAP3=y +CONFIG_VIDEO_OMAP_VIDEOOUT=y +CONFIG_NTSC_M=y +# CONFIG_PAL_BDGHI is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_ET61X251=m +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +# CONFIG_USB_STV680 is not set +CONFIG_USB_ZC0301=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set +CONFIG_OMAP2_DSS=y +CONFIG_OMAP2_DSS_VRAM_SIZE=14 +CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y +# CONFIG_OMAP2_DSS_RFBI is not set +CONFIG_OMAP2_DSS_VENC=y +# CONFIG_OMAP2_DSS_SDI is not set +CONFIG_OMAP2_DSS_DSI=y +CONFIG_OMAP2_DSS_USE_DSI_PLL=y +# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 + +# +# OMAP2/3 Display Device Drivers +# +CONFIG_PANEL_GENERIC=y +# CONFIG_PANEL_SAMSUNG_LTE430WQ_F0C is not set +# CONFIG_PANEL_SHARP_LS037V7DW01 is not set +CONFIG_PANEL_SHARP_LQ043T1DG01=y +# CONFIG_PANEL_N800 is not set +# CONFIG_CTRL_BLIZZARD is not set +CONFIG_FB_OMAP2=y +CONFIG_FB_OMAP2_DEBUG_SUPPORT=y +# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set +CONFIG_FB_OMAP2_NUM_FBS=3 +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set +# CONFIG_LOGO is not set +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +CONFIG_HID_COMPAT=y +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_GREENASIA_FF is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_THRUSTMASTER_FF is not set +# CONFIG_ZEROPLUS_FF is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y + +# +# OMAP 343x high speed USB support +# +CONFIG_USB_MUSB_HOST=y +# CONFIG_USB_MUSB_PERIPHERAL is not set +# CONFIG_USB_MUSB_OTG is not set +CONFIG_USB_MUSB_HDRC_HCD=y +# CONFIG_MUSB_PIO_ONLY is not set +# CONFIG_USB_TI_CPPI_DMA is not set +CONFIG_USB_TI_CPPI41_DMA=y +CONFIG_USB_MUSB_DEBUG=y + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# + +# +# see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +# CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_GPIO_VBUS is not set +CONFIG_NOP_USB_XCEIV=y +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +CONFIG_MMC_OMAP_HS=y +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_REGULATOR is not set +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# CBUS support +# +# CONFIG_CBUS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +CONFIG_QUOTA_TREE=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_REGISTER_V4 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y + +# +# Tracers +# +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_BOOT_TRACER is not set +# CONFIG_TRACE_BRANCH_PROFILING is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/recipes/linux/linux-omap-psp-2.6.29/shiva-bits.diff b/recipes/linux/linux-omap-psp-2.6.29/shiva-bits.diff new file mode 100644 index 0000000000..45d817a146 --- /dev/null +++ b/recipes/linux/linux-omap-psp-2.6.29/shiva-bits.diff @@ -0,0 +1,11 @@ +--- /tmp/board-omap3517evm.c 2009-09-07 17:34:48.000000000 +0200 ++++ git/arch/arm/mach-omap2/board-omap3517evm.c 2009-09-07 17:35:00.000000000 +0200 +@@ -297,7 +297,7 @@ + .type = OMAP_DISPLAY_TYPE_DPI, + .name = "dvi", + .panel_name = "panel-generic", +- .u.dpi.data_lines = 24, ++ .u.dpi.data_lines = 16, + .panel_enable = omap3517_evm_panel_enable_dvi, + .panel_disable = omap3517_evm_panel_disable_dvi, + }; diff --git a/recipes/linux/linux-omap-psp_2.6.29.bb b/recipes/linux/linux-omap-psp_2.6.29.bb index d64786c18c..a336622583 100644 --- a/recipes/linux/linux-omap-psp_2.6.29.bb +++ b/recipes/linux/linux-omap-psp_2.6.29.bb @@ -3,7 +3,7 @@ require linux.inc DESCRIPTION = "Linux kernel for OMAP processors" KERNEL_IMAGETYPE = "uImage" -COMPATIBLE_MACHINE = "omap3evm" +COMPATIBLE_MACHINE = "omap3evm|omap3517-evm" SRCREV = "9abb6eb717acbca192ab251a056e3a66b2b47884" @@ -11,11 +11,16 @@ SRCREV = "9abb6eb717acbca192ab251a056e3a66b2b47884" PR_append = "+gitr${SRCREV}" SRC_URI = "git://arago-project.org/git/people/sriram/ti-psp-omap.git;protocol=git;branch=int_030000_build3 \ - file://defconfig" + file://0001-implement-TIF_RESTORE_SIGMASK-support-and-enable-the.patch;patch=1 \ + file://defconfig" S = "${WORKDIR}/git" -SRC_URI_append = " \ +SRC_URI_append_omap3517-evm = " \ + file://shiva-bits.diff;patch=1 \ +" + +SRC_URI_append_omap3evm = " \ file://fix-twl-merge-damage.diff;patch=1 \ file://fix-section-mismatch.diff;patch=1 \ file://no-3517-hack.diff;patch=1 \ -- cgit v1.2.3 From 7286737587f0097d033db3d91ba0e4570ea17b0b Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Tue, 8 Sep 2009 12:10:01 +0200 Subject: u-boot git: add support for omap3517-evm --- .../0001-Changes-for-making-a-NAND-build.patch | 50 + .../0002-Fix-for-NFS-boot-for-OMAP3-EVM.patch | 55 + ...-handling-to-1ms-tick-and-CONFIG_SYS_HZ-t.patch | 277 +++ ...tch-for-NFS-boot-to-fix-comments-provided.patch | 53 + .../0005-SMC911x-driver-fixed-for-NFS-boot.patch | 61 + .../0006-Added-OMAP3517-3505-support.patch | 2501 ++++++++++++++++++++ ...MAP3517TEB-validated-on-OMAP3517TEB-board.patch | 403 ++++ ...E-ALPHA-validated-on-OMAP3517PRE_ALPHA-bo.patch | 126 + ...09-OMAP3517PRE-ALPHA-DDR-size-issue-fixed.patch | 125 + ...RE-ALPHA-Mux-configuration-for-MMC-CD-and.patch | 34 + ...-driver-functional-no-need-for-time-delay.patch | 488 ++++ ...AC-driver-Implement-GPIO-driven-PHY-reset.patch | 319 +++ .../0013-Cleaned-up-during-EVM-hang-issue.patch | 45 + ...-EMAC-driver-cleanup-removed-debug-prints.patch | 419 ++++ ...r-Check-for-link-status-in-packet-send-lo.patch | 42 + ...g-option-and-name-changed-to-omap3517_evm.patch | 750 ++++++ recipes/u-boot/u-boot_git.bb | 22 + 17 files changed, 5770 insertions(+) create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0001-Changes-for-making-a-NAND-build.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0002-Fix-for-NFS-boot-for-OMAP3-EVM.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0003-OMAP3-timer-handling-to-1ms-tick-and-CONFIG_SYS_HZ-t.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0004-Reverse-patch-for-NFS-boot-to-fix-comments-provided.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0005-SMC911x-driver-fixed-for-NFS-boot.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0006-Added-OMAP3517-3505-support.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0007-OMAP3517TEB-validated-on-OMAP3517TEB-board.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0008-OMAP3517PRE-ALPHA-validated-on-OMAP3517PRE_ALPHA-bo.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0009-OMAP3517PRE-ALPHA-DDR-size-issue-fixed.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0010-OMAP3517PRE-ALPHA-Mux-configuration-for-MMC-CD-and.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0011-Ethernet-driver-functional-no-need-for-time-delay.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0012-EMAC-driver-Implement-GPIO-driven-PHY-reset.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0013-Cleaned-up-during-EVM-hang-issue.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0014-EMAC-driver-cleanup-removed-debug-prints.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0015-EMAC-driver-Check-for-link-status-in-packet-send-lo.patch create mode 100644 recipes/u-boot/u-boot-git/omap3evm/0016-Config-option-and-name-changed-to-omap3517_evm.patch (limited to 'recipes') diff --git a/recipes/u-boot/u-boot-git/omap3evm/0001-Changes-for-making-a-NAND-build.patch b/recipes/u-boot/u-boot-git/omap3evm/0001-Changes-for-making-a-NAND-build.patch new file mode 100644 index 0000000000..b762ac0f1e --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0001-Changes-for-making-a-NAND-build.patch @@ -0,0 +1,50 @@ +From d58014b0e26652eac04f9799e14640854f7885a8 Mon Sep 17 00:00:00 2001 +From: Manikandan Pillai +Date: Tue, 7 Apr 2009 14:26:41 +0530 +Subject: [PATCH 01/16] Changes for making a NAND build. + +--- + include/configs/omap3_evm.h | 7 +++++-- + 1 files changed, 5 insertions(+), 2 deletions(-) + +diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h +index f4498a9..6283d59 100644 +--- a/include/configs/omap3_evm.h ++++ b/include/configs/omap3_evm.h +@@ -106,7 +106,7 @@ + + #define CONFIG_CMD_I2C /* I2C serial bus support */ + #define CONFIG_CMD_MMC /* MMC support */ +-#define CONFIG_CMD_ONENAND /* ONENAND support */ ++#define CONFIG_CMD_NAND /* NAND support */ + #define CONFIG_CMD_DHCP + #define CONFIG_CMD_PING + +@@ -125,12 +125,15 @@ + /* + * Board NAND Info. + */ ++#define CONFIG_NAND_OMAP_GPMC + #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ + /* to access nand */ + #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access */ + /* nand at CS0 */ + ++#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 ++ + #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ + /* NAND devices */ + #define SECTORSIZE 512 +@@ -271,7 +274,7 @@ + #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE + #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + +-#define CONFIG_ENV_IS_IN_ONENAND 1 ++#define CONFIG_ENV_IS_IN_NAND 1 + #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ + #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ + +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0002-Fix-for-NFS-boot-for-OMAP3-EVM.patch b/recipes/u-boot/u-boot-git/omap3evm/0002-Fix-for-NFS-boot-for-OMAP3-EVM.patch new file mode 100644 index 0000000000..243f175728 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0002-Fix-for-NFS-boot-for-OMAP3-EVM.patch @@ -0,0 +1,55 @@ +From 57a0438b9f70bb3e98a20773134b17ef33e266b9 Mon Sep 17 00:00:00 2001 +From: Manikandan Pillai +Date: Tue, 7 Apr 2009 14:27:31 +0530 +Subject: [PATCH 02/16] Fix for NFS boot for OMAP3 EVM + +The eth_halt() function has been modified to remove the +chip reset and instead stop the transmit/receive from the device. +--- + drivers/net/smc911x.c | 23 ++++++++++++++++++++++- + 1 files changed, 22 insertions(+), 1 deletions(-) + +diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c +index 1ded8f0..2f0852e 100644 +--- a/drivers/net/smc911x.c ++++ b/drivers/net/smc911x.c +@@ -116,6 +116,27 @@ static int smc911x_phy_reset(void) + return 0; + } + ++static void smc911x_shutdown(void) ++{ ++ unsigned cr; ++ ++ /* Turn of Rx and TX */ ++ cr = smc911x_get_mac_csr(MAC_CR); ++ cr &= ~(MAC_CR_TXEN | MAC_CR_RXEN | MAC_CR_HBDIS); ++ smc911x_set_mac_csr(MAC_CR, cr); ++ ++ /* Stop Transmission */ ++ cr = smc911x_get_mac_csr(TX_CFG); ++ cr &= ~(TX_CFG_STOP_TX); ++ smc911x_set_mac_csr(TX_CFG, cr); ++ /* Stop receiving packets */ ++ cr = smc911x_get_mac_csr(RX_CFG); ++ cr &= ~(RX_CFG_RXDOFF); ++ smc911x_set_mac_csr(RX_CFG, cr); ++ ++} ++ ++ + static void smc911x_phy_configure(void) + { + int timeout; +@@ -224,7 +245,7 @@ int eth_send(volatile void *packet, int length) + + void eth_halt(void) + { +- smc911x_reset(); ++ smc911x_shutdown(); + } + + int eth_rx(void) +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0003-OMAP3-timer-handling-to-1ms-tick-and-CONFIG_SYS_HZ-t.patch b/recipes/u-boot/u-boot-git/omap3evm/0003-OMAP3-timer-handling-to-1ms-tick-and-CONFIG_SYS_HZ-t.patch new file mode 100644 index 0000000000..75f7ef230a --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0003-OMAP3-timer-handling-to-1ms-tick-and-CONFIG_SYS_HZ-t.patch @@ -0,0 +1,277 @@ +From 13fc02c66aa4cc1c5653a4987fdddce63810a7e9 Mon Sep 17 00:00:00 2001 +From: Manikandan Pillai +Date: Tue, 7 Apr 2009 14:28:05 +0530 +Subject: [PATCH 03/16] OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. + +Clean up macros and comments. +--- + cpu/arm_cortexa8/omap3/interrupts.c | 81 ++++++++++------------------------ + examples/Makefile | 2 +- + include/configs/omap3_beagle.h | 11 +++-- + include/configs/omap3_evm.h | 13 +++--- + include/configs/omap3_overo.h | 10 ++-- + include/configs/omap3_pandora.h | 11 ++--- + include/configs/omap3_zoom1.h | 11 ++--- + 7 files changed, 52 insertions(+), 87 deletions(-) + +diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/interrupts.c +index 9e9817d..b99e284 100644 +--- a/cpu/arm_cortexa8/omap3/interrupts.c ++++ b/cpu/arm_cortexa8/omap3/interrupts.c +@@ -169,7 +169,16 @@ static ulong timestamp; + static ulong lastinc; + static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE; + +-/* nothing really to do with interrupts, just starts up a counter. */ ++/* ++ * Nothing really to do with interrupts, just starts up a counter. ++ * We run the counter with 13MHz, divided by 8, resulting in timer ++ * frequency of 1.625MHz. With 32bit counter register, counter ++ * overflows in ~44min ++ */ ++ ++/* 13MHz / 8 = 1.625MHz */ ++#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PVT)) ++ + int interrupt_init(void) + { + /* start the counter ticking up, reload value on overflow */ +@@ -204,78 +213,38 @@ void set_timer(ulong t) + /* delay x useconds AND perserve advance timstamp value */ + void udelay(unsigned long usec) + { +- ulong tmo, tmp; +- +- /* if "big" number, spread normalization to seconds */ +- if (usec >= 1000) { +- /* if "big" number, spread normalization to seconds */ +- tmo = usec / 1000; +- /* find number of "ticks" to wait to achieve target */ +- tmo *= CONFIG_SYS_HZ; +- tmo /= 1000; /* finish normalize. */ +- } else {/* else small number, don't kill it prior to HZ multiply */ +- tmo = usec * CONFIG_SYS_HZ; +- tmo /= (1000 * 1000); +- } +- +- tmp = get_timer(0); /* get current timestamp */ +- /* if setting this forward will roll time stamp */ +- if ((tmo + tmp + 1) < tmp) +- /* reset "advancing" timestamp to 0, set lastinc value */ +- reset_timer_masked(); +- else +- tmo += tmp; /* else, set advancing stamp wake up time */ +- while (get_timer_masked() < tmo) /* loop till event */ +- /*NOP*/; ++ ulong tmo, endtime; ++ ++ tmo = usec * (TIMER_CLOCK / CONFIG_SYS_HZ); ++ tmo /= 1000; ++ ++ endtime = readl(&timer_base->tcrr) + tmo; ++ ++ while (readl(&timer_base->tcrr) < endtime); + } + + void reset_timer_masked(void) + { + /* reset time, capture current incrementer value time */ +- lastinc = readl(&timer_base->tcrr); ++ lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); + timestamp = 0; /* start "advancing" time stamp from 0 */ + } + + ulong get_timer_masked(void) + { +- ulong now = readl(&timer_base->tcrr); /* current tick value */ ++ /* current tick value */ ++ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); + + if (now >= lastinc) /* normal mode (non roll) */ + /* move stamp fordward with absoulte diff ticks */ + timestamp += (now - lastinc); + else /* we have rollover of incrementer */ +- timestamp += (0xFFFFFFFF - lastinc) + now; ++ timestamp += ((0xFFFFFFFF / (TIMER_CLOCK / CONFIG_SYS_HZ)) ++ - lastinc) + now; + lastinc = now; + return timestamp; + } + +-/* waits specified delay value and resets timestamp */ +-void udelay_masked(unsigned long usec) +-{ +- ulong tmo; +- ulong endtime; +- signed long diff; +- +- /* if "big" number, spread normalization to seconds */ +- if (usec >= 1000) { +- /* start to normalize for usec to ticks per sec */ +- tmo = usec / 1000; +- /* find number of "ticks" to wait to achieve target */ +- tmo *= CONFIG_SYS_HZ; +- tmo /= 1000; /* finish normalize. */ +- } else { /* else small number, */ +- /* don't kill it prior to HZ multiply */ +- tmo = usec * CONFIG_SYS_HZ; +- tmo /= (1000 * 1000); +- } +- endtime = get_timer_masked() + tmo; +- +- do { +- ulong now = get_timer_masked(); +- diff = endtime - now; +- } while (diff >= 0); +-} +- + /* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. +@@ -291,7 +260,5 @@ unsigned long long get_ticks(void) + */ + ulong get_tbclk(void) + { +- ulong tbclk; +- tbclk = CONFIG_SYS_HZ; +- return tbclk; ++ return CONFIG_SYS_HZ; + } +diff --git a/examples/Makefile b/examples/Makefile +index dbcfa92..d2e811a 100644 +--- a/examples/Makefile ++++ b/examples/Makefile +@@ -33,7 +33,7 @@ ifeq ($(ARCH),arm) + ifeq ($(BOARD),omap2420h4) + LOAD_ADDR = 0x80300000 + else +-ifeq ($(CPU),omap3) ++ifeq ($(SOC),omap3) + LOAD_ADDR = 0x80300000 + else + LOAD_ADDR = 0xc100000 +diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h +index 9057606..2f30783 100644 +--- a/include/configs/omap3_beagle.h ++++ b/include/configs/omap3_beagle.h +@@ -220,14 +220,15 @@ + /* load address */ + + /* +- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by +- * 32KHz clk, or from external sig. This rate is divided by a local divisor. ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. + */ +-#define V_PVT 7 + + #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ +-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) ++#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 ++ + + /*----------------------------------------------------------------------- + * Stack sizes +diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h +index 6283d59..fb8a424 100644 +--- a/include/configs/omap3_evm.h ++++ b/include/configs/omap3_evm.h +@@ -222,14 +222,13 @@ + /* address */ + + /* +- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by +- * 32KHz clk, or from external sig. This rate is divided by a local divisor. ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. + */ +-#define V_PVT 7 +- +-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ +-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) ++#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) ++#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 + + /*----------------------------------------------------------------------- + * Stack sizes +diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h +index dee0417..45e5478 100644 +--- a/include/configs/omap3_overo.h ++++ b/include/configs/omap3_overo.h +@@ -213,14 +213,14 @@ + /* address */ + + /* +- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by +- * 32KHz clk, or from external sig. This rate is divided by a local divisor. ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. + */ +-#define V_PVT 7 + + #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ +-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) ++#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 + + /*----------------------------------------------------------------------- + * Stack sizes +diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h +index 00c0374..4ed8373 100644 +--- a/include/configs/omap3_pandora.h ++++ b/include/configs/omap3_pandora.h +@@ -215,14 +215,13 @@ + /* address */ + + /* +- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by +- * 32KHz clk, or from external sig. This rate is divided by a local divisor. ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. + */ +-#define V_PVT 7 +- + #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ +-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) ++#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 + + /*----------------------------------------------------------------------- + * Stack sizes +diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h +index f8ae163..0185fa6 100644 +--- a/include/configs/omap3_zoom1.h ++++ b/include/configs/omap3_zoom1.h +@@ -222,14 +222,13 @@ + /* load address */ + + /* +- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by +- * 32KHz clk, or from external sig. This rate is divided by a local divisor. ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. + */ +-#define V_PVT 7 +- + #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ +-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) ++#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 + + /*----------------------------------------------------------------------- + * Stack sizes +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0004-Reverse-patch-for-NFS-boot-to-fix-comments-provided.patch b/recipes/u-boot/u-boot-git/omap3evm/0004-Reverse-patch-for-NFS-boot-to-fix-comments-provided.patch new file mode 100644 index 0000000000..8ce6ac9602 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0004-Reverse-patch-for-NFS-boot-to-fix-comments-provided.patch @@ -0,0 +1,53 @@ +From 515c1e71f21e6666d8f8da7a539d6edd122a0fc3 Mon Sep 17 00:00:00 2001 +From: Manikandan Pillai +Date: Wed, 8 Apr 2009 09:03:10 +0530 +Subject: [PATCH 04/16] Reverse patch for NFS boot to fix comments provided by community + +--- + drivers/net/smc911x.c | 23 +---------------------- + 1 files changed, 1 insertions(+), 22 deletions(-) + +diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c +index 2f0852e..1ded8f0 100644 +--- a/drivers/net/smc911x.c ++++ b/drivers/net/smc911x.c +@@ -116,27 +116,6 @@ static int smc911x_phy_reset(void) + return 0; + } + +-static void smc911x_shutdown(void) +-{ +- unsigned cr; +- +- /* Turn of Rx and TX */ +- cr = smc911x_get_mac_csr(MAC_CR); +- cr &= ~(MAC_CR_TXEN | MAC_CR_RXEN | MAC_CR_HBDIS); +- smc911x_set_mac_csr(MAC_CR, cr); +- +- /* Stop Transmission */ +- cr = smc911x_get_mac_csr(TX_CFG); +- cr &= ~(TX_CFG_STOP_TX); +- smc911x_set_mac_csr(TX_CFG, cr); +- /* Stop receiving packets */ +- cr = smc911x_get_mac_csr(RX_CFG); +- cr &= ~(RX_CFG_RXDOFF); +- smc911x_set_mac_csr(RX_CFG, cr); +- +-} +- +- + static void smc911x_phy_configure(void) + { + int timeout; +@@ -245,7 +224,7 @@ int eth_send(volatile void *packet, int length) + + void eth_halt(void) + { +- smc911x_shutdown(); ++ smc911x_reset(); + } + + int eth_rx(void) +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0005-SMC911x-driver-fixed-for-NFS-boot.patch b/recipes/u-boot/u-boot-git/omap3evm/0005-SMC911x-driver-fixed-for-NFS-boot.patch new file mode 100644 index 0000000000..8b3894bc3f --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0005-SMC911x-driver-fixed-for-NFS-boot.patch @@ -0,0 +1,61 @@ +From 3ffa2549a4f61053f78c00b8716cda392cf97b93 Mon Sep 17 00:00:00 2001 +From: Manikandan Pillai +Date: Wed, 8 Apr 2009 09:08:00 +0530 +Subject: [PATCH 05/16] SMC911x driver fixed for NFS boot + +eth_halt() function in the smc911x drivers used to call the +smc911x_reset() function. eth_halt() used to be called after +tftp transfers. This used to put the ethernet chip in reset +while the linux boots up resulting in the ethernet driver +not coming up. NFS boot used to fail as a result. + +This patch calls smc911x_shutdown() instead of smc911x_reset(). +Some comments received has also been fixed. +--- + drivers/net/smc911x.c | 23 ++++++++++++++++++++++- + 1 files changed, 22 insertions(+), 1 deletions(-) + +diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c +index 1ded8f0..5bc3914 100644 +--- a/drivers/net/smc911x.c ++++ b/drivers/net/smc911x.c +@@ -116,6 +116,27 @@ static int smc911x_phy_reset(void) + return 0; + } + ++static void smc911x_shutdown(void) ++{ ++ unsigned int cr; ++ ++ /* Turn of Rx and TX */ ++ cr = smc911x_get_mac_csr(MAC_CR); ++ cr &= ~(MAC_CR_TXEN | MAC_CR_RXEN | MAC_CR_HBDIS); ++ smc911x_set_mac_csr(MAC_CR, cr); ++ ++ /* Stop Transmission */ ++ cr = smc911x_get_mac_csr(TX_CFG); ++ cr &= ~(TX_CFG_STOP_TX); ++ smc911x_set_mac_csr(TX_CFG, cr); ++ /* Stop receiving packets */ ++ cr = smc911x_get_mac_csr(RX_CFG); ++ cr &= ~(RX_CFG_RXDOFF); ++ smc911x_set_mac_csr(RX_CFG, cr); ++ ++} ++ ++ + static void smc911x_phy_configure(void) + { + int timeout; +@@ -224,7 +245,7 @@ int eth_send(volatile void *packet, int length) + + void eth_halt(void) + { +- smc911x_reset(); ++ smc911x_shutdown(); + } + + int eth_rx(void) +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0006-Added-OMAP3517-3505-support.patch b/recipes/u-boot/u-boot-git/omap3evm/0006-Added-OMAP3517-3505-support.patch new file mode 100644 index 0000000000..326679af78 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0006-Added-OMAP3517-3505-support.patch @@ -0,0 +1,2501 @@ +From 4144e9f85d1b0e48732c80b05bc380ae6d2af6d8 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Sat, 13 Jun 2009 00:47:34 +0530 +Subject: [PATCH 06/16] Added OMAP3517/3505 support + +Added support for OMAP3517/3505 SoC, it includes all the changes +from Mani's commit for OMAP3517 and review comments fix. + +Major features/changes - + - New config file + - New board files + - New ethernet driver + +Major Review comments - + - Added macine ID for OMAP3517 + - Naming conventions used. +--- + Makefile | 3 + + board/omap3/omap3517evm/Makefile | 47 +++ + board/omap3/omap3517evm/config.mk | 33 ++ + board/omap3/omap3517evm/omap3517evm.c | 124 ++++++ + board/omap3/omap3517evm/omap3517evm.h | 392 ++++++++++++++++++ + board/omap3/omap3517evm/u-boot.lds | 63 +++ + cpu/arm_cortexa8/omap3/board.c | 8 + + cpu/arm_cortexa8/omap3/clock.c | 4 + + cpu/arm_cortexa8/omap3/mem.c | 110 +++++ + drivers/net/Makefile | 1 + + drivers/net/ticpgmac.c | 693 ++++++++++++++++++++++++++++++++ + include/asm-arm/arch-omap3/cpu.h | 26 ++ + include/asm-arm/arch-omap3/mux.h | 41 ++ + include/asm-arm/arch-omap3/sys_proto.h | 1 + + include/asm-arm/arch-omap3/ticpgmac.h | 340 ++++++++++++++++ + include/asm-arm/mach-types.h | 1 + + include/configs/omap3517evm.h | 349 ++++++++++++++++ + lib_arm/board.c | 4 +- + net/eth.c | 4 +- + 19 files changed, 2240 insertions(+), 4 deletions(-) + create mode 100644 board/omap3/omap3517evm/Makefile + create mode 100644 board/omap3/omap3517evm/config.mk + create mode 100644 board/omap3/omap3517evm/omap3517evm.c + create mode 100644 board/omap3/omap3517evm/omap3517evm.h + create mode 100644 board/omap3/omap3517evm/u-boot.lds + create mode 100644 drivers/net/ticpgmac.c + create mode 100644 include/asm-arm/arch-omap3/ticpgmac.h + create mode 100644 include/configs/omap3517evm.h + +diff --git a/Makefile b/Makefile +index 61bae6d..df25fb3 100644 +--- a/Makefile ++++ b/Makefile +@@ -2942,6 +2942,9 @@ omap3_pandora_config : unconfig + omap3_zoom1_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3 + ++omap3517evm_config : unconfig ++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 omap3517evm omap3 omap3 ++ + ######################################################################### + ## XScale Systems + ######################################################################### +diff --git a/board/omap3/omap3517evm/Makefile b/board/omap3/omap3517evm/Makefile +new file mode 100644 +index 0000000..8f6d10e +--- /dev/null ++++ b/board/omap3/omap3517evm/Makefile +@@ -0,0 +1,47 @@ ++# ++# (C) Copyright 2000, 2001, 2002 ++# Wolfgang Denk, DENX Software Engineering, wd@denx.de. ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++ ++include $(TOPDIR)/config.mk ++ ++LIB = $(obj)lib$(BOARD).a ++ ++COBJS := omap3517evm.o ++ ++SRCS := $(COBJS:.o=.c) ++OBJS := $(addprefix $(obj),$(COBJS)) ++ ++$(LIB): $(obj).depend $(OBJS) ++ $(AR) $(ARFLAGS) $@ $(OBJS) ++ ++clean: ++ rm -f $(OBJS) ++ ++distclean: clean ++ rm -f $(LIB) core *.bak $(obj).depend ++ ++######################################################################### ++ ++# defines $(obj).depend target ++include $(SRCTREE)/rules.mk ++ ++sinclude $(obj).depend +diff --git a/board/omap3/omap3517evm/config.mk b/board/omap3/omap3517evm/config.mk +new file mode 100644 +index 0000000..4d873eb +--- /dev/null ++++ b/board/omap3/omap3517evm/config.mk +@@ -0,0 +1,33 @@ ++# ++# (C) Copyright 2006 - 2008 ++# Texas Instruments, ++# ++# EVM uses OMAP3 (ARM-CortexA8) cpu ++# see http://www.ti.com/ for more information on Texas Instruments ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++# Physical Address: ++# 8000'0000 (bank0) ++# A000/0000 (bank1) ++# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 ++# (mem base + reserved) ++ ++# For use with external or internal boots. ++TEXT_BASE = 0x80e80000 +diff --git a/board/omap3/omap3517evm/omap3517evm.c b/board/omap3/omap3517evm/omap3517evm.c +new file mode 100644 +index 0000000..2330776 +--- /dev/null ++++ b/board/omap3/omap3517evm/omap3517evm.c +@@ -0,0 +1,124 @@ ++/* ++ * (C) Copyright 2004-2008 ++ * Texas Instruments, ++ * ++ * Author : ++ * Manikandan Pillai ++ * ++ * Derived from Beagle Board and 3430 SDP code by ++ * Richard Woodruff ++ * Syed Mohammed Khasim ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "omap3517evm.h" ++ ++/****************************************************************************** ++ * Routine: board_init ++ * Description: Early hardware init. ++ *****************************************************************************/ ++int board_init(void) ++{ ++ DECLARE_GLOBAL_DATA_PTR; ++ ++ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ ++ /* board id for Linux */ ++ gd->bd->bi_arch_number = MACH_TYPE_OMAP3517EVM; ++ /* boot param addr */ ++ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Routine: misc_init_r ++ * Description: Init ethernet (done here so udelay works) ++ *****************************************************************************/ ++int misc_init_r(void) ++{ ++ ++#ifdef CONFIG_DRIVER_OMAP34XX_I2C ++ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); ++#endif ++ ++#if defined(CONFIG_CMD_NET) ++ setup_net_chip(); ++#endif ++ ++ dieid_num_r(); ++ ++ return 0; ++} ++ ++/****************************************************************************** ++ * Routine: set_muxconf_regs ++ * Description: Setting up the configuration Mux registers specific to the ++ * hardware. Many pins need to be moved from protect to primary ++ * mode. ++ *****************************************************************************/ ++void set_muxconf_regs(void) ++{ ++ MUX_OMAP3517EVM(); ++} ++ ++/****************************************************************************** ++ * Routine: setup_net_chip ++ * Description: Setting up the configuration GPMC registers specific to the ++ * Ethernet hardware. ++ *****************************************************************************/ ++static void setup_net_chip(void) ++{ ++ gpio_t *gpio3_base = (gpio_t *)OMAP34XX_GPIO3_BASE; ++ gpmc_csx_t *gpmc_cs6_base = (gpmc_csx_t *)GPMC_CONFIG_CS6_BASE; ++ ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE; ++ ++ /* Configure GPMC registers */ ++ writel(NET_GPMC_CONFIG1, &gpmc_cs6_base->config1); ++ writel(NET_GPMC_CONFIG2, &gpmc_cs6_base->config2); ++ writel(NET_GPMC_CONFIG3, &gpmc_cs6_base->config3); ++ writel(NET_GPMC_CONFIG4, &gpmc_cs6_base->config4); ++ writel(NET_GPMC_CONFIG5, &gpmc_cs6_base->config5); ++ writel(NET_GPMC_CONFIG6, &gpmc_cs6_base->config6); ++ writel(NET_GPMC_CONFIG7, &gpmc_cs6_base->config7); ++ ++ /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ ++ writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); ++ /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ ++ writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); ++ /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ ++ writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, ++ &ctrl_base->gpmc_nadv_ale); ++ ++ /* Make GPIO 64 as output pin */ ++ writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe); ++ ++ /* Now send a pulse on the GPIO pin */ ++ writel(GPIO0, &gpio3_base->setdataout); ++ udelay(1); ++ writel(GPIO0, &gpio3_base->cleardataout); ++ udelay(1); ++ writel(GPIO0, &gpio3_base->setdataout); ++} +diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h +new file mode 100644 +index 0000000..aba53bf +--- /dev/null ++++ b/board/omap3/omap3517evm/omap3517evm.h +@@ -0,0 +1,392 @@ ++/* ++ * (C) Copyright 2008 ++ * Nishanth Menon ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++#ifndef _OMAP3517EVM_H_ ++#define _OMAP3517EVM_H_ ++ ++const omap3_sysinfo sysinfo = { ++ OMAP3EVM_V1, ++ OMAP3EVM_V2, ++ DDR_DISCRETE, ++ "OMAP3 omap3517evm board", ++ "NAND", ++}; ++ ++static void setup_net_chip(void); ++ ++/* ++ * IEN - Input Enable ++ * IDIS - Input Disable ++ * PTD - Pull type Down ++ * PTU - Pull type Up ++ * DIS - Pull type selection is inactive ++ * EN - Pull type selection is active ++ * M0 - Mode 0 ++ * The commented string gives the final mux configuration for that pin ++ */ ++#define MUX_OMAP3517EVM() \ ++ /*SDRC*/\ ++ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ ++ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ ++ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ ++ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ ++ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ ++ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ ++ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ ++ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ ++ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ ++ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ ++ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ ++ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ ++ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ ++ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ ++ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ ++ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ ++ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ ++ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ ++ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ ++ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ ++ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ ++ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ ++ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ ++ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ ++ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ ++ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ ++ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ ++ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ ++ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ ++ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ ++ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ ++ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ ++ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ ++ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ ++ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ ++ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ ++ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ ++ /*GPMC*/\ ++ MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\ ++ MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\ ++ MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\ ++ MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\ ++ MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\ ++ MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\ ++ MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\ ++ MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\ ++ MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\ ++ MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\ ++ MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\ ++ MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\ ++ MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\ ++ MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\ ++ MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\ ++ MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\ ++ MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\ ++ MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\ ++ MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\ ++ MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\ ++ MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\ ++ MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\ ++ MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\ ++ MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\ ++ MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\ ++ MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\ ++ MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ ++ MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ ++ MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ ++ MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\ ++ MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)) /*GPMC_nCS4*/\ ++ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\ ++ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\ ++ MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\ ++ MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\ ++ MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ ++ MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ ++ MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ ++ MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) /*GPMC_nBE0_CLE*/\ ++ MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)) /*GPMC_nBE1*/\ ++ MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ ++ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ ++ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ ++ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ ++ /* - ETH_nRESET*/\ ++ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/\ ++ /*DSS*/\ ++ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ ++ MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ ++ MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ ++ MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ ++ MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ ++ MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ ++ MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ ++ MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ ++ MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ ++ MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ ++ MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ ++ MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ ++ MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ ++ MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ ++ MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ ++ MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ ++ MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ ++ MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ ++ MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ ++ MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ ++ MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ ++ MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ ++ MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ ++ MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ ++ MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ ++ MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ ++ MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ ++ MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ ++ /*CAMERA*/\ ++ MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) /*CAM_HS */\ ++ MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) /*CAM_VS */\ ++ MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\ ++ MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\ ++ MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ ++ /* - CAM_RESET*/\ ++ MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\ ++ MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\ ++ MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\ ++ MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) /*CAM_D3*/\ ++ MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) /*CAM_D4*/\ ++ MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) /*CAM_D5*/\ ++ MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) /*CAM_D6*/\ ++ MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) /*CAM_D7*/\ ++ MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) /*CAM_D8*/\ ++ MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\ ++ MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\ ++ MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\ ++ MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\ ++ MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ ++ MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ ++ MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ ++ MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ ++ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\ ++ MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\ ++ /*Audio Interface */\ ++ MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ ++ MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\ ++ MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ ++ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ ++ /*Expansion card */\ ++ MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ ++ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ ++ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ ++ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ ++ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ ++ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ ++ MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\ ++ MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\ ++ MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\ ++ MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\ ++ /*Wireless LAN */\ ++ MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M0)) /*MMC2_CLK*/\ ++ MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ ++ MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ ++ MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ ++ MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ ++ MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ ++ MUX_VAL(CP(MMC2_DAT4), (IDIS | PTD | DIS | M0)) /*MMC2_DAT4*/\ ++ MUX_VAL(CP(MMC2_DAT5), (IDIS | PTD | DIS | M0)) /*MMC2_DAT5*/\ ++ MUX_VAL(CP(MMC2_DAT6), (IDIS | PTD | DIS | M0)) /*MMC2_DAT6 */\ ++ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M0)) /*MMC2_DAT7*/\ ++ /*Bluetooth*/\ ++ MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\ ++ MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\ ++ MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)) /*McBSP3_CLKX */\ ++ MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)) /*McBSP3_FSX*/\ ++ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\ ++ MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\ ++ MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\ ++ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) /*UART2_RX*/\ ++ /*Modem Interface */\ ++ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ ++ MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\ ++ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\ ++ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ ++ MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_152*/\ ++ /* - LCD_INI*/\ ++ MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ ++ /* - LCD_ENVDD */\ ++ MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ ++ /* - LCD_QVGA/nVGA */\ ++ MUX_VAL(CP(MCBSP4_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_155*/\ ++ /* - LCD_RESB */\ ++ MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKR */\ ++ MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) /*MCBSP1_FSR*/\ ++ MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) /*MCBSP1_DX*/\ ++ MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) /*MCBSP1_DR*/\ ++ MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*MCBSP_CLKS */\ ++ MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) /*MCBSP1_FSX*/\ ++ MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKX */\ ++ /*Serial Interface*/\ ++ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_*/\ ++ /* RCTX*/\ ++ MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\ ++ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\ ++ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\ ++ MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ ++ MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ ++ MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ ++ MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ ++ MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ ++ MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ ++ MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ ++ MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ ++ MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ ++ MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ ++ MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ ++ MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ ++ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\ ++ MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\ ++ MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL*/\ ++ MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA*/\ ++ MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\ ++ MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\ ++ MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\ ++ MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\ ++ MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) /*HDQ_SIO*/\ ++ MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\ ++ MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\ ++ MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\ ++ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ ++ MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ ++ /* TS_PEN_IRQ */\ ++ MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176*/\ ++ /* - LAN_INTR*/\ ++ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) /*McSPI1_CS3*/\ ++ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\ ++ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\ ++ MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\ ++ MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\ ++ MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\ ++ /*Control and debug */\ ++ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ ++ MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ ++ MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ ++ MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ ++ /* - PEN_IRQ */\ ++ MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ ++ MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ ++ MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ ++ MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ ++ MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ ++ MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ ++ /* - VIO_1V8*/\ ++ MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ ++ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ ++ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)) /*SYS_CLKOUT2*/\ ++ MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\ ++ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\ ++ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\ ++ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\ ++ MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\ ++ MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\ ++ MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M0)) /*ETK_CLK*/\ ++ MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M0)) /*ETK_CTL*/\ ++ MUX_VAL(CP(ETK_D0_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D0*/\ ++ MUX_VAL(CP(ETK_D1_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D1*/\ ++ MUX_VAL(CP(ETK_D2_ES2 ), (IEN | PTD | EN | M0)) /*ETK_D2*/\ ++ MUX_VAL(CP(ETK_D3_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D3*/\ ++ MUX_VAL(CP(ETK_D4_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D4*/\ ++ MUX_VAL(CP(ETK_D5_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D5*/\ ++ MUX_VAL(CP(ETK_D6_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D6*/\ ++ MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D7*/\ ++ MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D8*/\ ++ MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D9*/\ ++ MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)) /*ETK_D10*/\ ++ MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)) /*ETK_D11*/\ ++ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)) /*ETK_D12*/\ ++ MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)) /*ETK_D13*/\ ++ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)) /*ETK_D14*/\ ++ MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)) /*ETK_D15*/\ ++ /*Die to Die */\ ++ MUX_VAL(CP(CCDC_PCLK), (IEN | PTD | EN | M0)) /*ccdc_pclk*/\ ++ MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | EN | M0)) /*ccdc_field*/\ ++ MUX_VAL(CP(CCDC_HD), (IEN | PTD | EN | M0)) /*ccdc_hd*/\ ++ MUX_VAL(CP(CCDC_VD), (IEN | PTD | EN | M0)) /*ccdc_vd*/\ ++ MUX_VAL(CP(CCDC_WEN), (IEN | PTD | EN | M0)) /*ccdc_wen*/\ ++ MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | EN | M0)) /*ccdc_data0*/\ ++ MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | EN | M0)) /*ccdc_data1*/\ ++ MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | EN | M0)) /*ccdc_data2*/\ ++ MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | EN | M0)) /*ccdc_data3*/\ ++ MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | EN | M0)) /*ccdc_data4*/\ ++ MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | EN | M0)) /*ccdc_data5*/\ ++ MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | EN | M0)) /*ccdc_data6*/\ ++ MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | EN | M0)) /*ccdc_data7*/\ ++ MUX_VAL(CP(RMII_MDIO_DATA), (IEN | PTD | EN | M0)) /*rmii_mdio_data*/\ ++ MUX_VAL(CP(RMII_MDIO_CLK), (IEN | PTD | EN | M0)) /*rmii_mdio_clk*/\ ++ MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | EN | M0)) /*rmii_rxd0*/\ ++ MUX_VAL(CP(RMII_RXD1), (IEN | PTD | EN | M0)) /*rmii_rxd1*/\ ++ MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | EN | M0)) /*rmii_crs_dv*/\ ++ MUX_VAL(CP(RMII_RXER), (IEN | PTD | EN | M0)) /*rmii_rxer*/\ ++ MUX_VAL(CP(RMII_TXD0), (IEN | PTD | EN | M0)) /*rmii_txd0*/\ ++ MUX_VAL(CP(RMII_TXD1), (IEN | PTD | EN | M0)) /*rmii_txd1*/\ ++ MUX_VAL(CP(RMII_TXEN), (IEN | PTD | EN | M0)) /*rmii_txen*/\ ++ MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) /*rmii_50mhz_clk*/\ ++ MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) /*usb0_drvbus*/\ ++ MUX_VAL(CP(HECCL_TXD), (IEN | PTD | EN | M0)) /*heccl_txd*/\ ++ MUX_VAL(CP(HECCL_RXD), (IEN | PTD | EN | M0)) /*heccl_rxd*/\ ++ MUX_VAL(CP(SYS_BOOT7), (IEN | PTD | EN | M0)) /*sys_boot7*/\ ++ MUX_VAL(CP(SDRC_DQS0N), (IEN | PTD | EN | M0)) /*sdrc_dqs0n*/\ ++ MUX_VAL(CP(SDRC_DQS1N), (IEN | PTD | EN | M0)) /*sdrc_dqs1n*/\ ++ MUX_VAL(CP(SDRC_DQS2N), (IEN | PTD | EN | M0)) /*sdrc_dqs2n*/\ ++ MUX_VAL(CP(SDRC_DQS3N), (IEN | PTD | EN | M0)) /*sdrc_dqs3n*/\ ++ MUX_VAL(CP(STRBEN_DLY0), (IEN | PTD | EN | M0)) /*sdrc_strben_dly0*/\ ++ MUX_VAL(CP(STRBEN_DLY1), (IEN | PTD | EN | M0)) /*sdrc_strben_dly1*/\ ++ MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) /*sys_boot8*/\ ++ MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\ ++ MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\ ++ MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\ ++ MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\ ++ MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\ ++ MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\ ++ MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\ ++ MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\ ++ MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\ ++ MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\ ++ MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\ ++ MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\ ++ MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\ ++ MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\ ++ MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\ ++ MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\ ++ MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\ ++ MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\ ++ MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\ ++ MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\ ++ MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\ ++ MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\ ++ MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\ ++ MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\ ++ MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\ ++ MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\ ++ MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\ ++ MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ ++ MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ ++ MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ ++ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ ++ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/\ ++ ++#endif +diff --git a/board/omap3/omap3517evm/u-boot.lds b/board/omap3/omap3517evm/u-boot.lds +new file mode 100644 +index 0000000..69d8ac9 +--- /dev/null ++++ b/board/omap3/omap3517evm/u-boot.lds +@@ -0,0 +1,63 @@ ++/* ++ * January 2004 - Changed to support H4 device ++ * Copyright (c) 2004 Texas Instruments ++ * ++ * (C) Copyright 2002 ++ * Gary Jennejohn, DENX Software Engineering, ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") ++OUTPUT_ARCH(arm) ++ENTRY(_start) ++SECTIONS ++{ ++ . = 0x00000000; ++ ++ . = ALIGN(4); ++ .text : ++ { ++ cpu/arm_cortexa8/start.o (.text) ++ *(.text) ++ } ++ ++ . = ALIGN(4); ++ .rodata : { *(.rodata) } ++ ++ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } ++ __exidx_start = .; ++ .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } ++ __exidx_end = .; ++ ++ . = ALIGN(4); ++ .data : { *(.data) } ++ ++ . = ALIGN(4); ++ .got : { *(.got) } ++ ++ __u_boot_cmd_start = .; ++ .u_boot_cmd : { *(.u_boot_cmd) } ++ __u_boot_cmd_end = .; ++ ++ . = ALIGN(4); ++ __bss_start = .; ++ .bss : { *(.bss) } ++ _end = .; ++} +diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c +index 7bb3e28..a0c2d05 100644 +--- a/cpu/arm_cortexa8/omap3/board.c ++++ b/cpu/arm_cortexa8/omap3/board.c +@@ -224,7 +224,11 @@ void s_init(void) + per_clocks_enable(); + + if (!in_sdram) ++#ifdef CONFIG_OMAP3_OMAP3517EVM ++ emif4_init(); ++#else + sdrc_init(); ++#endif + } + + /****************************************************************************** +@@ -284,8 +288,12 @@ int dram_init(void) + * memory on CS0. + */ + if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) { ++#ifdef CONFIG_OMAP3_OMAP3517EVM ++ emif4_init(); ++#else + do_sdrc_init(CS1, NOT_EARLY); + make_cs1_contiguous(); ++#endif + } + + size0 = get_sdr_cs_size(CS0); +diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c +index 8ac31be..a706cd4 100644 +--- a/cpu/arm_cortexa8/omap3/clock.c ++++ b/cpu/arm_cortexa8/omap3/clock.c +@@ -352,6 +352,10 @@ void per_clocks_enable(void) + sr32(&prcm_base->fclken1_core, 13, 1, 0x1); + sr32(&prcm_base->iclken1_core, 13, 1, 0x1); + ++ /* Enable UART2 clocks */ ++ sr32(&prcm_base->fclken1_core, 14, 1, 0x1); ++ sr32(&prcm_base->iclken1_core, 14, 1, 0x1); ++ + /* UART 3 Clocks */ + sr32(&prcm_base->fclken_per, 11, 1, 0x1); + sr32(&prcm_base->iclken_per, 11, 1, 0x1); +diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c +index 3cc22c4..1badb34 100644 +--- a/cpu/arm_cortexa8/omap3/mem.c ++++ b/cpu/arm_cortexa8/omap3/mem.c +@@ -31,6 +31,53 @@ + #include + #include + ++/* Definitions for EMIF4 configuration values */ ++#define EMIF4_TIM1_T_RP 0x4 ++#define EMIF4_TIM1_T_RCD 0x4 ++#define EMIF4_TIM1_T_WR 0x2 ++#define EMIF4_TIM1_T_RAS 0x8 ++#define EMIF4_TIM1_T_RC 13 ++#define EMIF4_TIM1_T_RRD 0x2 ++#define EMIF4_TIM1_T_WTR 0x2 ++ ++#define EMIF4_TIM2_T_XP 0x2 ++#define EMIF4_TIM2_T_ODT 0x0 ++#define EMIF4_TIM2_T_XSNR 28 ++#define EMIF4_TIM2_T_XSRD 200 ++#define EMIF4_TIM2_T_RTP 0x2 ++#define EMIF4_TIM2_T_CKE 0x3 ++ ++#define EMIF4_TIM3_T_TDQSCKMAX 0x0 ++#define EMIF4_TIM3_T_RFC 33 ++#define EMIF4_TIM3_T_RAS_MAX 0x7 ++ ++#define EMIF4_PWR_IDLE 0x2 ++#define EMIF4_PWR_DPD_EN 0x0 ++#define EMIF4_PWR_PM_EN 0x0 ++#define EMIF4_PWR_PM_TIM 0x0 ++ ++#define EMIF4_INITREF_DIS 0x0 ++#define EMIF4_PASR 0x0 ++#define EMIF4_REFRESH_RATE 1295 ++ ++#define EMIF4_CFG_SDRAM_TYP 0x2 ++#define EMIF4_CFG_IBANK_POS 0x0 ++#define EMIF4_CFG_DDR_TERM 0x0 ++#define EMIF4_CFG_DDR2_DDQS 0x1 ++#define EMIF4_CFG_DYN_ODT 0x0 ++#define EMIF4_CFG_DDR_DIS_DLL 0x0 ++#define EMIF4_CFG_SDR_DRV 0x0 ++#define EMIF4_CFG_CWL 0x0 ++#define EMIF4_CFG_NARROW_MD 0x0 ++#define EMIF4_CFG_CL 0x3 ++#define EMIF4_CFG_ROWSIZE 0x3 ++#define EMIF4_CFG_IBANK 0x3 ++#define EMIF4_CFG_EBANK 0x0 ++#define EMIF4_CFG_PGSIZE 0x2 ++ ++#define EMIF4_DDR1_READ_LAT 0x3 ++#define EMIF4_DDR1_VTP_DYN 0x1 ++ + /* + * Only One NAND allowed on board at a time. + * The GPMC CS Base for the same +@@ -83,6 +130,7 @@ gpmc_csx_t *onenand_cs_base; + #endif + + static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE; ++static emif4_t *emif4_base = (emif4_t *)OMAP34XX_SDRC_BASE; + + /************************************************************************** + * make_cs1_contiguous() - for es2 and above remap cs1 behind cs0 to allow +@@ -195,6 +243,68 @@ void do_sdrc_init(u32 cs, u32 early) + writel(0, &sdrc_base->cs[cs].mcfg); + } + ++/******************************************************** ++ * emif4 _init() - init the emif4 module for DDR access ++ * - early init routines, called from flash or ++ * SRAM. ++ *******************************************************/ ++void emif4_init(void) ++{ ++ unsigned int regval; ++ /* Set the DDR PHY parameters in PHY ctrl registers */ ++ regval = (EMIF4_DDR1_READ_LAT | (EMIF4_DDR1_VTP_DYN << 15)); ++ writel(regval, &emif4_base->ddr_phyctrl1); ++ writel(regval, &emif4_base->ddr_phyctrl1_shdw); ++ writel(0, &emif4_base->ddr_phyctrl2); ++ ++ /* Reset the DDR PHY and wait till completed */ ++ regval = readl(&emif4_base->sdram_iodft_tlgc); ++ regval |= (1<<10); ++ writel(regval, &emif4_base->sdram_iodft_tlgc); ++ while ((readl(&emif4_base->sdram_sts) & (1<<10)) == 0x0); ++ ++ /* Set SDR timing registers */ ++ regval = (EMIF4_TIM1_T_WTR | (EMIF4_TIM1_T_RRD << 3) | ++ (EMIF4_TIM1_T_RC << 6) | (EMIF4_TIM1_T_RAS << 12) | ++ (EMIF4_TIM1_T_WR << 17) | (EMIF4_TIM1_T_RCD << 21) | ++ (EMIF4_TIM1_T_RP << 25)); ++ writel(regval, &emif4_base->sdram_time1); ++ writel(regval, &emif4_base->sdram_time1_shdw); ++ ++ regval = (EMIF4_TIM2_T_CKE | (EMIF4_TIM2_T_RTP << 3) | ++ (EMIF4_TIM2_T_XSRD << 6) | (EMIF4_TIM2_T_XSNR << 16) | ++ (EMIF4_TIM2_T_ODT << 25) | (EMIF4_TIM2_T_XP << 28)); ++ writel(regval, &emif4_base->sdram_time2); ++ writel(regval, &emif4_base->sdram_time2_shdw); ++ ++ regval = (EMIF4_TIM3_T_RAS_MAX | (EMIF4_TIM3_T_RFC << 4) | ++ (EMIF4_TIM3_T_TDQSCKMAX << 13)); ++ writel(regval, &emif4_base->sdram_time3); ++ writel(regval, &emif4_base->sdram_time3_shdw); ++ ++ /* Set the PWR control register */ ++ regval = (EMIF4_PWR_PM_TIM | (EMIF4_PWR_PM_EN << 8) | ++ (EMIF4_PWR_DPD_EN << 10) | (EMIF4_PWR_IDLE << 30)); ++ writel(regval, &emif4_base->sdram_pwr_mgmt); ++ writel(regval, &emif4_base->sdram_pwr_mgmt_shdw); ++ ++ /* Set the DDR refresh rate control register */ ++ regval = (EMIF4_REFRESH_RATE | (EMIF4_PASR << 24) | ++ (EMIF4_INITREF_DIS << 31)); ++ writel(regval, &emif4_base->sdram_refresh_ctrl); ++ writel(regval, &emif4_base->sdram_refresh_ctrl_shdw); ++ ++ /* set the SDRAM configuration register */ ++ regval = (EMIF4_CFG_PGSIZE | (EMIF4_CFG_EBANK << 3) | ++ (EMIF4_CFG_IBANK << 4) | (EMIF4_CFG_ROWSIZE << 7) | ++ (EMIF4_CFG_CL << 10) | (EMIF4_CFG_NARROW_MD << 14) | ++ (EMIF4_CFG_CWL << 16) | (EMIF4_CFG_SDR_DRV << 18) | ++ (EMIF4_CFG_DDR_DIS_DLL << 20) | (EMIF4_CFG_DYN_ODT << 21) | ++ (EMIF4_CFG_DDR2_DDQS << 23) | (EMIF4_CFG_DDR_TERM << 24) | ++ (EMIF4_CFG_IBANK_POS << 27) | (EMIF4_CFG_SDRAM_TYP << 29)); ++ writel(regval, &emif4_base->sdram_config); ++} ++ + void enable_gpmc_config(u32 *gpmc_config, gpmc_csx_t *gpmc_cs_base, u32 base, + u32 size) + { +diff --git a/drivers/net/Makefile b/drivers/net/Makefile +index a360a50..3d803f4 100644 +--- a/drivers/net/Makefile ++++ b/drivers/net/Makefile +@@ -70,6 +70,7 @@ COBJS-$(CONFIG_ULI526X) += uli526x.o + COBJS-$(CONFIG_VSC7385_ENET) += vsc7385.o + COBJS-$(CONFIG_XILINX_EMAC) += xilinx_emac.o + COBJS-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o ++COBJS-$(CONFIG_TICPGMAC) += ticpgmac.o + + COBJS := $(COBJS-y) + SRCS := $(COBJS:.o=.c) +diff --git a/drivers/net/ticpgmac.c b/drivers/net/ticpgmac.c +new file mode 100644 +index 0000000..e83b951 +--- /dev/null ++++ b/drivers/net/ticpgmac.c +@@ -0,0 +1,693 @@ ++/* ++ * Ethernet driver for OMAP3 OMAP3517EVM chip. ++ * ++ * Copyright (C) 2007 Sergey Kubushyn ++ * ++ * Parts shamelessly stolen from TI's dm644x_emac.c. Original copyright ++ * follows: ++ * ++ * ---------------------------------------------------------------------------- ++ * Derived from - ++ * dm644x_emac.c ++ * ++ * TI DaVinci (DM644X) EMAC peripheral driver source for DV-EVM ++ * ++ * Copyright (C) 2005 Texas Instruments. ++ * ++ * ---------------------------------------------------------------------------- ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ---------------------------------------------------------------------------- ++ ++ * Modifications: ++ * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot. ++ * ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_DRIVER_TI_EMAC ++ ++#ifdef CONFIG_CMD_NET ++ ++unsigned int emac_dbg = 0; ++#define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args) ++ ++/* Internal static functions */ ++static int cpgmac_eth_hw_init (void); ++static int cpgmac_eth_open (void); ++static int cpgmac_eth_close (void); ++static int cpgmac_eth_send_packet (volatile void *packet, int length); ++static int cpgmac_eth_rcv_packet (void); ++static void cpgmac_eth_mdio_enable(void); ++ ++static int gen_init_phy(int phy_addr); ++static int gen_is_phy_connected(int phy_addr); ++static int gen_get_link_status(int phy_addr); ++static int gen_auto_negotiate(int phy_addr); ++ ++/* Wrappers exported to the U-Boot proper */ ++int eth_hw_init(void) ++{ ++ return(cpgmac_eth_hw_init()); ++} ++ ++int eth_init(bd_t * bd) ++{ ++ return(cpgmac_eth_open()); ++} ++ ++void eth_halt(void) ++{ ++ cpgmac_eth_close(); ++} ++ ++int eth_send(volatile void *packet, int length) ++{ ++ return(cpgmac_eth_send_packet(packet, length)); ++} ++ ++int eth_rx(void) ++{ ++ return(cpgmac_eth_rcv_packet()); ++} ++ ++void eth_mdio_enable(void) ++{ ++ cpgmac_eth_mdio_enable(); ++} ++/* End of wrappers */ ++ ++/* cpgmac_eth_mac_addr[0] goes out on the wire first */ ++ ++static u_int8_t cpgmac_eth_mac_addr[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0x00 }; ++ ++/* ++ * This function must be called before emac_open() if you want to override ++ * the default mac address. ++ */ ++void cpgmac_eth_set_mac_addr(const u_int8_t *addr) ++{ ++ int i; ++ ++ for (i = 0; i < sizeof (cpgmac_eth_mac_addr); i++) { ++ cpgmac_eth_mac_addr[i] = addr[i]; ++ } ++} ++ ++/* EMAC Addresses */ ++static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; ++static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; ++static volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR; ++ ++/* EMAC descriptors */ ++static volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE); ++static volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE); ++static volatile emac_desc *emac_rx_active_head = 0; ++static volatile emac_desc *emac_rx_active_tail = 0; ++static int emac_rx_queue_active = 0; ++ ++/* Receive packet buffers */ ++static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; ++ ++/* PHY address for a discovered PHY (0xff - not found) */ ++static volatile u_int8_t active_phy_addr = 0xff; ++ ++static int no_phy_init (int phy_addr) { return(1); } ++static int no_phy_is_connected (int phy_addr) { return(1); } ++static int no_phy_get_link_status (int phy_addr) ++{ ++ adap_emac->MACCONTROL = (EMAC_MACCONTROL_MIIEN_ENABLE ++ | EMAC_MACCONTROL_FULLDUPLEX_ENABLE); ++#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII ++ adap_emac->MACCONTROL |= EMAC_MACCONTROL_RMIISPEED_100; ++#endif ++ return 1; ++} ++static int no_phy_auto_negotiate (int phy_addr) { return(1); } ++phy_t phy = { ++ .init = no_phy_init, ++ .is_phy_connected = no_phy_is_connected, ++ .get_link_status = no_phy_get_link_status, ++ .auto_negotiate = no_phy_auto_negotiate ++}; ++ ++static void cpgmac_eth_mdio_enable(void) ++{ ++ u_int32_t clkdiv; ++ ++ clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; ++ ++ adap_mdio->CONTROL = (clkdiv & 0xff) | ++ MDIO_CONTROL_ENABLE | ++ MDIO_CONTROL_FAULT | ++ MDIO_CONTROL_FAULT_ENABLE; ++ ++ while (adap_mdio->CONTROL & MDIO_CONTROL_IDLE) {;} ++} ++ ++/* ++ * Tries to find an active connected PHY. Returns 1 if address if found. ++ * If no active PHY found returns 0. If more than one active PHY (switch) ++ * returns 2 ++ * Sets active_phy_addr variable when returns 1. ++ */ ++static int cpgmac_eth_phy_detect(void) ++{ ++ u_int32_t phy_act_state; ++ int i; ++ ++ active_phy_addr = 0xff; ++ ++ if ((phy_act_state = adap_mdio->ALIVE) == 0) ++ return(0); /* No active PHYs */ ++ ++ debug_emac("cpgmac_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state); ++ ++ for (i = 0; i < 32; i++) { ++ if (phy_act_state & (1 << i)) { ++ if (phy_act_state & ~(1 << i)) ++ return(2); /* More than one PHY */ ++ else { ++ active_phy_addr = i; ++ return(1); ++ } ++ } ++ } ++ ++ return(0); /* Just to make GCC happy */ ++} ++ ++ ++/* Read a PHY register via MDIO inteface. Returns 1 on success, 0 otherwise */ ++int cpgmac_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data) ++{ ++ int tmp; ++ ++ while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;} ++ ++ adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO | ++ MDIO_USERACCESS0_WRITE_READ | ++ ((reg_num & 0x1f) << 21) | ++ ((phy_addr & 0x1f) << 16); ++ ++ /* Wait for command to complete */ ++ while ((tmp = adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) {;} ++ ++ if (tmp & MDIO_USERACCESS0_ACK) { ++ *data = tmp & 0xffff; ++ return(1); ++ } ++ ++ *data = -1; ++ return(0); ++} ++ ++/* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */ ++int cpgmac_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) ++{ ++ ++ while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;} ++ ++ adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO | ++ MDIO_USERACCESS0_WRITE_WRITE | ++ ((reg_num & 0x1f) << 21) | ++ ((phy_addr & 0x1f) << 16) | ++ (data & 0xffff); ++ ++ /* Wait for command to complete */ ++ while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;} ++ ++ return(1); ++} ++ ++/* PHY functions for a generic PHY */ ++static int gen_init_phy(int phy_addr) ++{ ++ int ret = 1; ++ ++ if (gen_get_link_status(phy_addr)) { ++ /* Try another time */ ++ ret = gen_get_link_status(phy_addr); ++ } ++ ++ return(ret); ++} ++ ++static int gen_is_phy_connected(int phy_addr) ++{ ++ u_int16_t dummy; ++ ++ return(cpgmac_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy)); ++} ++ ++static int gen_get_link_status(int phy_addr) ++{ ++ u_int16_t tmp; ++ ++ if (cpgmac_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) ++ && (tmp & 0x04)) { ++ ++ /* Speed doesn't matter, there is no setting for it in EMAC. */ ++ if (tmp & GEN_PHY_STATUS_FD_MASK) { ++ /* set EMAC for Full Duplex */ ++ adap_emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | ++ EMAC_MACCONTROL_FULLDUPLEX_ENABLE; ++ } else { ++ /*set EMAC for Half Duplex */ ++ adap_emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE; ++ } ++ ++#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII ++ if(tmp & GEN_PHY_STATUS_SPEED100_MASK) { ++ adap_emac->MACCONTROL |= EMAC_MACCONTROL_RMIISPEED_100; ++ } else { ++ adap_emac->MACCONTROL &= ~EMAC_MACCONTROL_RMIISPEED_100; ++ } ++#endif ++ ++ return(1); ++ } ++ ++ return(0); ++} ++ ++static int gen_auto_negotiate(int phy_addr) ++{ ++ u_int16_t tmp; ++ ++ if (!cpgmac_eth_phy_read(phy_addr, PHY_BMCR, &tmp)) ++ return(0); ++ ++ /* Restart Auto_negotiation */ ++ tmp |= PHY_BMCR_AUTON; ++ cpgmac_eth_phy_write(phy_addr, PHY_BMCR, tmp); ++ ++ /*check AutoNegotiate complete */ ++ udelay (10000); ++ if (!cpgmac_eth_phy_read(phy_addr, PHY_BMSR, &tmp)) ++ return(0); ++ ++ if (!(tmp & PHY_BMSR_AUTN_COMP)) ++ return(0); ++ ++ return(gen_get_link_status(phy_addr)); ++} ++/* End of generic PHY functions */ ++ ++ ++#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) ++static int cpgmac_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) ++{ ++ return(cpgmac_eth_phy_read(addr, reg, value) ? 0 : 1); ++} ++ ++static int cpgmac_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) ++{ ++ return(cpgmac_eth_phy_write(addr, reg, value) ? 0 : 1); ++} ++ ++int cpgmac_eth_miiphy_initialize(bd_t *bis) ++{ ++ miiphy_register(phy.name, cpgmac_mii_phy_read, cpgmac_mii_phy_write); ++ ++ return(1); ++} ++#endif ++ ++/* ++ * This function initializes the emac hardware. It does NOT initialize ++ * EMAC modules power or pin multiplexors, that is done by board_init() ++ * much earlier in bootup process. Returns 1 on success, 0 otherwise. ++ */ ++static int cpgmac_eth_hw_init(void) ++{ ++ u_int32_t phy_id; ++ u_int16_t tmp; ++ int i, ret; ++ ++ cpgmac_eth_mdio_enable(); ++ ++ for (i = 0; i < 256; i++) { ++ if (adap_mdio->ALIVE) ++ break; ++ udelay(1000); ++ } ++ ++ if (i >= 256) { ++ printf("No ETH PHY detected!!!\n"); ++ return(0); ++ } ++ ++ /* Find if a PHY is connected and get it's address */ ++ ret = cpgmac_eth_phy_detect(); ++ ++ if (ret == 2) { ++ printf("More than one PHY detected.\n"); ++ return(1); ++ } else if(ret == 0) ++ return(0); ++ ++ /* Get PHY ID and initialize phy_ops for a detected PHY */ ++ if (!cpgmac_eth_phy_read(active_phy_addr, PHY_PHYIDR1, &tmp)) { ++ active_phy_addr = 0xff; ++ return(0); ++ } ++ ++ phy_id = (tmp << 16) & 0xffff0000; ++ ++ if (!cpgmac_eth_phy_read(active_phy_addr, PHY_PHYIDR2, &tmp)) { ++ active_phy_addr = 0xff; ++ return(0); ++ } ++ ++ phy_id |= tmp & 0x0000ffff; ++ ++ switch (phy_id) { ++ default: ++ sprintf(phy.name, "GENERIC @ 0x%02x", active_phy_addr); ++ phy.init = gen_init_phy; ++ phy.is_phy_connected = gen_is_phy_connected; ++ phy.get_link_status = gen_get_link_status; ++ phy.auto_negotiate = gen_auto_negotiate; ++ } ++ ++ printf("Ethernet PHY: %s\n", phy.name); ++ ++ return(1); ++} ++ ++ ++/* Eth device open */ ++static int cpgmac_eth_open(void) ++{ ++ dv_reg_p addr; ++ u_int32_t clkdiv, cnt; ++ volatile emac_desc *rx_desc; ++ int i; ++ ++ debug_emac("+ emac_open\n"); ++ ++ /* Reset EMAC module and disable interrupts in wrapper */ ++ adap_emac->EMACSOFTRESET = 1; ++ while (adap_emac->EMACSOFTRESET != 0) {;} ++ adap_ewrap->EMACSOFTRESET = 1; ++ while (adap_ewrap->EMACSOFTRESET != 0) {;} ++ ++ adap_ewrap->C0RXEN = adap_ewrap->C1RXEN = adap_ewrap->C2RXEN = 0; ++ adap_ewrap->C0TXEN = adap_ewrap->C1TXEN = adap_ewrap->C2TXEN = 0; ++ adap_ewrap->C0MISCEN = adap_ewrap->C1MISCEN = adap_ewrap->C2MISCEN = 0; ++ ++ rx_desc = emac_rx_desc; ++ ++ adap_emac->TXCONTROL = 0x01; ++ adap_emac->RXCONTROL = 0x01; ++ ++ /* Set MAC Addresses & Init multicast Hash to 0 (disable any multicast receive) */ ++ /* Using channel 0 only - other channels are disabled */ ++ for (i = 0; i < 8; i++) { ++ adap_emac->MACINDEX = i; ++ adap_emac->MACADDRHI = ++ (cpgmac_eth_mac_addr[3] << 24) | /* bits 23-16 */ ++ (cpgmac_eth_mac_addr[2] << 16) | /* bits 31-24 */ ++ (cpgmac_eth_mac_addr[1] << 8) | /* bits 39-32 */ ++ (cpgmac_eth_mac_addr[0]); /* bits 47-40 */ ++ adap_emac->MACADDRLO = ++ (cpgmac_eth_mac_addr[5] << 8) | /* bits 8-0*/ ++ (cpgmac_eth_mac_addr[4]) | (1 << 19) | (1 << 20); /* bits 8-0 */ ++ } ++ ++ adap_emac->MACHASH1 = 0; ++ adap_emac->MACHASH2 = 0; ++ ++ /* Set source MAC address - REQUIRED for pause frames */ ++ adap_emac->MACSRCADDRHI = ++ (cpgmac_eth_mac_addr[3] << 24) | /* bits 23-16 */ ++ (cpgmac_eth_mac_addr[2] << 16) | /* bits 31-24 */ ++ (cpgmac_eth_mac_addr[1] << 8) | /* bits 39-32 */ ++ (cpgmac_eth_mac_addr[0]); /* bits 47-40 */ ++ adap_emac->MACSRCADDRLO = ++ (cpgmac_eth_mac_addr[5] << 8) | /* bits 8-0 */ ++ (cpgmac_eth_mac_addr[4]); /* bits 15-8 */ ++ ++ /* Set DMA 8 TX / 8 RX Head pointers to 0 */ ++ addr = &adap_emac->TX0HDP; ++ for(cnt = 0; cnt < 16; cnt++) ++ *addr++ = 0; ++ ++ addr = &adap_emac->RX0HDP; ++ for(cnt = 0; cnt < 16; cnt++) ++ *addr++ = 0; ++ ++ /* Clear Statistics (do this before setting MacControl register) */ ++ addr = &adap_emac->RXGOODFRAMES; ++ for(cnt = 0; cnt < EMAC_NUM_STATS; cnt++) ++ *addr++ = 0; ++ ++ /* No multicast addressing */ ++ adap_emac->MACHASH1 = 0; ++ adap_emac->MACHASH2 = 0; ++ ++ /* Create RX queue and set receive process in place */ ++ emac_rx_active_head = emac_rx_desc; ++ for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) { ++ rx_desc->next = (u_int32_t)(rx_desc + 1); ++ rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; ++ rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; ++ rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; ++ rx_desc++; ++ } ++ ++ /* Set the last descriptor's "next" parameter to 0 to end the RX desc list */ ++ rx_desc--; ++ rx_desc->next = 0; ++ emac_rx_active_tail = rx_desc; ++ emac_rx_queue_active = 1; ++ ++ /* Enable TX/RX */ ++ adap_emac->RXMAXLEN = EMAC_MAX_ETHERNET_PKT_SIZE; ++ adap_emac->RXBUFFEROFFSET = 0; ++ ++ /* No fancy configs - Use this for promiscous for debug - EMAC_RXMBPENABLE_RXCAFEN_ENABLE */ ++ adap_emac->RXMBPENABLE = EMAC_RXMBPENABLE_RXBROADEN; ++ ++ /* Enable ch 0 only */ ++ adap_emac->RXUNICASTSET = 0x01; ++ ++ /* Enable MII interface and Full duplex mode */ ++ ++ /* Init MDIO & get link state */ ++ clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; ++ adap_mdio->CONTROL = ((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT); ++ ++ if (!phy.get_link_status(active_phy_addr)) ++ return(0); ++ ++ /* Start receive process */ ++ adap_emac->RX0HDP = (u_int32_t)emac_rx_desc; ++ ++ debug_emac("- emac_open\n"); ++ ++ return(1); ++} ++ ++/* EMAC Channel Teardown */ ++static void cpgmac_eth_ch_teardown(int ch) ++{ ++ dv_reg dly = 0xff; ++ dv_reg cnt; ++ ++ debug_emac("+ emac_ch_teardown\n"); ++ ++ if (ch == EMAC_CH_TX) { ++ /* Init TX channel teardown */ ++ adap_emac->TXTEARDOWN = 1; ++ for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->TX0CP) { ++ /* Wait here for Tx teardown completion interrupt to occur ++ * Note: A task delay can be called here to pend rather than ++ * occupying CPU cycles - anyway it has been found that teardown ++ * takes very few cpu cycles and does not affect functionality */ ++ dly--; ++ udelay(1); ++ if (dly == 0) ++ break; ++ } ++ adap_emac->TX0CP = cnt; ++ adap_emac->TX0HDP = 0; ++ } else { ++ /* Init RX channel teardown */ ++ adap_emac->RXTEARDOWN = 1; ++ for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->RX0CP) { ++ /* Wait here for Rx teardown completion interrupt to occur ++ * Note: A task delay can be called here to pend rather than ++ * occupying CPU cycles - anyway it has been found that teardown ++ * takes very few cpu cycles and does not affect functionality */ ++ dly--; ++ udelay(1); ++ if (dly == 0) ++ break; ++ } ++ adap_emac->RX0CP = cnt; ++ adap_emac->RX0HDP = 0; ++ } ++ ++ debug_emac("- emac_ch_teardown\n"); ++} ++ ++/* Eth device close */ ++static int cpgmac_eth_close(void) ++{ ++ debug_emac("+ emac_close\n"); ++ ++ cpgmac_eth_ch_teardown(EMAC_CH_TX); /* TX Channel teardown */ ++ cpgmac_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */ ++ ++ /* Reset EMAC module and disable interrupts in wrapper */ ++ adap_emac->EMACSOFTRESET = 1; ++ adap_ewrap->EMACSOFTRESET = 1; ++ ++ adap_ewrap->C0RXEN = adap_ewrap->C1RXEN = adap_ewrap->C2RXEN = 0; ++ adap_ewrap->C0TXEN = adap_ewrap->C1TXEN = adap_ewrap->C2TXEN = 0; ++ adap_ewrap->C0MISCEN = adap_ewrap->C1MISCEN = adap_ewrap->C2MISCEN = 0; ++ ++ debug_emac("- emac_close\n"); ++ return(1); ++} ++ ++static int tx_send_loop = 0; ++ ++/* ++ * This function sends a single packet on the network and returns ++ * positive number (number of bytes transmitted) or negative for error ++ */ ++static int cpgmac_eth_send_packet (volatile void *packet, int length) ++{ ++ int ret_status = -1; ++ tx_send_loop = 0; ++ ++ /* Return error if no link */ ++ if (!phy.get_link_status (active_phy_addr)) { ++ printf ("WARN: emac_send_packet: No link\n"); ++ return (ret_status); ++ } ++ ++ /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */ ++ if (length < EMAC_MIN_ETHERNET_PKT_SIZE) { ++ length = EMAC_MIN_ETHERNET_PKT_SIZE; ++ } ++ ++ /* Populate the TX descriptor */ ++ emac_tx_desc->next = 0; ++ emac_tx_desc->buffer = (u_int8_t *) packet; ++ emac_tx_desc->buff_off_len = (length & 0xffff); ++ emac_tx_desc->pkt_flag_len = ((length & 0xffff) | ++ EMAC_CPPI_SOP_BIT | ++ EMAC_CPPI_OWNERSHIP_BIT | ++ EMAC_CPPI_EOP_BIT); ++ /* Send the packet */ ++ adap_emac->TX0HDP = (unsigned int) emac_tx_desc; ++ ++ /* Wait for packet to complete or link down */ ++ while (1) { ++ if (!phy.get_link_status (active_phy_addr)) { ++ cpgmac_eth_ch_teardown (EMAC_CH_TX); ++ return (ret_status); ++ } ++ if (adap_emac->TXINTSTATRAW & 0x01) { ++ ret_status = length; ++ break; ++ } ++ tx_send_loop++; ++ } ++ ++ return (ret_status); ++} ++ ++/* ++ * This function handles receipt of a packet from the network ++ */ ++static int cpgmac_eth_rcv_packet (void) ++{ ++ volatile emac_desc *rx_curr_desc; ++ volatile emac_desc *curr_desc; ++ volatile emac_desc *tail_desc; ++ int status, ret = -1; ++ ++ rx_curr_desc = emac_rx_active_head; ++ status = rx_curr_desc->pkt_flag_len; ++ if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) { ++ if (status & EMAC_CPPI_RX_ERROR_FRAME) { ++ /* Error in packet - discard it and requeue desc */ ++ printf ("WARN: emac_rcv_pkt: Error in packet\n"); ++ } else { ++ NetReceive (rx_curr_desc->buffer, ++ (rx_curr_desc->buff_off_len & 0xffff)); ++ ret = rx_curr_desc->buff_off_len & 0xffff; ++ } ++ ++ /* Ack received packet descriptor */ ++ adap_emac->RX0CP = (unsigned int) rx_curr_desc; ++ curr_desc = rx_curr_desc; ++ emac_rx_active_head = ++ (volatile emac_desc *) rx_curr_desc->next; ++ ++ if (status & EMAC_CPPI_EOQ_BIT) { ++ if (emac_rx_active_head) { ++ adap_emac->RX0HDP = ++ (unsigned int) emac_rx_active_head; ++ } else { ++ emac_rx_queue_active = 0; ++ printf ("INFO:emac_rcv_packet: RX Queue not active\n"); ++ } ++ } ++ ++ /* Recycle RX descriptor */ ++ rx_curr_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; ++ rx_curr_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; ++ rx_curr_desc->next = 0; ++ ++ if (emac_rx_active_head == 0) { ++ printf ("INFO: emac_rcv_pkt: active queue head = 0\n"); ++ emac_rx_active_head = curr_desc; ++ emac_rx_active_tail = curr_desc; ++ if (emac_rx_queue_active != 0) { ++ adap_emac->RX0HDP = ++ (unsigned int) emac_rx_active_head; ++ printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n"); ++ emac_rx_queue_active = 1; ++ } ++ } else { ++ tail_desc = emac_rx_active_tail; ++ emac_rx_active_tail = curr_desc; ++ tail_desc->next = (unsigned int) curr_desc; ++ status = tail_desc->pkt_flag_len; ++ if (status & EMAC_CPPI_EOQ_BIT) { ++ adap_emac->RX0HDP = (unsigned int) curr_desc; ++ status &= ~EMAC_CPPI_EOQ_BIT; ++ tail_desc->pkt_flag_len = status; ++ } ++ } ++ return (ret); ++ } ++ return (0); ++} ++ ++#endif /* CONFIG_CMD_NET */ ++ ++#endif /* CONFIG_DRIVER_TI_EMAC */ +diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h +index c544e0c..989b1c3 100644 +--- a/include/asm-arm/arch-omap3/cpu.h ++++ b/include/asm-arm/arch-omap3/cpu.h +@@ -203,6 +203,32 @@ typedef struct sdrc { + } sdrc_t; + #endif /* __ASSEMBLY__ */ + ++/* EMIF4 */ ++#ifndef __ASSEMBLY__ ++typedef struct emif4 { ++ unsigned int sdram_sts; ++ unsigned int sdram_config; ++ unsigned int res1; ++ unsigned int sdram_refresh_ctrl; ++ unsigned int sdram_refresh_ctrl_shdw; ++ unsigned int sdram_time1; ++ unsigned int sdram_time1_shdw; ++ unsigned int sdram_time2; ++ unsigned int sdram_time2_shdw; ++ unsigned int sdram_time3; ++ unsigned int sdram_time3_shdw; ++ unsigned char res2[8]; ++ unsigned int sdram_pwr_mgmt; ++ unsigned int sdram_pwr_mgmt_shdw; ++ unsigned char res3[32]; ++ unsigned int sdram_iodft_tlgc; ++ unsigned char res4[128]; ++ unsigned int ddr_phyctrl1; ++ unsigned int ddr_phyctrl1_shdw; ++ unsigned int ddr_phyctrl2; ++} emif4_t; ++#endif /* __ASSEMBLY__ */ ++ + #define DLLPHASE_90 (0x1 << 1) + #define LOADDLL (0x1 << 2) + #define ENADLL (0x1 << 3) +diff --git a/include/asm-arm/arch-omap3/mux.h b/include/asm-arm/arch-omap3/mux.h +index 0c01c73..5a241cb 100644 +--- a/include/asm-arm/arch-omap3/mux.h ++++ b/include/asm-arm/arch-omap3/mux.h +@@ -337,6 +337,8 @@ + #define CONTROL_PADCONF_ETK_D14_ES2 0x05F8 + #define CONTROL_PADCONF_ETK_D15_ES2 0x05FA + /*Die to Die */ ++#ifndef CONFIG_OMAP3_OMAP3517EVM ++ + #define CONTROL_PADCONF_D2D_MCAD0 0x01E4 + #define CONTROL_PADCONF_D2D_MCAD1 0x01E6 + #define CONTROL_PADCONF_D2D_MCAD2 0x01E8 +@@ -371,6 +373,45 @@ + #define CONTROL_PADCONF_D2D_MCAD31 0x0222 + #define CONTROL_PADCONF_D2D_MCAD32 0x0224 + #define CONTROL_PADCONF_D2D_MCAD33 0x0226 ++ ++#else ++ ++#define CONTROL_PADCONF_CCDC_PCLK 0x01E4 ++#define CONTROL_PADCONF_CCDC_FIELD 0x01E6 ++#define CONTROL_PADCONF_CCDC_HD 0x01E8 ++#define CONTROL_PADCONF_CCDC_VD 0x01EA ++#define CONTROL_PADCONF_CCDC_WEN 0x01EC ++#define CONTROL_PADCONF_CCDC_DATA0 0x01EE ++#define CONTROL_PADCONF_CCDC_DATA1 0x01F0 ++#define CONTROL_PADCONF_CCDC_DATA2 0x01F2 ++#define CONTROL_PADCONF_CCDC_DATA3 0x01F4 ++#define CONTROL_PADCONF_CCDC_DATA4 0x01F6 ++#define CONTROL_PADCONF_CCDC_DATA5 0x01F8 ++#define CONTROL_PADCONF_CCDC_DATA6 0x01FA ++#define CONTROL_PADCONF_CCDC_DATA7 0x01FC ++#define CONTROL_PADCONF_RMII_MDIO_DATA 0x01FE ++#define CONTROL_PADCONF_RMII_MDIO_CLK 0x0200 ++#define CONTROL_PADCONF_RMII_RXD0 0x0202 ++#define CONTROL_PADCONF_RMII_RXD1 0x0204 ++#define CONTROL_PADCONF_RMII_CRS_DV 0x0206 ++#define CONTROL_PADCONF_RMII_RXER 0x0208 ++#define CONTROL_PADCONF_RMII_TXD0 0x020A ++#define CONTROL_PADCONF_RMII_TXD1 0x020C ++#define CONTROL_PADCONF_RMII_TXEN 0x020E ++#define CONTROL_PADCONF_RMII_50MHZ_CLK 0x0210 ++#define CONTROL_PADCONF_USB0_DRVBUS 0x0212 ++#define CONTROL_PADCONF_HECCL_TXD 0x0214 ++#define CONTROL_PADCONF_HECCL_RXD 0x0216 ++#define CONTROL_PADCONF_SYS_BOOT7 0x0218 ++#define CONTROL_PADCONF_SDRC_DQS0N 0x021A ++#define CONTROL_PADCONF_SDRC_DQS1N 0x021C ++#define CONTROL_PADCONF_SDRC_DQS2N 0x021E ++#define CONTROL_PADCONF_SDRC_DQS3N 0x0220 ++#define CONTROL_PADCONF_STRBEN_DLY0 0x0222 ++#define CONTROL_PADCONF_STRBEN_DLY1 0x0224 ++#define CONTROL_PADCONF_SYS_BOOT8 0x0226 ++#endif ++ + #define CONTROL_PADCONF_D2D_MCAD34 0x0228 + #define CONTROL_PADCONF_D2D_MCAD35 0x022A + #define CONTROL_PADCONF_D2D_MCAD36 0x022C +diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h +index 8b554bb..3efff62 100644 +--- a/include/asm-arm/arch-omap3/sys_proto.h ++++ b/include/asm-arm/arch-omap3/sys_proto.h +@@ -36,6 +36,7 @@ void memif_init(void); + void sdrc_init(void); + void do_sdrc_init(u32, u32); + void gpmc_init(void); ++void emif4_init(void); + + void watchdog_init(void); + void set_muxconf_regs(void); +diff --git a/include/asm-arm/arch-omap3/ticpgmac.h b/include/asm-arm/arch-omap3/ticpgmac.h +new file mode 100644 +index 0000000..d7d77c9 +--- /dev/null ++++ b/include/asm-arm/arch-omap3/ticpgmac.h +@@ -0,0 +1,340 @@ ++/* ++ * Copyright (C) 2007 Sergey Kubushyn ++ * ++ * Based on: ++ * ++ * ---------------------------------------------------------------------------- ++ * ++ * dm644x_emac.h ++ * ++ * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM ++ * ++ * Copyright (C) 2005 Texas Instruments. ++ * ++ * ---------------------------------------------------------------------------- ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ---------------------------------------------------------------------------- ++ ++ * Modifications: ++ * ver. 1.0: Sep 2005, TI PSP Team - Created EMAC version for uBoot. ++ * ++ */ ++ ++#ifndef _TI_CPGMAC_H_ ++#define _TI_CPGMAC_H_ ++ ++#define DAVINCI_EMAC_CNTRL_REGS_BASE 0 ++#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0 ++#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0 ++ ++#define EMAC_BASE_ADDR DAVINCI_EMAC_CNTRL_REGS_BASE ++#define EMAC_WRAPPER_BASE_ADDR DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE ++#define EMAC_WRAPPER_RAM_ADDR DAVINCI_EMAC_WRAPPER_RAM_BASE ++#define EMAC_MDIO_BASE_ADDR 0x5C030000 ++ ++/* MDIO module input frequency */ ++#define EMAC_MDIO_BUS_FREQ 26000000 /* 26 MHZ check */ ++ ++/* MDIO clock output frequency */ ++#define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */ ++ ++/* Ethernet Min/Max packet size */ ++#define EMAC_MIN_ETHERNET_PKT_SIZE 60 ++#define EMAC_MAX_ETHERNET_PKT_SIZE 1518 ++#define EMAC_PKT_ALIGN 18 /* 1518 + 18 = 1536 (packet aligned on 32 byte boundry) */ ++ ++/* Number of RX packet buffers ++ * NOTE: Only 1 buffer supported as of now ++ */ ++#define EMAC_MAX_RX_BUFFERS 10 ++ ++ ++/*********************************************** ++ ******** Internally used macros *************** ++ ***********************************************/ ++ ++#define EMAC_CH_TX 1 ++#define EMAC_CH_RX 0 ++ ++/* Each descriptor occupies 4 words, lets start RX desc's at 0 and ++ * reserve space for 64 descriptors max ++ */ ++#define EMAC_RX_DESC_BASE 0x0 ++#define EMAC_TX_DESC_BASE 0x1000 ++ ++/* EMAC Teardown value */ ++#define EMAC_TEARDOWN_VALUE 0xfffffffc ++ ++/* MII Status Register */ ++#define MII_STATUS_REG 1 ++ ++/* Number of statistics registers */ ++#define EMAC_NUM_STATS 36 ++ ++ ++/* EMAC Descriptor */ ++typedef volatile struct _emac_desc ++{ ++ u_int32_t next; /* Pointer to next descriptor in chain */ ++ u_int8_t *buffer; /* Pointer to data buffer */ ++ u_int32_t buff_off_len; /* Buffer Offset(MSW) and Length(LSW) */ ++ u_int32_t pkt_flag_len; /* Packet Flags(MSW) and Length(LSW) */ ++} emac_desc; ++ ++typedef volatile unsigned int dv_reg; ++typedef volatile unsigned int *dv_reg_p; ++ ++/* CPPI bit positions */ ++#define EMAC_CPPI_SOP_BIT (0x80000000) ++#define EMAC_CPPI_EOP_BIT (0x40000000) ++#define EMAC_CPPI_OWNERSHIP_BIT (0x20000000) ++#define EMAC_CPPI_EOQ_BIT (0x10000000) ++#define EMAC_CPPI_TEARDOWN_COMPLETE_BIT (0x08000000) ++#define EMAC_CPPI_PASS_CRC_BIT (0x04000000) ++ ++#define EMAC_CPPI_RX_ERROR_FRAME (0x03fc0000) ++ ++#define EMAC_MACCONTROL_RMIISPEED_100 (1 << 15) ++#define EMAC_MACCONTROL_MIIEN_ENABLE (0x20) ++#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1) ++ ++#define EMAC_RXMBPENABLE_RXCAFEN_ENABLE (0x200000) ++#define EMAC_RXMBPENABLE_RXBROADEN (0x2000) ++ ++ ++#define MDIO_CONTROL_IDLE (0x80000000) ++#define MDIO_CONTROL_ENABLE (0x40000000) ++#define MDIO_CONTROL_FAULT_ENABLE (0x40000) ++#define MDIO_CONTROL_FAULT (0x80000) ++#define MDIO_USERACCESS0_GO (0x80000000) ++#define MDIO_USERACCESS0_WRITE_READ (0x0) ++#define MDIO_USERACCESS0_WRITE_WRITE (0x40000000) ++#define MDIO_USERACCESS0_ACK (0x20000000) ++ ++/* Ethernet MAC Registers Structure */ ++typedef struct { ++ dv_reg TXIDVER; ++ dv_reg TXCONTROL; ++ dv_reg TXTEARDOWN; ++ u_int8_t RSVD0[4]; ++ dv_reg RXIDVER; ++ dv_reg RXCONTROL; ++ dv_reg RXTEARDOWN; ++ u_int8_t RSVD1[100]; ++ dv_reg TXINTSTATRAW; ++ dv_reg TXINTSTATMASKED; ++ dv_reg TXINTMASKSET; ++ dv_reg TXINTMASKCLEAR; ++ dv_reg MACINVECTOR; ++ u_int8_t RSVD2[12]; ++ dv_reg RXINTSTATRAW; ++ dv_reg RXINTSTATMASKED; ++ dv_reg RXINTMASKSET; ++ dv_reg RXINTMASKCLEAR; ++ dv_reg MACINTSTATRAW; ++ dv_reg MACINTSTATMASKED; ++ dv_reg MACINTMASKSET; ++ dv_reg MACINTMASKCLEAR; ++ u_int8_t RSVD3[64]; ++ dv_reg RXMBPENABLE; ++ dv_reg RXUNICASTSET; ++ dv_reg RXUNICASTCLEAR; ++ dv_reg RXMAXLEN; ++ dv_reg RXBUFFEROFFSET; ++ dv_reg RXFILTERLOWTHRESH; ++ u_int8_t RSVD4[8]; ++ dv_reg RX0FLOWTHRESH; ++ dv_reg RX1FLOWTHRESH; ++ dv_reg RX2FLOWTHRESH; ++ dv_reg RX3FLOWTHRESH; ++ dv_reg RX4FLOWTHRESH; ++ dv_reg RX5FLOWTHRESH; ++ dv_reg RX6FLOWTHRESH; ++ dv_reg RX7FLOWTHRESH; ++ dv_reg RX0FREEBUFFER; ++ dv_reg RX1FREEBUFFER; ++ dv_reg RX2FREEBUFFER; ++ dv_reg RX3FREEBUFFER; ++ dv_reg RX4FREEBUFFER; ++ dv_reg RX5FREEBUFFER; ++ dv_reg RX6FREEBUFFER; ++ dv_reg RX7FREEBUFFER; ++ dv_reg MACCONTROL; ++ dv_reg MACSTATUS; ++ dv_reg EMCONTROL; ++ dv_reg FIFOCONTROL; ++ dv_reg MACCONFIG; ++ dv_reg EMACSOFTRESET; ++ u_int8_t RSVD5[88]; ++ dv_reg MACSRCADDRLO; ++ dv_reg MACSRCADDRHI; ++ dv_reg MACHASH1; ++ dv_reg MACHASH2; ++ dv_reg BOFFTEST; ++ dv_reg TPACETEST; ++ dv_reg RXPAUSE; ++ dv_reg TXPAUSE; ++ u_int8_t RSVD6[16]; ++ dv_reg RXGOODFRAMES; ++ dv_reg RXBCASTFRAMES; ++ dv_reg RXMCASTFRAMES; ++ dv_reg RXPAUSEFRAMES; ++ dv_reg RXCRCERRORS; ++ dv_reg RXALIGNCODEERRORS; ++ dv_reg RXOVERSIZED; ++ dv_reg RXJABBER; ++ dv_reg RXUNDERSIZED; ++ dv_reg RXFRAGMENTS; ++ dv_reg RXFILTERED; ++ dv_reg RXQOSFILTERED; ++ dv_reg RXOCTETS; ++ dv_reg TXGOODFRAMES; ++ dv_reg TXBCASTFRAMES; ++ dv_reg TXMCASTFRAMES; ++ dv_reg TXPAUSEFRAMES; ++ dv_reg TXDEFERRED; ++ dv_reg TXCOLLISION; ++ dv_reg TXSINGLECOLL; ++ dv_reg TXMULTICOLL; ++ dv_reg TXEXCESSIVECOLL; ++ dv_reg TXLATECOLL; ++ dv_reg TXUNDERRUN; ++ dv_reg TXCARRIERSENSE; ++ dv_reg TXOCTETS; ++ dv_reg FRAME64; ++ dv_reg FRAME65T127; ++ dv_reg FRAME128T255; ++ dv_reg FRAME256T511; ++ dv_reg FRAME512T1023; ++ dv_reg FRAME1024TUP; ++ dv_reg NETOCTETS; ++ dv_reg RXSOFOVERRUNS; ++ dv_reg RXMOFOVERRUNS; ++ dv_reg RXDMAOVERRUNS; ++ u_int8_t RSVD7[624]; ++ dv_reg MACADDRLO; ++ dv_reg MACADDRHI; ++ dv_reg MACINDEX; ++ u_int8_t RSVD8[244]; ++ dv_reg TX0HDP; ++ dv_reg TX1HDP; ++ dv_reg TX2HDP; ++ dv_reg TX3HDP; ++ dv_reg TX4HDP; ++ dv_reg TX5HDP; ++ dv_reg TX6HDP; ++ dv_reg TX7HDP; ++ dv_reg RX0HDP; ++ dv_reg RX1HDP; ++ dv_reg RX2HDP; ++ dv_reg RX3HDP; ++ dv_reg RX4HDP; ++ dv_reg RX5HDP; ++ dv_reg RX6HDP; ++ dv_reg RX7HDP; ++ dv_reg TX0CP; ++ dv_reg TX1CP; ++ dv_reg TX2CP; ++ dv_reg TX3CP; ++ dv_reg TX4CP; ++ dv_reg TX5CP; ++ dv_reg TX6CP; ++ dv_reg TX7CP; ++ dv_reg RX0CP; ++ dv_reg RX1CP; ++ dv_reg RX2CP; ++ dv_reg RX3CP; ++ dv_reg RX4CP; ++ dv_reg RX5CP; ++ dv_reg RX6CP; ++ dv_reg RX7CP; ++} emac_regs; ++ ++/* EMAC Wrapper Registers Structure */ ++typedef struct { ++ dv_reg REV; ++ dv_reg EMACSOFTRESET; ++ dv_reg INTCONTROL; ++ dv_reg C0RXTHRESHEN; ++ dv_reg C0RXEN; ++ dv_reg C0TXEN; ++ dv_reg C0MISCEN; ++ dv_reg C1RXTHRESHEN; ++ dv_reg C1RXEN; ++ dv_reg C1TXEN; ++ dv_reg C1MISCEN; ++ dv_reg C2RXTHRESHEN; ++ dv_reg C2RXEN; ++ dv_reg C2TXEN; ++ dv_reg C2MISCEN; ++ dv_reg C0RXTHRESHSTAT; ++ dv_reg C0RXSTAT; ++ dv_reg C0TXSTAT; ++ dv_reg C0MISCSTAT; ++ dv_reg C1RXTHRESHSTAT; ++ dv_reg C1RXSTAT; ++ dv_reg C1TXSTAT; ++ dv_reg C1MISCSTAT; ++ dv_reg C2RXTHRESHSTAT; ++ dv_reg C2RXSTAT; ++ dv_reg C2TXSTAT; ++ dv_reg C2MISCSTAT; ++ dv_reg C0RXIMAX; ++ dv_reg C0TXIMAX; ++ dv_reg C1RXIMAX; ++ dv_reg C1TXIMAX; ++ dv_reg C2RXIMAX; ++ dv_reg C2TXIMAX; ++} ewrap_regs; ++ ++ ++/* EMAC MDIO Registers Structure */ ++typedef struct { ++ dv_reg VERSION; ++ dv_reg CONTROL; ++ dv_reg ALIVE; ++ dv_reg LINK; ++ dv_reg LINKINTRAW; ++ dv_reg LINKINTMASKED; ++ u_int8_t RSVD0[8]; ++ dv_reg USERINTRAW; ++ dv_reg USERINTMASKED; ++ dv_reg USERINTMASKSET; ++ dv_reg USERINTMASKCLEAR; ++ u_int8_t RSVD1[80]; ++ dv_reg USERACCESS0; ++ dv_reg USERPHYSEL0; ++ dv_reg USERACCESS1; ++ dv_reg USERPHYSEL1; ++} mdio_regs; ++ ++int dm644x_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data); ++int dm644x_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data); ++ ++typedef struct ++{ ++ char name[64]; ++ int (*init)(int phy_addr); ++ int (*is_phy_connected)(int phy_addr); ++ int (*get_link_status)(int phy_addr); ++ int (*auto_negotiate)(int phy_addr); ++} phy_t; ++ ++/* Generic phy definitions */ ++#define GEN_PHY_STATUS_SPEED100_MASK ((1 << 13) | (1 << 14)) ++#define GEN_PHY_STATUS_FD_MASK ((1 << 11) | (1 << 13)) ++ ++#endif /* _TI_CPGMAC_H_ */ +diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h +index 2c1e69b..c7e498e 100644 +--- a/include/asm-arm/mach-types.h ++++ b/include/asm-arm/mach-types.h +@@ -1990,6 +1990,7 @@ extern unsigned int __machine_arch_type; + #define MACH_TYPE_BLAZE 2004 + #define MACH_TYPE_LINKSTATION_LS_HGL 2005 + #define MACH_TYPE_HTCVENUS 2006 ++#define MACH_TYPE_OMAP3517EVM 2200 + + #ifdef CONFIG_ARCH_EBSA110 + # ifdef machine_arch_type +diff --git a/include/configs/omap3517evm.h b/include/configs/omap3517evm.h +new file mode 100644 +index 0000000..28e3d15 +--- /dev/null ++++ b/include/configs/omap3517evm.h +@@ -0,0 +1,349 @@ ++/* ++ * (C) Copyright 2006-2008 ++ * Texas Instruments. ++ * Author : ++ * Manikandan Pillai ++ * ++ * Derived from EVM, Beagle Board and 3430 SDP code by ++ * Richard Woodruff ++ * Syed Mohammed Khasim ++ * ++ * Configuration settings for the TI OMAP3 EVM board. ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++#include ++ ++/* ++ * High Level Configuration Options ++ */ ++#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ ++#define CONFIG_OMAP 1 /* in a TI OMAP core */ ++#define CONFIG_OMAP34XX 1 /* which is a 34XX */ ++#define CONFIG_OMAP3430 1 /* which is in a 3430 */ ++#define CONFIG_OMAP3_OMAP3517EVM 1 /* working with EVM */ ++ ++#include /* get chip and board defs */ ++#include ++ ++/* Clock Defines */ ++#define V_OSCK 26000000 /* Clock output from T2 */ ++#define V_SCLK (V_OSCK >> 1) ++ ++#undef CONFIG_USE_IRQ /* no support for IRQs */ ++#define CONFIG_MISC_INIT_R ++ ++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ ++#define CONFIG_SETUP_MEMORY_TAGS 1 ++#define CONFIG_INITRD_TAG 1 ++#define CONFIG_REVISION_TAG 1 ++ ++/* ++ * Size of malloc() pool ++ */ ++#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */ ++ /* Sector */ ++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) ++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ ++ /* initial data */ ++ ++/* ++ * Hardware drivers ++ */ ++ ++/* ++ * NS16550 Configuration ++ */ ++#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ ++ ++#define CONFIG_SYS_NS16550 ++#define CONFIG_SYS_NS16550_SERIAL ++#define CONFIG_SYS_NS16550_REG_SIZE (-4) ++#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK ++ ++/* ++ * select serial console configuration ++ */ ++#define CONFIG_CONS_INDEX 1 ++#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 ++#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ ++ ++/* allow to overwrite serial and ethaddr */ ++#define CONFIG_ENV_OVERWRITE ++#define CONFIG_BAUDRATE 115200 ++#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ ++ 115200} ++#define CONFIG_MMC 1 ++#define CONFIG_OMAP3_MMC 1 ++#define CONFIG_DOS_PARTITION 1 ++ ++/* commands to include */ ++#include ++ ++#define CONFIG_CMD_EXT2 /* EXT2 Support */ ++#define CONFIG_CMD_FAT /* FAT support */ ++#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ ++ ++#define CONFIG_CMD_I2C /* I2C serial bus support */ ++#define CONFIG_CMD_MMC /* MMC support */ ++#define CONFIG_CMD_NAND /* NAND support */ ++#define CONFIG_CMD_DHCP ++#define CONFIG_CMD_PING ++ ++#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ ++#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ ++#undef CONFIG_CMD_IMI /* iminfo */ ++#undef CONFIG_CMD_IMLS /* List all found images */ ++ ++#define CONFIG_SYS_NO_FLASH ++#define CONFIG_SYS_I2C_SPEED 100000 ++#define CONFIG_SYS_I2C_SLAVE 1 ++#define CONFIG_SYS_I2C_BUS 0 ++#define CONFIG_SYS_I2C_BUS_SELECT 1 ++#define CONFIG_DRIVER_OMAP34XX_I2C 1 ++ ++/* ++ * Board NAND Info. ++ */ ++#define CONFIG_NAND_OMAP_GPMC ++#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ ++ /* to access nand */ ++#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ ++ /* to access */ ++ /* nand at CS0 */ ++ ++#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 ++ ++#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ ++ /* NAND devices */ ++#define SECTORSIZE 512 ++ ++#define NAND_ALLOW_ERASE_ALL ++#define ADDR_COLUMN 1 ++#define ADDR_PAGE 2 ++#define ADDR_COLUMN_PAGE 3 ++ ++#define NAND_ChipID_UNKNOWN 0x00 ++#define NAND_MAX_FLOORS 1 ++#define NAND_MAX_CHIPS 1 ++#define NAND_NO_RB 1 ++#define CONFIG_SYS_NAND_WP ++ ++#define CONFIG_JFFS2_NAND ++/* nand device jffs2 lives on */ ++#define CONFIG_JFFS2_DEV "nand0" ++/* start of jffs2 partition */ ++#define CONFIG_JFFS2_PART_OFFSET 0x680000 ++#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ ++ ++/* Environment information */ ++#define CONFIG_BOOTDELAY 10 ++ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ "loadaddr=0x82000000\0" \ ++ "console=ttyS2,115200n8\0" \ ++ "mmcargs=setenv bootargs console=${console} " \ ++ "root=/dev/mmcblk0p2 rw " \ ++ "rootfstype=ext3 rootwait\0" \ ++ "nandargs=setenv bootargs console=${console} " \ ++ "root=/dev/mtdblock4 rw " \ ++ "rootfstype=jffs2\0" \ ++ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ ++ "bootscript=echo Running bootscript from mmc ...; " \ ++ "autoscr ${loadaddr}\0" \ ++ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ ++ "mmcboot=echo Booting from mmc ...; " \ ++ "run mmcargs; " \ ++ "bootm ${loadaddr}\0" \ ++ "nandboot=echo Booting from nand ...; " \ ++ "run nandargs; " \ ++ "onenand read ${loadaddr} 280000 400000; " \ ++ "bootm ${loadaddr}\0" \ ++ ++#define CONFIG_BOOTCOMMAND \ ++ "if mmcinit; then " \ ++ "if run loadbootscript; then " \ ++ "run bootscript; " \ ++ "else " \ ++ "if run loaduimage; then " \ ++ "run mmcboot; " \ ++ "else run nandboot; " \ ++ "fi; " \ ++ "fi; " \ ++ "else run nandboot; fi" ++ ++#define CONFIG_AUTO_COMPLETE 1 ++/* ++ * Miscellaneous configurable options ++ */ ++#define V_PROMPT "OMAP3517EVM # " ++ ++#define CONFIG_SYS_LONGHELP /* undef to save memory */ ++#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ ++#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " ++#define CONFIG_SYS_PROMPT V_PROMPT ++#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ ++/* Print Buffer Size */ ++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ ++ sizeof(CONFIG_SYS_PROMPT) + 16) ++#define CONFIG_SYS_MAXARGS 16 /* max number of command */ ++ /* args */ ++/* Boot Argument Buffer Size */ ++#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) ++/* memtest works on */ ++#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) ++#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ ++ 0x01F00000) /* 31MB */ ++ ++#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ ++ /* in Hz */ ++ ++#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ ++ /* address */ ++ ++/* ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. ++ */ ++#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) ++#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 ++ ++/*----------------------------------------------------------------------- ++ * Stack sizes ++ * ++ * The stack sizes are set up in start.S using the settings below ++ */ ++#define CONFIG_STACKSIZE SZ_128K /* regular stack */ ++#ifdef CONFIG_USE_IRQ ++#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */ ++#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */ ++#endif ++ ++/*----------------------------------------------------------------------- ++ * Physical Memory Map ++ */ ++#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ ++#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 ++#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ ++#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 ++ ++/* SDRAM Bank Allocation method */ ++#define SDRC_R_B_C 1 ++ ++/*----------------------------------------------------------------------- ++ * FLASH and environment organization ++ */ ++ ++/* **** PISMO SUPPORT *** */ ++ ++/* Configure the PISMO */ ++#define PISMO1_NAND_SIZE GPMC_SIZE_128M ++#define PISMO1_ONEN_SIZE GPMC_SIZE_128M ++ ++#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ ++ /* on one chip */ ++#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ ++#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */ ++ ++#define CONFIG_SYS_FLASH_BASE boot_flash_base ++ ++/* Monitor at start of flash */ ++#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE ++#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP ++ ++#define CONFIG_ENV_IS_IN_NAND 1 ++#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ ++#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ ++ ++#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec ++#define CONFIG_ENV_OFFSET boot_flash_off ++#define CONFIG_ENV_ADDR boot_flash_env_addr ++ ++/*----------------------------------------------------------------------- ++ * CFI FLASH driver setup ++ */ ++/* timeout values are in ticks */ ++#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) ++#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) ++ ++/* Flash banks JFFS2 should use */ ++#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ ++ CONFIG_SYS_MAX_NAND_DEVICE) ++#define CONFIG_SYS_JFFS2_MEM_NAND ++/* use flash_info[2] */ ++#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS ++#define CONFIG_SYS_JFFS2_NUM_BANKS 1 ++ ++#ifndef __ASSEMBLY__ ++extern gpmc_csx_t *nand_cs_base; ++extern gpmc_t *gpmc_cfg_base; ++extern unsigned int boot_flash_base; ++extern volatile unsigned int boot_flash_env_addr; ++extern unsigned int boot_flash_off; ++extern unsigned int boot_flash_sec; ++extern unsigned int boot_flash_type; ++#endif ++ ++ ++#define WRITE_NAND_COMMAND(d, adr)\ ++ writel(d, &nand_cs_base->nand_cmd) ++#define WRITE_NAND_ADDRESS(d, adr)\ ++ writel(d, &nand_cs_base->nand_adr) ++#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat) ++#define READ_NAND(adr) readl(&nand_cs_base->nand_dat) ++ ++/* Other NAND Access APIs */ ++#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \ ++ while (0) ++#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \ ++ while (0) ++#define NAND_DISABLE_CE(nand) ++#define NAND_ENABLE_CE(nand) ++#define NAND_WAIT_READY(nand) udelay(10) ++ ++/*---------------------------------------------------------------------------- ++ * Ethernet support for OMAP3517EVM ++ *---------------------------------------------------------------------------- ++ */ ++#if defined(CONFIG_CMD_NET) ++#define CONFIG_TICPGMAC ++#define CONFIG_DRIVER_TI_EMAC ++#define CONFIG_MII ++#define CONFIG_NET_RETRY_COUNT 10 ++#endif /* (CONFIG_CMD_NET) */ ++ ++/* ++ * BOOTP fields ++ */ ++#define CONFIG_BOOTP_DEFAULT ++#define CONFIG_BOOTP_DNS ++#define CONFIG_BOOTP_DNS2 ++#define CONFIG_BOOTP_SEND_HOSTNAME ++ ++#define CONFIG_BOOTP_SUBNETMASK 0x00000001 ++#define CONFIG_BOOTP_GATEWAY 0x00000002 ++#define CONFIG_BOOTP_HOSTNAME 0x00000004 ++#define CONFIG_BOOTP_BOOTPATH 0x00000010 ++ ++#endif /* __CONFIG_H */ +diff --git a/lib_arm/board.c b/lib_arm/board.c +index 09eaaf2..4ed200d 100644 +--- a/lib_arm/board.c ++++ b/lib_arm/board.c +@@ -432,9 +432,9 @@ void start_armboot (void) + + /* Perform network card initialisation if necessary */ + #ifdef CONFIG_DRIVER_TI_EMAC +-extern void davinci_eth_set_mac_addr (const u_int8_t *addr); ++extern void cpgmac_eth_set_mac_addr (const u_int8_t *addr); + if (getenv ("ethaddr")) { +- davinci_eth_set_mac_addr(gd->bd->bi_enetaddr); ++ cpgmac_eth_set_mac_addr(gd->bd->bi_enetaddr); + } + #endif + +diff --git a/net/eth.c b/net/eth.c +index 217e885..2e261da 100644 +--- a/net/eth.c ++++ b/net/eth.c +@@ -498,7 +498,7 @@ extern int at91rm9200_miiphy_initialize(bd_t *bis); + extern int emac4xx_miiphy_initialize(bd_t *bis); + extern int mcf52x2_miiphy_initialize(bd_t *bis); + extern int ns7520_miiphy_initialize(bd_t *bis); +-extern int davinci_eth_miiphy_initialize(bd_t *bis); ++extern int cpgmac_eth_miiphy_initialize(bd_t *bis); + + + int eth_initialize(bd_t *bis) +@@ -520,7 +520,7 @@ int eth_initialize(bd_t *bis) + ns7520_miiphy_initialize(bis); + #endif + #if defined(CONFIG_DRIVER_TI_EMAC) +- davinci_eth_miiphy_initialize(bis); ++ cpgmac_eth_miiphy_initialize(bis); + #endif + return 0; + } +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0007-OMAP3517TEB-validated-on-OMAP3517TEB-board.patch b/recipes/u-boot/u-boot-git/omap3evm/0007-OMAP3517TEB-validated-on-OMAP3517TEB-board.patch new file mode 100644 index 0000000000..3c79755d42 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0007-OMAP3517TEB-validated-on-OMAP3517TEB-board.patch @@ -0,0 +1,403 @@ +From ba560965c5fc7671545cd4eed5d57be69958941d Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Sat, 13 Jun 2009 00:58:06 +0530 +Subject: [PATCH 07/16] OMAP3517TEB: validated on OMAP3517TEB board + +OMAP3517TEB board is being used as a pre-silicon development +platform, below are the details - + +Validation - + - PLL conifguration + - NAND 8-bit micron part (x-loader, u-boot) + - USB Host* (Linux) + - MMC1 (x-loader, u-boot, Linux) + - Video (TV out, LCD (Toshiba part)) + - MMC boot from x-loader + +Changes - + - GPMC timing parameters for NAND interface + - omap3517evm.h config file cleanup + - commented out "smi" instruction + +Issues - + - USB host support has been validated by commenting the + mux configuration in u-boot. Was not able to conclude on + muxing part of it. + - NAND 16-bit is not working, found out to be daughter card issue + Daughter card is not designed for 16bit micron part. + - LCD is validated based on AVV panel initialization, since it was SPI + based LCD panel. +--- + board/omap3/omap3517evm/omap3517evm.h | 20 +++++++------- + cpu/arm_cortexa8/omap3/board.c | 19 ++++++++----- + cpu/arm_cortexa8/omap3/mem.c | 48 ++++++++++++++++++++++---------- + cpu/arm_cortexa8/start.S | 2 +- + drivers/i2c/omap24xx_i2c.c | 9 ++++-- + drivers/mmc/omap3_mmc.c | 6 +++- + include/asm-arm/arch-omap3/mem.h | 18 ++++++++++++ + include/asm-arm/arch-omap3/mux.h | 4 +- + include/configs/omap3517evm.h | 10 +++---- + 9 files changed, 90 insertions(+), 46 deletions(-) + +diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h +index aba53bf..d817e93 100644 +--- a/board/omap3/omap3517evm/omap3517evm.h ++++ b/board/omap3/omap3517evm/omap3517evm.h +@@ -190,16 +190,16 @@ static void setup_net_chip(void); + MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ + MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ + /*Expansion card */\ +- MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ +- MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ +- MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ +- MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ +- MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ +- MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ +- MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\ +- MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\ +- MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\ +- MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\ ++ MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) /*MMC1_CLK*/\ ++ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) /*MMC1_CMD*/\ ++ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) /*MMC1_DAT0*/\ ++ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) /*MMC1_DAT1*/\ ++ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) /*MMC1_DAT2*/\ ++ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) /*MMC1_DAT3*/\ ++ MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | DIS | M0)) /*MMC1_DAT4*/\ ++ MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | DIS | M0)) /*MMC1_DAT5*/\ ++ MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | DIS | M0)) /*MMC1_DAT6*/\ ++ MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | DIS | M0)) /*MMC1_DAT7*/\ + /*Wireless LAN */\ + MUX_VAL(CP(MMC2_CLK), (IEN | PTD | DIS | M0)) /*MMC2_CLK*/\ + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ +diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c +index a0c2d05..15834fd 100644 +--- a/cpu/arm_cortexa8/omap3/board.c ++++ b/cpu/arm_cortexa8/omap3/board.c +@@ -224,9 +224,9 @@ void s_init(void) + per_clocks_enable(); + + if (!in_sdram) +-#ifdef CONFIG_OMAP3_OMAP3517EVM ++#if defined (CONFIG_OMAP35XX) + emif4_init(); +-#else ++#elif defined (CONFIG_OMAP34XX) + sdrc_init(); + #endif + } +@@ -288,17 +288,22 @@ int dram_init(void) + * memory on CS0. + */ + if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) { +-#ifdef CONFIG_OMAP3_OMAP3517EVM ++#if defined (CONFIG_OMAP35XX) + emif4_init(); +-#else ++ /* ++ * TODO: Need to implement function to calculate ++ * DDR size depending on row and coloum size ++ */ ++ size0 = 128 * 1024 * 1024; ++#elif defined (CONFIG_OMAP34XX) + do_sdrc_init(CS1, NOT_EARLY); + make_cs1_contiguous(); ++ ++ size0 = get_sdr_cs_size(CS0); ++ size1 = get_sdr_cs_size(CS1); + #endif + } + +- size0 = get_sdr_cs_size(CS0); +- size1 = get_sdr_cs_size(CS1); +- + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = size0; + gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); +diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c +index 1badb34..7fb05eb 100644 +--- a/cpu/arm_cortexa8/omap3/mem.c ++++ b/cpu/arm_cortexa8/omap3/mem.c +@@ -32,23 +32,23 @@ + #include + + /* Definitions for EMIF4 configuration values */ +-#define EMIF4_TIM1_T_RP 0x4 +-#define EMIF4_TIM1_T_RCD 0x4 +-#define EMIF4_TIM1_T_WR 0x2 ++#define EMIF4_TIM1_T_RP 0x3 ++#define EMIF4_TIM1_T_RCD 0x3 ++#define EMIF4_TIM1_T_WR 0x3 + #define EMIF4_TIM1_T_RAS 0x8 +-#define EMIF4_TIM1_T_RC 13 ++#define EMIF4_TIM1_T_RC 0xA + #define EMIF4_TIM1_T_RRD 0x2 + #define EMIF4_TIM1_T_WTR 0x2 + + #define EMIF4_TIM2_T_XP 0x2 + #define EMIF4_TIM2_T_ODT 0x0 +-#define EMIF4_TIM2_T_XSNR 28 +-#define EMIF4_TIM2_T_XSRD 200 +-#define EMIF4_TIM2_T_RTP 0x2 +-#define EMIF4_TIM2_T_CKE 0x3 ++#define EMIF4_TIM2_T_XSNR 0x1C ++#define EMIF4_TIM2_T_XSRD 0xC8 ++#define EMIF4_TIM2_T_RTP 0x1 ++#define EMIF4_TIM2_T_CKE 0x2 + + #define EMIF4_TIM3_T_TDQSCKMAX 0x0 +-#define EMIF4_TIM3_T_RFC 33 ++#define EMIF4_TIM3_T_RFC 0x25 + #define EMIF4_TIM3_T_RAS_MAX 0x7 + + #define EMIF4_PWR_IDLE 0x2 +@@ -58,7 +58,7 @@ + + #define EMIF4_INITREF_DIS 0x0 + #define EMIF4_PASR 0x0 +-#define EMIF4_REFRESH_RATE 1295 ++#define EMIF4_REFRESH_RATE 0x50F + + #define EMIF4_CFG_SDRAM_TYP 0x2 + #define EMIF4_CFG_IBANK_POS 0x0 +@@ -69,14 +69,21 @@ + #define EMIF4_CFG_SDR_DRV 0x0 + #define EMIF4_CFG_CWL 0x0 + #define EMIF4_CFG_NARROW_MD 0x0 +-#define EMIF4_CFG_CL 0x3 +-#define EMIF4_CFG_ROWSIZE 0x3 ++#define EMIF4_CFG_CL 0x5 ++#define EMIF4_CFG_ROWSIZE 0x0 + #define EMIF4_CFG_IBANK 0x3 + #define EMIF4_CFG_EBANK 0x0 + #define EMIF4_CFG_PGSIZE 0x2 + +-#define EMIF4_DDR1_READ_LAT 0x3 ++/* ++ * EMIF4 PHY Control 1 register configuration ++ */ ++#define EMIF4_DDR1_READ_LAT 0x6 ++#define EMIF4_DDR1_PWRDN_DIS 0x1 ++#define EMIF4_DDR1_STRBEN_EXT 0x1 ++#define EMIF4_DDR1_DLL_MODE 0x0 + #define EMIF4_DDR1_VTP_DYN 0x1 ++#define EMIF4_DDR1_LB_CK_SEL 0x0 + + /* + * Only One NAND allowed on board at a time. +@@ -101,11 +108,15 @@ static u32 gpmc_m_nand[GPMC_MAX_REG] = { + gpmc_csx_t *nand_cs_base; + gpmc_t *gpmc_cfg_base; + ++#if !defined (CONFIG_OMAP3_OMAP3517TEB) + #if defined(CONFIG_ENV_IS_IN_NAND) + #define GPMC_CS 0 + #else + #define GPMC_CS 1 + #endif ++#else ++#define GPMC_CS 2 ++#endif + + #endif + +@@ -252,7 +263,9 @@ void emif4_init(void) + { + unsigned int regval; + /* Set the DDR PHY parameters in PHY ctrl registers */ +- regval = (EMIF4_DDR1_READ_LAT | (EMIF4_DDR1_VTP_DYN << 15)); ++ regval = (EMIF4_DDR1_READ_LAT | (EMIF4_DDR1_VTP_DYN << 15) | ++ (EMIF4_DDR1_STRBEN_EXT << 7) | (EMIF4_DDR1_DLL_MODE << 12) | ++ (EMIF4_DDR1_VTP_DYN << 15) | (EMIF4_DDR1_LB_CK_SEL << 23)); + writel(regval, &emif4_base->ddr_phyctrl1); + writel(regval, &emif4_base->ddr_phyctrl1_shdw); + writel(0, &emif4_base->ddr_phyctrl2); +@@ -261,8 +274,13 @@ void emif4_init(void) + regval = readl(&emif4_base->sdram_iodft_tlgc); + regval |= (1<<10); + writel(regval, &emif4_base->sdram_iodft_tlgc); +- while ((readl(&emif4_base->sdram_sts) & (1<<10)) == 0x0); ++ /*Wait till that bit clears*/ ++ while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x1); ++ /*Re-verify the DDR PHY status*/ ++ while ((readl(&emif4_base->sdram_sts) & (1<<2)) == 0x0); + ++ regval |= (1<<0); ++ writel(regval, &emif4_base->sdram_iodft_tlgc); + /* Set SDR timing registers */ + regval = (EMIF4_TIM1_T_WTR | (EMIF4_TIM1_T_RRD << 3) | + (EMIF4_TIM1_T_RC << 6) | (EMIF4_TIM1_T_RAS << 12) | +diff --git a/cpu/arm_cortexa8/start.S b/cpu/arm_cortexa8/start.S +index 07acdbd..81961ad 100644 +--- a/cpu/arm_cortexa8/start.S ++++ b/cpu/arm_cortexa8/start.S +@@ -108,7 +108,7 @@ reset: + orr r0, r0, #0xd3 + msr cpsr,r0 + +-#if (CONFIG_OMAP34XX) ++#if defined (CONFIG_OMAP34XX) || (CONFIG_OMAP35XX) + /* Copy vectors to mask ROM indirect addr */ + adr r0, _start @ r0 <- current position of code + add r0, r0, #4 @ skip reset vector +diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c +index 6784603..9f7d3e8 100644 +--- a/drivers/i2c/omap24xx_i2c.c ++++ b/drivers/i2c/omap24xx_i2c.c +@@ -109,7 +109,8 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) + + status = wait_for_pin (); + if (status & I2C_STAT_RRDY) { +-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) ++#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) \ ++ || defined(CONFIG_OMAP35XX) + *value = readb (I2C_DATA); + #else + *value = readw (I2C_DATA); +@@ -154,7 +155,8 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) + status = wait_for_pin (); + + if (status & I2C_STAT_XRDY) { +-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) ++#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) \ ++ || defined(CONFIG_OMAP35XX) + /* send out 1 byte */ + writeb (regoffset, I2C_DATA); + writew (I2C_STAT_XRDY, I2C_STAT); +@@ -207,7 +209,8 @@ static void flush_fifo(void) + while(1){ + stat = readw(I2C_STAT); + if(stat == I2C_STAT_RRDY){ +-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) ++#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) \ ++ || defined(CONFIG_OMAP35XX) + readb(I2C_DATA); + #else + readw(I2C_DATA); +diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c +index e90db7e..2d9ec5e 100644 +--- a/drivers/mmc/omap3_mmc.c ++++ b/drivers/mmc/omap3_mmc.c +@@ -57,7 +57,7 @@ block_dev_desc_t *mmc_get_dev(int dev) + { + return (block_dev_desc_t *) &mmc_blk_dev; + } +- ++#if defined (CONFIG_OMAP3_EVM) + void twl4030_mmc_config(void) + { + unsigned char data; +@@ -67,12 +67,14 @@ void twl4030_mmc_config(void) + data = VMMC1_VSEL_30; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); + } +- ++#endif + unsigned char mmc_board_init(void) + { + t2_t *t2_base = (t2_t *)T2_BASE; + ++#if defined (CONFIG_OMAP3_EVM) + twl4030_mmc_config(); ++#endif + + writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | + PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, +diff --git a/include/asm-arm/arch-omap3/mem.h b/include/asm-arm/arch-omap3/mem.h +index 6f0f90b..261f246 100644 +--- a/include/asm-arm/arch-omap3/mem.h ++++ b/include/asm-arm/arch-omap3/mem.h +@@ -145,6 +145,22 @@ typedef enum { + #define SMNAND_GPMC_CONFIG6 0x1F0F0A80 + #define SMNAND_GPMC_CONFIG7 0x00000C44 + ++#if defined (CONFIG_OMAP3_OMAP3517TEB) || defined (CONFIG_OMAP3_OMAP3517EVM) ++ ++#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT ++#define M_NAND_GPMC_CONFIG1 0x00001800 ++#else ++#define M_NAND_GPMC_CONFIG1 0x00000800 ++#endif ++#define M_NAND_GPMC_CONFIG2 0x00061000 ++#define M_NAND_GPMC_CONFIG3 0x00060600 ++#define M_NAND_GPMC_CONFIG4 0x03000602 ++#define M_NAND_GPMC_CONFIG5 0x00080610 ++#define M_NAND_GPMC_CONFIG6 0x04000D80 ++#define M_NAND_GPMC_CONFIG7 0x00000C48 ++ ++#else ++ + #define M_NAND_GPMC_CONFIG1 0x00001800 + #define M_NAND_GPMC_CONFIG2 0x00141400 + #define M_NAND_GPMC_CONFIG3 0x00141400 +@@ -153,6 +169,8 @@ typedef enum { + #define M_NAND_GPMC_CONFIG6 0x1f0f0A80 + #define M_NAND_GPMC_CONFIG7 0x00000C44 + ++#endif ++ + #define STNOR_GPMC_CONFIG1 0x3 + #define STNOR_GPMC_CONFIG2 0x00151501 + #define STNOR_GPMC_CONFIG3 0x00060602 +diff --git a/include/asm-arm/arch-omap3/mux.h b/include/asm-arm/arch-omap3/mux.h +index 5a241cb..d94eb2d 100644 +--- a/include/asm-arm/arch-omap3/mux.h ++++ b/include/asm-arm/arch-omap3/mux.h +@@ -337,7 +337,7 @@ + #define CONTROL_PADCONF_ETK_D14_ES2 0x05F8 + #define CONTROL_PADCONF_ETK_D15_ES2 0x05FA + /*Die to Die */ +-#ifndef CONFIG_OMAP3_OMAP3517EVM ++#if defined (CONFIG_OMAP34XX) + + #define CONTROL_PADCONF_D2D_MCAD0 0x01E4 + #define CONTROL_PADCONF_D2D_MCAD1 0x01E6 +@@ -374,7 +374,7 @@ + #define CONTROL_PADCONF_D2D_MCAD32 0x0224 + #define CONTROL_PADCONF_D2D_MCAD33 0x0226 + +-#else ++#elif defined (CONFIG_OMAP35XX) + + #define CONTROL_PADCONF_CCDC_PCLK 0x01E4 + #define CONTROL_PADCONF_CCDC_FIELD 0x01E6 +diff --git a/include/configs/omap3517evm.h b/include/configs/omap3517evm.h +index 28e3d15..f6f4be1 100644 +--- a/include/configs/omap3517evm.h ++++ b/include/configs/omap3517evm.h +@@ -38,9 +38,9 @@ + */ + #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ + #define CONFIG_OMAP 1 /* in a TI OMAP core */ +-#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +-#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +-#define CONFIG_OMAP3_OMAP3517EVM 1 /* working with EVM */ ++#define CONFIG_OMAP35XX 1 /* which is a 34XX */ ++//#define CONFIG_OMAP3_OMAP3517EVM 1 /* working with EVM */ ++#define CONFIG_OMAP3_OMAP3517TEB 1 /* working with TEB */ + + #include /* get chip and board defs */ + #include +@@ -176,7 +176,7 @@ + "bootm ${loadaddr}\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ +- "onenand read ${loadaddr} 280000 400000; " \ ++ "nand read ${loadaddr} 80000 40000; " \ + "bootm ${loadaddr}\0" \ + + #define CONFIG_BOOTCOMMAND \ +@@ -270,10 +270,8 @@ + + /* Monitor at start of flash */ + #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP + + #define CONFIG_ENV_IS_IN_NAND 1 +-#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ + #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ + + #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0008-OMAP3517PRE-ALPHA-validated-on-OMAP3517PRE_ALPHA-bo.patch b/recipes/u-boot/u-boot-git/omap3evm/0008-OMAP3517PRE-ALPHA-validated-on-OMAP3517PRE_ALPHA-bo.patch new file mode 100644 index 0000000000..0971a411e2 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0008-OMAP3517PRE-ALPHA-validated-on-OMAP3517PRE_ALPHA-bo.patch @@ -0,0 +1,126 @@ +From 1f9233e69952afbf9c116f69ff6ab1fa840f4116 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Sat, 13 Jun 2009 01:14:53 +0530 +Subject: [PATCH 08/16] OMAP3517PRE-ALPHA: validated on OMAP3517PRE_ALPHA board + +OMAP3517 Pre-Alpha board is a development platform +used before actual OMAP3517EVM board, below are the details - + +Validation - + - PLL conifguration + - NAND 16-bit micron part (x-loader, u-boot, Linux) + - MMC1 (x-loader, u-boot, Linux) + - Video (LCD (4.3" Sharp part)) + - Complete NAND boot mode + - Complete MMC boot mode + +Changes - + - GPMC Timing parameters for NAND interface + - UART3 made as serial console + +Issues - + - Clock init code still need to be cleaned up. + - boot config code needs to changed for supporting both mmc and nand + boot +--- + board/omap3/omap3517evm/omap3517evm.h | 6 +++--- + cpu/arm_cortexa8/omap3/clock.c | 6 ++++++ + include/asm-arm/arch-omap3/mem.h | 12 ++++++------ + include/configs/omap3517evm.h | 10 +++++----- + 4 files changed, 20 insertions(+), 14 deletions(-) + +diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h +index d817e93..000fde6 100644 +--- a/board/omap3/omap3517evm/omap3517evm.h ++++ b/board/omap3/omap3517evm/omap3517evm.h +@@ -241,7 +241,7 @@ static void setup_net_chip(void); + MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) /*MCBSP1_FSX*/\ + MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) /*MCBSP1_CLKX */\ + /*Serial Interface*/\ +- MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_*/\ ++ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTU | DIS | M0)) /*UART3_CTS_*/\ + /* RCTX*/\ + MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\ + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\ +@@ -279,8 +279,8 @@ static void setup_net_chip(void); + MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\ + MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\ + MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\ +- MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\ +- MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\ ++ MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) /*McSPI2_CS0*/\ ++ MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) /*McSPI2_CS1*/\ + /*Control and debug */\ + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ +diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c +index a706cd4..d023765 100644 +--- a/cpu/arm_cortexa8/omap3/clock.c ++++ b/cpu/arm_cortexa8/omap3/clock.c +@@ -368,6 +368,12 @@ void per_clocks_enable(void) + /* Enable the ICLK for 32K Sync Timer as its used in udelay */ + sr32(&prcm_base->iclken_wkup, 2, 1, 0x1); + ++ sr32(&prcm_base->fclken1_core, 24, 1, 1); ++ sr32(&prcm_base->iclken_wkup, 24, 1, 1); ++ ++ sr32(&prcm_base->fclken1_core, 25, 1, 1); ++ sr32(&prcm_base->iclken_wkup, 25, 1, 1); ++ + sr32(&prcm_base->fclken_iva2, 0, 32, FCK_IVA2_ON); + sr32(&prcm_base->fclken1_core, 0, 32, FCK_CORE1_ON); + sr32(&prcm_base->iclken1_core, 0, 32, ICK_CORE1_ON); +diff --git a/include/asm-arm/arch-omap3/mem.h b/include/asm-arm/arch-omap3/mem.h +index 261f246..1323030 100644 +--- a/include/asm-arm/arch-omap3/mem.h ++++ b/include/asm-arm/arch-omap3/mem.h +@@ -152,12 +152,12 @@ typedef enum { + #else + #define M_NAND_GPMC_CONFIG1 0x00000800 + #endif +-#define M_NAND_GPMC_CONFIG2 0x00061000 +-#define M_NAND_GPMC_CONFIG3 0x00060600 +-#define M_NAND_GPMC_CONFIG4 0x03000602 +-#define M_NAND_GPMC_CONFIG5 0x00080610 +-#define M_NAND_GPMC_CONFIG6 0x04000D80 +-#define M_NAND_GPMC_CONFIG7 0x00000C48 ++#define M_NAND_GPMC_CONFIG2 0x00080800 ++#define M_NAND_GPMC_CONFIG3 0x00080800 ++#define M_NAND_GPMC_CONFIG4 0x06000600 ++#define M_NAND_GPMC_CONFIG5 0x00080808 ++#define M_NAND_GPMC_CONFIG6 0x000003cf ++#define M_NAND_GPMC_CONFIG7 0x00000848 + + #else + +diff --git a/include/configs/omap3517evm.h b/include/configs/omap3517evm.h +index f6f4be1..558538b 100644 +--- a/include/configs/omap3517evm.h ++++ b/include/configs/omap3517evm.h +@@ -39,8 +39,8 @@ + #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ + #define CONFIG_OMAP 1 /* in a TI OMAP core */ + #define CONFIG_OMAP35XX 1 /* which is a 34XX */ +-//#define CONFIG_OMAP3_OMAP3517EVM 1 /* working with EVM */ +-#define CONFIG_OMAP3_OMAP3517TEB 1 /* working with TEB */ ++#define CONFIG_OMAP3_OMAP3517EVM 1 /* working with EVM */ ++//#define CONFIG_OMAP3_OMAP3517TEB 1 /* working with TEB */ + + #include /* get chip and board defs */ + #include +@@ -83,9 +83,9 @@ + /* + * select serial console configuration + */ +-#define CONFIG_CONS_INDEX 1 +-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 +-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ ++#define CONFIG_CONS_INDEX 3 ++#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 ++#define CONFIG_SERIAL3 3 /* UART1 on OMAP3 EVM */ + + /* allow to overwrite serial and ethaddr */ + #define CONFIG_ENV_OVERWRITE +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0009-OMAP3517PRE-ALPHA-DDR-size-issue-fixed.patch b/recipes/u-boot/u-boot-git/omap3evm/0009-OMAP3517PRE-ALPHA-DDR-size-issue-fixed.patch new file mode 100644 index 0000000000..20a4bb1ffb --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0009-OMAP3517PRE-ALPHA-DDR-size-issue-fixed.patch @@ -0,0 +1,125 @@ +From 930d9fb1e5971e4012ee081c60b578b83d8dc928 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Mon, 15 Jun 2009 20:59:26 +0530 +Subject: [PATCH 09/16] OMAP3517PRE-ALPHA: DDR size issue fixed. + +U-Boot was printing DDR size as 0, as of now hard-coded it with +macro (defined in include/configs/omap3517evm.h). + +TODO: + - Ideally it should calculate the size baded on EMIF configuration + made by primary bootloader (x-loader). +--- + cpu/arm_cortexa8/omap3/board.c | 13 ++----------- + cpu/arm_cortexa8/omap3/mem.c | 17 +++++++++++++++++ + cpu/arm_cortexa8/omap3/sys_info.c | 5 +++++ + include/configs/omap3517evm.h | 5 +++++ + 4 files changed, 29 insertions(+), 11 deletions(-) + +diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c +index 15834fd..ea94e59 100644 +--- a/cpu/arm_cortexa8/omap3/board.c ++++ b/cpu/arm_cortexa8/omap3/board.c +@@ -275,33 +275,24 @@ void watchdog_init(void) + int dram_init(void) + { + DECLARE_GLOBAL_DATA_PTR; +- unsigned int size0 = 0, size1 = 0; ++ unsigned long size0 = 0, size1 = 0; + u32 btype; + + btype = get_board_type(); + + display_board_info(btype); + ++ size0 = get_sdr_cs_size(CS0); + /* + * If a second bank of DDR is attached to CS1 this is + * where it can be started. Early init code will init + * memory on CS0. + */ + if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) { +-#if defined (CONFIG_OMAP35XX) +- emif4_init(); +- /* +- * TODO: Need to implement function to calculate +- * DDR size depending on row and coloum size +- */ +- size0 = 128 * 1024 * 1024; +-#elif defined (CONFIG_OMAP34XX) + do_sdrc_init(CS1, NOT_EARLY); + make_cs1_contiguous(); + +- size0 = get_sdr_cs_size(CS0); + size1 = get_sdr_cs_size(CS1); +-#endif + } + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; +diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c +index 7fb05eb..49047b4 100644 +--- a/cpu/arm_cortexa8/omap3/mem.c ++++ b/cpu/arm_cortexa8/omap3/mem.c +@@ -254,6 +254,23 @@ void do_sdrc_init(u32 cs, u32 early) + writel(0, &sdrc_base->cs[cs].mcfg); + } + ++unsigned long calc_size_from_emif4(int cs) ++{ ++ unsigned int size; ++#if 0 ++ unsigned int reg_pagesize, reg_ebank, reg_ibank, reg_rowsize; ++ ++ /* ++ * TODO: Calculate the DDR size based on EMIF configuration ++ * done by x-loader. ++ */ ++ size = ++#else ++ size = CONFIG_SYS_CS0_SIZE; ++#endif ++ ++ return size; ++} + /******************************************************** + * emif4 _init() - init the emif4 module for DDR access + * - early init routines, called from flash or +diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c +index b385b91..8077ecf 100644 +--- a/cpu/arm_cortexa8/omap3/sys_info.c ++++ b/cpu/arm_cortexa8/omap3/sys_info.c +@@ -107,10 +107,15 @@ u32 get_sdr_cs_size(u32 cs) + { + u32 size; + ++#if defined (CONFIG_OMAP35XX) ++ size = calc_size_from_emif4(cs); ++#elif defined (CONFIG_OMAP34XX) + /* get ram size field */ + size = readl(&sdrc_base->cs[cs].mcfg) >> 8; + size &= 0x3FF; /* remove unwanted bits */ + size *= SZ_2M; /* find size in MB */ ++#endif ++ + return size; + } + +diff --git a/include/configs/omap3517evm.h b/include/configs/omap3517evm.h +index 558538b..c434b71 100644 +--- a/include/configs/omap3517evm.h ++++ b/include/configs/omap3517evm.h +@@ -67,6 +67,11 @@ + /* initial data */ + + /* ++ * DDR size interfaced ++ */ ++#define CONFIG_SYS_CS0_SIZE SZ_256M ++ ++/* + * Hardware drivers + */ + +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0010-OMAP3517PRE-ALPHA-Mux-configuration-for-MMC-CD-and.patch b/recipes/u-boot/u-boot-git/omap3evm/0010-OMAP3517PRE-ALPHA-Mux-configuration-for-MMC-CD-and.patch new file mode 100644 index 0000000000..22cd35863b --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0010-OMAP3517PRE-ALPHA-Mux-configuration-for-MMC-CD-and.patch @@ -0,0 +1,34 @@ +From be213a61e04fe2427c51d3687ec82d2cd8741d8c Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Tue, 16 Jun 2009 03:54:56 +0530 +Subject: [PATCH 10/16] OMAP3517PRE-ALPHA: Mux configuration for MMC CD and WP pins + +The Mux configuration changed for MMC1 Card Detect and Write Protect +GPIO pins - + +Card Detect --> MMC_DAT5 = GPIO127 +Write Protect --> MMC_DAT4 = GPIO126 +--- + board/omap3/omap3517evm/omap3517evm.h | 6 ++++-- + 1 files changed, 4 insertions(+), 2 deletions(-) + +diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h +index 000fde6..c3ea037 100644 +--- a/board/omap3/omap3517evm/omap3517evm.h ++++ b/board/omap3/omap3517evm/omap3517evm.h +@@ -196,8 +196,10 @@ static void setup_net_chip(void); + MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) /*MMC1_DAT1*/\ + MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) /*MMC1_DAT2*/\ + MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) /*MMC1_DAT3*/\ +- MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | DIS | M0)) /*MMC1_DAT4*/\ +- MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | DIS | M0)) /*MMC1_DAT5*/\ ++ MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) /*MMC1_DAT4,\ ++ WriteProtect*/\ ++ MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) /*MMC1_DAT5,\ ++ CardDetect*/\ + MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | DIS | M0)) /*MMC1_DAT6*/\ + MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | DIS | M0)) /*MMC1_DAT7*/\ + /*Wireless LAN */\ +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0011-Ethernet-driver-functional-no-need-for-time-delay.patch b/recipes/u-boot/u-boot-git/omap3evm/0011-Ethernet-driver-functional-no-need-for-time-delay.patch new file mode 100644 index 0000000000..aff49a47ef --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0011-Ethernet-driver-functional-no-need-for-time-delay.patch @@ -0,0 +1,488 @@ +From f6ee297c14693474a28948432d274bc2801b7578 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Mon, 22 Jun 2009 23:40:44 +0530 +Subject: [PATCH 11/16] Ethernet driver functional(no need for time delay) + +Pulled up from branch omap-uboot-denx/int_030000_evm_bringup. +--- + board/omap3/omap3517evm/omap3517evm.c | 6 +- + board/omap3/omap3517evm/omap3517evm.h | 18 ++-- + drivers/net/ticpgmac.c | 139 ++++++++++++++++++++------------- + include/asm-arm/arch-omap3/ticpgmac.h | 14 ++-- + include/configs/omap3517evm.h | 1 + + net/tftp.c | 4 +- + 6 files changed, 109 insertions(+), 73 deletions(-) + +diff --git a/board/omap3/omap3517evm/omap3517evm.c b/board/omap3/omap3517evm/omap3517evm.c +index 2330776..bf304e3 100644 +--- a/board/omap3/omap3517evm/omap3517evm.c ++++ b/board/omap3/omap3517evm/omap3517evm.c +@@ -65,7 +65,11 @@ int misc_init_r(void) + #endif + + #if defined(CONFIG_CMD_NET) +- setup_net_chip(); ++ //setup_net_chip(); ++ if (!eth_hw_init()) { ++ printf("error:Ethernet init failed\n"); ++ } ++ + #endif + + dieid_num_r(); +diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h +index c3ea037..65276b8 100644 +--- a/board/omap3/omap3517evm/omap3517evm.h ++++ b/board/omap3/omap3517evm/omap3517evm.h +@@ -337,15 +337,15 @@ static void setup_net_chip(void); + MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | EN | M0)) /*ccdc_data5*/\ + MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | EN | M0)) /*ccdc_data6*/\ + MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | EN | M0)) /*ccdc_data7*/\ +- MUX_VAL(CP(RMII_MDIO_DATA), (IEN | PTD | EN | M0)) /*rmii_mdio_data*/\ +- MUX_VAL(CP(RMII_MDIO_CLK), (IEN | PTD | EN | M0)) /*rmii_mdio_clk*/\ +- MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | EN | M0)) /*rmii_rxd0*/\ +- MUX_VAL(CP(RMII_RXD1), (IEN | PTD | EN | M0)) /*rmii_rxd1*/\ +- MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | EN | M0)) /*rmii_crs_dv*/\ +- MUX_VAL(CP(RMII_RXER), (IEN | PTD | EN | M0)) /*rmii_rxer*/\ +- MUX_VAL(CP(RMII_TXD0), (IEN | PTD | EN | M0)) /*rmii_txd0*/\ +- MUX_VAL(CP(RMII_TXD1), (IEN | PTD | EN | M0)) /*rmii_txd1*/\ +- MUX_VAL(CP(RMII_TXEN), (IEN | PTD | EN | M0)) /*rmii_txen*/\ ++ MUX_VAL(CP(RMII_MDIO_DATA), (PTD | M0)) /*rmii_mdio_data*/\ ++ MUX_VAL(CP(RMII_MDIO_CLK), (PTD | M0)) /*rmii_mdio_clk*/\ ++ MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) /*rmii_rxd0*/\ ++ MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) /*rmii_rxd1*/\ ++ MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) /*rmii_crs_dv*/\ ++ MUX_VAL(CP(RMII_RXER), (PTD | M0)) /*rmii_rxer*/\ ++ MUX_VAL(CP(RMII_TXD0), (PTD | M0)) /*rmii_txd0*/\ ++ MUX_VAL(CP(RMII_TXD1), (PTD | M0)) /*rmii_txd1*/\ ++ MUX_VAL(CP(RMII_TXEN), (PTD | M0)) /*rmii_txen*/\ + MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) /*rmii_50mhz_clk*/\ + MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) /*usb0_drvbus*/\ + MUX_VAL(CP(HECCL_TXD), (IEN | PTD | EN | M0)) /*heccl_txd*/\ +diff --git a/drivers/net/ticpgmac.c b/drivers/net/ticpgmac.c +index e83b951..350fb9b 100644 +--- a/drivers/net/ticpgmac.c ++++ b/drivers/net/ticpgmac.c +@@ -42,25 +42,34 @@ + #include + #include + ++ ++#define STATIC ++#define PRINTF(args,...) ++ + #ifdef CONFIG_DRIVER_TI_EMAC + + #ifdef CONFIG_CMD_NET + +-unsigned int emac_dbg = 0; ++unsigned int emac_dbg = 1; + #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args) + ++#define BD_TO_HW(x) \ ++ ( ( (x) == 0) ? 0 : ( (x) - EMAC_WRAPPER_RAM_ADDR + EMAC_HW_RAM_ADDR )) ++#define HW_TO_BD(x) \ ++ ( ( (x) == 0) ? 0 : ( (x) - EMAC_HW_RAM_ADDR + EMAC_WRAPPER_RAM_ADDR )) ++ + /* Internal static functions */ +-static int cpgmac_eth_hw_init (void); +-static int cpgmac_eth_open (void); +-static int cpgmac_eth_close (void); +-static int cpgmac_eth_send_packet (volatile void *packet, int length); +-static int cpgmac_eth_rcv_packet (void); +-static void cpgmac_eth_mdio_enable(void); +- +-static int gen_init_phy(int phy_addr); +-static int gen_is_phy_connected(int phy_addr); +-static int gen_get_link_status(int phy_addr); +-static int gen_auto_negotiate(int phy_addr); ++STATIC int cpgmac_eth_hw_init (void); ++STATIC int cpgmac_eth_open (void); ++STATIC int cpgmac_eth_close (void); ++STATIC int cpgmac_eth_send_packet (volatile void *packet, int length); ++STATIC int cpgmac_eth_rcv_packet (void); ++STATIC void cpgmac_eth_mdio_enable(void); ++ ++STATIC int gen_init_phy(int phy_addr); ++STATIC int gen_is_phy_connected(int phy_addr); ++STATIC int gen_get_link_status(int phy_addr); ++STATIC int gen_auto_negotiate(int phy_addr); + + /* Wrappers exported to the U-Boot proper */ + int eth_hw_init(void) +@@ -96,7 +105,7 @@ void eth_mdio_enable(void) + + /* cpgmac_eth_mac_addr[0] goes out on the wire first */ + +-static u_int8_t cpgmac_eth_mac_addr[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0x00 }; ++STATIC u_int8_t cpgmac_eth_mac_addr[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0x00 }; + + /* + * This function must be called before emac_open() if you want to override +@@ -112,26 +121,26 @@ void cpgmac_eth_set_mac_addr(const u_int8_t *addr) + } + + /* EMAC Addresses */ +-static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; +-static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; +-static volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR; ++STATIC volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; ++STATIC volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; ++STATIC volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR; + + /* EMAC descriptors */ +-static volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE); +-static volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE); +-static volatile emac_desc *emac_rx_active_head = 0; +-static volatile emac_desc *emac_rx_active_tail = 0; +-static int emac_rx_queue_active = 0; ++STATIC volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE); ++STATIC volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE); ++STATIC volatile emac_desc *emac_rx_active_head = 0; ++STATIC volatile emac_desc *emac_rx_active_tail = 0; ++STATIC int emac_rx_queue_active = 0; + + /* Receive packet buffers */ +-static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; ++STATIC unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; + + /* PHY address for a discovered PHY (0xff - not found) */ +-static volatile u_int8_t active_phy_addr = 0xff; ++STATIC volatile u_int8_t active_phy_addr = 0xff; + +-static int no_phy_init (int phy_addr) { return(1); } +-static int no_phy_is_connected (int phy_addr) { return(1); } +-static int no_phy_get_link_status (int phy_addr) ++STATIC int no_phy_init (int phy_addr) { return(1); } ++STATIC int no_phy_is_connected (int phy_addr) { return(1); } ++STATIC int no_phy_get_link_status (int phy_addr) + { + adap_emac->MACCONTROL = (EMAC_MACCONTROL_MIIEN_ENABLE + | EMAC_MACCONTROL_FULLDUPLEX_ENABLE); +@@ -140,7 +149,7 @@ static int no_phy_get_link_status (int phy_addr) + #endif + return 1; + } +-static int no_phy_auto_negotiate (int phy_addr) { return(1); } ++STATIC int no_phy_auto_negotiate (int phy_addr) { return(1); } + phy_t phy = { + .init = no_phy_init, + .is_phy_connected = no_phy_is_connected, +@@ -148,7 +157,7 @@ phy_t phy = { + .auto_negotiate = no_phy_auto_negotiate + }; + +-static void cpgmac_eth_mdio_enable(void) ++STATIC void cpgmac_eth_mdio_enable(void) + { + u_int32_t clkdiv; + +@@ -168,7 +177,7 @@ static void cpgmac_eth_mdio_enable(void) + * returns 2 + * Sets active_phy_addr variable when returns 1. + */ +-static int cpgmac_eth_phy_detect(void) ++STATIC int cpgmac_eth_phy_detect(void) + { + u_int32_t phy_act_state; + int i; +@@ -238,7 +247,7 @@ int cpgmac_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) + } + + /* PHY functions for a generic PHY */ +-static int gen_init_phy(int phy_addr) ++STATIC int gen_init_phy(int phy_addr) + { + int ret = 1; + +@@ -250,14 +259,14 @@ static int gen_init_phy(int phy_addr) + return(ret); + } + +-static int gen_is_phy_connected(int phy_addr) ++STATIC int gen_is_phy_connected(int phy_addr) + { + u_int16_t dummy; + + return(cpgmac_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy)); + } + +-static int gen_get_link_status(int phy_addr) ++STATIC int gen_get_link_status(int phy_addr) + { + u_int16_t tmp; + +@@ -288,7 +297,7 @@ static int gen_get_link_status(int phy_addr) + return(0); + } + +-static int gen_auto_negotiate(int phy_addr) ++STATIC int gen_auto_negotiate(int phy_addr) + { + u_int16_t tmp; + +@@ -313,12 +322,12 @@ static int gen_auto_negotiate(int phy_addr) + + + #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) +-static int cpgmac_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) ++STATIC int cpgmac_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) + { + return(cpgmac_eth_phy_read(addr, reg, value) ? 0 : 1); + } + +-static int cpgmac_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) ++STATIC int cpgmac_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) + { + return(cpgmac_eth_phy_write(addr, reg, value) ? 0 : 1); + } +@@ -336,7 +345,7 @@ int cpgmac_eth_miiphy_initialize(bd_t *bis) + * EMAC modules power or pin multiplexors, that is done by board_init() + * much earlier in bootup process. Returns 1 on success, 0 otherwise. + */ +-static int cpgmac_eth_hw_init(void) ++STATIC int cpgmac_eth_hw_init(void) + { + u_int32_t phy_id; + u_int16_t tmp; +@@ -395,7 +404,7 @@ static int cpgmac_eth_hw_init(void) + + + /* Eth device open */ +-static int cpgmac_eth_open(void) ++STATIC int cpgmac_eth_open(void) + { + dv_reg_p addr; + u_int32_t clkdiv, cnt; +@@ -467,7 +476,7 @@ static int cpgmac_eth_open(void) + /* Create RX queue and set receive process in place */ + emac_rx_active_head = emac_rx_desc; + for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) { +- rx_desc->next = (u_int32_t)(rx_desc + 1); ++ rx_desc->next =BD_TO_HW( (u_int32_t)(rx_desc + 1) ); + rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; + rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; + rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; +@@ -500,7 +509,7 @@ static int cpgmac_eth_open(void) + return(0); + + /* Start receive process */ +- adap_emac->RX0HDP = (u_int32_t)emac_rx_desc; ++ adap_emac->RX0HDP = BD_TO_HW((u_int32_t)emac_rx_desc); + + debug_emac("- emac_open\n"); + +@@ -508,7 +517,7 @@ static int cpgmac_eth_open(void) + } + + /* EMAC Channel Teardown */ +-static void cpgmac_eth_ch_teardown(int ch) ++STATIC void cpgmac_eth_ch_teardown(int ch) + { + dv_reg dly = 0xff; + dv_reg cnt; +@@ -551,7 +560,7 @@ static void cpgmac_eth_ch_teardown(int ch) + } + + /* Eth device close */ +-static int cpgmac_eth_close(void) ++STATIC int cpgmac_eth_close(void) + { + debug_emac("+ emac_close\n"); + +@@ -570,13 +579,13 @@ static int cpgmac_eth_close(void) + return(1); + } + +-static int tx_send_loop = 0; ++STATIC int tx_send_loop = 0; + + /* + * This function sends a single packet on the network and returns + * positive number (number of bytes transmitted) or negative for error + */ +-static int cpgmac_eth_send_packet (volatile void *packet, int length) ++STATIC int cpgmac_eth_send_packet (volatile void *packet, int length) + { + int ret_status = -1; + tx_send_loop = 0; +@@ -600,17 +609,30 @@ static int cpgmac_eth_send_packet (volatile void *packet, int length) + EMAC_CPPI_SOP_BIT | + EMAC_CPPI_OWNERSHIP_BIT | + EMAC_CPPI_EOP_BIT); ++ ++ if (!phy.get_link_status (active_phy_addr)) { ++ printf("Link down . Abort Tx - pHY %d\n",active_phy_addr); ++ cpgmac_eth_ch_teardown (EMAC_CH_TX); ++ return (ret_status); ++ } ++ + /* Send the packet */ +- adap_emac->TX0HDP = (unsigned int) emac_tx_desc; ++ adap_emac->TX0HDP = BD_TO_HW((unsigned int) emac_tx_desc); ++ PRINTF("Send: BD=0x%X BF=0x%x len=%d \n", emac_tx_desc, emac_tx_desc->buffer, length); ++// udelay(2500); + + /* Wait for packet to complete or link down */ + while (1) { ++ #if 0 + if (!phy.get_link_status (active_phy_addr)) { ++ printf("Link down . Abort Tx - pHY %d\n",active_phy_addr); + cpgmac_eth_ch_teardown (EMAC_CH_TX); + return (ret_status); + } ++ #endif + if (adap_emac->TXINTSTATRAW & 0x01) { + ret_status = length; ++ //PRINTF("Send Complete: BD=0x%X BF=0x%x len=%d \n", emac_tx_desc, emac_tx_desc->buffer, length); + break; + } + tx_send_loop++; +@@ -622,7 +644,7 @@ static int cpgmac_eth_send_packet (volatile void *packet, int length) + /* + * This function handles receipt of a packet from the network + */ +-static int cpgmac_eth_rcv_packet (void) ++STATIC int cpgmac_eth_rcv_packet (void) + { + volatile emac_desc *rx_curr_desc; + volatile emac_desc *curr_desc; +@@ -642,18 +664,21 @@ static int cpgmac_eth_rcv_packet (void) + } + + /* Ack received packet descriptor */ +- adap_emac->RX0CP = (unsigned int) rx_curr_desc; ++ adap_emac->RX0CP = BD_TO_HW((unsigned int) rx_curr_desc); + curr_desc = rx_curr_desc; + emac_rx_active_head = +- (volatile emac_desc *) rx_curr_desc->next; ++ (volatile emac_desc *) (HW_TO_BD(rx_curr_desc->next)); ++ PRINTF("New Rx Active head 0x%x \n",emac_rx_active_head); ++ + + if (status & EMAC_CPPI_EOQ_BIT) { + if (emac_rx_active_head) { + adap_emac->RX0HDP = +- (unsigned int) emac_rx_active_head; ++ BD_TO_HW((unsigned int) emac_rx_active_head); ++ PRINTF("Rx EOQ reset HDP for misqueued pkt 0x%x \n",emac_rx_active_head); + } else { + emac_rx_queue_active = 0; +- printf ("INFO:emac_rcv_packet: RX Queue not active\n"); ++ PRINTF ("INFO:emac_rcv_packet: RX Queue not active\n"); + } + } + +@@ -663,24 +688,28 @@ static int cpgmac_eth_rcv_packet (void) + rx_curr_desc->next = 0; + + if (emac_rx_active_head == 0) { +- printf ("INFO: emac_rcv_pkt: active queue head = 0\n"); ++ // printf ("INFO: emac_rcv_pkt: active queue head = 0\n"); ++ PRINTF(" Rx active head NULL, set head/tail to 0x%x",curr_desc); + emac_rx_active_head = curr_desc; + emac_rx_active_tail = curr_desc; +- if (emac_rx_queue_active != 0) { ++ if (emac_rx_queue_active == 0) { + adap_emac->RX0HDP = +- (unsigned int) emac_rx_active_head; +- printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n"); ++ BD_TO_HW((unsigned int) emac_rx_active_head); ++ //printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n"); ++ PRINTF("Rx Q inactive , set HDP to 0x%x \n", emac_rx_active_head); + emac_rx_queue_active = 1; + } + } else { ++ PRINTF("Append 0x%x to tail \n", curr_desc); + tail_desc = emac_rx_active_tail; + emac_rx_active_tail = curr_desc; +- tail_desc->next = (unsigned int) curr_desc; ++ tail_desc->next = BD_TO_HW((unsigned int) curr_desc); + status = tail_desc->pkt_flag_len; + if (status & EMAC_CPPI_EOQ_BIT) { +- adap_emac->RX0HDP = (unsigned int) curr_desc; + status &= ~EMAC_CPPI_EOQ_BIT; + tail_desc->pkt_flag_len = status; ++ adap_emac->RX0HDP = BD_TO_HW((unsigned int) curr_desc); ++ PRINTF("Restart the Q in tail append case\n"); + } + } + return (ret); +diff --git a/include/asm-arm/arch-omap3/ticpgmac.h b/include/asm-arm/arch-omap3/ticpgmac.h +index d7d77c9..10ec187 100644 +--- a/include/asm-arm/arch-omap3/ticpgmac.h ++++ b/include/asm-arm/arch-omap3/ticpgmac.h +@@ -36,20 +36,22 @@ + #ifndef _TI_CPGMAC_H_ + #define _TI_CPGMAC_H_ + +-#define DAVINCI_EMAC_CNTRL_REGS_BASE 0 +-#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0 +-#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0 ++#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x5C010000 ++#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x5C000000 ++#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x5C020000 + + #define EMAC_BASE_ADDR DAVINCI_EMAC_CNTRL_REGS_BASE + #define EMAC_WRAPPER_BASE_ADDR DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE + #define EMAC_WRAPPER_RAM_ADDR DAVINCI_EMAC_WRAPPER_RAM_BASE + #define EMAC_MDIO_BASE_ADDR 0x5C030000 + ++#define EMAC_HW_RAM_ADDR 0x01E20000 ++ + /* MDIO module input frequency */ +-#define EMAC_MDIO_BUS_FREQ 26000000 /* 26 MHZ check */ ++#define EMAC_MDIO_BUS_FREQ 166000000 /* 166 MHZ check */ + + /* MDIO clock output frequency */ +-#define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */ ++#define EMAC_MDIO_CLOCK_FREQ 1000000 /* 2.0 MHz */ + + /* Ethernet Min/Max packet size */ + #define EMAC_MIN_ETHERNET_PKT_SIZE 60 +@@ -59,7 +61,7 @@ + /* Number of RX packet buffers + * NOTE: Only 1 buffer supported as of now + */ +-#define EMAC_MAX_RX_BUFFERS 10 ++#define EMAC_MAX_RX_BUFFERS 8 + + + /*********************************************** +diff --git a/include/configs/omap3517evm.h b/include/configs/omap3517evm.h +index c434b71..9fe3f72 100644 +--- a/include/configs/omap3517evm.h ++++ b/include/configs/omap3517evm.h +@@ -332,6 +332,7 @@ extern unsigned int boot_flash_type; + #if defined(CONFIG_CMD_NET) + #define CONFIG_TICPGMAC + #define CONFIG_DRIVER_TI_EMAC ++#define CONFIG_DRIVER_TI_EMAC_USE_RMII + #define CONFIG_MII + #define CONFIG_NET_RETRY_COUNT 10 + #endif /* (CONFIG_CMD_NET) */ +diff --git a/net/tftp.c b/net/tftp.c +index 3dac3d8..c779b88 100644 +--- a/net/tftp.c ++++ b/net/tftp.c +@@ -65,7 +65,7 @@ static int TftpState; + #define STATE_BAD_MAGIC 4 + #define STATE_OACK 5 + +-#define TFTP_BLOCK_SIZE 512 /* default TFTP block size */ ++#define TFTP_BLOCK_SIZE 512 /* default TFTP block size */ + #define TFTP_SEQUENCE_SIZE ((ulong)(1<<16)) /* sequence number is 16 bit */ + + #define DEFAULT_NAME_LEN (8 + 4 + 1) +@@ -87,7 +87,7 @@ extern flash_info_t flash_info[]; + * Minus eth.hdrs thats 1468. Can get 2x better throughput with + * almost-MTU block sizes. At least try... fall back to 512 if need be. + */ +-#define TFTP_MTU_BLOCKSIZE 1468 ++#define TFTP_MTU_BLOCKSIZE 512 + static unsigned short TftpBlkSize=TFTP_BLOCK_SIZE; + static unsigned short TftpBlkSizeOption=TFTP_MTU_BLOCKSIZE; + +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0012-EMAC-driver-Implement-GPIO-driven-PHY-reset.patch b/recipes/u-boot/u-boot-git/omap3evm/0012-EMAC-driver-Implement-GPIO-driven-PHY-reset.patch new file mode 100644 index 0000000000..4650ecba16 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0012-EMAC-driver-Implement-GPIO-driven-PHY-reset.patch @@ -0,0 +1,319 @@ +From 2cd2cbb5b87695b85471ceecf314146de0dba77e Mon Sep 17 00:00:00 2001 +From: Sriram +Date: Thu, 18 Jun 2009 01:53:03 +0530 +Subject: [PATCH 12/16] EMAC driver: Implement GPIO driven PHY reset. + +--- + board/omap3/omap3517evm/omap3517evm.c | 33 ++++++++++- + board/omap3/omap3517evm/omap3517evm.h | 6 +- + drivers/net/ticpgmac.c | 104 ++++++++++++++++++++++++++++++--- + include/asm-arm/arch-omap3/mux.h | 1 + + include/asm-arm/arch-omap3/ticpgmac.h | 17 +++++ + 5 files changed, 149 insertions(+), 12 deletions(-) + +diff --git a/board/omap3/omap3517evm/omap3517evm.c b/board/omap3/omap3517evm/omap3517evm.c +index bf304e3..0f8dc74 100644 +--- a/board/omap3/omap3517evm/omap3517evm.c ++++ b/board/omap3/omap3517evm/omap3517evm.c +@@ -65,7 +65,8 @@ int misc_init_r(void) + #endif + + #if defined(CONFIG_CMD_NET) +- //setup_net_chip(); ++ /* Drive the PHY reset thru GPIO 30 */ ++ setup_net_chip(); + if (!eth_hw_init()) { + printf("error:Ethernet init failed\n"); + } +@@ -95,6 +96,7 @@ void set_muxconf_regs(void) + *****************************************************************************/ + static void setup_net_chip(void) + { ++ #if 0 + gpio_t *gpio3_base = (gpio_t *)OMAP34XX_GPIO3_BASE; + gpmc_csx_t *gpmc_cs6_base = (gpmc_csx_t *)GPMC_CONFIG_CS6_BASE; + ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE; +@@ -125,4 +127,33 @@ static void setup_net_chip(void) + writel(GPIO0, &gpio3_base->cleardataout); + udelay(1); + writel(GPIO0, &gpio3_base->setdataout); ++ #else ++ volatile unsigned int ctr; ++ ++ gpio_t *gpio1_base = (gpio_t *)OMAP34XX_GPIO1_BASE; ++ ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE; ++ ++ ++ /* Make GPIO 30 as output pin */ ++ writel(readl(&gpio1_base->oe) & ~(GPIO30), &gpio1_base->oe); ++ ++ /* Now send a pulse on the GPIO pin */ ++ printf("Driving GPIO 30 low \n"); ++ writel(GPIO30, &gpio1_base->cleardataout); ++ ctr = 0; ++ do{ ++ udelay(1000); ++ ctr++; ++ }while (ctr <300); ++ ++ printf("Driving GPIO 30 high \n"); ++ writel(GPIO30, &gpio1_base->setdataout); ++ ctr =0; ++ /* allow the PHY to stabilize and settle down */ ++ do{ ++ udelay(1000); ++ ctr++; ++ }while (ctr <300); ++ ++ #endif + } +diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h +index 65276b8..074d4ff 100644 +--- a/board/omap3/omap3517evm/omap3517evm.h ++++ b/board/omap3/omap3517evm/omap3517evm.h +@@ -287,6 +287,8 @@ static void setup_net_chip(void); + MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ + MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ + MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ ++ MUX_VAL(CP(SYS_NRESWARM), (IDIS | PTU | DIS | M4)) /*SYS_nRESWARM */\ ++ /* GPIO 30 */\ + MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ + /* - PEN_IRQ */\ + MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ +@@ -337,8 +339,8 @@ static void setup_net_chip(void); + MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | EN | M0)) /*ccdc_data5*/\ + MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | EN | M0)) /*ccdc_data6*/\ + MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | EN | M0)) /*ccdc_data7*/\ +- MUX_VAL(CP(RMII_MDIO_DATA), (PTD | M0)) /*rmii_mdio_data*/\ +- MUX_VAL(CP(RMII_MDIO_CLK), (PTD | M0)) /*rmii_mdio_clk*/\ ++ MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) /*rmii_mdio_data*/\ ++ MUX_VAL(CP(RMII_MDIO_CLK), (M0)) /*rmii_mdio_clk*/\ + MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) /*rmii_rxd0*/\ + MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) /*rmii_rxd1*/\ + MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) /*rmii_crs_dv*/\ +diff --git a/drivers/net/ticpgmac.c b/drivers/net/ticpgmac.c +index 350fb9b..eeff23b 100644 +--- a/drivers/net/ticpgmac.c ++++ b/drivers/net/ticpgmac.c +@@ -268,26 +268,44 @@ STATIC int gen_is_phy_connected(int phy_addr) + + STATIC int gen_get_link_status(int phy_addr) + { +- u_int16_t tmp; ++ u_int16_t tmp,lpa_val,val; + + if (cpgmac_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) + && (tmp & 0x04)) { ++ //printf("Phy %d MII_Status Reg=0x%x \n",phy_addr,tmp); ++ //printf("MACCTRL 0x%x\n",adap_emac->MACCONTROL); + ++ cpgmac_eth_phy_read(phy_addr,MII_CTRL_REG,&val); ++ //printf("Phy CTRL=0x%x \n",val); ++ ++ cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG,&val); ++ // printf("Phy ANEG ADV=0x%x \n",val); ++ ++ cpgmac_eth_phy_read(phy_addr,ANEG_LPA_REG,&lpa_val); ++ //printf("Phy ANEG LPA=0x%x \n",lpa_val); ++ + /* Speed doesn't matter, there is no setting for it in EMAC. */ +- if (tmp & GEN_PHY_STATUS_FD_MASK) { ++ //if (tmp & GEN_PHY_STATUS_FD_MASK) { ++ if (lpa_val & (GEN_PHY_ANEG_100DUP | GEN_PHY_ANEG_10DUP ) ) { + /* set EMAC for Full Duplex */ ++ // printf("Set MACCTRL for full duplex \n"); + adap_emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | + EMAC_MACCONTROL_FULLDUPLEX_ENABLE; + } else { + /*set EMAC for Half Duplex */ + adap_emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE; ++ // printf("Set MACCTRL for HALF duplex \n"); + } + + #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII +- if(tmp & GEN_PHY_STATUS_SPEED100_MASK) { ++ //if(tmp & GEN_PHY_STATUS_SPEED100_MASK) { ++ if (lpa_val & (GEN_PHY_ANEG_100DUP | GEN_PHY_ANEG_100TX ) ) { + adap_emac->MACCONTROL |= EMAC_MACCONTROL_RMIISPEED_100; ++ // printf("Set maccontrol for RMII 100 - 0x%x\n",adap_emac->MACCONTROL); ++ + } else { + adap_emac->MACCONTROL &= ~EMAC_MACCONTROL_RMIISPEED_100; ++ printf("Set maccontrol for RMII 10 - 0x%x\n",adap_emac->MACCONTROL); + } + #endif + +@@ -299,20 +317,62 @@ STATIC int gen_get_link_status(int phy_addr) + + STATIC int gen_auto_negotiate(int phy_addr) + { +- u_int16_t tmp; ++ u_int16_t tmp,val; ++ unsigned long cntr =0; + + if (!cpgmac_eth_phy_read(phy_addr, PHY_BMCR, &tmp)) + return(0); + ++ printf("read BMCR 0x%x\n",tmp); ++ ++ val = tmp | GEN_PHY_CTRL_DUP | GEN_PHY_CTRL_ENA_ANEG | GEN_PHY_CTRL_SPD_SEL ; ++ cpgmac_eth_phy_write(phy_addr, PHY_BMCR, val); ++ cpgmac_eth_phy_read(phy_addr, PHY_BMCR, &val); ++ printf("BMCR set to 0x%X \n",val); ++ ++ cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG, &val); ++ printf("read ANEG 0x%x \n",val); ++ val |= ( GEN_PHY_ANEG_100DUP | GEN_PHY_ANEG_100TX | GEN_PHY_ANEG_10DUP | GEN_PHY_ANEG_10TX ); ++ printf("writing back 0x%x \n",val); ++ cpgmac_eth_phy_write(phy_addr, ANEG_ADVERTISE_REG, val); ++ cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG, &val); ++ printf("ANEG ADVT set to 0x%x \n", val); ++ ++ ++ printf("Restart Auto-negn \n"); ++ cpgmac_eth_phy_read(phy_addr, PHY_BMCR, &tmp); ++ + /* Restart Auto_negotiation */ +- tmp |= PHY_BMCR_AUTON; ++ tmp |= PHY_BMCR_RST_NEG; ++ printf("writing bk 0x%x to BMCR for anegn \n",tmp); + cpgmac_eth_phy_write(phy_addr, PHY_BMCR, tmp); + + /*check AutoNegotiate complete */ +- udelay (10000); ++ //udelay (10000); ++ do{ ++ udelay(40000); ++ cntr++; ++ }while(cntr < 150 ); ++ + if (!cpgmac_eth_phy_read(phy_addr, PHY_BMSR, &tmp)) + return(0); ++ printf("BMSR after negn 0x%X\n",tmp); + ++ cpgmac_eth_phy_read(phy_addr,MII_CTRL_REG,&val); ++ printf("Phy CTRL=0x%x \n",val); ++ ++ cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG,&val); ++ printf("Phy ANEG ADV=0x%x \n",val); ++ ++ cpgmac_eth_phy_read(phy_addr,ANEG_LPA_REG,&val); ++ printf("Phy ANEG LPA=0x%x \n",val); ++ ++ cpgmac_eth_phy_read(phy_addr,ANEG_EXP_REG,&val); ++ printf("Phy ANEG eXP=0x%x \n",val); ++ ++ cpgmac_eth_phy_read(phy_addr,SPL_VEND_REG,&val); ++ printf("Phy SPL VEND =0x%x \n",val); ++ + if (!(tmp & PHY_BMSR_AUTN_COMP)) + return(0); + +@@ -324,16 +384,20 @@ STATIC int gen_auto_negotiate(int phy_addr) + #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) + STATIC int cpgmac_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) + { ++ printf("MII Phy read \n"); + return(cpgmac_eth_phy_read(addr, reg, value) ? 0 : 1); + } + + STATIC int cpgmac_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) + { ++ ++ printf("MII Phy write \n"); + return(cpgmac_eth_phy_write(addr, reg, value) ? 0 : 1); + } + + int cpgmac_eth_miiphy_initialize(bd_t *bis) + { ++ printf("MIIPHY initialize \n"); + miiphy_register(phy.name, cpgmac_mii_phy_read, cpgmac_mii_phy_write); + + return(1); +@@ -399,6 +463,28 @@ STATIC int cpgmac_eth_hw_init(void) + + printf("Ethernet PHY: %s\n", phy.name); + ++ /* Override HW configuration value that were latched */ ++ cpgmac_eth_phy_read(active_phy_addr, SPL_VEND_REG, &tmp); ++ printf("read HW config for PHY 0x%x\n",tmp); ++// tmp |= (1 << 14) | ( 7 << 5) ; ++ tmp = 0x60e0; ++ printf("Program HW config as 0x%x \n",tmp); ++ cpgmac_eth_phy_write(active_phy_addr,SPL_VEND_REG,tmp); ++ ++ /* Soft reset the PHY */ ++ cpgmac_eth_phy_write(active_phy_addr, PHY_BMCR, (1 << 15)); ++ ++ active_phy_addr = 0; ++ ++ do ++ { ++ cpgmac_eth_phy_read(active_phy_addr, PHY_BMCR , &tmp); ++ ++ }while (tmp & (1 << 15)); ++ ++ ++ ++ + return(1); + } + +@@ -505,7 +591,7 @@ STATIC int cpgmac_eth_open(void) + clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; + adap_mdio->CONTROL = ((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT); + +- if (!phy.get_link_status(active_phy_addr)) ++ if (!phy.auto_negotiate(active_phy_addr)) + return(0); + + /* Start receive process */ +diff --git a/include/asm-arm/arch-omap3/mux.h b/include/asm-arm/arch-omap3/mux.h +index d94eb2d..3e4a2ee 100644 +--- a/include/asm-arm/arch-omap3/mux.h ++++ b/include/asm-arm/arch-omap3/mux.h +@@ -284,6 +284,7 @@ + #define CONTROL_PADCONF_SYS_32K 0x0A04 + #define CONTROL_PADCONF_SYS_CLKREQ 0x0A06 + #define CONTROL_PADCONF_SYS_NIRQ 0x01E0 ++#define CONTROL_PADCONF_SYS_NRESWARM 0x0A08 + #define CONTROL_PADCONF_SYS_BOOT0 0x0A0A + #define CONTROL_PADCONF_SYS_BOOT1 0x0A0C + #define CONTROL_PADCONF_SYS_BOOT2 0x0A0E +diff --git a/include/asm-arm/arch-omap3/ticpgmac.h b/include/asm-arm/arch-omap3/ticpgmac.h +index 10ec187..2a7c886 100644 +--- a/include/asm-arm/arch-omap3/ticpgmac.h ++++ b/include/asm-arm/arch-omap3/ticpgmac.h +@@ -81,7 +81,12 @@ + #define EMAC_TEARDOWN_VALUE 0xfffffffc + + /* MII Status Register */ ++#define MII_CTRL_REG 0 + #define MII_STATUS_REG 1 ++#define ANEG_ADVERTISE_REG 4 ++#define ANEG_LPA_REG 5 ++#define ANEG_EXP_REG 6 ++#define SPL_VEND_REG 18 + + /* Number of statistics registers */ + #define EMAC_NUM_STATS 36 +@@ -339,4 +344,16 @@ typedef struct + #define GEN_PHY_STATUS_SPEED100_MASK ((1 << 13) | (1 << 14)) + #define GEN_PHY_STATUS_FD_MASK ((1 << 11) | (1 << 13)) + ++#define GEN_PHY_ANEG_100DUP (1 << 8) ++#define GEN_PHY_ANEG_100TX (1 << 7) ++#define GEN_PHY_ANEG_10DUP (1 << 6) ++#define GEN_PHY_ANEG_10TX (1 << 5) ++ ++#define GEN_PHY_CTRL_RST_ANEG (1 << 9) ++#define GEN_PHY_CTRL_DUP (1 << 8) ++#define GEN_PHY_CTRL_ENA_ANEG (1 << 12) ++#define GEN_PHY_CTRL_SPD_SEL (1 << 13) ++ ++ ++ + #endif /* _TI_CPGMAC_H_ */ +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0013-Cleaned-up-during-EVM-hang-issue.patch b/recipes/u-boot/u-boot-git/omap3evm/0013-Cleaned-up-during-EVM-hang-issue.patch new file mode 100644 index 0000000000..4173694e39 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0013-Cleaned-up-during-EVM-hang-issue.patch @@ -0,0 +1,45 @@ +From f45b26a8511db31f1133dd247f75741e326f5aa7 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Mon, 22 Jun 2009 23:42:51 +0530 +Subject: [PATCH 13/16] Cleaned up during EVM hang issue + +CKE0/1 pad configuration cleanup done during board hang issue debug. + +Removed PRCM_init function from u-boot, since x-loader is handling +the clock/DPLL configuration. +This need to be enabled, after fixing hang issue. +--- + board/omap3/omap3517evm/omap3517evm.h | 4 ++-- + cpu/arm_cortexa8/omap3/board.c | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/board/omap3/omap3517evm/omap3517evm.h b/board/omap3/omap3517evm/omap3517evm.h +index 074d4ff..5ce18bd 100644 +--- a/board/omap3/omap3517evm/omap3517evm.h ++++ b/board/omap3/omap3517evm/omap3517evm.h +@@ -390,7 +390,7 @@ static void setup_net_chip(void); + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ +- MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ +- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/\ ++ MUX_VAL(CP(SDRC_CKE0), (M0)) /*sdrc_cke0*/\ ++ MUX_VAL(CP(SDRC_CKE1), (M0)) /*sdrc_cke1*/\ + + #endif +diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c +index ea94e59..ff3603b 100644 +--- a/cpu/arm_cortexa8/omap3/board.c ++++ b/cpu/arm_cortexa8/omap3/board.c +@@ -219,7 +219,7 @@ void s_init(void) + set_muxconf_regs(); + delay(100); + +- prcm_init(); ++// prcm_init(); + + per_clocks_enable(); + +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0014-EMAC-driver-cleanup-removed-debug-prints.patch b/recipes/u-boot/u-boot-git/omap3evm/0014-EMAC-driver-cleanup-removed-debug-prints.patch new file mode 100644 index 0000000000..5630ac6313 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0014-EMAC-driver-cleanup-removed-debug-prints.patch @@ -0,0 +1,419 @@ +From 8ceef1101c96a5357a7ec82084a53e7001456170 Mon Sep 17 00:00:00 2001 +From: Sriram +Date: Mon, 29 Jun 2009 03:35:29 +0530 +Subject: [PATCH 14/16] EMAC driver: cleanup(removed debug prints) + +Cleaned up the EMAC driver : removed debug prints and other +debugging aids +--- + drivers/net/ticpgmac.c | 127 ++++++++++++++++------------------------------- + 1 files changed, 43 insertions(+), 84 deletions(-) + +diff --git a/drivers/net/ticpgmac.c b/drivers/net/ticpgmac.c +index eeff23b..78a54d8 100644 +--- a/drivers/net/ticpgmac.c ++++ b/drivers/net/ticpgmac.c +@@ -43,14 +43,11 @@ + #include + + +-#define STATIC +-#define PRINTF(args,...) +- + #ifdef CONFIG_DRIVER_TI_EMAC + + #ifdef CONFIG_CMD_NET + +-unsigned int emac_dbg = 1; ++unsigned int emac_dbg = 0; + #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args) + + #define BD_TO_HW(x) \ +@@ -59,17 +56,17 @@ unsigned int emac_dbg = 1; + ( ( (x) == 0) ? 0 : ( (x) - EMAC_HW_RAM_ADDR + EMAC_WRAPPER_RAM_ADDR )) + + /* Internal static functions */ +-STATIC int cpgmac_eth_hw_init (void); +-STATIC int cpgmac_eth_open (void); +-STATIC int cpgmac_eth_close (void); +-STATIC int cpgmac_eth_send_packet (volatile void *packet, int length); +-STATIC int cpgmac_eth_rcv_packet (void); +-STATIC void cpgmac_eth_mdio_enable(void); +- +-STATIC int gen_init_phy(int phy_addr); +-STATIC int gen_is_phy_connected(int phy_addr); +-STATIC int gen_get_link_status(int phy_addr); +-STATIC int gen_auto_negotiate(int phy_addr); ++static int cpgmac_eth_hw_init (void); ++static int cpgmac_eth_open (void); ++static int cpgmac_eth_close (void); ++static int cpgmac_eth_send_packet (volatile void *packet, int length); ++static int cpgmac_eth_rcv_packet (void); ++static void cpgmac_eth_mdio_enable(void); ++ ++static int gen_init_phy(int phy_addr); ++static int gen_is_phy_connected(int phy_addr); ++static int gen_get_link_status(int phy_addr); ++static int gen_auto_negotiate(int phy_addr); + + /* Wrappers exported to the U-Boot proper */ + int eth_hw_init(void) +@@ -105,7 +102,7 @@ void eth_mdio_enable(void) + + /* cpgmac_eth_mac_addr[0] goes out on the wire first */ + +-STATIC u_int8_t cpgmac_eth_mac_addr[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0x00 }; ++static u_int8_t cpgmac_eth_mac_addr[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0x00 }; + + /* + * This function must be called before emac_open() if you want to override +@@ -121,26 +118,26 @@ void cpgmac_eth_set_mac_addr(const u_int8_t *addr) + } + + /* EMAC Addresses */ +-STATIC volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; +-STATIC volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; +-STATIC volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR; ++static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; ++static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; ++static volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR; + + /* EMAC descriptors */ +-STATIC volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE); +-STATIC volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE); +-STATIC volatile emac_desc *emac_rx_active_head = 0; +-STATIC volatile emac_desc *emac_rx_active_tail = 0; +-STATIC int emac_rx_queue_active = 0; ++static volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE); ++static volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE); ++static volatile emac_desc *emac_rx_active_head = 0; ++static volatile emac_desc *emac_rx_active_tail = 0; ++static int emac_rx_queue_active = 0; + + /* Receive packet buffers */ +-STATIC unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; ++static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; + + /* PHY address for a discovered PHY (0xff - not found) */ +-STATIC volatile u_int8_t active_phy_addr = 0xff; ++static volatile u_int8_t active_phy_addr = 0xff; + +-STATIC int no_phy_init (int phy_addr) { return(1); } +-STATIC int no_phy_is_connected (int phy_addr) { return(1); } +-STATIC int no_phy_get_link_status (int phy_addr) ++static int no_phy_init (int phy_addr) { return(1); } ++static int no_phy_is_connected (int phy_addr) { return(1); } ++static int no_phy_get_link_status (int phy_addr) + { + adap_emac->MACCONTROL = (EMAC_MACCONTROL_MIIEN_ENABLE + | EMAC_MACCONTROL_FULLDUPLEX_ENABLE); +@@ -149,7 +146,7 @@ STATIC int no_phy_get_link_status (int phy_addr) + #endif + return 1; + } +-STATIC int no_phy_auto_negotiate (int phy_addr) { return(1); } ++static int no_phy_auto_negotiate (int phy_addr) { return(1); } + phy_t phy = { + .init = no_phy_init, + .is_phy_connected = no_phy_is_connected, +@@ -157,7 +154,7 @@ phy_t phy = { + .auto_negotiate = no_phy_auto_negotiate + }; + +-STATIC void cpgmac_eth_mdio_enable(void) ++static void cpgmac_eth_mdio_enable(void) + { + u_int32_t clkdiv; + +@@ -177,7 +174,7 @@ STATIC void cpgmac_eth_mdio_enable(void) + * returns 2 + * Sets active_phy_addr variable when returns 1. + */ +-STATIC int cpgmac_eth_phy_detect(void) ++static int cpgmac_eth_phy_detect(void) + { + u_int32_t phy_act_state; + int i; +@@ -247,7 +244,7 @@ int cpgmac_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) + } + + /* PHY functions for a generic PHY */ +-STATIC int gen_init_phy(int phy_addr) ++static int gen_init_phy(int phy_addr) + { + int ret = 1; + +@@ -259,53 +256,44 @@ STATIC int gen_init_phy(int phy_addr) + return(ret); + } + +-STATIC int gen_is_phy_connected(int phy_addr) ++static int gen_is_phy_connected(int phy_addr) + { + u_int16_t dummy; + + return(cpgmac_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy)); + } + +-STATIC int gen_get_link_status(int phy_addr) ++static int gen_get_link_status(int phy_addr) + { + u_int16_t tmp,lpa_val,val; + + if (cpgmac_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) + && (tmp & 0x04)) { +- //printf("Phy %d MII_Status Reg=0x%x \n",phy_addr,tmp); +- //printf("MACCTRL 0x%x\n",adap_emac->MACCONTROL); + + cpgmac_eth_phy_read(phy_addr,MII_CTRL_REG,&val); +- //printf("Phy CTRL=0x%x \n",val); + + cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG,&val); +- // printf("Phy ANEG ADV=0x%x \n",val); + + cpgmac_eth_phy_read(phy_addr,ANEG_LPA_REG,&lpa_val); +- //printf("Phy ANEG LPA=0x%x \n",lpa_val); + + /* Speed doesn't matter, there is no setting for it in EMAC. */ + //if (tmp & GEN_PHY_STATUS_FD_MASK) { + if (lpa_val & (GEN_PHY_ANEG_100DUP | GEN_PHY_ANEG_10DUP ) ) { + /* set EMAC for Full Duplex */ +- // printf("Set MACCTRL for full duplex \n"); + adap_emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | + EMAC_MACCONTROL_FULLDUPLEX_ENABLE; + } else { + /*set EMAC for Half Duplex */ + adap_emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE; +- // printf("Set MACCTRL for HALF duplex \n"); + } + + #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII + //if(tmp & GEN_PHY_STATUS_SPEED100_MASK) { + if (lpa_val & (GEN_PHY_ANEG_100DUP | GEN_PHY_ANEG_100TX ) ) { + adap_emac->MACCONTROL |= EMAC_MACCONTROL_RMIISPEED_100; +- // printf("Set maccontrol for RMII 100 - 0x%x\n",adap_emac->MACCONTROL); + + } else { + adap_emac->MACCONTROL &= ~EMAC_MACCONTROL_RMIISPEED_100; +- printf("Set maccontrol for RMII 10 - 0x%x\n",adap_emac->MACCONTROL); + } + #endif + +@@ -315,7 +303,7 @@ STATIC int gen_get_link_status(int phy_addr) + return(0); + } + +-STATIC int gen_auto_negotiate(int phy_addr) ++static int gen_auto_negotiate(int phy_addr) + { + u_int16_t tmp,val; + unsigned long cntr =0; +@@ -323,55 +311,41 @@ STATIC int gen_auto_negotiate(int phy_addr) + if (!cpgmac_eth_phy_read(phy_addr, PHY_BMCR, &tmp)) + return(0); + +- printf("read BMCR 0x%x\n",tmp); + + val = tmp | GEN_PHY_CTRL_DUP | GEN_PHY_CTRL_ENA_ANEG | GEN_PHY_CTRL_SPD_SEL ; + cpgmac_eth_phy_write(phy_addr, PHY_BMCR, val); + cpgmac_eth_phy_read(phy_addr, PHY_BMCR, &val); +- printf("BMCR set to 0x%X \n",val); + + cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG, &val); +- printf("read ANEG 0x%x \n",val); + val |= ( GEN_PHY_ANEG_100DUP | GEN_PHY_ANEG_100TX | GEN_PHY_ANEG_10DUP | GEN_PHY_ANEG_10TX ); +- printf("writing back 0x%x \n",val); + cpgmac_eth_phy_write(phy_addr, ANEG_ADVERTISE_REG, val); + cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG, &val); +- printf("ANEG ADVT set to 0x%x \n", val); + + +- printf("Restart Auto-negn \n"); + cpgmac_eth_phy_read(phy_addr, PHY_BMCR, &tmp); + + /* Restart Auto_negotiation */ + tmp |= PHY_BMCR_RST_NEG; +- printf("writing bk 0x%x to BMCR for anegn \n",tmp); + cpgmac_eth_phy_write(phy_addr, PHY_BMCR, tmp); + + /*check AutoNegotiate complete */ +- //udelay (10000); + do{ + udelay(40000); + cntr++; +- }while(cntr < 150 ); ++ }while(cntr < 50 ); + + if (!cpgmac_eth_phy_read(phy_addr, PHY_BMSR, &tmp)) + return(0); +- printf("BMSR after negn 0x%X\n",tmp); + + cpgmac_eth_phy_read(phy_addr,MII_CTRL_REG,&val); +- printf("Phy CTRL=0x%x \n",val); + + cpgmac_eth_phy_read(phy_addr,ANEG_ADVERTISE_REG,&val); +- printf("Phy ANEG ADV=0x%x \n",val); + + cpgmac_eth_phy_read(phy_addr,ANEG_LPA_REG,&val); +- printf("Phy ANEG LPA=0x%x \n",val); + + cpgmac_eth_phy_read(phy_addr,ANEG_EXP_REG,&val); +- printf("Phy ANEG eXP=0x%x \n",val); + + cpgmac_eth_phy_read(phy_addr,SPL_VEND_REG,&val); +- printf("Phy SPL VEND =0x%x \n",val); + + if (!(tmp & PHY_BMSR_AUTN_COMP)) + return(0); +@@ -382,22 +356,19 @@ STATIC int gen_auto_negotiate(int phy_addr) + + + #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) +-STATIC int cpgmac_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) ++static int cpgmac_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) + { +- printf("MII Phy read \n"); + return(cpgmac_eth_phy_read(addr, reg, value) ? 0 : 1); + } + +-STATIC int cpgmac_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) ++static int cpgmac_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) + { + +- printf("MII Phy write \n"); + return(cpgmac_eth_phy_write(addr, reg, value) ? 0 : 1); + } + + int cpgmac_eth_miiphy_initialize(bd_t *bis) + { +- printf("MIIPHY initialize \n"); + miiphy_register(phy.name, cpgmac_mii_phy_read, cpgmac_mii_phy_write); + + return(1); +@@ -409,7 +380,7 @@ int cpgmac_eth_miiphy_initialize(bd_t *bis) + * EMAC modules power or pin multiplexors, that is done by board_init() + * much earlier in bootup process. Returns 1 on success, 0 otherwise. + */ +-STATIC int cpgmac_eth_hw_init(void) ++static int cpgmac_eth_hw_init(void) + { + u_int32_t phy_id; + u_int16_t tmp; +@@ -490,7 +461,7 @@ STATIC int cpgmac_eth_hw_init(void) + + + /* Eth device open */ +-STATIC int cpgmac_eth_open(void) ++static int cpgmac_eth_open(void) + { + dv_reg_p addr; + u_int32_t clkdiv, cnt; +@@ -603,7 +574,7 @@ STATIC int cpgmac_eth_open(void) + } + + /* EMAC Channel Teardown */ +-STATIC void cpgmac_eth_ch_teardown(int ch) ++static void cpgmac_eth_ch_teardown(int ch) + { + dv_reg dly = 0xff; + dv_reg cnt; +@@ -646,7 +617,7 @@ STATIC void cpgmac_eth_ch_teardown(int ch) + } + + /* Eth device close */ +-STATIC int cpgmac_eth_close(void) ++static int cpgmac_eth_close(void) + { + debug_emac("+ emac_close\n"); + +@@ -665,13 +636,13 @@ STATIC int cpgmac_eth_close(void) + return(1); + } + +-STATIC int tx_send_loop = 0; ++static int tx_send_loop = 0; + + /* + * This function sends a single packet on the network and returns + * positive number (number of bytes transmitted) or negative for error + */ +-STATIC int cpgmac_eth_send_packet (volatile void *packet, int length) ++static int cpgmac_eth_send_packet (volatile void *packet, int length) + { + int ret_status = -1; + tx_send_loop = 0; +@@ -704,8 +675,6 @@ STATIC int cpgmac_eth_send_packet (volatile void *packet, int length) + + /* Send the packet */ + adap_emac->TX0HDP = BD_TO_HW((unsigned int) emac_tx_desc); +- PRINTF("Send: BD=0x%X BF=0x%x len=%d \n", emac_tx_desc, emac_tx_desc->buffer, length); +-// udelay(2500); + + /* Wait for packet to complete or link down */ + while (1) { +@@ -718,7 +687,6 @@ STATIC int cpgmac_eth_send_packet (volatile void *packet, int length) + #endif + if (adap_emac->TXINTSTATRAW & 0x01) { + ret_status = length; +- //PRINTF("Send Complete: BD=0x%X BF=0x%x len=%d \n", emac_tx_desc, emac_tx_desc->buffer, length); + break; + } + tx_send_loop++; +@@ -730,7 +698,7 @@ STATIC int cpgmac_eth_send_packet (volatile void *packet, int length) + /* + * This function handles receipt of a packet from the network + */ +-STATIC int cpgmac_eth_rcv_packet (void) ++static int cpgmac_eth_rcv_packet (void) + { + volatile emac_desc *rx_curr_desc; + volatile emac_desc *curr_desc; +@@ -754,17 +722,14 @@ STATIC int cpgmac_eth_rcv_packet (void) + curr_desc = rx_curr_desc; + emac_rx_active_head = + (volatile emac_desc *) (HW_TO_BD(rx_curr_desc->next)); +- PRINTF("New Rx Active head 0x%x \n",emac_rx_active_head); + + + if (status & EMAC_CPPI_EOQ_BIT) { + if (emac_rx_active_head) { + adap_emac->RX0HDP = + BD_TO_HW((unsigned int) emac_rx_active_head); +- PRINTF("Rx EOQ reset HDP for misqueued pkt 0x%x \n",emac_rx_active_head); + } else { + emac_rx_queue_active = 0; +- PRINTF ("INFO:emac_rcv_packet: RX Queue not active\n"); + } + } + +@@ -774,19 +739,14 @@ STATIC int cpgmac_eth_rcv_packet (void) + rx_curr_desc->next = 0; + + if (emac_rx_active_head == 0) { +- // printf ("INFO: emac_rcv_pkt: active queue head = 0\n"); +- PRINTF(" Rx active head NULL, set head/tail to 0x%x",curr_desc); + emac_rx_active_head = curr_desc; + emac_rx_active_tail = curr_desc; + if (emac_rx_queue_active == 0) { + adap_emac->RX0HDP = + BD_TO_HW((unsigned int) emac_rx_active_head); +- //printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n"); +- PRINTF("Rx Q inactive , set HDP to 0x%x \n", emac_rx_active_head); + emac_rx_queue_active = 1; + } + } else { +- PRINTF("Append 0x%x to tail \n", curr_desc); + tail_desc = emac_rx_active_tail; + emac_rx_active_tail = curr_desc; + tail_desc->next = BD_TO_HW((unsigned int) curr_desc); +@@ -795,7 +755,6 @@ STATIC int cpgmac_eth_rcv_packet (void) + status &= ~EMAC_CPPI_EOQ_BIT; + tail_desc->pkt_flag_len = status; + adap_emac->RX0HDP = BD_TO_HW((unsigned int) curr_desc); +- PRINTF("Restart the Q in tail append case\n"); + } + } + return (ret); +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0015-EMAC-driver-Check-for-link-status-in-packet-send-lo.patch b/recipes/u-boot/u-boot-git/omap3evm/0015-EMAC-driver-Check-for-link-status-in-packet-send-lo.patch new file mode 100644 index 0000000000..cd440e4154 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0015-EMAC-driver-Check-for-link-status-in-packet-send-lo.patch @@ -0,0 +1,42 @@ +From 866d110242fe282f3a65b9035bec2157be098445 Mon Sep 17 00:00:00 2001 +From: Sriram +Date: Mon, 29 Jun 2009 03:50:57 +0530 +Subject: [PATCH 15/16] EMAC driver: Check for link status in packet send loop + +--- + drivers/net/ticpgmac.c | 8 +------- + 1 files changed, 1 insertions(+), 7 deletions(-) + +diff --git a/drivers/net/ticpgmac.c b/drivers/net/ticpgmac.c +index 78a54d8..0efd5ed 100644 +--- a/drivers/net/ticpgmac.c ++++ b/drivers/net/ticpgmac.c +@@ -667,24 +667,18 @@ static int cpgmac_eth_send_packet (volatile void *packet, int length) + EMAC_CPPI_OWNERSHIP_BIT | + EMAC_CPPI_EOP_BIT); + +- if (!phy.get_link_status (active_phy_addr)) { +- printf("Link down . Abort Tx - pHY %d\n",active_phy_addr); +- cpgmac_eth_ch_teardown (EMAC_CH_TX); +- return (ret_status); +- } + + /* Send the packet */ + adap_emac->TX0HDP = BD_TO_HW((unsigned int) emac_tx_desc); + + /* Wait for packet to complete or link down */ + while (1) { +- #if 0 + if (!phy.get_link_status (active_phy_addr)) { + printf("Link down . Abort Tx - pHY %d\n",active_phy_addr); + cpgmac_eth_ch_teardown (EMAC_CH_TX); + return (ret_status); + } +- #endif ++ + if (adap_emac->TXINTSTATRAW & 0x01) { + ret_status = length; + break; +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot-git/omap3evm/0016-Config-option-and-name-changed-to-omap3517_evm.patch b/recipes/u-boot/u-boot-git/omap3evm/0016-Config-option-and-name-changed-to-omap3517_evm.patch new file mode 100644 index 0000000000..d12e52c4a1 --- /dev/null +++ b/recipes/u-boot/u-boot-git/omap3evm/0016-Config-option-and-name-changed-to-omap3517_evm.patch @@ -0,0 +1,750 @@ +From 1e6117f48938151b750b7b53d8020fb93ce8bb62 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Wed, 1 Jul 2009 20:17:26 +0530 +Subject: [PATCH 16/16] Config option and name changed to omap3517_evm + +Changes - + - Makefile : omap3517evm_config => omap3517_evm_config + - omap3517evm.h => omap3517_evm.h +--- + Makefile | 2 +- + include/configs/omap3517_evm.h | 353 ++++++++++++++++++++++++++++++++++++++++ + include/configs/omap3517evm.h | 353 ---------------------------------------- + 3 files changed, 354 insertions(+), 354 deletions(-) + create mode 100644 include/configs/omap3517_evm.h + delete mode 100644 include/configs/omap3517evm.h + +diff --git a/Makefile b/Makefile +index df25fb3..a78910c 100644 +--- a/Makefile ++++ b/Makefile +@@ -2942,7 +2942,7 @@ omap3_pandora_config : unconfig + omap3_zoom1_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3 + +-omap3517evm_config : unconfig ++omap3517_evm_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 omap3517evm omap3 omap3 + + ######################################################################### +diff --git a/include/configs/omap3517_evm.h b/include/configs/omap3517_evm.h +new file mode 100644 +index 0000000..9fe3f72 +--- /dev/null ++++ b/include/configs/omap3517_evm.h +@@ -0,0 +1,353 @@ ++/* ++ * (C) Copyright 2006-2008 ++ * Texas Instruments. ++ * Author : ++ * Manikandan Pillai ++ * ++ * Derived from EVM, Beagle Board and 3430 SDP code by ++ * Richard Woodruff ++ * Syed Mohammed Khasim ++ * ++ * Configuration settings for the TI OMAP3 EVM board. ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++#include ++ ++/* ++ * High Level Configuration Options ++ */ ++#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ ++#define CONFIG_OMAP 1 /* in a TI OMAP core */ ++#define CONFIG_OMAP35XX 1 /* which is a 34XX */ ++#define CONFIG_OMAP3_OMAP3517EVM 1 /* working with EVM */ ++//#define CONFIG_OMAP3_OMAP3517TEB 1 /* working with TEB */ ++ ++#include /* get chip and board defs */ ++#include ++ ++/* Clock Defines */ ++#define V_OSCK 26000000 /* Clock output from T2 */ ++#define V_SCLK (V_OSCK >> 1) ++ ++#undef CONFIG_USE_IRQ /* no support for IRQs */ ++#define CONFIG_MISC_INIT_R ++ ++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ ++#define CONFIG_SETUP_MEMORY_TAGS 1 ++#define CONFIG_INITRD_TAG 1 ++#define CONFIG_REVISION_TAG 1 ++ ++/* ++ * Size of malloc() pool ++ */ ++#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */ ++ /* Sector */ ++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) ++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ ++ /* initial data */ ++ ++/* ++ * DDR size interfaced ++ */ ++#define CONFIG_SYS_CS0_SIZE SZ_256M ++ ++/* ++ * Hardware drivers ++ */ ++ ++/* ++ * NS16550 Configuration ++ */ ++#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ ++ ++#define CONFIG_SYS_NS16550 ++#define CONFIG_SYS_NS16550_SERIAL ++#define CONFIG_SYS_NS16550_REG_SIZE (-4) ++#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK ++ ++/* ++ * select serial console configuration ++ */ ++#define CONFIG_CONS_INDEX 3 ++#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 ++#define CONFIG_SERIAL3 3 /* UART1 on OMAP3 EVM */ ++ ++/* allow to overwrite serial and ethaddr */ ++#define CONFIG_ENV_OVERWRITE ++#define CONFIG_BAUDRATE 115200 ++#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ ++ 115200} ++#define CONFIG_MMC 1 ++#define CONFIG_OMAP3_MMC 1 ++#define CONFIG_DOS_PARTITION 1 ++ ++/* commands to include */ ++#include ++ ++#define CONFIG_CMD_EXT2 /* EXT2 Support */ ++#define CONFIG_CMD_FAT /* FAT support */ ++#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ ++ ++#define CONFIG_CMD_I2C /* I2C serial bus support */ ++#define CONFIG_CMD_MMC /* MMC support */ ++#define CONFIG_CMD_NAND /* NAND support */ ++#define CONFIG_CMD_DHCP ++#define CONFIG_CMD_PING ++ ++#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ ++#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ ++#undef CONFIG_CMD_IMI /* iminfo */ ++#undef CONFIG_CMD_IMLS /* List all found images */ ++ ++#define CONFIG_SYS_NO_FLASH ++#define CONFIG_SYS_I2C_SPEED 100000 ++#define CONFIG_SYS_I2C_SLAVE 1 ++#define CONFIG_SYS_I2C_BUS 0 ++#define CONFIG_SYS_I2C_BUS_SELECT 1 ++#define CONFIG_DRIVER_OMAP34XX_I2C 1 ++ ++/* ++ * Board NAND Info. ++ */ ++#define CONFIG_NAND_OMAP_GPMC ++#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ ++ /* to access nand */ ++#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ ++ /* to access */ ++ /* nand at CS0 */ ++ ++#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 ++ ++#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ ++ /* NAND devices */ ++#define SECTORSIZE 512 ++ ++#define NAND_ALLOW_ERASE_ALL ++#define ADDR_COLUMN 1 ++#define ADDR_PAGE 2 ++#define ADDR_COLUMN_PAGE 3 ++ ++#define NAND_ChipID_UNKNOWN 0x00 ++#define NAND_MAX_FLOORS 1 ++#define NAND_MAX_CHIPS 1 ++#define NAND_NO_RB 1 ++#define CONFIG_SYS_NAND_WP ++ ++#define CONFIG_JFFS2_NAND ++/* nand device jffs2 lives on */ ++#define CONFIG_JFFS2_DEV "nand0" ++/* start of jffs2 partition */ ++#define CONFIG_JFFS2_PART_OFFSET 0x680000 ++#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ ++ ++/* Environment information */ ++#define CONFIG_BOOTDELAY 10 ++ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ "loadaddr=0x82000000\0" \ ++ "console=ttyS2,115200n8\0" \ ++ "mmcargs=setenv bootargs console=${console} " \ ++ "root=/dev/mmcblk0p2 rw " \ ++ "rootfstype=ext3 rootwait\0" \ ++ "nandargs=setenv bootargs console=${console} " \ ++ "root=/dev/mtdblock4 rw " \ ++ "rootfstype=jffs2\0" \ ++ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ ++ "bootscript=echo Running bootscript from mmc ...; " \ ++ "autoscr ${loadaddr}\0" \ ++ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ ++ "mmcboot=echo Booting from mmc ...; " \ ++ "run mmcargs; " \ ++ "bootm ${loadaddr}\0" \ ++ "nandboot=echo Booting from nand ...; " \ ++ "run nandargs; " \ ++ "nand read ${loadaddr} 80000 40000; " \ ++ "bootm ${loadaddr}\0" \ ++ ++#define CONFIG_BOOTCOMMAND \ ++ "if mmcinit; then " \ ++ "if run loadbootscript; then " \ ++ "run bootscript; " \ ++ "else " \ ++ "if run loaduimage; then " \ ++ "run mmcboot; " \ ++ "else run nandboot; " \ ++ "fi; " \ ++ "fi; " \ ++ "else run nandboot; fi" ++ ++#define CONFIG_AUTO_COMPLETE 1 ++/* ++ * Miscellaneous configurable options ++ */ ++#define V_PROMPT "OMAP3517EVM # " ++ ++#define CONFIG_SYS_LONGHELP /* undef to save memory */ ++#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ ++#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " ++#define CONFIG_SYS_PROMPT V_PROMPT ++#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ ++/* Print Buffer Size */ ++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ ++ sizeof(CONFIG_SYS_PROMPT) + 16) ++#define CONFIG_SYS_MAXARGS 16 /* max number of command */ ++ /* args */ ++/* Boot Argument Buffer Size */ ++#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) ++/* memtest works on */ ++#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) ++#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ ++ 0x01F00000) /* 31MB */ ++ ++#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ ++ /* in Hz */ ++ ++#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ ++ /* address */ ++ ++/* ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. ++ */ ++#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) ++#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 ++ ++/*----------------------------------------------------------------------- ++ * Stack sizes ++ * ++ * The stack sizes are set up in start.S using the settings below ++ */ ++#define CONFIG_STACKSIZE SZ_128K /* regular stack */ ++#ifdef CONFIG_USE_IRQ ++#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */ ++#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */ ++#endif ++ ++/*----------------------------------------------------------------------- ++ * Physical Memory Map ++ */ ++#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ ++#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 ++#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ ++#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 ++ ++/* SDRAM Bank Allocation method */ ++#define SDRC_R_B_C 1 ++ ++/*----------------------------------------------------------------------- ++ * FLASH and environment organization ++ */ ++ ++/* **** PISMO SUPPORT *** */ ++ ++/* Configure the PISMO */ ++#define PISMO1_NAND_SIZE GPMC_SIZE_128M ++#define PISMO1_ONEN_SIZE GPMC_SIZE_128M ++ ++#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ ++ /* on one chip */ ++#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ ++#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */ ++ ++#define CONFIG_SYS_FLASH_BASE boot_flash_base ++ ++/* Monitor at start of flash */ ++#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE ++ ++#define CONFIG_ENV_IS_IN_NAND 1 ++#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ ++ ++#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec ++#define CONFIG_ENV_OFFSET boot_flash_off ++#define CONFIG_ENV_ADDR boot_flash_env_addr ++ ++/*----------------------------------------------------------------------- ++ * CFI FLASH driver setup ++ */ ++/* timeout values are in ticks */ ++#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) ++#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) ++ ++/* Flash banks JFFS2 should use */ ++#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ ++ CONFIG_SYS_MAX_NAND_DEVICE) ++#define CONFIG_SYS_JFFS2_MEM_NAND ++/* use flash_info[2] */ ++#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS ++#define CONFIG_SYS_JFFS2_NUM_BANKS 1 ++ ++#ifndef __ASSEMBLY__ ++extern gpmc_csx_t *nand_cs_base; ++extern gpmc_t *gpmc_cfg_base; ++extern unsigned int boot_flash_base; ++extern volatile unsigned int boot_flash_env_addr; ++extern unsigned int boot_flash_off; ++extern unsigned int boot_flash_sec; ++extern unsigned int boot_flash_type; ++#endif ++ ++ ++#define WRITE_NAND_COMMAND(d, adr)\ ++ writel(d, &nand_cs_base->nand_cmd) ++#define WRITE_NAND_ADDRESS(d, adr)\ ++ writel(d, &nand_cs_base->nand_adr) ++#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat) ++#define READ_NAND(adr) readl(&nand_cs_base->nand_dat) ++ ++/* Other NAND Access APIs */ ++#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \ ++ while (0) ++#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \ ++ while (0) ++#define NAND_DISABLE_CE(nand) ++#define NAND_ENABLE_CE(nand) ++#define NAND_WAIT_READY(nand) udelay(10) ++ ++/*---------------------------------------------------------------------------- ++ * Ethernet support for OMAP3517EVM ++ *---------------------------------------------------------------------------- ++ */ ++#if defined(CONFIG_CMD_NET) ++#define CONFIG_TICPGMAC ++#define CONFIG_DRIVER_TI_EMAC ++#define CONFIG_DRIVER_TI_EMAC_USE_RMII ++#define CONFIG_MII ++#define CONFIG_NET_RETRY_COUNT 10 ++#endif /* (CONFIG_CMD_NET) */ ++ ++/* ++ * BOOTP fields ++ */ ++#define CONFIG_BOOTP_DEFAULT ++#define CONFIG_BOOTP_DNS ++#define CONFIG_BOOTP_DNS2 ++#define CONFIG_BOOTP_SEND_HOSTNAME ++ ++#define CONFIG_BOOTP_SUBNETMASK 0x00000001 ++#define CONFIG_BOOTP_GATEWAY 0x00000002 ++#define CONFIG_BOOTP_HOSTNAME 0x00000004 ++#define CONFIG_BOOTP_BOOTPATH 0x00000010 ++ ++#endif /* __CONFIG_H */ +diff --git a/include/configs/omap3517evm.h b/include/configs/omap3517evm.h +deleted file mode 100644 +index 9fe3f72..0000000 +--- a/include/configs/omap3517evm.h ++++ /dev/null +@@ -1,353 +0,0 @@ +-/* +- * (C) Copyright 2006-2008 +- * Texas Instruments. +- * Author : +- * Manikandan Pillai +- * +- * Derived from EVM, Beagle Board and 3430 SDP code by +- * Richard Woodruff +- * Syed Mohammed Khasim +- * +- * Configuration settings for the TI OMAP3 EVM board. +- * +- * See file CREDITS for list of people who contributed to this +- * project. +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of +- * the License, or (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program; if not, write to the Free Software +- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, +- * MA 02111-1307 USA +- */ +- +-#ifndef __CONFIG_H +-#define __CONFIG_H +-#include +- +-/* +- * High Level Configuration Options +- */ +-#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ +-#define CONFIG_OMAP 1 /* in a TI OMAP core */ +-#define CONFIG_OMAP35XX 1 /* which is a 34XX */ +-#define CONFIG_OMAP3_OMAP3517EVM 1 /* working with EVM */ +-//#define CONFIG_OMAP3_OMAP3517TEB 1 /* working with TEB */ +- +-#include /* get chip and board defs */ +-#include +- +-/* Clock Defines */ +-#define V_OSCK 26000000 /* Clock output from T2 */ +-#define V_SCLK (V_OSCK >> 1) +- +-#undef CONFIG_USE_IRQ /* no support for IRQs */ +-#define CONFIG_MISC_INIT_R +- +-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +-#define CONFIG_SETUP_MEMORY_TAGS 1 +-#define CONFIG_INITRD_TAG 1 +-#define CONFIG_REVISION_TAG 1 +- +-/* +- * Size of malloc() pool +- */ +-#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */ +- /* Sector */ +-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) +-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ +- /* initial data */ +- +-/* +- * DDR size interfaced +- */ +-#define CONFIG_SYS_CS0_SIZE SZ_256M +- +-/* +- * Hardware drivers +- */ +- +-/* +- * NS16550 Configuration +- */ +-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ +- +-#define CONFIG_SYS_NS16550 +-#define CONFIG_SYS_NS16550_SERIAL +-#define CONFIG_SYS_NS16550_REG_SIZE (-4) +-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +- +-/* +- * select serial console configuration +- */ +-#define CONFIG_CONS_INDEX 3 +-#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +-#define CONFIG_SERIAL3 3 /* UART1 on OMAP3 EVM */ +- +-/* allow to overwrite serial and ethaddr */ +-#define CONFIG_ENV_OVERWRITE +-#define CONFIG_BAUDRATE 115200 +-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ +- 115200} +-#define CONFIG_MMC 1 +-#define CONFIG_OMAP3_MMC 1 +-#define CONFIG_DOS_PARTITION 1 +- +-/* commands to include */ +-#include +- +-#define CONFIG_CMD_EXT2 /* EXT2 Support */ +-#define CONFIG_CMD_FAT /* FAT support */ +-#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ +- +-#define CONFIG_CMD_I2C /* I2C serial bus support */ +-#define CONFIG_CMD_MMC /* MMC support */ +-#define CONFIG_CMD_NAND /* NAND support */ +-#define CONFIG_CMD_DHCP +-#define CONFIG_CMD_PING +- +-#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +-#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +-#undef CONFIG_CMD_IMI /* iminfo */ +-#undef CONFIG_CMD_IMLS /* List all found images */ +- +-#define CONFIG_SYS_NO_FLASH +-#define CONFIG_SYS_I2C_SPEED 100000 +-#define CONFIG_SYS_I2C_SLAVE 1 +-#define CONFIG_SYS_I2C_BUS 0 +-#define CONFIG_SYS_I2C_BUS_SELECT 1 +-#define CONFIG_DRIVER_OMAP34XX_I2C 1 +- +-/* +- * Board NAND Info. +- */ +-#define CONFIG_NAND_OMAP_GPMC +-#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ +- /* to access nand */ +-#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ +- /* to access */ +- /* nand at CS0 */ +- +-#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +- +-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ +- /* NAND devices */ +-#define SECTORSIZE 512 +- +-#define NAND_ALLOW_ERASE_ALL +-#define ADDR_COLUMN 1 +-#define ADDR_PAGE 2 +-#define ADDR_COLUMN_PAGE 3 +- +-#define NAND_ChipID_UNKNOWN 0x00 +-#define NAND_MAX_FLOORS 1 +-#define NAND_MAX_CHIPS 1 +-#define NAND_NO_RB 1 +-#define CONFIG_SYS_NAND_WP +- +-#define CONFIG_JFFS2_NAND +-/* nand device jffs2 lives on */ +-#define CONFIG_JFFS2_DEV "nand0" +-/* start of jffs2 partition */ +-#define CONFIG_JFFS2_PART_OFFSET 0x680000 +-#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ +- +-/* Environment information */ +-#define CONFIG_BOOTDELAY 10 +- +-#define CONFIG_EXTRA_ENV_SETTINGS \ +- "loadaddr=0x82000000\0" \ +- "console=ttyS2,115200n8\0" \ +- "mmcargs=setenv bootargs console=${console} " \ +- "root=/dev/mmcblk0p2 rw " \ +- "rootfstype=ext3 rootwait\0" \ +- "nandargs=setenv bootargs console=${console} " \ +- "root=/dev/mtdblock4 rw " \ +- "rootfstype=jffs2\0" \ +- "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ +- "bootscript=echo Running bootscript from mmc ...; " \ +- "autoscr ${loadaddr}\0" \ +- "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ +- "mmcboot=echo Booting from mmc ...; " \ +- "run mmcargs; " \ +- "bootm ${loadaddr}\0" \ +- "nandboot=echo Booting from nand ...; " \ +- "run nandargs; " \ +- "nand read ${loadaddr} 80000 40000; " \ +- "bootm ${loadaddr}\0" \ +- +-#define CONFIG_BOOTCOMMAND \ +- "if mmcinit; then " \ +- "if run loadbootscript; then " \ +- "run bootscript; " \ +- "else " \ +- "if run loaduimage; then " \ +- "run mmcboot; " \ +- "else run nandboot; " \ +- "fi; " \ +- "fi; " \ +- "else run nandboot; fi" +- +-#define CONFIG_AUTO_COMPLETE 1 +-/* +- * Miscellaneous configurable options +- */ +-#define V_PROMPT "OMAP3517EVM # " +- +-#define CONFIG_SYS_LONGHELP /* undef to save memory */ +-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +-#define CONFIG_SYS_PROMPT V_PROMPT +-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +-/* Print Buffer Size */ +-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ +- sizeof(CONFIG_SYS_PROMPT) + 16) +-#define CONFIG_SYS_MAXARGS 16 /* max number of command */ +- /* args */ +-/* Boot Argument Buffer Size */ +-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) +-/* memtest works on */ +-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) +-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ +- 0x01F00000) /* 31MB */ +- +-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ +- /* in Hz */ +- +-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ +- /* address */ +- +-/* +- * OMAP3 has 12 GP timers, they can be driven by the system clock +- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). +- * This rate is divided by a local divisor. +- */ +-#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +-#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ +-#define CONFIG_SYS_HZ 1000 +- +-/*----------------------------------------------------------------------- +- * Stack sizes +- * +- * The stack sizes are set up in start.S using the settings below +- */ +-#define CONFIG_STACKSIZE SZ_128K /* regular stack */ +-#ifdef CONFIG_USE_IRQ +-#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */ +-#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */ +-#endif +- +-/*----------------------------------------------------------------------- +- * Physical Memory Map +- */ +-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +-#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ +-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 +- +-/* SDRAM Bank Allocation method */ +-#define SDRC_R_B_C 1 +- +-/*----------------------------------------------------------------------- +- * FLASH and environment organization +- */ +- +-/* **** PISMO SUPPORT *** */ +- +-/* Configure the PISMO */ +-#define PISMO1_NAND_SIZE GPMC_SIZE_128M +-#define PISMO1_ONEN_SIZE GPMC_SIZE_128M +- +-#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ +- /* on one chip */ +-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ +-#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */ +- +-#define CONFIG_SYS_FLASH_BASE boot_flash_base +- +-/* Monitor at start of flash */ +-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +- +-#define CONFIG_ENV_IS_IN_NAND 1 +-#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ +- +-#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec +-#define CONFIG_ENV_OFFSET boot_flash_off +-#define CONFIG_ENV_ADDR boot_flash_env_addr +- +-/*----------------------------------------------------------------------- +- * CFI FLASH driver setup +- */ +-/* timeout values are in ticks */ +-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) +-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) +- +-/* Flash banks JFFS2 should use */ +-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ +- CONFIG_SYS_MAX_NAND_DEVICE) +-#define CONFIG_SYS_JFFS2_MEM_NAND +-/* use flash_info[2] */ +-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS +-#define CONFIG_SYS_JFFS2_NUM_BANKS 1 +- +-#ifndef __ASSEMBLY__ +-extern gpmc_csx_t *nand_cs_base; +-extern gpmc_t *gpmc_cfg_base; +-extern unsigned int boot_flash_base; +-extern volatile unsigned int boot_flash_env_addr; +-extern unsigned int boot_flash_off; +-extern unsigned int boot_flash_sec; +-extern unsigned int boot_flash_type; +-#endif +- +- +-#define WRITE_NAND_COMMAND(d, adr)\ +- writel(d, &nand_cs_base->nand_cmd) +-#define WRITE_NAND_ADDRESS(d, adr)\ +- writel(d, &nand_cs_base->nand_adr) +-#define WRITE_NAND(d, adr) writew(d, &nand_cs_base->nand_dat) +-#define READ_NAND(adr) readl(&nand_cs_base->nand_dat) +- +-/* Other NAND Access APIs */ +-#define NAND_WP_OFF() do {readl(&gpmc_cfg_base->config) |= GPMC_CONFIG_WP; } \ +- while (0) +-#define NAND_WP_ON() do {readl(&gpmc_cfg_base->config) &= ~GPMC_CONFIG_WP; } \ +- while (0) +-#define NAND_DISABLE_CE(nand) +-#define NAND_ENABLE_CE(nand) +-#define NAND_WAIT_READY(nand) udelay(10) +- +-/*---------------------------------------------------------------------------- +- * Ethernet support for OMAP3517EVM +- *---------------------------------------------------------------------------- +- */ +-#if defined(CONFIG_CMD_NET) +-#define CONFIG_TICPGMAC +-#define CONFIG_DRIVER_TI_EMAC +-#define CONFIG_DRIVER_TI_EMAC_USE_RMII +-#define CONFIG_MII +-#define CONFIG_NET_RETRY_COUNT 10 +-#endif /* (CONFIG_CMD_NET) */ +- +-/* +- * BOOTP fields +- */ +-#define CONFIG_BOOTP_DEFAULT +-#define CONFIG_BOOTP_DNS +-#define CONFIG_BOOTP_DNS2 +-#define CONFIG_BOOTP_SEND_HOSTNAME +- +-#define CONFIG_BOOTP_SUBNETMASK 0x00000001 +-#define CONFIG_BOOTP_GATEWAY 0x00000002 +-#define CONFIG_BOOTP_HOSTNAME 0x00000004 +-#define CONFIG_BOOTP_BOOTPATH 0x00000010 +- +-#endif /* __CONFIG_H */ +-- +1.6.2.4 + diff --git a/recipes/u-boot/u-boot_git.bb b/recipes/u-boot/u-boot_git.bb index d30b0bdbd0..fea52ac27e 100644 --- a/recipes/u-boot/u-boot_git.bb +++ b/recipes/u-boot/u-boot_git.bb @@ -25,6 +25,28 @@ SRC_URI_omap3evm = "git://gitorious.org/u-boot-omap3/mainline.git;branch=omap3-d SRCREV_omap3evm = "2dea1db2a3b7c12ed70bbf8ee50755089c5e5170" PV_omap3evm = "2009.03+${PR}+gitr${SRCREV}" + +SRCREV_omap3517-evm = "e60beb13cf0" +SRC_URI_append_omap3517-evm = " \ +file://omap3evm/0001-Changes-for-making-a-NAND-build.patch;patch=1 \ +file://omap3evm/0002-Fix-for-NFS-boot-for-OMAP3-EVM.patch;patch=1 \ +file://omap3evm/0003-OMAP3-timer-handling-to-1ms-tick-and-CONFIG_SYS_HZ-t.patch;patch=1 \ +file://omap3evm/0004-Reverse-patch-for-NFS-boot-to-fix-comments-provided.patch;patch=1 \ +file://omap3evm/0005-SMC911x-driver-fixed-for-NFS-boot.patch;patch=1 \ +file://omap3evm/0006-Added-OMAP3517-3505-support.patch;patch=1 \ +file://omap3evm/0007-OMAP3517TEB-validated-on-OMAP3517TEB-board.patch;patch=1 \ +file://omap3evm/0008-OMAP3517PRE-ALPHA-validated-on-OMAP3517PRE_ALPHA-bo.patch;patch=1 \ +file://omap3evm/0009-OMAP3517PRE-ALPHA-DDR-size-issue-fixed.patch;patch=1 \ +file://omap3evm/0010-OMAP3517PRE-ALPHA-Mux-configuration-for-MMC-CD-and.patch;patch=1 \ +file://omap3evm/0011-Ethernet-driver-functional-no-need-for-time-delay.patch;patch=1 \ +file://omap3evm/0012-EMAC-driver-Implement-GPIO-driven-PHY-reset.patch;patch=1 \ +file://omap3evm/0013-Cleaned-up-during-EVM-hang-issue.patch;patch=1 \ +file://omap3evm/0014-EMAC-driver-cleanup-removed-debug-prints.patch;patch=1 \ +file://omap3evm/0015-EMAC-driver-Check-for-link-status-in-packet-send-lo.patch;patch=1 \ +file://omap3evm/0016-Config-option-and-name-changed-to-omap3517_evm.patch;patch=1 \ +" +PV_omap3517-evm = "2009.03+${PR}+gitr${SRCREV}" + SRC_URI_omapzoom = "git://www.sakoman.net/git/u-boot-omap3.git;branch=omap3-dev;protocol=git" SRCREV_omapzoom = "d691b424f1f5bf7eea3a4131dfc578d272e8f335" PV_omapzoom = "2009.01+${PR}+gitr${SRCREV}" -- cgit v1.2.3 From ede46c7614fd6baaac513d36abb011c5a63772ff Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Tue, 8 Sep 2009 16:02:41 +0200 Subject: linux-omap-psp 2.6.29: add WIP patch for EHCI support --- .../linux-omap-psp-2.6.29/omap3517-evm/defconfig | 9 +++- .../linux/linux-omap-psp-2.6.29/shiva-ehci.diff | 60 ++++++++++++++++++++++ recipes/linux/linux-omap-psp_2.6.29.bb | 1 + 3 files changed, 68 insertions(+), 2 deletions(-) create mode 100755 recipes/linux/linux-omap-psp-2.6.29/shiva-ehci.diff (limited to 'recipes') diff --git a/recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig b/recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig index 3092f7b098..4fa37bd8ef 100644 --- a/recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig +++ b/recipes/linux/linux-omap-psp-2.6.29/omap3517-evm/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.29-omap1 -# Mon Sep 7 19:18:57 2009 +# Tue Sep 8 15:41:48 2009 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -1003,7 +1003,11 @@ CONFIG_USB=y # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_EHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_OMAP_EHCI_PHY_MODE=y +# CONFIG_OMAP_EHCI_TLL_MODE is not set +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_TT_NEWSCHED=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_OHCI_HCD is not set @@ -1084,6 +1088,7 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set diff --git a/recipes/linux/linux-omap-psp-2.6.29/shiva-ehci.diff b/recipes/linux/linux-omap-psp-2.6.29/shiva-ehci.diff new file mode 100755 index 0000000000..418dca86b5 --- /dev/null +++ b/recipes/linux/linux-omap-psp-2.6.29/shiva-ehci.diff @@ -0,0 +1,60 @@ +commit b73387d2642df981a4cfacddaa36aab8b1ea604b +Author: Ajay Kumar Gupta +Date: Fri Jul 10 18:01:29 2009 +0530 + + ehci: adding support for EHCI + + Port1 is used and EHCI port on OMAP3517. GPIO57 is + used to reset the EHCI phy. + + - Added usb_ehci_init() + - Added port1 phy reset padconfig + +diff --git a/arch/arm/mach-omap2/board-omap3517evm.c b/arch/arm/mach-omap2/board-omap3517evm.c +index cb5af8f..af2d3a9 100644 +--- a/arch/arm/mach-omap2/board-omap3517evm.c ++++ b/arch/arm/mach-omap2/board-omap3517evm.c +@@ -399,6 +399,9 @@ static void __init omap3517_evm_init(void) + + omap3517evm_flash_init(); + usb_musb_init(); ++ /* GPIO57 as port1 phy reset */ ++ omap_cfg_reg(N5_3517_GPIO57_OUT); ++ usb_ehci_init(); + /* + * MMC init function + */ + +diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h +index aa9d5a1..4e5a247 100644 +--- a/arch/arm/plat-omap/include/mach/mux.h ++++ b/arch/arm/plat-omap/include/mach/mux.h +@@ -805,6 +805,7 @@ enum omap34xx_index { + J25_34XX_GPIO170, + #ifdef CONFIG_MACH_OMAP3517EVM + E25_3517_USB0_DRVVBUS, ++ N5_3517_GPIO57_OUT, + #endif + }; + +--- /tmp/mux.c 2009-09-08 15:06:05.000000000 +0200 ++++ git/arch/arm/mach-omap2/mux.c 2009-09-08 15:08:28.000000000 +0200 +@@ -486,16 +486,10 @@ + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) + MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) +-#ifdef CONFIG_MACH_OMAP3517EVM + MUX_CFG_34XX("E25_3517_USB0_DRVVBUS", 0x212, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLDOWN) +-#if 0 +-MUX_CFG_34XX("F24_3517_USB0_DM", 0x212, +- OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLDOWN) +-MUX_CFG_34XX("F25_3517_USB0_DP", 0x212, +- OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLDOWN) +-#endif +-#endif ++MUX_CFG_34XX("N5_3517_GPIO57_OUT", 0x0ba, ++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) + }; + + #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) diff --git a/recipes/linux/linux-omap-psp_2.6.29.bb b/recipes/linux/linux-omap-psp_2.6.29.bb index a336622583..4c213b1dd1 100644 --- a/recipes/linux/linux-omap-psp_2.6.29.bb +++ b/recipes/linux/linux-omap-psp_2.6.29.bb @@ -18,6 +18,7 @@ S = "${WORKDIR}/git" SRC_URI_append_omap3517-evm = " \ file://shiva-bits.diff;patch=1 \ + file://shiva-ehci.diff;patch=1 \ " SRC_URI_append_omap3evm = " \ -- cgit v1.2.3 From 7937ed35de6218a955a63d9ce61d992532fdc5e0 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Wed, 9 Sep 2009 12:27:50 +0200 Subject: x-load: add omap3517-evm support * 1.41 still has the volatile bugs when compiled with non CSL stuff --- recipes/x-load/files/x-loader-03.00.00.01.tar.gz | Bin 0 -> 166557 bytes recipes/x-load/files/xload-shiva.diff | 2106 ++++++++++++++++++++ ...oard.c-print-boot-method-mmc-onenand-nand.patch | 52 + ...heck-for-u-boot-on-mmc-on-all-configurati.patch | 95 + .../0015-OMAP3EVM-Build-issue-fixed.patch | 77 + ...-mmc-fix-infinite-loop-in-mmc_init_stream.patch | 41 + ...b-board.c-add-missing-call-to-misc_init_r.patch | 25 + ...-omap3evm-provide-missing-udelay-function.patch | 27 + ...c-Specify-where-u-boot-is-being-loaded-fr.patch | 45 + recipes/x-load/x-load-1.41/streen-fix.diff | 39 + recipes/x-load/x-load_1.41.bb | 18 + recipes/x-load/x-load_git.bb | 6 + 12 files changed, 2531 insertions(+) create mode 100755 recipes/x-load/files/x-loader-03.00.00.01.tar.gz create mode 100644 recipes/x-load/files/xload-shiva.diff create mode 100644 recipes/x-load/x-load-1.41/0013-board.c-print-boot-method-mmc-onenand-nand.patch create mode 100644 recipes/x-load/x-load-1.41/0014-board.c-check-for-u-boot-on-mmc-on-all-configurati.patch create mode 100644 recipes/x-load/x-load-1.41/0015-OMAP3EVM-Build-issue-fixed.patch create mode 100644 recipes/x-load/x-load-1.41/0016-mmc-fix-infinite-loop-in-mmc_init_stream.patch create mode 100644 recipes/x-load/x-load-1.41/0017-lib-board.c-add-missing-call-to-misc_init_r.patch create mode 100644 recipes/x-load/x-load-1.41/0018-omap3evm-provide-missing-udelay-function.patch create mode 100644 recipes/x-load/x-load-1.41/0019-lib-board.c-Specify-where-u-boot-is-being-loaded-fr.patch create mode 100644 recipes/x-load/x-load-1.41/streen-fix.diff create mode 100644 recipes/x-load/x-load_1.41.bb (limited to 'recipes') diff --git a/recipes/x-load/files/x-loader-03.00.00.01.tar.gz b/recipes/x-load/files/x-loader-03.00.00.01.tar.gz new file mode 100755 index 0000000000..60930c68d2 Binary files /dev/null and b/recipes/x-load/files/x-loader-03.00.00.01.tar.gz differ diff --git a/recipes/x-load/files/xload-shiva.diff b/recipes/x-load/files/xload-shiva.diff new file mode 100644 index 0000000000..d1535b682f --- /dev/null +++ b/recipes/x-load/files/xload-shiva.diff @@ -0,0 +1,2106 @@ +diff -Nurd git/Makefile x-load-shiva/Makefile +--- git/Makefile 2009-09-08 16:43:33.000000000 +0200 ++++ x-load-shiva/Makefile 2009-09-08 16:54:21.000000000 +0200 +@@ -156,6 +156,9 @@ + + @./mkconfig $(@:_config=) arm omap3 omap3530beagle + ++omap3517evm_config : unconfig ++ @./mkconfig $(@:_config=) arm omap3 omap3517evm ++ + ######################################################################### + + clean: +diff -Nurd git/board/omap3517evm/Makefile x-load-shiva/board/omap3517evm/Makefile +--- git/board/omap3517evm/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ x-load-shiva/board/omap3517evm/Makefile 2009-09-08 16:54:35.000000000 +0200 +@@ -0,0 +1,47 @@ ++# ++# (C) Copyright 2000, 2001, 2002 ++# Wolfgang Denk, DENX Software Engineering, wd@denx.de. ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++ ++include $(TOPDIR)/config.mk ++ ++LIB = lib$(BOARD).a ++ ++OBJS := omap3517evm.o ++SOBJS := platform.o ++ ++$(LIB): $(OBJS) $(SOBJS) ++ $(AR) crv $@ $^ ++ ++clean: ++ rm -f $(SOBJS) $(OBJS) ++ ++distclean: clean ++ rm -f $(LIB) core *.bak .depend ++ ++######################################################################### ++ ++.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) ++ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ ++ ++-include .depend ++ ++######################################################################### +diff -Nurd git/board/omap3517evm/config.mk x-load-shiva/board/omap3517evm/config.mk +--- git/board/omap3517evm/config.mk 1970-01-01 01:00:00.000000000 +0100 ++++ x-load-shiva/board/omap3517evm/config.mk 2009-09-08 16:56:20.000000000 +0200 +@@ -0,0 +1,19 @@ ++# (C) Copyright 2009 ++# Texas Instruments, ++# ++# OMAP3517EVM board uses OMAP3517 'shiva' (ARM-CortexA8) cpu ++# see http://www.ti.com/ for more information on Texas Instruments# ++# ++# OMAP3517EVM has 1 bank of 128MB mPOP-SDRAM on CS0 ++# Physical Address: ++# 8000'0000 (bank0) ++ ++# For use if you want X-Loader to relocate from SRAM to DDR ++#TEXT_BASE = 0x80e80000 ++ ++# For XIP in 64K of SRAM or debug (GP device has it all availabe) ++# SRAM 40200000-4020FFFF base ++# initial stack at 0x4020fffc used in s_init (below xloader). ++# The run time stack is (above xloader, 2k below) ++# If any globals exist there needs to be room for them also ++TEXT_BASE = 0x40200800 +diff -Nurd git/board/omap3517evm/omap3517evm.c x-load-shiva/board/omap3517evm/omap3517evm.c +--- git/board/omap3517evm/omap3517evm.c 1970-01-01 01:00:00.000000000 +0100 ++++ x-load-shiva/board/omap3517evm/omap3517evm.c 2009-09-08 18:25:17.000000000 +0200 +@@ -0,0 +1,943 @@ ++/* ++ * (C) Copyright 2009 ++ * Texas Instruments, ++ * Manikandan Pillai ++ * This file is copied from board/omap3evm/omap3evm.c ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Used to index into DPLL parameter tables */ ++struct dpll_param { ++ unsigned int m; ++ unsigned int n; ++ unsigned int fsel; ++ unsigned int m2; ++}; ++ ++typedef struct dpll_param dpll_param; ++ ++#define MAX_SIL_INDEX 3 ++ ++/* Definitions for EMIF4 configuration values */ ++#define EMIF4_TIM1_T_RP 0x3 ++#define EMIF4_TIM1_T_RCD 0x3 ++#define EMIF4_TIM1_T_WR 0x3 ++#define EMIF4_TIM1_T_RAS 0x8 ++#define EMIF4_TIM1_T_RC 0xA ++#define EMIF4_TIM1_T_RRD 0x2 ++#define EMIF4_TIM1_T_WTR 0x2 ++ ++#define EMIF4_TIM2_T_XP 0x2 ++#define EMIF4_TIM2_T_ODT 0x0 ++#define EMIF4_TIM2_T_XSNR 0x1C ++#define EMIF4_TIM2_T_XSRD 0xC8 ++#define EMIF4_TIM2_T_RTP 0x1 ++#define EMIF4_TIM2_T_CKE 0x2 ++ ++#define EMIF4_TIM3_T_TDQSCKMAX 0x0 ++#define EMIF4_TIM3_T_RFC 0x25 ++#define EMIF4_TIM3_T_RAS_MAX 0x7 ++ ++#define EMIF4_PWR_IDLE 0x2 ++#define EMIF4_PWR_DPD_EN 0x0 ++#define EMIF4_PWR_PM_EN 0x0 ++#define EMIF4_PWR_PM_TIM 0x0 ++ ++#define EMIF4_INITREF_DIS 0x0 ++#define EMIF4_PASR 0x0 ++#define EMIF4_REFRESH_RATE 0x50F ++ ++/* ++ * SDRAM Config register ++ */ ++#define EMIF4_CFG_SDRAM_TYP 0x2 ++#define EMIF4_CFG_IBANK_POS 0x0 ++#define EMIF4_CFG_DDR_TERM 0x0 ++#define EMIF4_CFG_DDR2_DDQS 0x1 ++#define EMIF4_CFG_DYN_ODT 0x0 ++#define EMIF4_CFG_DDR_DIS_DLL 0x0 ++#define EMIF4_CFG_SDR_DRV 0x0 ++#define EMIF4_CFG_CWL 0x0 ++#define EMIF4_CFG_NARROW_MD 0x0 ++#define EMIF4_CFG_CL 0x5 ++#define EMIF4_CFG_ROWSIZE 0x0 ++#define EMIF4_CFG_IBANK 0x3 ++#define EMIF4_CFG_EBANK 0x0 ++#define EMIF4_CFG_PGSIZE 0x2 ++ ++/* ++ * EMIF4 PHY Control 1 register configuration ++ */ ++#define EMIF4_DDR1_RD_LAT 0x6 ++#define EMIF4_DDR1_PWRDN_DIS 0x1 ++#define EMIF4_DDR1_STRBEN_EXT 0x1 ++#define EMIF4_DDR1_DLL_MODE 0x0 ++#define EMIF4_DDR1_VTP_DYN 0x1 ++#define EMIF4_DDR1_LB_CK_SEL 0x0 ++ ++/* ++ * EMIF4 PHY Control 2 register configuration ++ */ ++#define EMIF4_DDR2_TX_DATA_ALIGN 0x0 ++#define EMIF4_DDR2_RX_DLL_BYPASS 0x0 ++ ++/* Following functions are exported from lowlevel_init.S */ ++extern dpll_param *get_mpu_dpll_param(void); ++#if 0 ++extern dpll_param *get_iva_dpll_param(void); ++#endif ++extern dpll_param *get_core_dpll_param(void); ++extern dpll_param *get_per_dpll_param(void); ++ ++extern int mmc_init(int verbose); ++extern block_dev_desc_t *mmc_get_dev(int dev); ++ ++#define __raw_readl(a) (*(volatile unsigned int *)(a)) ++#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) ++#define __raw_readw(a) (*(volatile unsigned short *)(a)) ++#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) ++ ++/******************************************************* ++ * Routine: delay ++ * Description: spinning delay to use before udelay works ++ ******************************************************/ ++static inline void delay(unsigned long loops) ++{ ++ __asm__ volatile ("1:\n" "subs %0, %1, #1\n" ++ "bne 1b":"=r" (loops):"0"(loops)); ++} ++ ++void udelay (unsigned long usecs) { ++ delay(usecs); ++} ++ ++/***************************************** ++ * Routine: board_init ++ * Description: Early hardware init. ++ *****************************************/ ++int board_init (void) ++{ ++ return 0; ++} ++ ++/************************************************************* ++ * get_device_type(): tell if GP/HS/EMU/TST ++ *************************************************************/ ++u32 get_device_type(void) ++{ ++ int mode; ++ mode = __raw_readl(CONTROL_STATUS) & (DEVICE_MASK); ++ return(mode >>= 8); ++} ++ ++/************************************************ ++ * get_sysboot_value(void) - return SYS_BOOT[4:0] ++ ************************************************/ ++u32 get_sysboot_value(void) ++{ ++ int mode; ++ mode = __raw_readl(CONTROL_STATUS) & (SYSBOOT_MASK); ++ return mode; ++} ++/************************************************************* ++ * Routine: get_mem_type(void) - returns the kind of memory connected ++ * to GPMC that we are trying to boot form. Uses SYS BOOT settings. ++ *************************************************************/ ++u32 get_mem_type(void) ++{ ++ u32 mem_type = get_sysboot_value(); ++ switch (mem_type){ ++ case 0: ++ case 2: ++ case 4: ++ case 16: ++ case 22: return GPMC_ONENAND; ++ ++ case 1: ++ case 12: ++ case 15: ++ case 21: ++ case 27: return GPMC_NAND; ++ ++ case 3: ++ case 6: return MMC_ONENAND; ++ ++ case 8: ++ case 11: ++ case 14: ++ case 20: ++ case 26: return GPMC_MDOC; ++ ++ case 17: ++ case 18: ++ case 24: return MMC_NAND; ++ ++ case 7: ++ case 10: ++ case 13: ++ case 19: ++ case 25: ++ default: return GPMC_NOR; ++ } ++} ++ ++/****************************************** ++ * get_cpu_rev(void) - extract version info ++ ******************************************/ ++u32 get_cpu_rev(void) ++{ ++ u32 cpuid=0; ++ /* On ES1.0 the IDCODE register is not exposed on L4 ++ * so using CPU ID to differentiate ++ * between ES2.0 and ES1.0. ++ */ ++ __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r" (cpuid)); ++ if((cpuid & 0xf) == 0x0) ++ return CPU_3430_ES1; ++ else ++ return CPU_3430_ES2; ++ ++} ++ ++/***************************************************************** ++ * sr32 - clear & set a value in a bit range for a 32 bit address ++ *****************************************************************/ ++void sr32(u32 addr, u32 start_bit, u32 num_bits, u32 value) ++{ ++ u32 tmp, msk = 0; ++ msk = 1 << num_bits; ++ --msk; ++ tmp = __raw_readl(addr) & ~(msk << start_bit); ++ tmp |= value << start_bit; ++ __raw_writel(tmp, addr); ++} ++ ++/********************************************************************* ++ * wait_on_value() - common routine to allow waiting for changes in ++ * volatile regs. ++ *********************************************************************/ ++u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound) ++{ ++ u32 i = 0, val; ++ do { ++ ++i; ++ val = __raw_readl(read_addr) & read_bit_mask; ++ if (val == match_value) ++ return (1); ++ if (i == bound) ++ return (0); ++ } while (1); ++} ++ ++/********************************************************************* ++ * config_emif4_ddr() - Init/Configure DDR on OMAP3517 EVM board. ++ *********************************************************************/ ++void config_emif4_ddr(void) ++{ ++ unsigned int regval; ++ ++ /* Set the DDR PHY parameters in PHY ctrl registers */ ++ regval = (EMIF4_DDR1_RD_LAT | (EMIF4_DDR1_PWRDN_DIS << 6) | ++ (EMIF4_DDR1_STRBEN_EXT << 7) | (EMIF4_DDR1_DLL_MODE << 12) | ++ (EMIF4_DDR1_VTP_DYN << 15) | (EMIF4_DDR1_LB_CK_SEL << 23)); ++ __raw_writel(regval, EMIF4_DDR_PHYCTL1); ++ __raw_writel(regval, EMIF4_DDR_PHYCTL1_SHDW); ++ ++ regval = (EMIF4_DDR2_TX_DATA_ALIGN | (EMIF4_DDR2_RX_DLL_BYPASS << 1)); ++ __raw_writel(regval, EMIF4_DDR_PHYCTL2); ++ ++ /* Reset the DDR PHY and wait till completed */ ++ sr32(EMIF4_IODFT_TLGC, 10, 1, 1); ++ /*Wait till that bit clears*/ ++ while ((__raw_readl(EMIF4_IODFT_TLGC) & BIT10) == 0x1); ++ /*Re-verify the DDR PHY status*/ ++ while ((__raw_readl(EMIF4_SDRAM_STS) & BIT2) == 0x0); ++ ++ sr32(EMIF4_IODFT_TLGC, 0, 1, 1); ++ /* Set SDR timing registers */ ++ regval = (EMIF4_TIM1_T_WTR | (EMIF4_TIM1_T_RRD << 3) | ++ (EMIF4_TIM1_T_RC << 6) | (EMIF4_TIM1_T_RAS << 12) | ++ (EMIF4_TIM1_T_WR << 17) | (EMIF4_TIM1_T_RCD << 21) | ++ (EMIF4_TIM1_T_RP << 25)); ++ __raw_writel(regval, EMIF4_SDRAM_TIM1); ++ __raw_writel(regval, EMIF4_SDRAM_TIM1_SHDW); ++ ++ regval = (EMIF4_TIM2_T_CKE | (EMIF4_TIM2_T_RTP << 3) | ++ (EMIF4_TIM2_T_XSRD << 6) | (EMIF4_TIM2_T_XSNR << 16) | ++ (EMIF4_TIM2_T_ODT << 25) | (EMIF4_TIM2_T_XP << 28)); ++ __raw_writel(regval, EMIF4_SDRAM_TIM2); ++ __raw_writel(regval, EMIF4_SDRAM_TIM2_SHDW); ++ ++ regval = (EMIF4_TIM3_T_RAS_MAX | (EMIF4_TIM3_T_RFC << 4) | ++ (EMIF4_TIM3_T_TDQSCKMAX << 13)); ++ __raw_writel(regval, EMIF4_SDRAM_TIM3); ++ __raw_writel(regval, EMIF4_SDRAM_TIM3_SHDW); ++ ++ /* Set the PWR control register */ ++ regval = (EMIF4_PWR_PM_TIM | (EMIF4_PWR_PM_EN << 8) | ++ (EMIF4_PWR_DPD_EN << 10) | (EMIF4_PWR_IDLE << 30)); ++ __raw_writel(regval, EMIF4_PWR_MGT_CTRL); ++ __raw_writel(regval, EMIF4_PWR_MGT_CTRL_SHDW); ++ ++ /* Set the DDR refresh rate control register */ ++ regval = (EMIF4_REFRESH_RATE | (EMIF4_PASR << 24) | ++ (EMIF4_INITREF_DIS << 31)); ++ __raw_writel(regval, EMIF4_SDRAM_RFCR); ++ __raw_writel(regval, EMIF4_SDRAM_RFCR_SHDW); ++ ++ /* set the SDRAM configuration register */ ++ regval = (EMIF4_CFG_PGSIZE | (EMIF4_CFG_EBANK << 3) | ++ (EMIF4_CFG_IBANK << 4) | (EMIF4_CFG_ROWSIZE << 7) | ++ (EMIF4_CFG_CL << 10) | (EMIF4_CFG_NARROW_MD << 14) | ++ (EMIF4_CFG_CWL << 16) | (EMIF4_CFG_SDR_DRV << 18) | ++ (EMIF4_CFG_DDR_DIS_DLL << 20) | (EMIF4_CFG_DYN_ODT << 21) | ++ (EMIF4_CFG_DDR2_DDQS << 23) | (EMIF4_CFG_DDR_TERM << 24) | ++ (EMIF4_CFG_IBANK_POS << 27) | (EMIF4_CFG_SDRAM_TYP << 29)); ++ __raw_writel(regval, EMIF4_SDRAM_CFG); ++} ++ ++/************************************************************* ++ * get_sys_clk_speed - determine reference oscillator speed ++ * based on known 32kHz clock and gptimer. ++ *************************************************************/ ++u32 get_osc_clk_speed(void) ++{ ++ u32 start, cstart, cend, cdiff, val; ++ ++ val = __raw_readl(PRM_CLKSRC_CTRL); ++ /* If SYS_CLK is being divided by 2, remove for now */ ++ val = (val & (~BIT7)) | BIT6; ++ __raw_writel(val, PRM_CLKSRC_CTRL); ++ ++ /* enable timer2 */ ++ val = __raw_readl(CM_CLKSEL_WKUP) | BIT0; ++ __raw_writel(val, CM_CLKSEL_WKUP); /* select sys_clk for GPT1 */ ++ ++ /* Enable I and F Clocks for GPT1 */ ++ val = __raw_readl(CM_ICLKEN_WKUP) | BIT0 | BIT2; ++ __raw_writel(val, CM_ICLKEN_WKUP); ++ val = __raw_readl(CM_FCLKEN_WKUP) | BIT0; ++ __raw_writel(val, CM_FCLKEN_WKUP); ++ ++ __raw_writel(0, OMAP34XX_GPT1 + TLDR); /* start counting at 0 */ ++ __raw_writel(GPT_EN, OMAP34XX_GPT1 + TCLR); /* enable clock */ ++ /* enable 32kHz source *//* enabled out of reset */ ++ /* determine sys_clk via gauging */ ++ ++ start = 20 + __raw_readl(S32K_CR); /* start time in 20 cycles */ ++ while (__raw_readl(S32K_CR) < start); /* dead loop till start time */ ++ cstart = __raw_readl(OMAP34XX_GPT1 + TCRR); /* get start sys_clk count */ ++ while (__raw_readl(S32K_CR) < (start + 20)); /* wait for 40 cycles */ ++ cend = __raw_readl(OMAP34XX_GPT1 + TCRR); /* get end sys_clk count */ ++ cdiff = cend - cstart; /* get elapsed ticks */ ++ ++ /* based on number of ticks assign speed */ ++ if (cdiff > 19000) ++ return (S38_4M); ++ else if (cdiff > 15200) ++ return (S26M); ++ else if (cdiff > 13000) ++ return (S24M); ++ else if (cdiff > 9000) ++ return (S19_2M); ++ else if (cdiff > 7600) ++ return (S13M); ++ else ++ return (S12M); ++} ++ ++/****************************************************************************** ++ * get_sys_clkin_sel() - returns the sys_clkin_sel field value based on ++ * -- input oscillator clock frequency. ++ * ++ *****************************************************************************/ ++void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel) ++{ ++ if(osc_clk == S38_4M) ++ *sys_clkin_sel= 4; ++ else if(osc_clk == S26M) ++ *sys_clkin_sel = 3; ++ else if(osc_clk == S19_2M) ++ *sys_clkin_sel = 2; ++ else if(osc_clk == S13M) ++ *sys_clkin_sel = 1; ++ else if(osc_clk == S12M) ++ *sys_clkin_sel = 0; ++} ++ ++/****************************************************************************** ++ * prcm_init() - inits clocks for PRCM as defined in clocks.h ++ * -- called from SRAM, or Flash (using temp SRAM stack). ++ *****************************************************************************/ ++void prcm_init(void) ++{ ++ u32 osc_clk=0, sys_clkin_sel; ++ dpll_param *dpll_param_p; ++ u32 clk_index, sil_index; ++ ++ /* Gauge the input clock speed and find out the sys_clkin_sel ++ * value corresponding to the input clock. ++ */ ++ osc_clk = get_osc_clk_speed(); ++ get_sys_clkin_sel(osc_clk, &sys_clkin_sel); ++ ++ sr32(PRM_CLKSEL, 0, 3, sys_clkin_sel); /* set input crystal speed */ ++ ++ /* If the input clock is greater than 19.2M always divide/2 */ ++ if(sys_clkin_sel > 2) { ++ sr32(PRM_CLKSRC_CTRL, 6, 2, 2);/* input clock divider */ ++ clk_index = sys_clkin_sel/2; ++ } else { ++ sr32(PRM_CLKSRC_CTRL, 6, 2, 1);/* input clock divider */ ++ clk_index = sys_clkin_sel; ++ } ++ ++ /* The DPLL tables are defined according to sysclk value and ++ * silicon revision. The clk_index value will be used to get ++ * the values for that input sysclk from the DPLL param table ++ * and sil_index will get the values for that SysClk for the ++ * appropriate silicon rev. ++ */ ++ sil_index = get_cpu_rev() - 1; ++ ++ /* Unlock MPU DPLL (slows things down, and needed later) */ ++ sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOW_POWER_BYPASS); ++ wait_on_value(BIT0, 0, CM_IDLEST_PLL_MPU, LDELAY); ++ ++ /* Getting the base address of Core DPLL param table*/ ++ dpll_param_p = (dpll_param *)get_core_dpll_param(); ++ /* Moving it to the right sysclk and ES rev base */ ++ dpll_param_p = dpll_param_p + 2*clk_index + sil_index; ++ /* CORE DPLL */ ++ /* sr32(CM_CLKSEL2_EMU) set override to work when asleep */ ++ sr32(CM_CLKEN_PLL, 0, 3, PLL_FAST_RELOCK_BYPASS); ++ wait_on_value(BIT0, 0, CM_IDLEST_CKGEN, LDELAY); ++ sr32(CM_CLKSEL1_EMU, 16, 5, CORE_M3X2); /* m3x2 */ ++ sr32(CM_CLKSEL1_PLL, 27, 2, dpll_param_p->m2); /* Set M2 */ ++ sr32(CM_CLKSEL1_PLL, 16, 11, dpll_param_p->m); /* Set M */ ++ sr32(CM_CLKSEL1_PLL, 8, 7, dpll_param_p->n); /* Set N */ ++ sr32(CM_CLKSEL1_PLL, 6, 1, 0); /* 96M Src */ ++ sr32(CM_CLKSEL_CORE, 2, 2, CORE_L4_DIV); /* l4 */ ++ sr32(CM_CLKSEL_CORE, 0, 2, CORE_L3_DIV); /* l3 */ ++ sr32(CM_CLKSEL_WKUP, 1, 2, WKUP_RSM); /* reset mgr */ ++ sr32(CM_CLKEN_PLL, 4, 4, dpll_param_p->fsel); /* FREQSEL */ ++ sr32(CM_CLKEN_PLL, 0, 3, PLL_LOCK); /* lock mode */ ++ wait_on_value(BIT0, 1, CM_IDLEST_CKGEN, LDELAY); ++ ++ /* Getting the base address to PER DPLL param table*/ ++ dpll_param_p = (dpll_param *)get_per_dpll_param(); ++ /* Moving it to the right sysclk base */ ++ dpll_param_p = dpll_param_p + clk_index; ++ /* PER DPLL */ ++ sr32(CM_CLKEN_PLL, 16, 3, PLL_STOP); ++ wait_on_value(BIT1, 0, CM_IDLEST_CKGEN, LDELAY); ++ sr32(CM_CLKSEL1_EMU, 24, 5, PER_M6X2); /* set M6 */ ++ sr32(CM_CLKSEL_CAM, 0, 5, PER_M5X2); /* set M5 */ ++ sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2); /* set M4 */ ++ sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2); /* set M3 */ ++ sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2); /* set M2 */ ++ sr32(CM_CLKSEL2_PLL, 8, 11, dpll_param_p->m); /* set m */ ++ sr32(CM_CLKSEL2_PLL, 0, 7, dpll_param_p->n); /* set n */ ++ sr32(CM_CLKEN_PLL, 20, 4, dpll_param_p->fsel);/* FREQSEL */ ++ sr32(CM_CLKEN_PLL, 16, 3, PLL_LOCK); /* lock mode */ ++ wait_on_value(BIT1, 2, CM_IDLEST_CKGEN, LDELAY); ++ ++ /* Getting the base address to MPU DPLL param table*/ ++ dpll_param_p = (dpll_param *)get_mpu_dpll_param(); ++ /* Moving it to the right sysclk and ES rev base */ ++ dpll_param_p = dpll_param_p + 2*clk_index + sil_index; ++ /* MPU DPLL (unlocked already) */ ++ sr32(CM_CLKSEL2_PLL_MPU, 0, 5, dpll_param_p->m2); /* Set M2 */ ++ sr32(CM_CLKSEL1_PLL_MPU, 8, 11, dpll_param_p->m); /* Set M */ ++ sr32(CM_CLKSEL1_PLL_MPU, 0, 7, dpll_param_p->n); /* Set N */ ++ sr32(CM_CLKEN_PLL_MPU, 4, 4, dpll_param_p->fsel); /* FREQSEL */ ++ sr32(CM_CLKEN_PLL_MPU, 0, 3, PLL_LOCK); /* lock mode */ ++ wait_on_value(BIT0, 1, CM_IDLEST_PLL_MPU, LDELAY); ++ ++ /* Set up GPTimers to sys_clk source only */ ++ sr32(CM_CLKSEL_PER, 0, 8, 0xff); ++ sr32(CM_CLKSEL_WKUP, 0, 1, 1); ++ ++ delay(5000); ++} ++ ++/***************************************** ++ * Routine: secure_unlock ++ * Description: Setup security registers for access ++ * (GP Device only) ++ *****************************************/ ++void secure_unlock(void) ++{ ++ /* Permission values for registers -Full fledged permissions to all */ ++ #define UNLOCK_1 0xFFFFFFFF ++ #define UNLOCK_2 0x00000000 ++ #define UNLOCK_3 0x0000FFFF ++ /* Protection Module Register Target APE (PM_RT)*/ ++ __raw_writel(UNLOCK_1, RT_REQ_INFO_PERMISSION_1); ++ __raw_writel(UNLOCK_1, RT_READ_PERMISSION_0); ++ __raw_writel(UNLOCK_1, RT_WRITE_PERMISSION_0); ++ __raw_writel(UNLOCK_2, RT_ADDR_MATCH_1); ++ ++ __raw_writel(UNLOCK_3, GPMC_REQ_INFO_PERMISSION_0); ++ __raw_writel(UNLOCK_3, GPMC_READ_PERMISSION_0); ++ __raw_writel(UNLOCK_3, GPMC_WRITE_PERMISSION_0); ++ ++ __raw_writel(UNLOCK_3, OCM_REQ_INFO_PERMISSION_0); ++ __raw_writel(UNLOCK_3, OCM_READ_PERMISSION_0); ++ __raw_writel(UNLOCK_3, OCM_WRITE_PERMISSION_0); ++ __raw_writel(UNLOCK_2, OCM_ADDR_MATCH_2); ++ ++ __raw_writel(UNLOCK_1, SMS_RG_ATT0); /* SDRC region 0 public */ ++} ++ ++/********************************************************** ++ * Routine: try_unlock_sram() ++ * Description: If chip is GP type, unlock the SRAM for ++ * general use. ++ ***********************************************************/ ++void try_unlock_memory(void) ++{ ++ int mode; ++ ++ /* if GP device unlock device SRAM for general use */ ++ /* secure code breaks for Secure/Emulation device - HS/E/T*/ ++ mode = get_device_type(); ++ if (mode == GP_DEVICE) { ++ secure_unlock(); ++ } ++ return; ++} ++ ++/********************************************************** ++ * Routine: s_init ++ * Description: Does early system init of muxing and clocks. ++ * - Called at time when only stack is available. ++ **********************************************************/ ++ ++void s_init(void) ++{ ++ watchdog_init(); ++#ifdef CONFIG_3430_AS_3410 ++ /* setup the scalability control register for ++ * 3430 to work in 3410 mode ++ */ ++ __raw_writel(0x5ABF,CONTROL_SCALABLE_OMAP_OCP); ++#endif ++ try_unlock_memory(); ++ set_muxconf_regs(); ++ delay(100); ++ prcm_init(); ++ per_clocks_enable(); ++ ++ /* enable the DDRPHY clk */ ++ sr32((OMAP34XX_CTRL_BASE + 0x588), 15, 15, 0x1); ++ /* enable the EMIF4 clk */ ++ sr32((OMAP34XX_CTRL_BASE + 0x588), 14, 14, 0x1); ++ /* Enable the peripheral clocks */ ++ sr32((OMAP34XX_CTRL_BASE + 0x59C), 0, 4, 0xF); ++ sr32((OMAP34XX_CTRL_BASE + 0x59C), 8, 10, 0x7); ++ ++ /* bring cpgmac out of reset */ ++ sr32((OMAP34XX_CTRL_BASE + 0x598), 1, 1, 0x1); ++ ++ /* Configure the EMIF4 for our DDR */ ++ config_emif4_ddr(); ++} ++ ++/******************************************************* ++ * Routine: misc_init_r ++ * Description: Init ethernet (done here so udelay works) ++ ********************************************************/ ++int misc_init_r (void) ++{ ++ return(0); ++} ++ ++/****************************************************** ++ * Routine: wait_for_command_complete ++ * Description: Wait for posting to finish on watchdog ++ ******************************************************/ ++void wait_for_command_complete(unsigned int wd_base) ++{ ++ int pending = 1; ++ do { ++ pending = __raw_readl(wd_base + WWPS); ++ } while (pending); ++} ++ ++/**************************************** ++ * Routine: watchdog_init ++ * Description: Shut down watch dogs ++ *****************************************/ ++void watchdog_init(void) ++{ ++ /* There are 3 watch dogs WD1=Secure, WD2=MPU, WD3=IVA. WD1 is ++ * either taken care of by ROM (HS/EMU) or not accessible (GP). ++ * We need to take care of WD2-MPU or take a PRCM reset. WD3 ++ * should not be running and does not generate a PRCM reset. ++ */ ++ sr32(CM_FCLKEN_WKUP, 5, 1, 1); ++ sr32(CM_ICLKEN_WKUP, 5, 1, 1); ++ wait_on_value(BIT5, 0x20, CM_IDLEST_WKUP, 5); /* some issue here */ ++ ++ __raw_writel(WD_UNLOCK1, WD2_BASE + WSPR); ++ wait_for_command_complete(WD2_BASE); ++ __raw_writel(WD_UNLOCK2, WD2_BASE + WSPR); ++} ++ ++/********************************************** ++ * Routine: dram_init ++ * Description: sets uboots idea of sdram size ++ **********************************************/ ++int dram_init (void) ++{ ++ return 0; ++} ++ ++/***************************************************************** ++ * Routine: peripheral_enable ++ * Description: Enable the clks & power for perifs (GPT2, UART1,...) ++ ******************************************************************/ ++void per_clocks_enable(void) ++{ ++ /* Enable GP2 timer. */ ++ sr32(CM_CLKSEL_PER, 0, 1, 0x1); /* GPT2 = sys clk */ ++ sr32(CM_ICLKEN_PER, 3, 1, 0x1); /* ICKen GPT2 */ ++ sr32(CM_FCLKEN_PER, 3, 1, 0x1); /* FCKen GPT2 */ ++ ++#ifdef CFG_NS16550 ++ /* Enable UART1 clocks */ ++ sr32(CM_FCLKEN1_CORE, 13, 1, 0x1); ++ sr32(CM_ICLKEN1_CORE, 13, 1, 0x1); ++ ++ /* Enable UART2 clocks */ ++ sr32(CM_FCLKEN1_CORE, 14, 1, 0x1); ++ sr32(CM_ICLKEN1_CORE, 14, 1, 0x1); ++ ++ /* Enable UART2 clocks */ ++ sr32(CM_FCLKEN_PER, 11, 1, 0x1); ++ sr32(CM_ICLKEN_PER, 11, 1, 0x1); ++#endif ++ /* Enable MMC1 clocks */ ++ sr32(CM_FCLKEN1_CORE, 24, 1, 0x1); ++ sr32(CM_ICLKEN1_CORE, 24, 1, 0x1); ++ ++ /* Enable MMC2 clocks */ ++ sr32(CM_FCLKEN1_CORE, 25, 1, 0x1); ++ sr32(CM_ICLKEN1_CORE, 25, 1, 0x1); ++ ++ delay(1000); ++} ++ ++/* Set MUX for UART, GPMC, SDRC, GPIO */ ++ ++#define MUX_VAL(OFFSET,VALUE)\ ++ __raw_writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET)); ++ ++#define CP(x) (CONTROL_PADCONF_##x) ++/* ++ * IEN - Input Enable ++ * IDIS - Input Disable ++ * PTD - Pull type Down ++ * PTU - Pull type Up ++ * DIS - Pull type selection is inactive ++ * EN - Pull type selection is active ++ * M0 - Mode 0 ++ * The commented string gives the final mux configuration for that pin ++ */ ++#define MUX_DEFAULT()\ ++ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ ++ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ ++ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ ++ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ ++ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ ++ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ ++ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ ++ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ ++ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ ++ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ ++ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ ++ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ ++ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ ++ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ ++ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ ++ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ ++ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ ++ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ ++ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ ++ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ ++ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ ++ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ ++ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ ++ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ ++ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ ++ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ ++ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ ++ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ ++ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ ++ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ ++ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ ++ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ ++ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ ++ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ ++ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ ++ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ ++ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ ++ MUX_VAL(CP(sdrc_cke0), (M0)) /*SDRC_CKE0*/\ ++ MUX_VAL(CP(sdrc_cke1), (M0)) /*SDRC_CKE1*/\ ++ MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ ++ MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ ++ MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ ++ MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ ++ MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ ++ MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ ++ MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ ++ MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ ++ MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ ++ MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ ++ MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ ++ MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ ++ MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ ++ MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ ++ MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ ++ MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ ++ MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ ++ MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ ++ MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ ++ MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ ++ MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ ++ MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ ++ MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ ++ MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ ++ MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ ++ MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ ++ MUX_VAL(CP(GPMC_nCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ ++ MUX_VAL(CP(GPMC_nCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ ++ MUX_VAL(CP(GPMC_nCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ ++ MUX_VAL(CP(GPMC_nCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\ ++ MUX_VAL(CP(GPMC_nCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\ ++ MUX_VAL(CP(GPMC_nCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\ ++ MUX_VAL(CP(GPMC_nCS6), (IDIS | PTU | EN | M0)) /*GPMC_nCS6*/\ ++ MUX_VAL(CP(GPMC_nCS7), (IDIS | PTU | EN | M0)) /*GPMC_nCS7*/\ ++ MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ ++ MUX_VAL(CP(GPMC_nADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ ++ MUX_VAL(CP(GPMC_nOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ ++ MUX_VAL(CP(GPMC_nWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ ++ MUX_VAL(CP(GPMC_nBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ ++ MUX_VAL(CP(GPMC_nBE1), (IDIS | PTD | DIS | M4)) /*GPIO_61*/\ ++ MUX_VAL(CP(GPMC_nWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ ++ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ ++ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ ++ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ ++ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) /*GPIO_65*/\ ++ MUX_VAL(CP(DSS_DATA18), (IEN | PTD | DIS | M4)) /*GPIO_88*/\ ++ MUX_VAL(CP(DSS_DATA19), (IEN | PTD | DIS | M4)) /*GPIO_89*/\ ++ MUX_VAL(CP(DSS_DATA20), (IEN | PTD | DIS | M4)) /*GPIO_90*/\ ++ MUX_VAL(CP(DSS_DATA21), (IEN | PTD | DIS | M4)) /*GPIO_91*/\ ++ MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ ++ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ ++ MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART1_RTS*/\ ++ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTU | DIS | M0)) /*UART1_CTS*/\ ++ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ ++ /*Expansion card */\ ++ MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) /*MMC1_CLK*/\ ++ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) /*MMC1_CMD*/\ ++ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0)) /*MMC1_DAT0*/\ ++ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) /*MMC1_DAT1*/\ ++ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) /*MMC1_DAT2*/\ ++ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) /*MMC1_DAT3*/\ ++ MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | DIS | M0)) /*MMC1_DAT4*/\ ++ MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | DIS | M0)) /*MMC1_DAT5*/\ ++ MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | DIS | M0)) /*MMC1_DAT6*/\ ++ MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | DIS | M0)) /*MMC1_DAT7*/\ ++ MUX_VAL(CP(McBSP1_DX), (IEN | PTD | DIS | M4)) /*GPIO_158*/\ ++ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ ++ MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2 */\ ++ MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ ++ MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4 */\ ++ MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5 */\ ++ MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6 */\ ++ MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7 */\ ++ MUX_VAL(CP(SYS_BOOT6), (IEN | PTD | DIS | M4)) /*GPIO_8 */\ ++ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\ ++ MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)) /*JTAG_nTRST*/\ ++ MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)) /*JTAG_TCK*/\ ++ MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)) /*JTAG_TMS*/\ ++ MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)) /*JTAG_TDI*/\ ++ MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) /*JTAG_EMU0*/\ ++ MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) /*JTAG_EMU1*/\ ++ MUX_VAL(CP(ETK_CLK), (IEN | PTD | DIS | M4)) /*GPIO_12*/\ ++ MUX_VAL(CP(ETK_CTL), (IEN | PTD | DIS | M4)) /*GPIO_13*/\ ++ MUX_VAL(CP(ETK_D0 ), (IEN | PTD | DIS | M4)) /*GPIO_14*/\ ++ MUX_VAL(CP(ETK_D1 ), (IEN | PTD | DIS | M4)) /*GPIO_15*/\ ++ MUX_VAL(CP(ETK_D2 ), (IEN | PTD | DIS | M4)) /*GPIO_16*/\ ++ MUX_VAL(CP(ETK_D10), (IEN | PTD | DIS | M4)) /*GPIO_24*/\ ++ MUX_VAL(CP(ETK_D11), (IEN | PTD | DIS | M4)) /*GPIO_25*/\ ++ MUX_VAL(CP(ETK_D12), (IEN | PTD | DIS | M4)) /*GPIO_26*/\ ++ MUX_VAL(CP(ETK_D13), (IEN | PTD | DIS | M4)) /*GPIO_27*/\ ++ MUX_VAL(CP(ETK_D14), (IEN | PTD | DIS | M4)) /*GPIO_28*/\ ++ MUX_VAL(CP(ETK_D15), (IEN | PTD | DIS | M4)) /*GPIO_29*/ ++ ++/********************************************************** ++ * Routine: set_muxconf_regs ++ * Description: Setting up the configuration Mux registers ++ * specific to the hardware. Many pins need ++ * to be moved from protect to primary mode. ++ *********************************************************/ ++void set_muxconf_regs(void) ++{ ++ MUX_DEFAULT(); ++} ++ ++/********************************************************** ++ * Routine: nand+_init ++ * Description: Set up nand for nand and jffs2 commands ++ *********************************************************/ ++ ++int nand_init(void) ++{ ++ /* global settings */ ++ __raw_writel(0x10, GPMC_SYSCONFIG); /* smart idle */ ++ __raw_writel(0x0, GPMC_IRQENABLE); /* isr's sources masked */ ++ __raw_writel(0, GPMC_TIMEOUT_CONTROL);/* timeout disable */ ++ ++ /* Set the GPMC Vals . For NAND boot on 3430SDP, NAND is mapped at CS0 ++ * , NOR at CS1 and MPDB at CS3. And oneNAND boot, we map oneNAND at CS0. ++ * We configure only GPMC CS0 with required values. Configiring other devices ++ * at other CS in done in u-boot anyway. So we don't have to bother doing it here. ++ */ ++ __raw_writel(0 , GPMC_CONFIG7 + GPMC_CONFIG_CS0); ++ delay(1000); ++ ++ if ((get_mem_type() == GPMC_NAND) || (get_mem_type() == MMC_NAND)){ ++ __raw_writel( M_NAND_GPMC_CONFIG1, GPMC_CONFIG1 + GPMC_CONFIG_CS0); ++ __raw_writel( M_NAND_GPMC_CONFIG2, GPMC_CONFIG2 + GPMC_CONFIG_CS0); ++ __raw_writel( M_NAND_GPMC_CONFIG3, GPMC_CONFIG3 + GPMC_CONFIG_CS0); ++ __raw_writel( M_NAND_GPMC_CONFIG4, GPMC_CONFIG4 + GPMC_CONFIG_CS0); ++ __raw_writel( M_NAND_GPMC_CONFIG5, GPMC_CONFIG5 + GPMC_CONFIG_CS0); ++ __raw_writel( M_NAND_GPMC_CONFIG6, GPMC_CONFIG6 + GPMC_CONFIG_CS0); ++ ++ /* Enable the GPMC Mapping */ ++ __raw_writel(( ((OMAP34XX_GPMC_CS0_SIZE & 0xF)<<8) | ++ ((NAND_BASE_ADR>>24) & 0x3F) | ++ (1<<6) ), (GPMC_CONFIG7 + GPMC_CONFIG_CS0)); ++ delay(2000); ++ ++ if (nand_chip()){ ++#ifdef CFG_PRINTF ++ printf("Unsupported NAND Chip!\n"); ++#endif ++ return 1; ++ } ++ ++ } ++ ++ if ((get_mem_type() == GPMC_ONENAND) || (get_mem_type() == MMC_ONENAND)){ ++ __raw_writel( ONENAND_GPMC_CONFIG1, GPMC_CONFIG1 + GPMC_CONFIG_CS0); ++ __raw_writel( ONENAND_GPMC_CONFIG2, GPMC_CONFIG2 + GPMC_CONFIG_CS0); ++ __raw_writel( ONENAND_GPMC_CONFIG3, GPMC_CONFIG3 + GPMC_CONFIG_CS0); ++ __raw_writel( ONENAND_GPMC_CONFIG4, GPMC_CONFIG4 + GPMC_CONFIG_CS0); ++ __raw_writel( ONENAND_GPMC_CONFIG5, GPMC_CONFIG5 + GPMC_CONFIG_CS0); ++ __raw_writel( ONENAND_GPMC_CONFIG6, GPMC_CONFIG6 + GPMC_CONFIG_CS0); ++ ++ /* Enable the GPMC Mapping */ ++ __raw_writel(( ((OMAP34XX_GPMC_CS0_SIZE & 0xF)<<8) | ++ ((ONENAND_BASE>>24) & 0x3F) | ++ (1<<6) ), (GPMC_CONFIG7 + GPMC_CONFIG_CS0)); ++ delay(2000); ++ ++ if (onenand_chip()){ ++#ifdef CFG_PRINTF ++ printf("OneNAND Unsupported !\n"); ++#endif ++ return 1; ++ } ++ } ++ return 0; ++} ++ ++ ++typedef int (mmc_boot_addr) (void); ++int mmc_boot(unsigned char *buf) ++{ ++ ++ long size = 0; ++#ifdef CFG_CMD_FAT ++ block_dev_desc_t *dev_desc = NULL; ++ unsigned char ret = 0; ++ ++ printf("Starting X-loader on MMC \n"); ++ ++ ret = mmc_init(1); ++ if(ret == 0){ ++ printf("\n MMC init failed \n"); ++ return 0; ++ } ++ ++ dev_desc = mmc_get_dev(0); ++ fat_register_device(dev_desc, 1); ++ size = file_fat_read("u-boot.bin", buf, 0); ++ if (size == -1) { ++ return 0; ++ } ++ printf("\n%ld Bytes Read from MMC \n", size); ++ ++ printf("Starting OS Bootloader from MMC...\n"); ++#endif ++ return size; ++} ++ ++/* optionally do something like blinking LED */ ++void board_hang (void) ++{ while (0) {};} ++ ++/****************************************************************************** ++ ++ * Dummy function to handle errors for EABI incompatibility ++ ++ *****************************************************************************/ ++ ++void raise(void) ++{ ++} ++ ++ ++/****************************************************************************** ++ ++ * Dummy function to handle errors for EABI incompatibility ++ ++ *****************************************************************************/ ++ ++void abort(void) ++{ ++} ++ ++ +diff -Nurd git/board/omap3517evm/platform.S x-load-shiva/board/omap3517evm/platform.S +--- git/board/omap3517evm/platform.S 1970-01-01 01:00:00.000000000 +0100 ++++ x-load-shiva/board/omap3517evm/platform.S 2009-09-08 16:54:36.000000000 +0200 +@@ -0,0 +1,435 @@ ++/* ++ * Board specific setup info ++ * ++ * (C) Copyright 2004-2006 ++ * Texas Instruments, ++ * Richard Woodruff ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++#include ++ ++_TEXT_BASE: ++ .word TEXT_BASE /* sdram load addr from config.mk */ ++ ++#if !defined(CFG_NAND_BOOT) && !defined(CFG_NAND_BOOT) ++/************************************************************************** ++ * cpy_clk_code: relocates clock code into SRAM where its safer to execute ++ * R1 = SRAM destination address. ++ *************************************************************************/ ++.global cpy_clk_code ++ cpy_clk_code: ++ /* Copy DPLL code into SRAM */ ++ adr r0, go_to_speed /* get addr of clock setting code */ ++ mov r2, #384 /* r2 size to copy (div by 32 bytes) */ ++ mov r1, r1 /* r1 <- dest address (passed in) */ ++ add r2, r2, r0 /* r2 <- source end address */ ++next2: ++ ldmia r0!, {r3-r10} /* copy from source address [r0] */ ++ stmia r1!, {r3-r10} /* copy to target address [r1] */ ++ cmp r0, r2 /* until source end address [r2] */ ++ bne next2 ++ mov pc, lr /* back to caller */ ++ ++/* **************************************************************************** ++ * NOTE: 3430 X-loader currently does not use this code. ++* It could be removed its is kept for compatabily with u-boot. ++ * ++ * go_to_speed: -Moves to bypass, -Commits clock dividers, -puts dpll at speed ++ * -executed from SRAM. ++ * R0 = CM_CLKEN_PLL-bypass value ++ * R1 = CM_CLKSEL1_PLL-m, n, and divider values ++ * R2 = CM_CLKSEL_CORE-divider values ++ * R3 = CM_IDLEST_CKGEN - addr dpll lock wait ++ * ++ * Note: If core unlocks/relocks and SDRAM is running fast already it gets ++ * confused. A reset of the controller gets it back. Taking away its ++ * L3 when its not in self refresh seems bad for it. Normally, this code ++ * runs from flash before SDR is init so that should be ok. ++ ******************************************************************************/ ++.global go_to_speed ++ go_to_speed: ++ stmfd sp!, {r4-r6} ++ ++ /* move into fast relock bypass */ ++ ldr r4, pll_ctl_add ++ str r0, [r4] ++wait1: ++ ldr r5, [r3] /* get status */ ++ and r5, r5, #0x1 /* isolate core status */ ++ cmp r5, #0x1 /* still locked? */ ++ beq wait1 /* if lock, loop */ ++ ++ /* set new dpll dividers _after_ in bypass */ ++ ldr r5, pll_div_add1 ++ str r1, [r5] /* set m, n, m2 */ ++ ldr r5, pll_div_add2 ++ str r2, [r5] /* set l3/l4/.. dividers*/ ++ ldr r5, pll_div_add3 /* wkup */ ++ ldr r2, pll_div_val3 /* rsm val */ ++ str r2, [r5] ++ ldr r5, pll_div_add4 /* gfx */ ++ ldr r2, pll_div_val4 ++ str r2, [r5] ++ ldr r5, pll_div_add5 /* emu */ ++ ldr r2, pll_div_val5 ++ str r2, [r5] ++ ++ /* now prepare GPMC (flash) for new dpll speed */ ++ /* flash needs to be stable when we jump back to it */ ++ ldr r5, flash_cfg3_addr ++ ldr r2, flash_cfg3_val ++ str r2, [r5] ++ ldr r5, flash_cfg4_addr ++ ldr r2, flash_cfg4_val ++ str r2, [r5] ++ ldr r5, flash_cfg5_addr ++ ldr r2, flash_cfg5_val ++ str r2, [r5] ++ ldr r5, flash_cfg1_addr ++ ldr r2, [r5] ++ orr r2, r2, #0x3 /* up gpmc divider */ ++ str r2, [r5] ++ ++ /* lock DPLL3 and wait a bit */ ++ orr r0, r0, #0x7 /* set up for lock mode */ ++ str r0, [r4] /* lock */ ++ nop /* ARM slow at this point working at sys_clk */ ++ nop ++ nop ++ nop ++wait2: ++ ldr r5, [r3] /* get status */ ++ and r5, r5, #0x1 /* isolate core status */ ++ cmp r5, #0x1 /* still locked? */ ++ bne wait2 /* if lock, loop */ ++ nop ++ nop ++ nop ++ nop ++ ldmfd sp!, {r4-r6} ++ mov pc, lr /* back to caller, locked */ ++ ++_go_to_speed: .word go_to_speed ++ ++/* these constants need to be close for PIC code */ ++/* The Nor has to be in the Flash Base CS0 for this condition to happen */ ++flash_cfg1_addr: ++ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG1) ++flash_cfg3_addr: ++ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG3) ++flash_cfg3_val: ++ .word STNOR_GPMC_CONFIG3 ++flash_cfg4_addr: ++ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG4) ++flash_cfg4_val: ++ .word STNOR_GPMC_CONFIG4 ++flash_cfg5_val: ++ .word STNOR_GPMC_CONFIG5 ++flash_cfg5_addr: ++ .word (GPMC_CONFIG_CS0 + GPMC_CONFIG5) ++pll_ctl_add: ++ .word CM_CLKEN_PLL ++pll_div_add1: ++ .word CM_CLKSEL1_PLL ++pll_div_add2: ++ .word CM_CLKSEL_CORE ++pll_div_add3: ++ .word CM_CLKSEL_WKUP ++pll_div_val3: ++ .word (WKUP_RSM << 1) ++pll_div_add4: ++ .word CM_CLKSEL_GFX ++pll_div_val4: ++ .word (GFX_DIV << 0) ++pll_div_add5: ++ .word CM_CLKSEL1_EMU ++pll_div_val5: ++ .word CLSEL1_EMU_VAL ++ ++#endif ++ ++.globl lowlevel_init ++lowlevel_init: ++ ldr sp, SRAM_STACK ++ str ip, [sp] /* stash old link register */ ++ mov ip, lr /* save link reg across call */ ++ bl s_init /* go setup pll,mux,memory */ ++ ldr ip, [sp] /* restore save ip */ ++ mov lr, ip /* restore link reg */ ++ ++ /* back to arch calling code */ ++ mov pc, lr ++ ++ /* the literal pools origin */ ++ .ltorg ++ ++REG_CONTROL_STATUS: ++ .word CONTROL_STATUS ++SRAM_STACK: ++ .word LOW_LEVEL_SRAM_STACK ++ ++ ++/* DPLL(1-4) PARAM TABLES */ ++/* Each of the tables has M, N, FREQSEL, M2 values defined for nominal ++ * OPP (1.2V). The fields are defined according to dpll_param struct(clock.c). ++ * The values are defined for all possible sysclk and for ES1 and ES2. ++ */ ++ ++mpu_dpll_param: ++/* 12MHz */ ++/* ES1 */ ++.word 0x0FE ++.word 0x07 ++.word 0x05 ++.word 0x01 ++/* ES2 */ ++.word 0x0FA ++.word 0x05 ++.word 0x07 ++.word 0x01 ++ ++/* 13MHz */ ++/* ES1 */ ++.word 0x17D ++.word 0x0C ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x1F4 ++.word 0x0C ++.word 0x03 ++.word 0x01 ++ ++/* 19.2MHz */ ++/* ES1 */ ++.word 0x179 ++.word 0x12 ++.word 0x04 ++.word 0x01 ++/* ES2 */ ++.word 0x271 ++.word 0x17 ++.word 0x03 ++.word 0x01 ++ ++/* 26MHz */ ++/* ES1 */ ++.word 0x17D ++.word 0x19 ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x0FA ++.word 0x0C ++.word 0x07 ++.word 0x01 ++ ++/* 38.4MHz */ ++/* ES1 */ ++.word 0x1FA ++.word 0x32 ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x271 ++.word 0x2F ++.word 0x03 ++.word 0x01 ++ ++ ++.globl get_mpu_dpll_param ++get_mpu_dpll_param: ++ adr r0, mpu_dpll_param ++ mov pc, lr ++ ++iva_dpll_param: ++/* 12MHz */ ++/* ES1 */ ++.word 0x07D ++.word 0x05 ++.word 0x07 ++.word 0x01 ++/* ES2 */ ++.word 0x0B4 ++.word 0x05 ++.word 0x07 ++.word 0x01 ++ ++/* 13MHz */ ++/* ES1 */ ++.word 0x0FA ++.word 0x0C ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x168 ++.word 0x0C ++.word 0x03 ++.word 0x01 ++ ++/* 19.2MHz */ ++/* ES1 */ ++.word 0x082 ++.word 0x09 ++.word 0x07 ++.word 0x01 ++/* ES2 */ ++.word 0x0E1 ++.word 0x0B ++.word 0x06 ++.word 0x01 ++ ++/* 26MHz */ ++/* ES1 */ ++.word 0x07D ++.word 0x0C ++.word 0x07 ++.word 0x01 ++/* ES2 */ ++.word 0x0B4 ++.word 0x0C ++.word 0x07 ++.word 0x01 ++ ++/* 38.4MHz */ ++/* ES1 */ ++.word 0x13F ++.word 0x30 ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x0E1 ++.word 0x17 ++.word 0x06 ++.word 0x01 ++ ++ ++.globl get_iva_dpll_param ++get_iva_dpll_param: ++ adr r0, iva_dpll_param ++ mov pc, lr ++ ++core_dpll_param: ++/* 12MHz */ ++/* ES1 */ ++.word 0x19F ++.word 0x0E ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x0A6 ++.word 0x05 ++.word 0x07 ++.word 0x01 ++ ++/* 13MHz */ ++/* ES1 */ ++.word 0x1B2 ++.word 0x10 ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x14C ++.word 0x0C ++.word 0x03 ++.word 0x01 ++ ++/* 19.2MHz */ ++/* ES1 */ ++.word 0x19F ++.word 0x17 ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x19F ++.word 0x17 ++.word 0x03 ++.word 0x01 ++ ++/* 26MHz */ ++/* ES1 */ ++.word 0x1B2 ++.word 0x21 ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x0A6 ++.word 0x0C ++.word 0x07 ++.word 0x01 ++ ++/* 38.4MHz */ ++/* ES1 */ ++.word 0x19F ++.word 0x2F ++.word 0x03 ++.word 0x01 ++/* ES2 */ ++.word 0x19F ++.word 0x2F ++.word 0x03 ++.word 0x01 ++ ++.globl get_core_dpll_param ++get_core_dpll_param: ++ adr r0, core_dpll_param ++ mov pc, lr ++ ++/* PER DPLL values are same for both ES1 and ES2 */ ++per_dpll_param: ++/* 12MHz */ ++.word 0xD8 ++.word 0x05 ++.word 0x07 ++.word 0x09 ++ ++/* 13MHz */ ++.word 0x1B0 ++.word 0x0C ++.word 0x03 ++.word 0x09 ++ ++/* 19.2MHz */ ++.word 0xE1 ++.word 0x09 ++.word 0x07 ++.word 0x09 ++ ++/* 26MHz */ ++.word 0xD8 ++.word 0x0C ++.word 0x07 ++.word 0x09 ++ ++/* 38.4MHz */ ++.word 0xE1 ++.word 0x13 ++.word 0x07 ++.word 0x09 ++ ++.globl get_per_dpll_param ++get_per_dpll_param: ++ adr r0, per_dpll_param ++ mov pc, lr ++ +diff -Nurd git/board/omap3517evm/x-load.lds x-load-shiva/board/omap3517evm/x-load.lds +--- git/board/omap3517evm/x-load.lds 1970-01-01 01:00:00.000000000 +0100 ++++ x-load-shiva/board/omap3517evm/x-load.lds 2009-09-08 16:55:24.000000000 +0200 +@@ -0,0 +1,54 @@ ++/* ++ * November 2006 - Changed to support 3430sdp device ++ * Copyright (c) 2004-2006 Texas Instruments ++ * ++ * (C) Copyright 2002 ++ * Gary Jennejohn, DENX Software Engineering, ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") ++OUTPUT_ARCH(arm) ++ENTRY(_start) ++SECTIONS ++{ ++ . = 0x00000000; ++ ++ . = ALIGN(4); ++ .text : ++ { ++ cpu/omap3/start.o (.text) ++ *(.text) ++ } ++ ++ . = ALIGN(4); ++ .rodata : { *(.rodata) } ++ ++ . = ALIGN(4); ++ .data : { *(.data) } ++ ++ . = ALIGN(4); ++ .got : { *(.got) } ++ ++ . = ALIGN(4); ++ __bss_start = .; ++ .bss : { *(.bss) } ++ _end = .; ++} +diff -Nurd git/drivers/Makefile x-load-shiva/drivers/Makefile +--- git/drivers/Makefile 2009-09-08 16:43:33.000000000 +0200 ++++ x-load-shiva/drivers/Makefile 2009-09-08 18:20:59.000000000 +0200 +@@ -48,6 +48,10 @@ + OBJS += k9f1g08r0a.o + endif + ++ifeq ($(BOARD), omap3517evm) ++OBJS += k9f1g08r0a.o ++endif ++ + ifeq ($(BOARD), omap2420h4) + OBJS += k9k1216.o + endif +diff -Nurd git/drivers/k9f1g08r0a.c x-load-shiva/drivers/k9f1g08r0a.c +--- git/drivers/k9f1g08r0a.c 2009-09-08 16:43:33.000000000 +0200 ++++ x-load-shiva/drivers/k9f1g08r0a.c 2009-09-09 15:46:22.000000000 +0200 +@@ -182,7 +182,11 @@ + NAND_DISABLE_CE(); + + if (get_cpu_rev() == CPU_3430_ES2) +- return (mfr != MT29F1G_MFR || !(id == MT29F1G_ID || id == MT29F2G_ID)); ++#if defined (CONFIG_OMAP34XX) || defined (CONFIG_OMAP3EVM) ++ return (mfr != MT29F1G_MFR || !(id == MT29F1G_ID || id == MT29F2G_ID)); ++#elif defined (CONFIG_OMAP3517EVM) || defined (CONFIG_OMAP3517TEB) ++ return (mfr != MT29F1G_MFR && !(id == MT29F1G_ID || id == MT29F2G_ID)); ++#endif + else + return (mfr != K9F1G08R0A_MFR || id != K9F1G08R0A_ID); + } +diff -Nurd git/include/asm/arch-omap3/cpu.h x-load-shiva/include/asm/arch-omap3/cpu.h +--- git/include/asm/arch-omap3/cpu.h 2009-09-08 16:43:33.000000000 +0200 ++++ x-load-shiva/include/asm/arch-omap3/cpu.h 2009-09-08 17:26:54.000000000 +0200 +@@ -24,7 +24,11 @@ + + #ifndef _OMAP34XX_CPU_H + #define _OMAP34XX_CPU_H ++#if defined (CONFIG_OMAP3517EVM) || defined (CONFIG_OMAP3517TEB) ++#include ++#elif defined (CONFIG_OMAP3430) + #include ++#endif + + /* Register offsets of common modules */ + /* Control */ +@@ -59,7 +63,12 @@ + #define GPMC_CONFIG (OMAP34XX_GPMC_BASE+0x50) + #define GPMC_STATUS (OMAP34XX_GPMC_BASE+0x54) + ++#if defined (CONFIG_OMAP34XX) || defined (CONFIG_OMAP3517EVM) + #define GPMC_CONFIG_CS0 (OMAP34XX_GPMC_BASE+0x60) ++#elif defined (CONFIG_OMAP3517TEB) ++#define GPMC_CONFIG_CS0 (OMAP34XX_GPMC_BASE+0xC0) ++#endif ++ + #define GPMC_CONFIG_WIDTH (0x30) + + #define GPMC_CONFIG1 (0x00) +@@ -142,6 +151,27 @@ + #define SMART_IDLE (0x2 << 3) + #define REF_ON_IDLE (0x1 << 6) + ++/* EMIF4 register */ ++#define EMIF4_BASE OMAP34XX_SDRC_BASE ++#define EMIF4_MOD_ID (EMIF4_BASE + 0x00) ++#define EMIF4_SDRAM_STS (EMIF4_BASE + 0x04) ++#define EMIF4_SDRAM_CFG (EMIF4_BASE + 0x08) ++#define EMIF4_SDRAM_RFCR (EMIF4_BASE + 0x10) ++#define EMIF4_SDRAM_RFCR_SHDW (EMIF4_BASE + 0x14) ++#define EMIF4_SDRAM_TIM1 (EMIF4_BASE + 0x18) ++#define EMIF4_SDRAM_TIM1_SHDW (EMIF4_BASE + 0x1C) ++#define EMIF4_SDRAM_TIM2 (EMIF4_BASE + 0x20) ++#define EMIF4_SDRAM_TIM2_SHDW (EMIF4_BASE + 0x24) ++#define EMIF4_SDRAM_TIM3 (EMIF4_BASE + 0x28) ++#define EMIF4_SDRAM_TIM3_SHDW (EMIF4_BASE + 0x2c) ++#define EMIF4_PWR_MGT_CTRL (EMIF4_BASE + 0x38) ++#define EMIF4_PWR_MGT_CTRL_SHDW (EMIF4_BASE + 0x3C) ++#define EMIF4_IODFT_TLGC (EMIF4_BASE + 0x60) ++#define EMIF4_DDR_PHYCTL1 (EMIF4_BASE + 0xE4) ++#define EMIF4_DDR_PHYCTL1_SHDW (EMIF4_BASE + 0xE8) ++#define EMIF4_DDR_PHYCTL2 (EMIF4_BASE + 0xEC) ++ ++ + /* timer regs offsets (32 bit regs) */ + #define TIDR 0x0 /* r */ + #define TIOCP_CFG 0x10 /* rw */ +diff -Nurd git/include/asm/arch-omap3/mem.h x-load-shiva/include/asm/arch-omap3/mem.h +--- git/include/asm/arch-omap3/mem.h 2009-09-08 16:43:33.000000000 +0200 ++++ x-load-shiva/include/asm/arch-omap3/mem.h 2009-09-08 17:26:54.000000000 +0200 +@@ -324,12 +324,31 @@ + # define SMNAND_GPMC_CONFIG5 0x010C1414 + # define SMNAND_GPMC_CONFIG6 0x00000A80 + ++#if defined (CONFIG_OMAP34xx) ++ + # define M_NAND_GPMC_CONFIG1 0x00001800 + # define M_NAND_GPMC_CONFIG2 SMNAND_GPMC_CONFIG2 + # define M_NAND_GPMC_CONFIG3 SMNAND_GPMC_CONFIG3 + # define M_NAND_GPMC_CONFIG4 SMNAND_GPMC_CONFIG4 + # define M_NAND_GPMC_CONFIG5 SMNAND_GPMC_CONFIG5 + # define M_NAND_GPMC_CONFIG6 SMNAND_GPMC_CONFIG6 ++ ++#elif defined (CONFIG_OMAP3517EVM) || defined (CONFIG_OMAP3517TEB) ++ ++#ifdef NAND_16BIT ++# define M_NAND_GPMC_CONFIG1 0x00001800 ++#else ++# define M_NAND_GPMC_CONFIG1 0x00000800 ++#endif ++# define M_NAND_GPMC_CONFIG2 0x00080800 ++# define M_NAND_GPMC_CONFIG3 0x00080800 ++# define M_NAND_GPMC_CONFIG4 0x06000600 ++# define M_NAND_GPMC_CONFIG5 0x00070808 ++# define M_NAND_GPMC_CONFIG6 0x000003cf ++# define M_NAND_GPMC_CONFIG7 0x00000848 ++ ++#endif ++ + # define STNOR_GPMC_CONFIG1 0x3 + # define STNOR_GPMC_CONFIG2 0x000f0f01 + # define STNOR_GPMC_CONFIG3 0x00050502 +@@ -353,6 +372,8 @@ + # define SMNAND_GPMC_CONFIG6 0x00000A80 + # define SMNAND_GPMC_CONFIG7 0x00000C44 + ++#if defined (CONFIG_OMAP34xx) ++ + # define M_NAND_GPMC_CONFIG1 0x00001800 + # define M_NAND_GPMC_CONFIG2 SMNAND_GPMC_CONFIG2 + # define M_NAND_GPMC_CONFIG3 SMNAND_GPMC_CONFIG3 +@@ -361,6 +382,23 @@ + # define M_NAND_GPMC_CONFIG6 SMNAND_GPMC_CONFIG6 + # define M_NAND_GPMC_CONFIG7 SMNAND_GPMC_CONFIG7 + ++#elif defined (CONFIG_OMAP3517EVM) || defined (CONFIG_OMAP3517TEB) ++ ++#ifdef NAND_16BIT ++# define M_NAND_GPMC_CONFIG1 0x00001800 ++#else ++# define M_NAND_GPMC_CONFIG1 0x00000800 ++#endif ++# define M_NAND_GPMC_CONFIG2 0x00080800 ++# define M_NAND_GPMC_CONFIG3 0x00080800 ++# define M_NAND_GPMC_CONFIG4 0x06000600 ++# define M_NAND_GPMC_CONFIG5 0x00070808 ++# define M_NAND_GPMC_CONFIG6 0x000003cf ++# define M_NAND_GPMC_CONFIG7 0x00000848 ++ ++#endif ++ ++ + # define STNOR_GPMC_CONFIG1 0x1203 + # define STNOR_GPMC_CONFIG2 0x00151501 + # define STNOR_GPMC_CONFIG3 0x00060602 +@@ -407,6 +445,8 @@ + # define SMNAND_GPMC_CONFIG6 0x1F0F0A80 + # define SMNAND_GPMC_CONFIG7 0x00000C44 + ++#if defined (CONFIG_OMAP34xx) ++ + # define M_NAND_GPMC_CONFIG1 0x00001800 + # define M_NAND_GPMC_CONFIG2 SMNAND_GPMC_CONFIG2 + # define M_NAND_GPMC_CONFIG3 SMNAND_GPMC_CONFIG3 +@@ -415,6 +455,23 @@ + # define M_NAND_GPMC_CONFIG6 SMNAND_GPMC_CONFIG6 + # define M_NAND_GPMC_CONFIG7 SMNAND_GPMC_CONFIG7 + ++#elif defined (CONFIG_OMAP3517EVM) || defined (CONFIG_OMAP3517TEB) ++ ++#ifdef NAND_16BIT ++# define M_NAND_GPMC_CONFIG1 0x00001800 ++#else ++# define M_NAND_GPMC_CONFIG1 0x00000800 ++#endif ++# define M_NAND_GPMC_CONFIG2 0x00080800 ++# define M_NAND_GPMC_CONFIG3 0x00080800 ++# define M_NAND_GPMC_CONFIG4 0x06000600 ++# define M_NAND_GPMC_CONFIG5 0x00070808 ++# define M_NAND_GPMC_CONFIG6 0x000003cf ++# define M_NAND_GPMC_CONFIG7 0x00000848 ++ ++#endif ++ ++ + # define STNOR_GPMC_CONFIG1 0x3 + # define STNOR_GPMC_CONFIG2 0x00151501 + # define STNOR_GPMC_CONFIG3 0x00060602 +diff -Nurd git/include/asm/arch-omap3/omap3.h x-load-shiva/include/asm/arch-omap3/omap3.h +--- git/include/asm/arch-omap3/omap3.h 1970-01-01 01:00:00.000000000 +0100 ++++ x-load-shiva/include/asm/arch-omap3/omap3.h 2009-09-08 17:26:54.000000000 +0200 +@@ -0,0 +1,134 @@ ++/* ++ * (C) Copyright 2006 ++ * Texas Instruments, ++ * Richard Woodruff ++ * Syed Mohammed Khasim ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef _OMAP3_SYS_H_ ++#define _OMAP3_SYS_H_ ++ ++#include ++ ++/* ++ * OMAP3 specific Section ++ */ ++ ++/* Stuff on L3 Interconnect */ ++#define SMX_APE_BASE 0x68000000 ++ ++/* L3 Firewall */ ++#define A_REQINFOPERM0 (SMX_APE_BASE + 0x05048) ++#define A_READPERM0 (SMX_APE_BASE + 0x05050) ++#define A_WRITEPERM0 (SMX_APE_BASE + 0x05058) ++ ++/* GPMC */ ++#define OMAP34XX_GPMC_BASE (0x6E000000) ++ ++/* SMS */ ++#define OMAP34XX_SMS_BASE 0x6C000000 ++ ++/* SDRC */ ++#define OMAP34XX_SDRC_BASE 0x6D000000 ++ ++/* ++ * L4 Peripherals - L4 Wakeup and L4 Core now ++ */ ++#define OMAP34XX_CORE_L4_IO_BASE 0x48000000 ++ ++#define OMAP34XX_WAKEUP_L4_IO_BASE 0x48300000 ++ ++#define OMAP34XX_L4_PER 0x49000000 ++ ++#define OMAP34XX_L4_IO_BASE OMAP34XX_CORE_L4_IO_BASE ++ ++/* CONTROL */ ++#define OMAP34XX_CTRL_BASE (OMAP34XX_L4_IO_BASE+0x2000) ++ ++/* TAP information dont know for 3430*/ ++#define OMAP34XX_TAP_BASE (0x49000000) /*giving some junk for virtio */ ++ ++/* UART */ ++#define OMAP34XX_UART1 (OMAP34XX_L4_IO_BASE+0x6a000) ++#define OMAP34XX_UART2 (OMAP34XX_L4_IO_BASE+0x6c000) ++#define OMAP34XX_UART3 (OMAP34XX_L4_PER+0x20000) ++ ++/* General Purpose Timers */ ++#define OMAP34XX_GPT1 0x48318000 ++#define OMAP34XX_GPT2 0x49032000 ++#define OMAP34XX_GPT3 0x49034000 ++#define OMAP34XX_GPT4 0x49036000 ++#define OMAP34XX_GPT5 0x49038000 ++#define OMAP34XX_GPT6 0x4903A000 ++#define OMAP34XX_GPT7 0x4903C000 ++#define OMAP34XX_GPT8 0x4903E000 ++#define OMAP34XX_GPT9 0x49040000 ++#define OMAP34XX_GPT10 0x48086000 ++#define OMAP34XX_GPT11 0x48088000 ++#define OMAP34XX_GPT12 0x48304000 ++ ++/* WatchDog Timers (1 secure, 3 GP) */ ++#define WD1_BASE (0x4830C000) ++#define WD2_BASE (0x48314000) ++#define WD3_BASE (0x49030000) ++ ++/* 32KTIMER */ ++#define SYNC_32KTIMER_BASE (0x48320000) ++#define S32K_CR (SYNC_32KTIMER_BASE+0x10) ++ ++/* ++ * SDP3430 specific Section ++ */ ++ ++/* ++ * The 343x's chip selects are programmable. The mask ROM ++ * does configure CS0 to 0x08000000 before dispatch. So, if ++ * you want your code to live below that address, you have to ++ * be prepared to jump though hoops, to reset the base address. ++ * Same as in SDP3430 ++ */ ++/* base address for indirect vectors (internal boot mode) */ ++#define SRAM_OFFSET0 0x40000000 ++#define SRAM_OFFSET1 0x00200000 ++#define SRAM_OFFSET2 0x0000F800 ++#define SRAM_VECT_CODE (SRAM_OFFSET0|SRAM_OFFSET1|SRAM_OFFSET2) ++ ++#define LOW_LEVEL_SRAM_STACK 0x4020FFFC ++ ++/* ++ * TODO: Are they required for OMAP3517? ++ */ ++#if defined(CONFIG_3430SDP) || defined(CONFIG_OMAP3EVM) ++/* FPGA on Debug board.*/ ++#define ETH_CONTROL_REG (DEBUG_BASE+0x30b) ++#define LAN_RESET_REGISTER (DEBUG_BASE+0x1c) ++ ++#define DIP_SWITCH_INPUT_REG2 (DEBUG_BASE+0x60) ++#define LED_REGISTER (DEBUG_BASE+0x40) ++#define FPGA_REV_REGISTER (DEBUG_BASE+0x10) ++#define EEPROM_MAIN_BRD (DEBUG_BASE+0x10000+0x1800) ++#define EEPROM_CONN_BRD (DEBUG_BASE+0x10000+0x1900) ++#define EEPROM_UI_BRD (DEBUG_BASE+0x10000+0x1A00) ++#define EEPROM_MCAM_BRD (DEBUG_BASE+0x10000+0x1B00) ++#define ENHANCED_UI_EE_NAME "750-2075" ++#endif ++ ++#endif /* _OMAP3430_SYS_H_ */ +diff -Nurd git/include/asm/arch-omap3/omap3430.h x-load-shiva/include/asm/arch-omap3/omap3430.h +--- git/include/asm/arch-omap3/omap3430.h 2009-09-08 16:43:33.000000000 +0200 ++++ x-load-shiva/include/asm/arch-omap3/omap3430.h 2009-09-08 17:26:54.000000000 +0200 +@@ -138,4 +138,42 @@ + #define ENHANCED_UI_EE_NAME "750-2075" + #endif + ++#if defined (CONFIG_OMAP3517EVM) || defined (CONFIG_OMAP3517TEB) ++/* EMIF 4 replaces SDRC in OMAP3517 for DDR */ ++#define EMIF4_MOD_ID 0x00 ++#define EMIF4_STATUS 0x04 ++#define EMIF4_SDR_CONFIG 0x08 ++#define EMIF4_LPDDR2_CONFIF 0x0C ++#define EMIF4_SDR_REF_CTRL 0x10 ++#define EMIF4_SDR_REF_CTRL_SHDW 0x14 ++#define EMIF4_SDR_TIM1 0x18 ++#define EMIF4_SDR_TIM1_SHDW 0x1C ++#define EMIF4_SDR_TIM2 0x20 ++#define EMIF4_SDR_TIM2_SHDW 0x24 ++#define EMIF4_SDR_TIM3 0x28 ++#define EMIF4_SDR_TIM3_SHDW 0x2C ++#define EMIF4_LPDDR2_NVM_TIM 0x30 ++#define EMIF4_LPDDR2_NVM_TIM_SHDW 0x34 ++#define EMIF4_PWR_MGMT_CTRL 0x38 ++#define EMIF4_PWR_MGMT_CTRL_SHDW 0x3C ++#define EMIF4_LPDDR2_REG_DATA 0x40 ++#define EMIF4_LPDDR2_REG_CFG 0x50 ++#define EMIF4_OCP_CONFIG 0x54 ++#define EMIF4_OCP_CFG_VAL1 0x58 ++#define EMIF4_OCP_CFG_VAL2 0x5C ++#define EMIF4_PERF_CNT1 0x80 ++#define EMIF4_PERF_CNT2 0x84 ++#define EMIF4_PERF_CNT_CFG 0x88 ++#define EMIF4_PERF_CNT_SEL 0x8C ++#define EMIF4_PERF_CNT_TIM 0x90 ++#define EMIF4_IRQ_EOI 0xA0 ++#define EMIF4_IRQSTS_RAW 0xA4 ++#define EMIF4_IRQSTS 0xAC ++#define EMIF4_IRQEN_SET 0xB4 ++#define EMIF4_IRQEN_CLR 0xBC ++#define EMIF4_DDR_PHY_CTRL1 0xE4 ++#define EMIF4_DDR_PHY_CTRL1_SHDW 0xE8 ++#define EMIF4_DDR_PHY_CTRL2 0xEC ++#endif ++ + #endif /* _OMAP3430_SYS_H_ */ +diff -Nurd git/include/configs/omap3517evm.h x-load-shiva/include/configs/omap3517evm.h +--- git/include/configs/omap3517evm.h 1970-01-01 01:00:00.000000000 +0100 ++++ x-load-shiva/include/configs/omap3517evm.h 2009-09-08 18:29:29.000000000 +0200 +@@ -0,0 +1,200 @@ ++/* ++ * (C) Copyright 2009 ++ * Texas Instruments, ++ * Manikandan Pillai ++ * X-Loader Configuation settings for the OMAP3517EVM board. ++ * ++ * Derived from /include/configs/omap3evm.h ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++/* serial printf facility takes about 3.5K */ ++#define CFG_PRINTF ++ ++/* ++ * High Level Configuration Options ++ */ ++#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ ++#define CONFIG_OMAP 1 /* in a TI OMAP core */ ++ ++#define CONFIG_OMAP3517EVM 1 /* working with OMAP3517 EVM */ ++//#define CONFIG_OMAP3517TEB 1 /* working with OMAP3517 TEB */ ++ ++/* Enable the below macro if MMC boot support is required */ ++#define CONFIG_MMC 1 ++#if defined(CONFIG_MMC) ++ #define CFG_CMD_MMC 1 ++ #define CFG_CMD_FAT 1 ++ #define CFG_I2C_SPEED 100000 ++ #define CFG_I2C_SLAVE 1 ++ #define CFG_I2C_BUS 0 ++ #define CFG_I2C_BUS_SELECT 1 ++ #define CONFIG_DRIVER_OMAP34XX_I2C 1 ++#endif ++ ++#include /* get chip and board defs */ ++ ++/* uncomment it if you need timer based udelay(). it takes about 250 bytes */ ++//#define CFG_UDELAY ++ ++/* Clock Defines */ ++#define V_OSCK 26000000 /* Clock output from T2 */ ++ ++#if (V_OSCK > 19200000) ++#define V_SCLK (V_OSCK >> 1) ++#else ++#define V_SCLK V_OSCK ++#endif ++ ++//#define PRCM_CLK_CFG2_266MHZ 1 /* VDD2=1.15v - 133MHz DDR */ ++#define PRCM_CLK_CFG2_332MHZ 1 /* VDD2=1.15v - 166MHz DDR */ ++#define PRCM_PCLK_OPP2 1 /* ARM=381MHz - VDD1=1.20v */ ++ ++# define NAND_BASE_ADR NAND_BASE /* NAND flash */ ++# define ONENAND_BASE ONENAND_MAP /* OneNand flash */ ++ ++#define OMAP34XX_GPMC_CS0_SIZE GPMC_SIZE_128M ++#define ONENAND_ADDR ONENAND_BASE /* physical address of OneNAND at CS0*/ ++ ++#ifdef CFG_PRINTF ++ ++#define CFG_NS16550 ++#define CFG_NS16550_SERIAL ++#define CFG_NS16550_REG_SIZE (-4) ++#define CFG_NS16550_CLK (48000000) ++#define CFG_NS16550_COM3 OMAP34XX_UART3 ++ ++/* ++ * select serial console configuration ++ */ ++#define CONFIG_SERIAL3 3 /* UART1 on OMAP3EVM */ ++#define CONFIG_CONS_INDEX 3 ++ ++#define CONFIG_BAUDRATE 115200 ++#define CFG_PBSIZE 256 ++ ++#endif /* CFG_PRINTF */ ++ ++/* ++ * Miscellaneous configurable options ++ */ ++#define CFG_LOADADDR 0x80008000 ++ ++#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ ++ ++/*----------------------------------------------------------------------- ++ * Stack sizes ++ * ++ * The stack sizes are set up in start.S using the settings below ++ */ ++#define CONFIG_STACKSIZE (128*1024) /* regular stack */ ++ ++/*----------------------------------------------------------------------- ++ * Board NAND Info. ++ */ ++ ++#define CFG_NAND_K9F1G08R0A /* Samsung 8-bit 128MB chip large page NAND chip*/ ++#define NAND_16BIT ++ ++/* NAND is partitioned: ++ * 0x00000000 - 0x0007FFFF Booting Image ++ * 0x00080000 - 0x0023FFFF U-Boot Image ++ * 0x00240000 - 0x0027FFFF U-Boot Env Data (X-loader doesn't care) ++ * 0x00280000 - 0x0077FFFF Kernel Image ++ * 0x00780000 - 0x08000000 depends on application ++ */ ++#define NAND_UBOOT_START 0x0080000 /* Leaving first 4 blocks for x-load */ ++#define NAND_UBOOT_END 0x0240000 /* Giving a space of 2 blocks = 256KB */ ++#define NAND_BLOCK_SIZE 0x20000 ++ ++#define GPMC_CONFIG (OMAP34XX_GPMC_BASE+0x50) ++ ++#if defined (CONFIG_OMAP3517EVM) ++#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE+0x7C) ++#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE+0x80) ++#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE+0x84) ++#elif defined (CONFIG_OMAP3517TEB) ++#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE+0xDC) ++#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE+0xE0) ++#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE+0xE4) ++#endif ++ ++#ifdef NAND_16BIT ++#define WRITE_NAND_COMMAND(d, adr) \ ++ do {*(volatile u16 *)GPMC_NAND_COMMAND_0 = d;} while(0) ++#define WRITE_NAND_ADDRESS(d, adr) \ ++ do {*(volatile u16 *)GPMC_NAND_ADDRESS_0 = d;} while(0) ++#define WRITE_NAND(d, adr) \ ++ do {*(volatile u16 *)GPMC_NAND_DATA_0 = d;} while(0) ++#define READ_NAND(adr) \ ++ (*(volatile u16 *)GPMC_NAND_DATA_0) ++#define NAND_WAIT_READY() ++#define NAND_WP_OFF() \ ++ do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0) ++#define NAND_WP_ON() \ ++ do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0) ++ ++#else /* to support 8-bit NAND devices */ ++#define WRITE_NAND_COMMAND(d, adr) \ ++ do {*(volatile u8 *)GPMC_NAND_COMMAND_0 = d;} while(0) ++#define WRITE_NAND_ADDRESS(d, adr) \ ++ do {*(volatile u8 *)GPMC_NAND_ADDRESS_0 = d;} while(0) ++#define WRITE_NAND(d, adr) \ ++ do {*(volatile u8 *)GPMC_NAND_DATA_0 = d;} while(0) ++#define READ_NAND(adr) \ ++ (*(volatile u8 *)GPMC_NAND_DATA_0); ++#define NAND_WAIT_READY() ++#define NAND_WP_OFF() \ ++ do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0) ++#define NAND_WP_ON() \ ++ do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0) ++ ++#endif ++ ++#define NAND_CTL_CLRALE(adr) ++#define NAND_CTL_SETALE(adr) ++#define NAND_CTL_CLRCLE(adr) ++#define NAND_CTL_SETCLE(adr) ++#define NAND_DISABLE_CE() ++#define NAND_ENABLE_CE() ++ ++/*----------------------------------------------------------------------- ++ * Board oneNAND Info. ++ */ ++#define CFG_SYNC_BURST_READ 1 ++ ++/* OneNAND is partitioned: ++ * 0x0000000 - 0x0080000 X-Loader ++ * 0x0080000 - 0x0240000 U-boot Image ++ * 0x0240000 - 0x0280000 U-Boot Env Data (X-loader doesn't care) ++ * 0x0280000 - 0x0780000 Kernel Image ++ * 0x0780000 - 0x8000000 depends on application ++ */ ++ ++#define ONENAND_START_BLOCK 4 ++#define ONENAND_END_BLOCK 18 ++#define ONENAND_PAGE_SIZE 2048 /* 2KB */ ++#define ONENAND_BLOCK_SIZE 0x20000 /* 128KB */ ++ ++#endif /* __CONFIG_H */ ++ diff --git a/recipes/x-load/x-load-1.41/0013-board.c-print-boot-method-mmc-onenand-nand.patch b/recipes/x-load/x-load-1.41/0013-board.c-print-boot-method-mmc-onenand-nand.patch new file mode 100644 index 0000000000..8223cb9dcf --- /dev/null +++ b/recipes/x-load/x-load-1.41/0013-board.c-print-boot-method-mmc-onenand-nand.patch @@ -0,0 +1,52 @@ +From 8433611ac9fe90093f57e2a3e5968d9c61de5e28 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Mon, 20 Jul 2009 17:54:48 +0530 +Subject: [PATCH] board.c: print boot method (mmc, onenand, nand) + +Pulled from 4e1a4e8d4d670ab7a4c281317a8b440f4ee4581a commit +of sakoman's tree +--- + lib/board.c | 5 +++++ + 1 files changed, 5 insertions(+), 0 deletions(-) + +diff --git a/lib/board.c b/lib/board.c +index bc7d3d1..9dcc31a 100644 +--- a/lib/board.c ++++ b/lib/board.c +@@ -70,10 +70,12 @@ void start_armboot (void) + + #if defined (CONFIG_OMAP34XX) + if ((get_mem_type() == MMC_ONENAND) || (get_mem_type() == MMC_NAND)){ ++ printf("Booting from mmc . . .\n"); + buf += mmc_boot(buf); + } + + if (get_mem_type() == GPMC_ONENAND){ ++ printf("Booting from onenand . . .\n"); + for (i = ONENAND_START_BLOCK; i < ONENAND_END_BLOCK; i++){ + if (!onenand_read_block(buf, i)) + buf += ONENAND_BLOCK_SIZE; +@@ -81,6 +83,7 @@ void start_armboot (void) + } + + if (get_mem_type() == GPMC_NAND){ ++ printf("Booting from nand . . .\n"); + for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE){ + if (!nand_read_block(buf, i)) + buf += NAND_BLOCK_SIZE; /* advance buf ptr */ +@@ -88,10 +91,12 @@ void start_armboot (void) + } + #elif defined (CONFIG_OMAP3517EVM) + if (get_mem_type() == GPMC_NAND){ ++ printf("Booting from mmc . . .\n"); + buf += mmc_boot(buf); + } + + if (buf == (uchar *)CFG_LOADADDR){ ++ printf("Booting from nand . . .\n"); + for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE){ + if (!nand_read_block(buf, i)) + buf += NAND_BLOCK_SIZE; /* advance buf ptr */ +-- +1.5.4.3 + diff --git a/recipes/x-load/x-load-1.41/0014-board.c-check-for-u-boot-on-mmc-on-all-configurati.patch b/recipes/x-load/x-load-1.41/0014-board.c-check-for-u-boot-on-mmc-on-all-configurati.patch new file mode 100644 index 0000000000..c195a03349 --- /dev/null +++ b/recipes/x-load/x-load-1.41/0014-board.c-check-for-u-boot-on-mmc-on-all-configurati.patch @@ -0,0 +1,95 @@ +From fc8eccdf0b7b131fb0c51892dfc19fc977f77276 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Mon, 20 Jul 2009 22:14:59 +0530 +Subject: [PATCH] board.c: check for u-boot on mmc on all configurations, not just those with managed nand + +Pulled from 9fc86b52c5770575b9b02c0049446fa8e266e714 commit +of sakoman's tree +--- + lib/board.c | 60 +++++++++++++++++++++++++--------------------------------- + 1 files changed, 26 insertions(+), 34 deletions(-) + +diff --git a/lib/board.c b/lib/board.c +index 9dcc31a..11e87da 100644 +--- a/lib/board.c ++++ b/lib/board.c +@@ -50,7 +50,7 @@ init_fnc_t *init_sequence[] = { + serial_init, /* serial communications setup */ + print_info, + #endif +- nand_init, /* board specific nand init */ ++ nand_init, /* board specific nand init */ + NULL, + }; + +@@ -68,42 +68,34 @@ void start_armboot (void) + + buf = (uchar*) CFG_LOADADDR; + +-#if defined (CONFIG_OMAP34XX) +- if ((get_mem_type() == MMC_ONENAND) || (get_mem_type() == MMC_NAND)){ +- printf("Booting from mmc . . .\n"); +- buf += mmc_boot(buf); +- } +- +- if (get_mem_type() == GPMC_ONENAND){ +- printf("Booting from onenand . . .\n"); +- for (i = ONENAND_START_BLOCK; i < ONENAND_END_BLOCK; i++){ +- if (!onenand_read_block(buf, i)) +- buf += ONENAND_BLOCK_SIZE; +- } +- } +- +- if (get_mem_type() == GPMC_NAND){ +- printf("Booting from nand . . .\n"); +- for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE){ +- if (!nand_read_block(buf, i)) +- buf += NAND_BLOCK_SIZE; /* advance buf ptr */ +- } +- } +-#elif defined (CONFIG_OMAP3517EVM) +- if (get_mem_type() == GPMC_NAND){ +- printf("Booting from mmc . . .\n"); +- buf += mmc_boot(buf); +- } ++#ifdef CONFIG_MMC ++ /* first try mmc */ ++ buf += mmc_boot(buf); ++#endif + +- if (buf == (uchar *)CFG_LOADADDR){ +- printf("Booting from nand . . .\n"); +- for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE){ +- if (!nand_read_block(buf, i)) +- buf += NAND_BLOCK_SIZE; /* advance buf ptr */ ++ if (buf == (uchar *)CFG_LOADADDR) { ++ /* if no u-boot on mmc, try onenand and nand */ ++#if !defined (CONFIG_OMAP3517EVM) ++ if (get_mem_type() == GPMC_ONENAND){ ++#ifdef CFG_PRINTF ++ printf("Booting from onenand . . .\n"); ++#endif ++ for (i = ONENAND_START_BLOCK; i < ONENAND_END_BLOCK; i++){ ++ if (!onenand_read_block(buf, i)) ++ buf += ONENAND_BLOCK_SIZE; ++ } + } +- } + #endif +- ++ if (get_mem_type() == GPMC_NAND){ ++#ifdef CFG_PRINTF ++ printf("Booting from nand . . .\n"); ++#endif ++ for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE){ ++ if (!nand_read_block(buf, i)) ++ buf += NAND_BLOCK_SIZE; /* advance buf ptr */ ++ } ++ } ++ } + + if (buf == (uchar *)CFG_LOADADDR) + hang(); +-- +1.5.4.3 + diff --git a/recipes/x-load/x-load-1.41/0015-OMAP3EVM-Build-issue-fixed.patch b/recipes/x-load/x-load-1.41/0015-OMAP3EVM-Build-issue-fixed.patch new file mode 100644 index 0000000000..46afd51752 --- /dev/null +++ b/recipes/x-load/x-load-1.41/0015-OMAP3EVM-Build-issue-fixed.patch @@ -0,0 +1,77 @@ +From c44aac2e3e45f9a3a36ba80704104082e5a71100 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Mon, 20 Jul 2009 22:17:52 +0530 +Subject: [PATCH] OMAP3EVM: Build issue fixed. + +The x-loader changes was broken for OMAP3EVM, fixed - + + - GPMC macros were not under proper board macro + - Warning fixed from mmc.c +--- + cpu/omap3/mmc.c | 3 ++- + include/asm/arch-omap3/mem.h | 6 +++--- + include/configs/omap3517evm.h | 2 +- + 3 files changed, 6 insertions(+), 5 deletions(-) + +diff --git a/cpu/omap3/mmc.c b/cpu/omap3/mmc.c +index b9dd5d0..2453477 100755 +--- a/cpu/omap3/mmc.c ++++ b/cpu/omap3/mmc.c +@@ -46,8 +46,9 @@ block_dev_desc_t *mmc_get_dev(int dev) + + unsigned char mmc_board_init(void) + { +- unsigned int value = 0; + #if defined (CONFIG_OMAP34XX) ++ unsigned int value = 0; ++ + value = CONTROL_PBIAS_LITE; + CONTROL_PBIAS_LITE = value | (1 << 2) | (1 << 1) | (1 << 9); + +diff --git a/include/asm/arch-omap3/mem.h b/include/asm/arch-omap3/mem.h +index 8a92484..ae73a9f 100644 +--- a/include/asm/arch-omap3/mem.h ++++ b/include/asm/arch-omap3/mem.h +@@ -324,7 +324,7 @@ typedef enum { + # define SMNAND_GPMC_CONFIG5 0x010C1414 + # define SMNAND_GPMC_CONFIG6 0x00000A80 + +-#if defined (CONFIG_OMAP34xx) ++#if defined (CONFIG_OMAP34XX) + + # define M_NAND_GPMC_CONFIG1 0x00001800 + # define M_NAND_GPMC_CONFIG2 SMNAND_GPMC_CONFIG2 +@@ -372,7 +372,7 @@ typedef enum { + # define SMNAND_GPMC_CONFIG6 0x00000A80 + # define SMNAND_GPMC_CONFIG7 0x00000C44 + +-#if defined (CONFIG_OMAP34xx) ++#if defined (CONFIG_OMAP34XX) + + # define M_NAND_GPMC_CONFIG1 0x00001800 + # define M_NAND_GPMC_CONFIG2 SMNAND_GPMC_CONFIG2 +@@ -445,7 +445,7 @@ typedef enum { + # define SMNAND_GPMC_CONFIG6 0x1F0F0A80 + # define SMNAND_GPMC_CONFIG7 0x00000C44 + +-#if defined (CONFIG_OMAP34xx) ++#if defined (CONFIG_OMAP34XX) + + # define M_NAND_GPMC_CONFIG1 0x00001800 + # define M_NAND_GPMC_CONFIG2 SMNAND_GPMC_CONFIG2 +diff --git a/include/configs/omap3517evm.h b/include/configs/omap3517evm.h +index 95deacb..16dc8d8 100644 +--- a/include/configs/omap3517evm.h ++++ b/include/configs/omap3517evm.h +@@ -124,7 +124,7 @@ + + #define GPMC_CONFIG (OMAP34XX_GPMC_BASE+0x50) + +-#if defined (CONFIG_OMAP34xx) || (CONFIG_OMAP3517EVM) ++#if defined (CONFIG_OMAP3517EVM) + #define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE+0x7C) + #define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE+0x80) + #define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE+0x84) +-- +1.5.4.3 + diff --git a/recipes/x-load/x-load-1.41/0016-mmc-fix-infinite-loop-in-mmc_init_stream.patch b/recipes/x-load/x-load-1.41/0016-mmc-fix-infinite-loop-in-mmc_init_stream.patch new file mode 100644 index 0000000000..1f9b069f66 --- /dev/null +++ b/recipes/x-load/x-load-1.41/0016-mmc-fix-infinite-loop-in-mmc_init_stream.patch @@ -0,0 +1,41 @@ +From 47f5d8f6f659848e164b6151c1dac36fdd4eb7a1 Mon Sep 17 00:00:00 2001 +From: Steve Sakoman +Date: Fri, 1 Aug 2008 12:55:44 -0700 +Subject: [PATCH] mmc: fix infinite loop in mmc_init_stream + +--- + cpu/omap3/mmc.c | 11 ++++++++--- + 1 files changed, 8 insertions(+), 3 deletions(-) + +diff --git a/cpu/omap3/mmc.c b/cpu/omap3/mmc.c +index 2453477..279e2a2 100755 +--- a/cpu/omap3/mmc.c ++++ b/cpu/omap3/mmc.c +@@ -60,16 +60,21 @@ unsigned char mmc_board_init(void) + + void mmc_init_stream(void) + { ++ volatile unsigned int mmc_stat; ++ + OMAP_HSMMC_CON |= INIT_INITSTREAM; + + OMAP_HSMMC_CMD = MMC_CMD0; +- while (!(OMAP_HSMMC_STAT & CC_MASK)); ++ do { ++ mmc_stat = OMAP_HSMMC_STAT; ++ } while (!(mmc_stat & CC_MASK)); + + OMAP_HSMMC_STAT = CC_MASK; + + OMAP_HSMMC_CMD = MMC_CMD0; +- while (!(OMAP_HSMMC_STAT & CC_MASK)); +- ++ do { ++ mmc_stat = OMAP_HSMMC_STAT; ++ } while (!(mmc_stat & CC_MASK)); + + OMAP_HSMMC_STAT = OMAP_HSMMC_STAT; + OMAP_HSMMC_CON &= ~INIT_INITSTREAM; +-- +1.5.4.3 + diff --git a/recipes/x-load/x-load-1.41/0017-lib-board.c-add-missing-call-to-misc_init_r.patch b/recipes/x-load/x-load-1.41/0017-lib-board.c-add-missing-call-to-misc_init_r.patch new file mode 100644 index 0000000000..a923724d4c --- /dev/null +++ b/recipes/x-load/x-load-1.41/0017-lib-board.c-add-missing-call-to-misc_init_r.patch @@ -0,0 +1,25 @@ +From 47756aa64c39111942cad5774862fc5f6def362d Mon Sep 17 00:00:00 2001 +From: Steve Sakoman +Date: Thu, 7 Aug 2008 17:38:42 -0700 +Subject: [PATCH] lib/board.c: add missing call to misc_init_r + +--- + lib/board.c | 2 ++ + 1 files changed, 2 insertions(+), 0 deletions(-) + +diff --git a/lib/board.c b/lib/board.c +index 11e87da..5ef7102 100644 +--- a/lib/board.c ++++ b/lib/board.c +@@ -66,6 +66,8 @@ void start_armboot (void) + } + } + ++ misc_init_r(); ++ + buf = (uchar*) CFG_LOADADDR; + + #ifdef CONFIG_MMC +-- +1.5.4.3 + diff --git a/recipes/x-load/x-load-1.41/0018-omap3evm-provide-missing-udelay-function.patch b/recipes/x-load/x-load-1.41/0018-omap3evm-provide-missing-udelay-function.patch new file mode 100644 index 0000000000..54681cbedc --- /dev/null +++ b/recipes/x-load/x-load-1.41/0018-omap3evm-provide-missing-udelay-function.patch @@ -0,0 +1,27 @@ +From 60455ac7f09e4d1c1472eb206e66185d9fd89ef9 Mon Sep 17 00:00:00 2001 +From: Steve Sakoman +Date: Mon, 18 Aug 2008 11:11:57 -0700 +Subject: [PATCH] omap3evm: provide missing udelay function + +--- + board/omap3evm/omap3evm.c | 4 ++++ + 1 files changed, 4 insertions(+), 0 deletions(-) + +diff --git a/board/omap3evm/omap3evm.c b/board/omap3evm/omap3evm.c +index 857516b..d4ef29b 100755 +--- a/board/omap3evm/omap3evm.c ++++ b/board/omap3evm/omap3evm.c +@@ -70,6 +70,10 @@ static inline void delay(unsigned long loops) + "bne 1b":"=r" (loops):"0"(loops)); + } + ++void udelay (unsigned long usecs) { ++ delay(usecs); ++} ++ + /***************************************** + * Routine: board_init + * Description: Early hardware init. +-- +1.5.4.3 + diff --git a/recipes/x-load/x-load-1.41/0019-lib-board.c-Specify-where-u-boot-is-being-loaded-fr.patch b/recipes/x-load/x-load-1.41/0019-lib-board.c-Specify-where-u-boot-is-being-loaded-fr.patch new file mode 100644 index 0000000000..d55a53a4ca --- /dev/null +++ b/recipes/x-load/x-load-1.41/0019-lib-board.c-Specify-where-u-boot-is-being-loaded-fr.patch @@ -0,0 +1,45 @@ +From 989f677e807fdfbae2a13ab1444743bfdf2d63f3 Mon Sep 17 00:00:00 2001 +From: Vaibhav Hiremath +Date: Mon, 20 Jul 2009 22:35:36 +0530 +Subject: [PATCH] lib/board.c: Specify where u-boot is being loaded from + +Pulled from 65ed00323f3807197a83abc75d62ed2a8d3f60de commit +from Sakoman's tree +--- + lib/board.c | 6 ++++-- + 1 files changed, 4 insertions(+), 2 deletions(-) + +diff --git a/lib/board.c b/lib/board.c +index 5ef7102..e573c66 100644 +--- a/lib/board.c ++++ b/lib/board.c +@@ -73,6 +73,8 @@ void start_armboot (void) + #ifdef CONFIG_MMC + /* first try mmc */ + buf += mmc_boot(buf); ++ if (buf != (uchar *)CFG_LOADADDR) ++ printf("Loading u-boot.bin from mmc\n"); + #endif + + if (buf == (uchar *)CFG_LOADADDR) { +@@ -80,7 +82,7 @@ void start_armboot (void) + #if !defined (CONFIG_OMAP3517EVM) + if (get_mem_type() == GPMC_ONENAND){ + #ifdef CFG_PRINTF +- printf("Booting from onenand . . .\n"); ++ printf("Loading u-boot.bin from onenand\n"); + #endif + for (i = ONENAND_START_BLOCK; i < ONENAND_END_BLOCK; i++){ + if (!onenand_read_block(buf, i)) +@@ -90,7 +92,7 @@ void start_armboot (void) + #endif + if (get_mem_type() == GPMC_NAND){ + #ifdef CFG_PRINTF +- printf("Booting from nand . . .\n"); ++ printf("Loading u-boot.bin from nand\n"); + #endif + for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE){ + if (!nand_read_block(buf, i)) +-- +1.5.4.3 + diff --git a/recipes/x-load/x-load-1.41/streen-fix.diff b/recipes/x-load/x-load-1.41/streen-fix.diff new file mode 100644 index 0000000000..e52c9444cf --- /dev/null +++ b/recipes/x-load/x-load-1.41/streen-fix.diff @@ -0,0 +1,39 @@ +diff -Nurd git/board/omap3517evm/omap3517evm.c /OE/angstrom-dev/xload/x-load/board/omap3517evm/omap3517evm.c +--- git/board/omap3517evm/omap3517evm.c 2009-07-02 04:26:52.000000000 +0200 ++++ /OE/angstrom-dev/xload/x-load/board/omap3517evm/omap3517evm.c 2009-09-04 13:08:54.000000000 +0200 +@@ -98,7 +98,7 @@ + */ + #define EMIF4_DDR1_RD_LAT 0x6 + #define EMIF4_DDR1_PWRDN_DIS 0x1 +-#define EMIF4_DDR1_STRBEN_EXT 0x1 ++#define EMIF4_DDR1_STRBEN_EXT 0x0 + #define EMIF4_DDR1_DLL_MODE 0x0 + #define EMIF4_DDR1_VTP_DYN 0x1 + #define EMIF4_DDR1_LB_CK_SEL 0x0 +diff -Nurd git/board/omap3evm/omap3evm.c /OE/angstrom-dev/xload/x-load/board/omap3evm/omap3evm.c +--- git/board/omap3evm/omap3evm.c 2009-07-02 04:26:52.000000000 +0200 ++++ /OE/angstrom-dev/xload/x-load/board/omap3evm/omap3evm.c 2009-09-09 16:36:07.000000000 +0200 +@@ -70,6 +70,10 @@ + "bne 1b":"=r" (loops):"0"(loops)); + } + ++void udelay (unsigned long usecs) { ++ delay(usecs); ++} ++ + /***************************************** + * Routine: board_init + * Description: Early hardware init. +@@ -681,6 +685,12 @@ + sr32(CM_FCLKEN1_CORE, 13, 1, 0x1); + sr32(CM_ICLKEN1_CORE, 13, 1, 0x1); + #endif ++ ++#ifdef CONFIG_MMC ++ /* Enable MMC1 clocks */ ++ sr32(CM_FCLKEN1_CORE, 24, 1, 0x1); ++ sr32(CM_ICLKEN1_CORE, 24, 1, 0x1); ++#endif + delay(1000); + } + diff --git a/recipes/x-load/x-load_1.41.bb b/recipes/x-load/x-load_1.41.bb new file mode 100644 index 0000000000..0a38f5ba0f --- /dev/null +++ b/recipes/x-load/x-load_1.41.bb @@ -0,0 +1,18 @@ +require x-load.inc + +COMPATIBLE_MACHINE = "omap3517-evm" + +SRC_URI = "file://x-loader-03.00.00.01.tar.gz \ +file://0013-board.c-print-boot-method-mmc-onenand-nand.patch;patch=1 \ +file://0014-board.c-check-for-u-boot-on-mmc-on-all-configurati.patch;patch=1 \ +file://0015-OMAP3EVM-Build-issue-fixed.patch;patch=1 \ +file://0016-mmc-fix-infinite-loop-in-mmc_init_stream.patch;patch=1 \ +file://0017-lib-board.c-add-missing-call-to-misc_init_r.patch;patch=1 \ +file://0018-omap3evm-provide-missing-udelay-function.patch;patch=1 \ +file://0019-lib-board.c-Specify-where-u-boot-is-being-loaded-fr.patch;patch=1 \ +file://streen-fix.diff;patch=1 \ +" + +S = "${WORKDIR}/xloader-03.00.00.01" + +PACKAGE_ARCH = "${MACHINE_ARCH}" diff --git a/recipes/x-load/x-load_git.bb b/recipes/x-load/x-load_git.bb index d7ffd20d69..0fa8cdfc62 100644 --- a/recipes/x-load/x-load_git.bb +++ b/recipes/x-load/x-load_git.bb @@ -1,5 +1,7 @@ require x-load.inc +DEFAULT_PREFERENCE_omap3517-evm = "-1" + FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/x-load-git/${MACHINE}" SRCREV = "319b26586fafb86f919f514bcd175838aaab96b3" @@ -14,6 +16,10 @@ SRC_URI_append_beagleboard = " \ file://name.patch;patch=1 \ " +SRC_URI_append_omap3517-evm = " \ + file://xload-shiva.diff;patch=1 \ +" + S = "${WORKDIR}/git" PACKAGE_ARCH = "${MACHINE_ARCH}" -- cgit v1.2.3 From 7e1ca09587a08962d5251502bcddb2d1010b73c9 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Fri, 11 Sep 2009 09:50:31 -0700 Subject: lsof, tcp-wrappers: Fix compilation on linux-uclibceabi Signed-off-by: Khem Raj --- recipes/lsof/lsof_4.78.bb | 3 ++- recipes/tcp-wrappers/tcp-wrappers_7.6.bb | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'recipes') diff --git a/recipes/lsof/lsof_4.78.bb b/recipes/lsof/lsof_4.78.bb index 0a24c607fa..a65fc12446 100644 --- a/recipes/lsof/lsof_4.78.bb +++ b/recipes/lsof/lsof_4.78.bb @@ -3,7 +3,7 @@ Its name stands for LiSt Open Files, and it does just that." SECTION = "devel" LICENSE = "BSD" -PR = "r1" +PR = "r2" SRC_URI = "ftp://lsof.itap.purdue.edu/pub/tools/unix/lsof/lsof_${PV}.tar.bz2" LOCALSRC = "file://${WORKDIR}/lsof_${PV}/lsof_${PV}_src.tar" @@ -19,6 +19,7 @@ python do_unpack () { export LSOF_OS = "${TARGET_OS}" LSOF_OS_linux-uclibc = "linux" +LSOF_OS_linux-uclibceabi = "linux" LSOF_OS_linux-gnueabi = "linux" export LSOF_INCLUDE = "${STAGING_INCDIR}" diff --git a/recipes/tcp-wrappers/tcp-wrappers_7.6.bb b/recipes/tcp-wrappers/tcp-wrappers_7.6.bb index 1f1afc1342..7cb766bd7a 100644 --- a/recipes/tcp-wrappers/tcp-wrappers_7.6.bb +++ b/recipes/tcp-wrappers/tcp-wrappers_7.6.bb @@ -3,7 +3,7 @@ DESCRIPTION = "Tools for monitoring and filtering incoming requests for tcp \ LICENSE = "tcp-wrappers" PRIORITY = "optional" SECTION = "console/network" -PR ="r3" +PR ="r4" PACKAGES = "${PN}-dbg libwrap libwrap-doc libwrap-dev tcp-wrappers tcp-wrappers-doc" @@ -66,6 +66,7 @@ EXTRA_OEMAKE = "'CC=${CC}' \ EXTRA_OEMAKE_NETGROUP = "-DNETGROUP" EXTRA_OEMAKE_NETGROUP_linux-uclibc = "" +EXTRA_OEMAKE_NETGROUP_linux-uclibceabi = "" do_compile () { oe_runmake 'TABLES=-DHOSTS_DENY=\"${sysconfdir}/hosts.deny\" -DHOSTS_ALLOW=\"${sysconfdir}/hosts.allow\"' \ -- cgit v1.2.3 From 48e831f5beba63b9a374c3165f37e2c22f32e5c2 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Fri, 11 Sep 2009 09:51:50 -0700 Subject: binutils_cvs.bb: Do not use autotools_do_install * CVS checkout include full src tree so we can not do make install because then it will try to install every component in src. We have to install ld gas and binutils only. Signed-off-by: Khem Raj --- recipes/binutils/binutils_cvs.bb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'recipes') diff --git a/recipes/binutils/binutils_cvs.bb b/recipes/binutils/binutils_cvs.bb index 88dcd78c90..b335767687 100644 --- a/recipes/binutils/binutils_cvs.bb +++ b/recipes/binutils/binutils_cvs.bb @@ -1,5 +1,5 @@ FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/binutils-cvs" -PV = "0.0+cvs${SRCDATE}" +PV = "2.20+cvs${SRCDATE}" INC_PR = "r5" PR = "${INC_PR}.1" @@ -21,7 +21,7 @@ do_compile () { oe_runmake all-ld all-binutils all-gas } do_install () { - autotools_do_install install-ld install-binutils install-gas + oe_runmake 'DESTDIR=${D}' install-ld install-binutils install-gas # We don't really need these, so we'll remove them... rm -rf ${D}${libdir}/ldscripts -- cgit v1.2.3 From c0f653bc90814acf4053ec037c7ab3ad022342ff Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Fri, 11 Sep 2009 14:42:54 -0700 Subject: gcc-configure-common.inc: Muck with NATIVE_SYSTEM_HEADER_DIR * GCC's notion of standard includes being in /usr/include is not valid for micro distro which uses flattened layout Signed-off-by: Khem Raj Signed-off-by: Henning Heinold --- recipes/gcc/gcc-configure-common.inc | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/gcc/gcc-configure-common.inc b/recipes/gcc/gcc-configure-common.inc index 7315a20cf9..fb792a8a88 100644 --- a/recipes/gcc/gcc-configure-common.inc +++ b/recipes/gcc/gcc-configure-common.inc @@ -80,7 +80,16 @@ do_configure () { sed -i 's/^LDFLAGS = $/LDFLAGS = @LDFLAGS@/' ${S}/Makefile.tpl (cd ${S} && gnu-configize) || die "failure running gnu-configize" - + # splice our idea of where the headers live into gcc's world + echo "NATIVE_SYSTEM_HEADER_DIR = ${layout_includedir}" > ${T}/t-oe + sed 's%^tmake_file=.*$%& ${T}/t-oe%' < ${S}/gcc/Makefile.in >${S}/gcc/Makefile.in.new + mv ${S}/gcc/Makefile.in.new ${S}/gcc/Makefile.in + cat ${S}/gcc/defaults.h | grep -v "\#endif.*GCC_DEFAULTS_H" > ${S}/gcc/defaults.h.new + echo "#ifndef STANDARD_INCLUDE_DIR" >> ${S}/gcc/defaults.h.new + echo "#define STANDARD_INCLUDE_DIR \"${layout_includedir}\"" >> ${S}/gcc/defaults.h.new + echo "#endif" >> ${S}/gcc/defaults.h.new + echo "#endif /* ! GCC_DEFAULTS_H */" >> ${S}/gcc/defaults.h.new + mv ${S}/gcc/defaults.h.new ${S}/gcc/defaults.h oe_runconf # make sure that no @LDFLAG@ is left in the generated Makefile -- cgit v1.2.3 From aa6a11a7168bf804925f78f9003920bce4b3a5e9 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Fri, 11 Sep 2009 19:00:56 -0700 Subject: screen-4.0.3: Fix compilation and make default. * Fix compilation issues. * Remove DEFAULT_PREFERENCE = "-1" * Tested on Thumb/uclibc Signed-off-by: Khem Raj --- recipes/screen/screen-4.0.3/configure.patch | 582 ++++++------------------ recipes/screen/screen-4.0.3/cross-compile.patch | 331 ++++++++++++++ recipes/screen/screen-4.0.3/no-stropts.patch | 13 + recipes/screen/screen-4.0.3/no-utempter.patch | 17 + recipes/screen/screen-4.0.3/sched.patch | 20 + recipes/screen/screen_4.0.3.bb | 12 +- 6 files changed, 526 insertions(+), 449 deletions(-) create mode 100644 recipes/screen/screen-4.0.3/cross-compile.patch create mode 100644 recipes/screen/screen-4.0.3/no-stropts.patch create mode 100644 recipes/screen/screen-4.0.3/no-utempter.patch create mode 100644 recipes/screen/screen-4.0.3/sched.patch (limited to 'recipes') diff --git a/recipes/screen/screen-4.0.3/configure.patch b/recipes/screen/screen-4.0.3/configure.patch index 2770a7a481..8789cb73fb 100644 --- a/recipes/screen/screen-4.0.3/configure.patch +++ b/recipes/screen/screen-4.0.3/configure.patch @@ -1,336 +1,17 @@ - -# -# Patch by Hannes Reich (hannes@skynet.ie) 22-Jul-2005 -# Resolves _some_ of the cross-compilation issues in screen's configure.in -# - ---- screen-4.0.1/configure.in~configure -+++ screen-4.0.1/configure.in -@@ -37,6 +37,323 @@ - VERSION="$rev.$vers.$pat" - AC_NOTE(this is screen version $VERSION) - AC_SUBST(VERSION) -+ -+AH_TOP([ -+/* Copyright (c) 1993-2000 -+ * Juergen Weigert (jnweiger@immd4.informatik.uni-erlangen.de) -+ * Michael Schroeder (mlschroe@immd4.informatik.uni-erlangen.de) -+ * Copyright (c) 1987 Oliver Laumann -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2, or (at your option) -+ * any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program (see the file COPYING); if not, write to the -+ * Free Software Foundation, Inc., -+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA -+ * -+ */ -+ -+ -+/********************************************************************** -+ * -+ * User Configuration Section -+ */ -+ -+/* -+ * Maximum of simultaneously allowed windows per screen session. -+ */ -+#ifndef MAXWIN -+# define MAXWIN 40 -+#endif -+ -+/* -+ * Define SOCKDIR to be the directory to contain the named sockets -+ * screen creates. This should be in a common subdirectory, such as -+ * /usr/local or /tmp. It makes things a little more secure if you -+ * choose a directory which is not writable by everyone or where the -+ * "sticky" bit is on, but this isn't required. -+ * If SOCKDIR is not defined screen will put the named sockets in -+ * the user's home directory. Notice that this can cause you problems -+ * if some user's HOME directories are AFS- or NFS-mounted. Especially -+ * AFS is unlikely to support named sockets. -+ * -+ * Screen will name the subdirectories "S-$USER" (e.g /tmp/S-davison). -+ */ -+#undef SOCKDIR -+ -+/* -+ * Define this if the SOCKDIR is not shared between hosts. -+ */ -+#define SOCKDIR_IS_LOCAL_TO_HOST -+ -+/* -+ * Screen sources two startup files. First a global file with a path -+ * specified here, second your local $HOME/.screenrc -+ * Don't define this, if you don't want it. -+ */ -+#ifndef ETCSCREENRC -+# define ETCSCREENRC "/usr/local/etc/screenrc" -+#endif -+ -+/* -+ * Screen can look for the environment variable $SYSSCREENRC and -if it -+ * exists- load the file specified in that variable as global screenrc. -+ * If you want to enable this feature, define ALLOW_SYSSCREENRC to one (1). -+ * Otherwise ETCSCREENRC is always loaded. -+ */ -+#define ALLOW_SYSSCREENRC 1 -+ -+/* -+ * Screen needs encoding files for the translation of utf8 -+ * into some encodings, e.g. JIS, BIG5. -+ * Only needed if FONT, ENCODINGS and UTF8 are defined. -+ */ -+#ifndef SCREENENCODINGS -+# define SCREENENCODINGS "/usr/local/lib/screen/encodings" -+#endif -+/* -+ * Define CHECKLOGIN to force Screen users to enter their Unix password -+ * in addition to the screen password. -+ * -+ * Define NOSYSLOG if yo do not have logging facilities. Currently -+ * syslog() will be used to trace ``su'' commands only. -+ */ -+#define CHECKLOGIN 1 -+#undef NOSYSLOG -+ -+ -+/* -+ * define PTYMODE if you do not like the default of 0622, which allows -+ * public write to your pty. -+ * define PTYGROUP to some numerical group-id if you do not want the -+ * tty to be in "your" group. -+ * Note, screen is unable to change mode or group of the pty if it -+ * is not installed with sufficient privilege. (e.g. set-uid-root) -+ * define PTYROFS if the /dev/pty devices are mounted on a read-only -+ * filesystem so screen should not even attempt to set mode or group -+ * even if running as root (e.g. on TiVo). -+ */ -+#undef PTYMODE -+#undef PTYGROUP -+#undef PTYROFS -+ -+/* -+ * If screen is NOT installed set-uid root, screen can provide tty -+ * security by exclusively locking the ptys. While this keeps other -+ * users from opening your ptys, it also keeps your own subprocesses -+ * from being able to open /dev/tty. Define LOCKPTY to add this -+ * exclusive locking. -+ */ -+#undef LOCKPTY -+ -+/* -+ * If you'd rather see the status line on the first line of your -+ * terminal rather than the last, define TOPSTAT. -+ */ -+#undef TOPSTAT -+ -+/* -+ * define DETACH can detach a session. An absolute 'must'. -+ */ -+#define DETACH -+ -+/* -+ * here come the erlangen extensions to screen: -+ * define LOCK if you want to use a lock program for a screenlock. -+ * define PASSWORD for secure reattach of your screen. -+ * define COPY_PASTE to use the famous hacker's treasure zoo. -+ * define POW_DETACH to have a detach_and_logout key (requires DETACH). -+ * define REMOTE_DETACH (-d option) to move screen between terminals. -+ * define AUTO_NUKE to enable Tim MacKenzies clear screen nuking -+ * define PSEUDOS to allow window input/output filtering -+ * define MULTI to allow multiple attaches. -+ * define MULTIUSER to allow other users attach to your session -+ * (if they are in the acl, of course) -+ * define MAPKEYS to include input keyboard translation. -+ * define FONT to support ISO2022/alternet charset support -+ * define COLOR to include ansi color support. This may expose -+ * a bug in x11r6-color-xterm. -+ * define DW_CHARS to include support for double-width character -+ * sets. -+ * define ENCODINGS to include support for encodings like euc or big5. -+ * Needs FONT to work. -+ * define UTF8 if you want support for UTF-8 encoding. -+ * Needs FONT and ENCODINGS to work. -+ * define COLORS16 if you want 16 colors. -+ * Needs COLOR to work. -+ * define BUILTIN_TELNET to add telnet support to screen. -+ * Syntax: screen //telnet host [port] -+ * define RXVT_OSC if you want support for rxvts special -+ * change fgcolor/bgcolor/bgpicture sequences -+ */ -+#undef SIMPLESCREEN -+#ifndef SIMPLESCREEN -+# define LOCK -+# define PASSWORD -+# define COPY_PASTE -+# define REMOTE_DETACH -+# define POW_DETACH -+# define AUTO_NUKE -+# define PSEUDOS -+# define MULTI -+# define MULTIUSER -+# define MAPKEYS -+# define COLOR -+# define FONT -+# define DW_CHARS -+# define ENCODINGS -+# define UTF8 -+# define COLORS16 -+# define ZMODEM -+# define BLANKER_PRG -+#endif /* SIMPLESCREEN */ -+ -+#undef BUILTIN_TELNET -+#undef RXVT_OSC -+#undef COLORS256 -+ -+ -+/* -+ * If you have a braille display you should define HAVE_BRAILLE. -+ * The code inside #ifdef HAVE_BRAILLE was contributed by Hadi Bargi -+ * Rangin (bargi@dots.physics.orst.edu). -+ * WARNING: this is more or less unsupported code, it may be full of -+ * bugs leading to security holes, enable at your own risk! -+ */ -+#undef HAVE_BRAILLE -+ -+ -+/* -+ * As error messages are mostly meaningless to the user, we -+ * try to throw out phrases that are somewhat more familiar -+ * to ...well, at least familiar to us NetHack players. -+ */ -+#ifndef NONETHACK -+# define NETHACK -+#endif /* NONETHACK */ -+ -+/* -+ * If screen is installed with permissions to update /etc/utmp (such -+ * as if it is installed set-uid root), define UTMPOK. -+ */ -+#define UTMPOK -+ -+/* Set LOGINDEFAULT to one (1) -+ * if you want entries added to /etc/utmp by default, else set it to -+ * zero (0). -+ * LOGINDEFAULT will be one (1) whenever LOGOUTOK is undefined! -+ */ -+#define LOGINDEFAULT 1 -+ -+/* Set LOGOUTOK to one (1) -+ * if you want the user to be able to log her/his windows out. -+ * (Meaning: They are there, but not visible in /etc/utmp). -+ * Disabling this feature only makes sense if you have a secure /etc/utmp -+ * database. -+ * Negative examples: suns usually have a world writable utmp file, -+ * xterm will run perfectly without s-bit. -+ * -+ * If LOGOUTOK is undefined and UTMPOK is defined, all windows are -+ * initially and permanently logged in. -+ * -+ * Set CAREFULUTMP to one (1) if you want that users have at least one -+ * window per screen session logged in. -+ */ -+#define LOGOUTOK 1 -+#undef CAREFULUTMP -+ -+ -+/* -+ * If UTMPOK is defined and your system (incorrectly) counts logins by -+ * counting non-null entries in /etc/utmp (instead of counting non-null -+ * entries with no hostname that are not on a pseudo tty), define USRLIMIT -+ * to have screen put an upper-limit on the number of entries to write -+ * into /etc/utmp. This helps to keep you from exceeding a limited-user -+ * license. -+ */ -+#undef USRLIMIT -+ -+/* -+ * both must be defined if you want to favor tcsendbreak over -+ * other calls to generate a break condition on serial lines. -+ * (Do not bother, if you are not using plain tty windows.) -+ */ -+#define POSIX_HAS_A_GOOD_TCSENDBREAK -+#define SUNOS4_AND_WE_TRUST_TCSENDBREAK -+ -+/* -+ * to lower the interrupt load on the host machine, you may want to -+ * adjust the VMIN and VTIME settings used for plain tty windows. -+ * See the termio(4) manual page (Non-Canonical Mode Input Processing) -+ * for details. -+ * if undefined, VMIN=1, VTIME=0 is used as a default - this gives you -+ * best user responsiveness, but highest interrupt frequency. -+ * (Do not bother, if you are not using plain tty windows.) -+ */ -+#define TTYVMIN 100 -+#define TTYVTIME 2 -+ -+/* -+ * looks like the above values are ignored by setting FNDELAY. -+ * This is default for all pty/ttys, you may disable it for -+ * ttys here. After playing with it for a while, one may find out -+ * that this feature may cause screen to lock up. -+ */ -+#ifdef bsdi -+# define TTY_DISABLE_FNBLOCK /* select barfs without it ... */ -+#endif -+ -+ -+/* -+ * Some terminals, e.g. Wyse 120, use a bitfield to select attributes. -+ * This doesn't work with the standard so/ul/m? terminal entries, -+ * because they will cancel each other out. -+ * On TERMINFO machines, "sa" (sgr) may work. If you want screen -+ * to switch attributes only with sgr, define USE_SGR. -+ * This is *not* recomended, do this only if you must. -+ */ -+#undef USE_SGR -+ -+ -+/* -+ * Define USE_LOCALE if you want screen to use the locale names -+ * for the name of the month and day of the week. -+ */ -+#define USE_LOCALE -+ -+/* -+ * Define USE_PAM if your system supports PAM (Pluggable Authentication -+ * Modules) and you want screen to use it instead of calling crypt(). -+ * (You may also need to add -lpam to LIBS in the Makefile.) -+ */ -+#undef USE_PAM -+ -+/* -+ * Define CHECK_SCREEN_W if you want screen to set TERM to screen-w -+ * if the terminal width is greater than 131 columns. No longer needed -+ * on modern systems which use $COLUMNS or the tty settings instead. -+ */ -+#undef CHECK_SCREEN_W -+ -+/********************************************************************** -+ * -+ * End of User Configuration Section -+ * -+ * Rest of this file is modified by 'configure' -+ * Change at your own risk! -+ * -+ */ -+]) -+# end of AH_TOP -+ - AC_PREFIX_PROGRAM(screen) - AC_PREFIX_PROGRAM(gzip) - -@@ -46,6 +363,7 @@ +Index: screen-4.0.3/configure.in +=================================================================== +--- screen-4.0.3.orig/configure.in 2009-09-11 16:59:24.085222816 -0700 ++++ screen-4.0.3/configure.in 2009-09-11 18:42:08.338231443 -0700 +@@ -12,7 +12,7 @@ + dnl + dnl Define some useful macros + dnl +-AC_DEFUN(AC_PROGRAM_SOURCE, ++AC_DEFUN([AC_PROGRAM_SOURCE], + [AC_REQUIRE([AC_PROG_CPP])AC_PROVIDE([$0])cat > conftest.c < #include -@@ -198,6 +519,11 @@ +@@ -514,6 +518,8 @@ oldlibs="$LIBS" LIBS="$LIBS -lelf" AC_CHECKING(SVR4) -+AH_TEMPLATE([SVR4],[]) -+AH_TEMPLATE([BUGGYGETLOGIN], -+[If ttyslot() breaks getlogin() by returning indexes to utmp entries -+ of type DEAD_PROCESS, then our getlogin() replacement should be -+ selected by defining BUGGYGETLOGIN.]) ++AH_TEMPLATE([SVR4]) ++AH_TEMPLATE([BUGGYGETLOGIN]) AC_TRY_LINK([#include ],, [AC_CHECK_HEADER(dwarf.h, AC_DEFINE(SVR4) AC_DEFINE(BUGGYGETLOGIN), -@@ -235,6 +561,9 @@ +@@ -551,6 +557,9 @@ dnl AC_CHECKING(BSD job jontrol) -+AH_TEMPLATE([BSDJOBS], ++AH_TEMPLATE([BSDJOBS], +[Define BSDJOBS if you have BSD-style job control (both process + groups and a tty that deals correctly with them)]) AC_TRY_LINK( [#include #include -@@ -255,6 +584,10 @@ +@@ -571,6 +580,10 @@ dnl **** setreuid(), seteuid() **** dnl AC_CHECKING(setreuid) -+AH_TEMPLATE([HAVE_SETREUID], ++AH_TEMPLATE([HAVE_SETREUID], +[If your system has the calls setreuid() and setregid(), + define HAVE_SETREUID. Otherwise screen will use a forked process to + safely create output files without retaining any special privileges.]) AC_TRY_LINK(,[ #ifdef __hpux setresuid(0, 0, 0); -@@ -269,6 +602,9 @@ +@@ -585,6 +598,9 @@ dnl Solaris seteuid doesn't change the saved uid, bad for dnl multiuser screen sessions AC_CHECKING(seteuid) @@ -459,62 +137,59 @@ AC_TRY_LINK(,[ #if defined(linux) || defined(NeXT) || defined(_AUX_SOURCE) || defined(AUX) || defined(ultrix) || (defined(sun) && defined(SVR4)) || defined(ISC) || defined(sony_news) seteuid_is_broken(0); -@@ -292,7 +628,8 @@ - dnl **** FIFO tests **** +@@ -609,6 +625,8 @@ dnl --AC_CHECKING(fifos) + AC_CHECKING(fifos) +AC_CACHE_CHECK([usable fifos], -+ [screen_cv_sys_fifo_usable], ++ [screen_cv_sys_fifo_usable], AC_TRY_RUN([ #include #include -@@ -357,12 +694,14 @@ +@@ -673,12 +691,15 @@ exit(1); exit(0); } -], AC_NOTE(- your fifos are usable) fifo=1, -AC_NOTE(- your fifos are not usable)) --rm -f /tmp/conftest* +], screen_cv_sys_fifo_usable=yes, screen_cv_sys_fifo_usable=no)) + rm -f /tmp/conftest* -if test -n "$fifo"; then -AC_CHECKING(for broken fifo implementation) +if test X"$screen_cv_sys_fifo_usable" = Xyes; then -+AH_TEMPLATE([BROKEN_PIPE], ++AH_TEMPLATE([BROKEN_PIPE], +[Define this if your system exits select() immediatly if a pipe is + opened read-only and no writer has opened it.]) +AC_CACHE_CHECK([broken fifo implementation], -+ [screen_cv_sys_fifo_broken_impl], ++ [screen_cv_sys_fifo_broken_impl], AC_TRY_RUN([ #include #include -@@ -407,9 +746,11 @@ +@@ -723,8 +744,11 @@ exit(1); exit(0); } -], AC_NOTE(- your implementation is ok), -AC_NOTE(- you have a broken implementation) AC_DEFINE(BROKEN_PIPE) fifobr=1) --rm -f /tmp/conftest* -+], screen_cv_sys_fifo_broken_impl=no, ++], screen_cv_sys_fifo_broken_impl=no, +screen_cv_sys_fifo_broken_impl=yes)) +if test X"$screen_cv_sys_fifo_broken_impl" = Xyes; then -+ AC_DEFINE(BROKEN_PIPE) ++ AC_DEFINE(BROKEN_PIPE) +fi + rm -f /tmp/conftest* fi - dnl -@@ -418,7 +759,8 @@ - dnl may need LIBS="$LIBS -lsocket" here +@@ -735,6 +759,8 @@ dnl --AC_CHECKING(sockets) + AC_CHECKING(sockets) +AC_CACHE_CHECK([sockets are usable], -+ [screen_cv_sys_sockets_usable], ++ [screen_cv_sys_sockets_usable], AC_TRY_RUN([ #include #include -@@ -469,12 +811,16 @@ +@@ -785,12 +811,16 @@ exit(1); exit(0); } @@ -527,15 +202,15 @@ -if test -n "$sock"; then +if test X"$screen_cv_sys_sockets_usable" = Xyes; then AC_CHECKING(socket implementation) -+AH_TEMPLATE([SOCK_NOT_IN_FS], ++AH_TEMPLATE([SOCK_NOT_IN_FS], +[Define this if the unix-domain socket implementation doesn't + create a socket in the filesystem.]) +AC_CACHE_CHECK([if sockets are not stored in the filesystem], -+ [screen_cv_sys_sockets_nofs], ++ [screen_cv_sys_sockets_nofs], AC_TRY_RUN([ #include #include -@@ -500,22 +846,25 @@ +@@ -816,22 +846,25 @@ close(s); exit(0); } @@ -569,7 +244,7 @@ AC_NOTE(- as your fifos are broken lets use the sockets.) else AC_NOTE(- both sockets and fifos usable. let's take fifos.) -@@ -525,7 +874,7 @@ +@@ -841,7 +874,7 @@ AC_NOTE(- using named pipes, of course) AC_DEFINE(NAMEDPIPE) fi @@ -578,20 +253,20 @@ AC_NOTE(- using unix-domain sockets, of course) else AC_MSG_ERROR(you have neither usable sockets nor usable pipes -> no screen) -@@ -535,7 +884,11 @@ +@@ -851,7 +884,11 @@ dnl **** check the select implementation **** dnl -AC_CHECKING(select return value) -+AH_TEMPLATE([SELECT_BROKEN], ++AH_TEMPLATE([SELECT_BROKEN], +[If the select return value doesn't treat a descriptor that is + usable for reading and writing as two hits, define SELECT_BROKEN.]) +AC_CACHE_CHECK([for broken select return value], -+ [screen_cv_sys_select_broken_retval], ++ [screen_cv_sys_select_broken_retval], AC_TRY_RUN([ #include #include -@@ -634,19 +987,26 @@ +@@ -950,17 +987,26 @@ exit(1); exit(0); } @@ -606,7 +281,7 @@ dnl dnl **** termcap or terminfo **** dnl -+AH_TEMPLATE([TERMINFO], ++AH_TEMPLATE([TERMINFO], +[Define TERMINFO if your machine emulates the termcap routines + with the terminfo database. + Thus the .screenrc file is parsed for @@ -615,33 +290,31 @@ AC_CHECKING(for tgetent) AC_TRY_LINK(,tgetent((char *)0, (char *)0);,, olibs="$LIBS" --if test -f /usr/lib/libncursesw.so ; then -- LIBS="-lncursesw $olibs" --fi - AC_CHECKING(libncursesw) -+AC_CHECK_LIB(ncursesw,tgetent) - AC_TRY_LINK(,tgetent((char *)0, (char *)0);,, - LIBS="-lcurses $olibs" +-LIBS="-lcurses $olibs" AC_CHECKING(libcurses) -@@ -668,24 +1028,39 @@ ++AC_CHECK_LIB(ncursesw,tgetent) + AC_TRY_LINK(,[ + #ifdef __hpux + __sorry_hpux_libcurses_is_totally_broken_in_10_10(); +@@ -979,24 +1025,39 @@ AC_TRY_LINK(,tgetent((char *)0, (char *)0);,, - AC_MSG_ERROR(!!! no tgetent - no screen))))))) + AC_MSG_ERROR(!!! no tgetent - no screen)))))) -AC_TRY_RUN([ +AC_CACHE_CHECK([using terminfo database],[screen_cv_sys_terminfo_used], -+ AC_TRY_RUN([ ++ AC_TRY_RUN([ main() { exit(strcmp(tgoto("%p1%d", 0, 1), "1") ? 0 : 1); -}], AC_NOTE(- you use the termcap database), -AC_NOTE(- you use the terminfo database) AC_DEFINE(TERMINFO)) +} -+ ], screen_cv_sys_terminfo_used=no, -+ screen_cv_sys_terminfo_used=yes) ++ ], screen_cv_sys_terminfo_used=no, ++ screen_cv_sys_terminfo_used=yes) +) + +if test X"$screen_cv_sys_terminfo_used" = Xyes; then -+ AC_DEFINE(TERMINFO) ++ AC_DEFINE(TERMINFO) +fi + AC_CHECKING(ospeed) @@ -651,7 +324,7 @@ dnl dnl **** PTY specific things **** dnl -+AH_TEMPLATE([HAVE_DEV_PTC], ++AH_TEMPLATE([HAVE_DEV_PTC], +[define HAVE_DEV_PTC if you have a /dev/ptc character special + device.]) AC_CHECKING(for /dev/ptc) @@ -666,50 +339,70 @@ sysvr4ptys= if test -c /dev/ptmx ; then AC_TRY_LINK([],[ptsname(0);grantpt(0);unlockpt(0);],[AC_DEFINE(HAVE_SVR4_PTYS) -@@ -701,6 +1076,13 @@ +@@ -1012,6 +1073,13 @@ fi AC_CHECKING(for ptyranges) +AH_TEMPLATE([PTYRANGE0], +[define PTYRANGE0 and or PTYRANGE1 if you want to adapt screen -+ to unusual environments. E.g. For SunOs the defaults are "qpr" and -+ "0123456789abcdef". For SunOs 4.1.2 -+ #define PTYRANGE0 "pqrstuvwxyzPQRST" ++ to unusual environments. E.g. For SunOs the defaults are "qpr" and ++ "0123456789abcdef". For SunOs 4.1.2 ++ #define PTYRANGE0 "pqrstuvwxyzPQRST" + is recommended by Dan Jacobson.]) +AH_TEMPLATE([PTYRANGE1],[]) if test -d /dev/ptym ; then pdir='/dev/ptym' else -@@ -817,6 +1199,9 @@ +@@ -1117,7 +1185,7 @@ + AC_NOTE(- ptys are world accessable) + fi + else +- AC_NOTE(- can't determine - assume ptys are world accessable) ++ AC_NOTE(- cannot determine - assume ptys are world accessable) + fi + ] + ) +@@ -1128,6 +1196,7 @@ dnl **** utmp handling **** dnl AC_CHECKING(getutent) -+AH_TEMPLATE([GETUTENT], -+[If your system has getutent(), pututline(), etc. to write to the -+ utmp file, define GETUTENT.]) ++AH_TEMPLATE([GETUTENT], [If your system has setutent() and getutent() define GETUTENT]) AC_TRY_LINK([ #include /* to get time_t on SCO */ #include -@@ -850,6 +1235,7 @@ - [int x = DEAD_PROCESS; pututline((struct utmp *)0); getutent();], AC_DEFINE(GETUTENT), LIBS="$olibs") - ) +@@ -1141,7 +1210,8 @@ + #define pututline _pututline + #endif + ], +-[int x = DEAD_PROCESS; pututline((struct utmp *)0); getutent();], AC_DEFINE(GETUTENT), ++[int x = DEAD_PROCESS; pututline((struct utmp *)0); getutent();], ++[AC_MSG_RESULT(yes); AC_DEFINE(GETUTENT)],[AC_MSG_RESULT(no)]) + olibs="$LIBS" + LIBS="$LIBS -lgen" + AC_CHECKING(getutent with -lgen) +@@ -1158,9 +1228,11 @@ + #define pututline _pututline + #endif + ], +-[int x = DEAD_PROCESS; pututline((struct utmp *)0); getutent();], AC_DEFINE(GETUTENT), LIBS="$olibs") +-) ++[int x = DEAD_PROCESS; pututline((struct utmp *)0); getutent();], ++[AC_MSG_RESULT(yes); AC_DEFINE(GETUTENT)], [AC_MSG_RESULT(no)]) ++LIBS="$olibs" AC_CHECKING(ut_host) -+AH_TEMPLATE([UTHOST],[Define UTHOST if the utmp file has a host field.]) ++AH_TEMPLATE([UTHOST]) AC_TRY_COMPILE([ #include #include -@@ -860,8 +1246,9 @@ +@@ -1171,6 +1243,7 @@ #include #endif ],[struct utmp u; u.ut_host[0] = 0;], AC_DEFINE(UTHOST)) -+AH_TEMPLATE([HAVE_UTEMPTER],[Define if you have the utempter utmp helper program]) ++AH_TEMPLATE([HAVE_UTEMPTER]) AC_CHECK_HEADER(utempter.h, have_utempter=yes, have_utempter=no) --if test "$have_utempter" = yes; then -+if test X"$have_utempter" = Xyes; then + if test "$have_utempter" = yes; then AC_DEFINE(HAVE_UTEMPTER) - LIBS="$LIBS -lutempter" - fi -@@ -869,20 +1256,39 @@ +@@ -1180,20 +1253,39 @@ dnl dnl **** loadav **** dnl @@ -754,7 +447,7 @@ ) if test -z "$load" ; then -@@ -1024,6 +1430,11 @@ +@@ -1335,6 +1427,11 @@ dnl dnl **** signal handling **** dnl @@ -766,15 +459,15 @@ if test -n "$posix" ; then dnl POSIX has reliable signals with void return type. -@@ -1041,6 +1452,7 @@ - #endif - extern void (*signal ()) ();], [int i;], AC_DEFINE(SIGVOID)) - AC_CHECKING(sigset) +@@ -1344,6 +1441,7 @@ + else + + AC_CHECKING(return type of signal handlers) +AH_TEMPLATE([USESIGSET], [Define USESIGSET if you have sigset for BSD 4.1 reliable signals.]) - AC_TRY_LINK([ - #include + AC_TRY_COMPILE( + [#include #include -@@ -1052,6 +1464,9 @@ +@@ -1363,6 +1461,9 @@ #endif ], AC_DEFINE(USESIGSET)) AC_CHECKING(signal implementation) @@ -784,7 +477,7 @@ AC_TRY_RUN([ #include #include -@@ -1094,13 +1509,14 @@ +@@ -1405,13 +1506,14 @@ dnl AC_CHECKING(for crypt and sec libraries) @@ -803,11 +496,11 @@ oldlibs="$LIBS" LIBS="$LIBS -lsun" AC_CHECKING(IRIX sun library) -@@ -1123,6 +1539,13 @@ +@@ -1434,6 +1536,13 @@ dnl **** misc things **** dnl AC_CHECKING(wait union) -+AH_TEMPLATE([BSDWAIT], ++AH_TEMPLATE([BSDWAIT], +[Define BSDWAIT if your system defines a 'union wait' in + + Only allow BSDWAIT i.e. wait3 on nonposix systems, since @@ -817,7 +510,7 @@ AC_TRY_COMPILE([#include #include ],[ -@@ -1133,6 +1556,12 @@ +@@ -1444,6 +1553,13 @@ #endif ],AC_DEFINE(BSDWAIT)) @@ -826,11 +519,12 @@ + This is usually the case for SVID systems, where BSD uses sgttyb. + POSIX systems should define this anyway, even though they use + struct termios.]) ++ + if test -z "$butterfly"; then AC_CHECKING(for termio or termios) AC_TRY_CPP([#include ], AC_DEFINE(TERMIO), -@@ -1142,17 +1571,35 @@ +@@ -1453,17 +1569,35 @@ ) fi @@ -838,7 +532,7 @@ + dnl AC_CHECK_HEADER(shadow.h, AC_DEFINE(SHADOWPW)) AC_CHECKING(getspnam) -+AH_TEMPLATE([SHADOWPW], ++AH_TEMPLATE([SHADOWPW], +[If the passwords are stored in a shadow file and you want the + builtin lock to work properly, define SHADOWPW.]) AC_TRY_LINK([#include ], [getspnam("x");],AC_DEFINE(SHADOWPW)) @@ -850,7 +544,7 @@ AC_TRY_LINK(,[getttyent();], AC_DEFINE(GETTTYENT)) AC_CHECKING(fdwalk) -+AH_TEMPLATE([HAVE_FDWALK], ++AH_TEMPLATE([HAVE_FDWALK], +[Newer versions of Solaris include fdwalk, which can greatly improve + the startup time of screen; otherwise screen spends a lot of time + closing file descriptors.]) @@ -863,11 +557,11 @@ + undefined, screen uses its own (probably slower) version of bcopy().]) + +AC_CACHE_CHECK([if bcopy handles overlap], -+ [screen_cv_sys_bcopy_overlap], ++ [screen_cv_sys_bcopy_overlap], AC_TRY_RUN([ main() { char buf[10]; -@@ -1165,8 +1612,21 @@ +@@ -1476,7 +1610,21 @@ if (strncmp(buf, "cdedef", 6)) exit(1); exit(0); /* libc version works properly. */ @@ -877,20 +571,20 @@ +if test X"$screen_cv_sys_bcopy_overlap" = Xyes; then + AC_DEFINE(USEBCOPY) +fi - -+AH_TEMPLATE([USEMEMMOVE], -+[SYSV machines may have a working memcpy() -- Oh, this is ++ ++AH_TEMPLATE([USEMEMMOVE], ++[SYSV machines may have a working memcpy() -- Oh, this is + quite unlikely. Tell me if you see one. + "But then, memmove() should work, if at all available" he thought... + Boing, never say "works everywhere" unless you checked SCO UNIX. + Their memove fails the test in the configure script. Sigh. (Juergen) +]) +AC_CACHE_CHECK([if memmove handles overlap], -+ [screen_cv_sys_memmove_overlap], ++ [screen_cv_sys_memmove_overlap], + AC_TRY_RUN([ #define bcopy(s,d,l) memmove(d,s,l) - main() { -@@ -1180,9 +1640,15 @@ +@@ -1491,9 +1639,15 @@ if (strncmp(buf, "cdedef", 6)) exit(1); exit(0); /* libc version works properly. */ @@ -904,11 +598,11 @@ +AH_TEMPLATE([USEMEMCPY],[]) +AC_CACHE_CHECK([if memcpy handles overlap], -+ [screen_cv_sys_memcpy_overlap], ++ [screen_cv_sys_memcpy_overlap], AC_TRY_RUN([ #define bcopy(s,d,l) memcpy(d,s,l) main() { -@@ -1196,9 +1662,19 @@ +@@ -1507,9 +1661,19 @@ if (strncmp(buf, "cdedef", 6)) exit(1); exit(0); /* libc version works properly. */ @@ -920,24 +614,24 @@ +fi AC_MSG_CHECKING(long file names) -+AH_TEMPLATE([NAME_MAX], -+[If you are on a SYS V machine that restricts filename length to 14 ++AH_TEMPLATE([NAME_MAX], ++[If you are on a SYS V machine that restricts filename length to 14 + characters, you may need to enforce that by setting NAME_MAX to 14]) -+dnl TODO(Hannes) shipped config.h.in has -+dnl #undef NAME_MAX /* KEEP_UNDEF_HERE override system value */ ++dnl TODO(Hannes) shipped config.h.in has ++dnl #undef NAME_MAX /* KEEP_UNDEF_HERE override system value */ +dnl ahead of this (echo 1 > /tmp/conftest9012345) 2>/dev/null (echo 2 > /tmp/conftest9012346) 2>/dev/null val=`cat /tmp/conftest9012345 2>/dev/null` -@@ -1211,17 +1687,28 @@ +@@ -1522,17 +1686,28 @@ rm -f /tmp/conftest* AC_MSG_CHECKING(for vsprintf) -+AH_TEMPLATE([USEVARARGS], ++AH_TEMPLATE([USEVARARGS], +[If your system has vsprintf() and requires the use of the macros in + "varargs.h" to use functions with variable arguments, + define USEVARARGS.]) - AC_TRY_LINK([#include ],[va_list valist; vsprintf(0,0,valist);], AC_MSG_RESULT(yes);AC_DEFINE(USEVARARGS), AC_MSG_RESULT(no)) + AC_TRY_LINK(,[vsprintf(0,0,0);], AC_MSG_RESULT(yes);AC_DEFINE(USEVARARGS), AC_MSG_RESULT(no)) AC_HEADER_DIRENT @@ -946,7 +640,7 @@ AC_TRY_LINK(,[setenv((char *)0,(char *)0);unsetenv((char *)0);], AC_MSG_RESULT(yes);AC_DEFINE(USESETENV), AC_MSG_RESULT(no) AC_MSG_CHECKING(for putenv) -+AH_TEMPLATE([NEEDPUTENV], ++AH_TEMPLATE([NEEDPUTENV], +[If your system does not come with a setenv()/putenv()/getenv() + functions, you may bring in our own code by defining NEEDPUTENV.]) AC_TRY_LINK(,[putenv((char *)0);unsetenv((char *)0);], AC_MSG_RESULT(yes) , AC_MSG_RESULT(no);AC_DEFINE(NEEDPUTENV) @@ -958,7 +652,7 @@ AC_TRY_LINK([ #include ],[nl_langinfo(CODESET);], AC_MSG_RESULT(yes);AC_DEFINE(HAVE_NL_LANGINFO), AC_MSG_RESULT(no)) -@@ -1271,7 +1758,8 @@ +@@ -1582,7 +1757,8 @@ dnl Ptx bug workaround -- insert -lc after -ltermcap test -n "$seqptx" && LIBS="-ltermcap -lc -lsocket -linet -lnsl -lsec -lseq" diff --git a/recipes/screen/screen-4.0.3/cross-compile.patch b/recipes/screen/screen-4.0.3/cross-compile.patch new file mode 100644 index 0000000000..90b321f405 --- /dev/null +++ b/recipes/screen/screen-4.0.3/cross-compile.patch @@ -0,0 +1,331 @@ + +Patch by Hannes Reich (hannes@skynet.ie) 22-Jul-2005 +Resolves _some_ of the cross-compilation issues in screen's configure.in + +Index: screen-4.0.3/configure.in +=================================================================== +--- screen-4.0.3.orig/configure.in 2003-06-03 04:58:24.000000000 -0700 ++++ screen-4.0.3/configure.in 2009-09-11 16:15:04.533739171 -0700 +@@ -40,6 +40,322 @@ + AC_PREFIX_PROGRAM(screen) + AC_PREFIX_PROGRAM(gzip) + ++AH_TOP([ ++/* Copyright (c) 1993-2000 ++ * Juergen Weigert (jnweiger@immd4.informatik.uni-erlangen.de) ++ * Michael Schroeder (mlschroe@immd4.informatik.uni-erlangen.de) ++ * Copyright (c) 1987 Oliver Laumann ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2, or (at your option) ++ * any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program (see the file COPYING); if not, write to the ++ * Free Software Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA ++ * ++ */ ++ ++ ++/********************************************************************** ++ * ++ * User Configuration Section ++ */ ++ ++/* ++ * Maximum of simultaneously allowed windows per screen session. ++ */ ++#ifndef MAXWIN ++# define MAXWIN 40 ++#endif ++ ++/* ++ * Define SOCKDIR to be the directory to contain the named sockets ++ * screen creates. This should be in a common subdirectory, such as ++ * /usr/local or /tmp. It makes things a little more secure if you ++ * choose a directory which is not writable by everyone or where the ++ * "sticky" bit is on, but this isn't required. ++ * If SOCKDIR is not defined screen will put the named sockets in ++ * the user's home directory. Notice that this can cause you problems ++ * if some user's HOME directories are AFS- or NFS-mounted. Especially ++ * AFS is unlikely to support named sockets. ++ * ++ * Screen will name the subdirectories "S-$USER" (e.g /tmp/S-davison). ++ */ ++#undef SOCKDIR ++ ++/* ++ * Define this if the SOCKDIR is not shared between hosts. ++ */ ++#define SOCKDIR_IS_LOCAL_TO_HOST ++ ++/* ++ * Screen sources two startup files. First a global file with a path ++ * specified here, second your local $HOME/.screenrc ++ * Don't define this, if you don't want it. ++ */ ++#ifndef ETCSCREENRC ++# define ETCSCREENRC "/usr/local/etc/screenrc" ++#endif ++ ++/* ++ * Screen can look for the environment variable $SYSSCREENRC and -if it ++ * exists- load the file specified in that variable as global screenrc. ++ * If you want to enable this feature, define ALLOW_SYSSCREENRC to one (1). ++ * Otherwise ETCSCREENRC is always loaded. ++ */ ++#define ALLOW_SYSSCREENRC 1 ++ ++/* ++ * Screen needs encoding files for the translation of utf8 ++ * into some encodings, e.g. JIS, BIG5. ++ * Only needed if FONT, ENCODINGS and UTF8 are defined. ++ */ ++#ifndef SCREENENCODINGS ++# define SCREENENCODINGS "/usr/local/lib/screen/encodings" ++#endif ++/* ++ * Define CHECKLOGIN to force Screen users to enter their Unix password ++ * in addition to the screen password. ++ * ++ * Define NOSYSLOG if yo do not have logging facilities. Currently ++ * syslog() will be used to trace ``su'' commands only. ++ */ ++#define CHECKLOGIN 1 ++#undef NOSYSLOG ++ ++ ++/* ++ * define PTYMODE if you do not like the default of 0622, which allows ++ * public write to your pty. ++ * define PTYGROUP to some numerical group-id if you do not want the ++ * tty to be in "your" group. ++ * Note, screen is unable to change mode or group of the pty if it ++ * is not installed with sufficient privilege. (e.g. set-uid-root) ++ * define PTYROFS if the /dev/pty devices are mounted on a read-only ++ * filesystem so screen should not even attempt to set mode or group ++ * even if running as root (e.g. on TiVo). ++ */ ++#undef PTYMODE ++#undef PTYGROUP ++#undef PTYROFS ++ ++/* ++ * If screen is NOT installed set-uid root, screen can provide tty ++ * security by exclusively locking the ptys. While this keeps other ++ * users from opening your ptys, it also keeps your own subprocesses ++ * from being able to open /dev/tty. Define LOCKPTY to add this ++ * exclusive locking. ++ */ ++#undef LOCKPTY ++ ++/* ++ * If you'd rather see the status line on the first line of your ++ * terminal rather than the last, define TOPSTAT. ++ */ ++#undef TOPSTAT ++ ++/* ++ * define DETACH can detach a session. An absolute 'must'. ++ */ ++#define DETACH ++ ++/* ++ * here come the erlangen extensions to screen: ++ * define LOCK if you want to use a lock program for a screenlock. ++ * define PASSWORD for secure reattach of your screen. ++ * define COPY_PASTE to use the famous hacker's treasure zoo. ++ * define POW_DETACH to have a detach_and_logout key (requires DETACH). ++ * define REMOTE_DETACH (-d option) to move screen between terminals. ++ * define AUTO_NUKE to enable Tim MacKenzies clear screen nuking ++ * define PSEUDOS to allow window input/output filtering ++ * define MULTI to allow multiple attaches. ++ * define MULTIUSER to allow other users attach to your session ++ * (if they are in the acl, of course) ++ * define MAPKEYS to include input keyboard translation. ++ * define FONT to support ISO2022/alternet charset support ++ * define COLOR to include ansi color support. This may expose ++ * a bug in x11r6-color-xterm. ++ * define DW_CHARS to include support for double-width character ++ * sets. ++ * define ENCODINGS to include support for encodings like euc or big5. ++ * Needs FONT to work. ++ * define UTF8 if you want support for UTF-8 encoding. ++ * Needs FONT and ENCODINGS to work. ++ * define COLORS16 if you want 16 colors. ++ * Needs COLOR to work. ++ * define BUILTIN_TELNET to add telnet support to screen. ++ * Syntax: screen //telnet host [port] ++ * define RXVT_OSC if you want support for rxvts special ++ * change fgcolor/bgcolor/bgpicture sequences ++ */ ++#undef SIMPLESCREEN ++#ifndef SIMPLESCREEN ++# define LOCK ++# define PASSWORD ++# define COPY_PASTE ++# define REMOTE_DETACH ++# define POW_DETACH ++# define AUTO_NUKE ++# define PSEUDOS ++# define MULTI ++# define MULTIUSER ++# define MAPKEYS ++# define COLOR ++# define FONT ++# define DW_CHARS ++# define ENCODINGS ++# define UTF8 ++# define COLORS16 ++# define ZMODEM ++# define BLANKER_PRG ++#endif /* SIMPLESCREEN */ ++ ++#undef BUILTIN_TELNET ++#undef RXVT_OSC ++#undef COLORS256 ++ ++ ++/* ++ * If you have a braille display you should define HAVE_BRAILLE. ++ * The code inside #ifdef HAVE_BRAILLE was contributed by Hadi Bargi ++ * Rangin (bargi@dots.physics.orst.edu). ++ * WARNING: this is more or less unsupported code, it may be full of ++ * bugs leading to security holes, enable at your own risk! ++ */ ++#undef HAVE_BRAILLE ++ ++ ++/* ++ * As error messages are mostly meaningless to the user, we ++ * try to throw out phrases that are somewhat more familiar ++ * to ...well, at least familiar to us NetHack players. ++ */ ++#ifndef NONETHACK ++# define NETHACK ++#endif /* NONETHACK */ ++ ++/* ++ * If screen is installed with permissions to update /etc/utmp (such ++ * as if it is installed set-uid root), define UTMPOK. ++ */ ++#define UTMPOK ++ ++/* Set LOGINDEFAULT to one (1) ++ * if you want entries added to /etc/utmp by default, else set it to ++ * zero (0). ++ * LOGINDEFAULT will be one (1) whenever LOGOUTOK is undefined! ++ */ ++#define LOGINDEFAULT 1 ++ ++/* Set LOGOUTOK to one (1) ++ * if you want the user to be able to log her/his windows out. ++ * (Meaning: They are there, but not visible in /etc/utmp). ++ * Disabling this feature only makes sense if you have a secure /etc/utmp ++ * database. ++ * Negative examples: suns usually have a world writable utmp file, ++ * xterm will run perfectly without s-bit. ++ * ++ * If LOGOUTOK is undefined and UTMPOK is defined, all windows are ++ * initially and permanently logged in. ++ * ++ * Set CAREFULUTMP to one (1) if you want that users have at least one ++ * window per screen session logged in. ++ */ ++#define LOGOUTOK 1 ++#undef CAREFULUTMP ++ ++ ++/* ++ * If UTMPOK is defined and your system (incorrectly) counts logins by ++ * counting non-null entries in /etc/utmp (instead of counting non-null ++ * entries with no hostname that are not on a pseudo tty), define USRLIMIT ++ * to have screen put an upper-limit on the number of entries to write ++ * into /etc/utmp. This helps to keep you from exceeding a limited-user ++ * license. ++ */ ++#undef USRLIMIT ++ ++/* ++ * both must be defined if you want to favor tcsendbreak over ++ * other calls to generate a break condition on serial lines. ++ * (Do not bother, if you are not using plain tty windows.) ++ */ ++#define POSIX_HAS_A_GOOD_TCSENDBREAK ++#define SUNOS4_AND_WE_TRUST_TCSENDBREAK ++ ++/* ++ * to lower the interrupt load on the host machine, you may want to ++ * adjust the VMIN and VTIME settings used for plain tty windows. ++ * See the termio(4) manual page (Non-Canonical Mode Input Processing) ++ * for details. ++ * if undefined, VMIN=1, VTIME=0 is used as a default - this gives you ++ * best user responsiveness, but highest interrupt frequency. ++ * (Do not bother, if you are not using plain tty windows.) ++ */ ++#define TTYVMIN 100 ++#define TTYVTIME 2 ++ ++/* ++ * looks like the above values are ignored by setting FNDELAY. ++ * This is default for all pty/ttys, you may disable it for ++ * ttys here. After playing with it for a while, one may find out ++ * that this feature may cause screen to lock up. ++ */ ++#ifdef bsdi ++# define TTY_DISABLE_FNBLOCK /* select barfs without it ... */ ++#endif ++ ++ ++/* ++ * Some terminals, e.g. Wyse 120, use a bitfield to select attributes. ++ * This doesn't work with the standard so/ul/m? terminal entries, ++ * because they will cancel each other out. ++ * On TERMINFO machines, "sa" (sgr) may work. If you want screen ++ * to switch attributes only with sgr, define USE_SGR. ++ * This is *not* recomended, do this only if you must. ++ */ ++#undef USE_SGR ++ ++ ++/* ++ * Define USE_LOCALE if you want screen to use the locale names ++ * for the name of the month and day of the week. ++ */ ++#define USE_LOCALE ++ ++/* ++ * Define USE_PAM if your system supports PAM (Pluggable Authentication ++ * Modules) and you want screen to use it instead of calling crypt(). ++ * (You may also need to add -lpam to LIBS in the Makefile.) ++ */ ++#undef USE_PAM ++ ++/* ++ * Define CHECK_SCREEN_W if you want screen to set TERM to screen-w ++ * if the terminal width is greater than 131 columns. No longer needed ++ * on modern systems which use $COLUMNS or the tty settings instead. ++ */ ++#undef CHECK_SCREEN_W ++ ++/********************************************************************** ++ * ++ * End of User Configuration Section ++ * ++ * Rest of this file is modified by 'configure' ++ * Change at your own risk! ++ * ++ */ ++]) ++# end of AH_TOP ++ + old_CFLAGS="$CFLAGS" + AC_PROG_CC + AC_PROG_CPP diff --git a/recipes/screen/screen-4.0.3/no-stropts.patch b/recipes/screen/screen-4.0.3/no-stropts.patch new file mode 100644 index 0000000000..bce651479d --- /dev/null +++ b/recipes/screen/screen-4.0.3/no-stropts.patch @@ -0,0 +1,13 @@ +Index: screen-4.0.3/pty.c +=================================================================== +--- screen-4.0.3.orig/pty.c 2009-09-11 15:44:44.881250800 -0700 ++++ screen-4.0.3/pty.c 2009-09-11 15:45:28.077862097 -0700 +@@ -34,7 +34,7 @@ + #endif + + /* for solaris 2.1, Unixware (SVR4.2) and possibly others */ +-#ifdef HAVE_SVR4_PTYS ++#if defined HAVE_SVR4_PTYS && !defined __UCLIBC__ + # include + #endif + diff --git a/recipes/screen/screen-4.0.3/no-utempter.patch b/recipes/screen/screen-4.0.3/no-utempter.patch new file mode 100644 index 0000000000..22d21bb919 --- /dev/null +++ b/recipes/screen/screen-4.0.3/no-utempter.patch @@ -0,0 +1,17 @@ +Index: screen-4.0.3/configure.in +=================================================================== +--- screen-4.0.3.orig/configure.in 2009-09-11 18:42:08.338231443 -0700 ++++ screen-4.0.3/configure.in 2009-09-11 18:43:39.378663533 -0700 +@@ -1243,12 +1243,6 @@ + #include + #endif + ],[struct utmp u; u.ut_host[0] = 0;], AC_DEFINE(UTHOST)) +-AH_TEMPLATE([HAVE_UTEMPTER]) +-AC_CHECK_HEADER(utempter.h, have_utempter=yes, have_utempter=no) +-if test "$have_utempter" = yes; then +- AC_DEFINE(HAVE_UTEMPTER) +- LIBS="$LIBS -lutempter" +-fi + + dnl + dnl **** loadav **** diff --git a/recipes/screen/screen-4.0.3/sched.patch b/recipes/screen/screen-4.0.3/sched.patch new file mode 100644 index 0000000000..5c635c157b --- /dev/null +++ b/recipes/screen/screen-4.0.3/sched.patch @@ -0,0 +1,20 @@ +diff -urN screen-4.0.3-orig/sched.h screen-4.0.3/sched.h +--- screen-4.0.3-orig/sched.h 2002-01-08 16:42:43.000000000 +0100 ++++ screen-4.0.3/sched.h 2009-01-13 14:53:15.000000000 +0100 +@@ -22,6 +22,10 @@ + * $Id: sched.h,v 1.1.1.1 1993/06/16 23:51:13 jnweiger Exp $ FAU + */ + ++#ifndef _SCHED_H_ ++#define _SCHED_H_ 1 ++#include ++ + struct event + { + struct event *next; +@@ -41,3 +45,4 @@ + #define EV_READ 1 + #define EV_WRITE 2 + #define EV_ALWAYS 3 ++#endif + diff --git a/recipes/screen/screen_4.0.3.bb b/recipes/screen/screen_4.0.3.bb index 1165d46d33..003ca7a1a4 100644 --- a/recipes/screen/screen_4.0.3.bb +++ b/recipes/screen/screen_4.0.3.bb @@ -4,13 +4,15 @@ processes, typically interactive shells." LICENSE = "GPL" SECTION = "console/utils" DEPENDS = "ncurses" -PR = "r0" - -# patch needs adapting -DEFAULT_PREFERENCE = "-1" +PR = "r1" SRC_URI = "${GNU_MIRROR}/screen/screen-${PV}.tar.gz \ - file://configure.patch;patch=1" + file://cross-compile.patch;patch=1 \ + file://configure.patch;patch=1 \ + file://sched.patch;patch=1 \ + file://no-stropts.patch;patch=1 \ + file://no-utempter.patch;patch=1 \ + " inherit autotools -- cgit v1.2.3 From 53c0673ba015ba400d4e18fef5c5903830a06c09 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Fri, 11 Sep 2009 23:31:12 -0700 Subject: powertop: Make it compile on uclibc. * Use INC_PR * Move common stuff to powertop.inc * Add -lint for uclibc bases systems * Add a patch to tinker with order of CFLAGS in commandline * Eliminate the sed expression in favor of a patch to substitute nsursesw with ncurses Signed-off-by: Khem Raj --- recipes/powertop/files/ldflags.patch | 13 +++++++++++++ recipes/powertop/powertop.inc | 27 +++++++++++++++++++++++++++ recipes/powertop/powertop_1.10.bb | 19 ++----------------- recipes/powertop/powertop_1.11.bb | 20 ++------------------ recipes/powertop/powertop_1.8.bb | 18 ++---------------- 5 files changed, 46 insertions(+), 51 deletions(-) create mode 100644 recipes/powertop/files/ldflags.patch create mode 100644 recipes/powertop/powertop.inc (limited to 'recipes') diff --git a/recipes/powertop/files/ldflags.patch b/recipes/powertop/files/ldflags.patch new file mode 100644 index 0000000000..690d90f8f8 --- /dev/null +++ b/recipes/powertop/files/ldflags.patch @@ -0,0 +1,13 @@ +Index: powertop-1.11/Makefile +=================================================================== +--- powertop-1.11.orig/Makefile 2008-12-30 10:52:54.000000000 -0800 ++++ powertop-1.11/Makefile 2009-09-11 19:46:19.550388421 -0700 +@@ -20,7 +20,7 @@ + + + powertop: $(OBJS) Makefile powertop.h +- $(CC) ${CFLAGS} $(OBJS) -lncursesw -o powertop ++ $(CC) $(OBJS) ${CFLAGS} -lncurses -o powertop + @(cd po/ && $(MAKE)) + + powertop.1.gz: powertop.1 diff --git a/recipes/powertop/powertop.inc b/recipes/powertop/powertop.inc new file mode 100644 index 0000000000..931abadc44 --- /dev/null +++ b/recipes/powertop/powertop.inc @@ -0,0 +1,27 @@ +DESCRIPTION = "PowerTOP, a tool that helps you find what software is using the most power." +HOMEPAGE = "http://www.linuxpowertop.org/" +LICENSE = "GPLv2" +DEPENDS = "virtual/libintl ncurses" + +INC_PR = "r1" + +SRC_URI = "http://www.lesswatts.org/projects/powertop/download/powertop-${PV}.tar.gz \ + file://ldflags.patch;patch=1 \ + " + +CFLAGS = "${LDFLAGS}" + +do_configure() { + # We do not build ncurses with wide char support + # sed -i -e "s/lncursesw/lncurses/" ${S}/Makefile + : +} + +do_install() { + oe_runmake install DESTDIR=${D} +} + + +LDFLAGS_append_linux-uclibc = " -lintl" +LDFLAGS_append_linux-uclibceabi = " -lintl" +LDFLAGS_append_linux-uclibcspe = " -lintl" diff --git a/recipes/powertop/powertop_1.10.bb b/recipes/powertop/powertop_1.10.bb index 4a429d68ba..49da90e423 100644 --- a/recipes/powertop/powertop_1.10.bb +++ b/recipes/powertop/powertop_1.10.bb @@ -1,17 +1,2 @@ -DESCRIPTION = "PowerTOP, a tool that helps you find what software is using the most power." -HOMEPAGE = "http://www.linuxpowertop.org/" -LICENSE = "GPLv2" -DEPENDS = "virtual/libintl ncurses" - -SRC_URI = "http://www.lesswatts.org/projects/powertop/download/powertop-${PV}.tar.gz" - -CFLAGS += "${LDFLAGS}" - -do_configure() { - # We do not build ncurses with wide char support - sed -i -e "s/lncursesw/lncurses/" ${S}/Makefile -} - -do_install() { - oe_runmake install DESTDIR=${D} -} +require powertop.inc +PR = "${INC_PR}.0" diff --git a/recipes/powertop/powertop_1.11.bb b/recipes/powertop/powertop_1.11.bb index 01148cb9fd..6af5290122 100644 --- a/recipes/powertop/powertop_1.11.bb +++ b/recipes/powertop/powertop_1.11.bb @@ -1,26 +1,10 @@ -DESCRIPTION = "PowerTOP, a tool that helps you find what software is using the most power." -HOMEPAGE = "http://www.linuxpowertop.org/" -LICENSE = "GPLv2" -DEPENDS = "virtual/libintl ncurses" +require powertop.inc -PR = "r1" - -SRC_URI = "http://www.lesswatts.org/projects/powertop/download/powertop-${PV}.tar.gz" +PR = "${INC_PR}.0" SRC_URI_append_armv7a = " file://omap.patch;patch=1;pnum=0" -CFLAGS += "${LDFLAGS}" CFLAGS_append_beagleboard = " -DOMAP3" CFLAGS_append_overo = " -DOMAP3" CFLAGS_append_omap3evm = " -DOMAP3" CFLAGS_append_omapzoom2 = " -DOMAP3" - - -do_configure() { - # We do not build ncurses with wide char support - sed -i -e "s/lncursesw/lncurses/" ${S}/Makefile -} - -do_install() { - oe_runmake install DESTDIR=${D} -} diff --git a/recipes/powertop/powertop_1.8.bb b/recipes/powertop/powertop_1.8.bb index ab84161ddc..e74b8a6add 100644 --- a/recipes/powertop/powertop_1.8.bb +++ b/recipes/powertop/powertop_1.8.bb @@ -1,17 +1,3 @@ -DESCRIPTION = "PowerTOP, a tool that helps you find what software is using the most power." -HOMEPAGE = "http://www.linuxpowertop.org/" -LICENSE = "GPLv2" -DEPENDS = "ncurses" +require powertop.inc +PR = "${INC_PR}.0" -SRC_URI = "http://www.linuxpowertop.org/download/powertop-${PV}.tar.gz" - -CFLAGS += "${LDFLAGS}" - -do_configure() { - # We do not build ncurses with wide char support - sed -i -e "s/lncursesw/lncurses/" ${S}/Makefile -} - -do_install() { - oe_runmake install DESTDIR=${D} -} -- cgit v1.2.3 From 23c18144b10a12aa8593b98125e9733519c69acc Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Fri, 11 Sep 2009 16:06:08 -0700 Subject: ebtables: fix GNU_HASH error --- recipes/ebtables/ebtables_2.0.6.bb | 2 ++ 1 file changed, 2 insertions(+) (limited to 'recipes') diff --git a/recipes/ebtables/ebtables_2.0.6.bb b/recipes/ebtables/ebtables_2.0.6.bb index 33ad2b9113..c4fc1c329a 100644 --- a/recipes/ebtables/ebtables_2.0.6.bb +++ b/recipes/ebtables/ebtables_2.0.6.bb @@ -4,6 +4,8 @@ LICENSE = "GPL" SECTION = "console/network" PR = "r2" +TARGET_CC_ARCH += "${LDFLAGS}" + SRC_URI = "${SOURCEFORGE_MIRROR}/ebtables/ebtables-v${PV}.tar.gz \ file://gcc34.patch;patch=1 \ file://gcc4.patch;patch=1 \ -- cgit v1.2.3 From c49513ce80d595ac0f4aa12e93b1786b87c2df20 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Sat, 12 Sep 2009 11:49:00 +0200 Subject: cairo git: update SRCREV --- recipes/cairo/cairo_git.bb | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/cairo/cairo_git.bb b/recipes/cairo/cairo_git.bb index 44212103a6..825b601897 100644 --- a/recipes/cairo/cairo_git.bb +++ b/recipes/cairo/cairo_git.bb @@ -1,5 +1,6 @@ #This is a development snapshot, so lets hint OE to use the releases DEFAULT_PREFERENCE = "-1" +DEFAULT_PREFERENCE_angstrom = "1" SECTION = "libs" PRIORITY = "optional" @@ -7,7 +8,10 @@ DEPENDS = "pixman virtual/libx11 libsm libpng fontconfig libxrender" DESCRIPTION = "Cairo graphics library" LICENSE = "MPL LGPL" -PV = "1.5.3+git${SRCDATE}" +SRCREV = "3acccf0ea5ca1fde9cf6b91677588680a2644ee6" + +PV = "1.9.3" +PR_append = "+gitr${SRCREV}" SRC_URI = "git://git.cairographics.org/git/cairo;protocol=git \ " -- cgit v1.2.3 From 6efa4799a897aa64f16caa36f65fe65a5a106cc2 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Sat, 12 Sep 2009 14:25:51 +0200 Subject: gtk+: add 2.16.6 --- recipes/gtk+/gtk+-2.16.6/hardcoded_libtool.patch | 31 +++++++ recipes/gtk+/gtk+-2.16.6/no-demos.patch | 10 +++ recipes/gtk+/gtk+-2.16.6/run-iconcache.patch | 19 +++++ recipes/gtk+/gtk+-2.16.6/toggle-font.diff | 100 +++++++++++++++++++++++ recipes/gtk+/gtk+_2.16.6.bb | 65 +++++++++++++++ 5 files changed, 225 insertions(+) create mode 100644 recipes/gtk+/gtk+-2.16.6/hardcoded_libtool.patch create mode 100644 recipes/gtk+/gtk+-2.16.6/no-demos.patch create mode 100644 recipes/gtk+/gtk+-2.16.6/run-iconcache.patch create mode 100644 recipes/gtk+/gtk+-2.16.6/toggle-font.diff create mode 100644 recipes/gtk+/gtk+_2.16.6.bb (limited to 'recipes') diff --git a/recipes/gtk+/gtk+-2.16.6/hardcoded_libtool.patch b/recipes/gtk+/gtk+-2.16.6/hardcoded_libtool.patch new file mode 100644 index 0000000000..82fbbac8d7 --- /dev/null +++ b/recipes/gtk+/gtk+-2.16.6/hardcoded_libtool.patch @@ -0,0 +1,31 @@ +Index: gtk+-2.14.2/configure.in +=================================================================== +--- gtk+-2.14.2.orig/configure.in 2008-09-23 15:52:44.000000000 +0100 ++++ gtk+-2.14.2/configure.in 2008-09-23 15:53:51.000000000 +0100 +@@ -401,7 +401,7 @@ + case $enable_explicit_deps in + auto) + export SED +- deplibs_check_method=`(./libtool --config; echo 'eval echo \"$deplibs_check_method\"') | sh` ++ deplibs_check_method=`(./$host_alias-libtool --config; echo 'eval echo \"$deplibs_check_method\"') | sh` + if test "x$deplibs_check_method" '!=' xpass_all || test "x$enable_static" = xyes ; then + enable_explicit_deps=yes + else +@@ -759,7 +759,7 @@ + dnl Now we check to see if our libtool supports shared lib deps + dnl (in a rather ugly way even) + if $dynworks; then +- pixbuf_libtool_config="${CONFIG_SHELL-/bin/sh} ./libtool --config" ++ pixbuf_libtool_config="${CONFIG_SHELL-/bin/sh} $host_alias-libtool --config" + pixbuf_deplibs_check=`$pixbuf_libtool_config | \ + grep '^[[a-z_]]*check[[a-z_]]*_method=[['\''"]]' | \ + sed 's/.*[['\''"]]\(.*\)[['\''"]]$/\1/'` +@@ -1893,7 +1893,7 @@ + # We are using gmodule-no-export now, but I'm leaving the stripping + # code in place for now, since pango and atk still require gmodule. + export SED +-export_dynamic=`(./libtool --config; echo eval echo \\$export_dynamic_flag_spec) | sh` ++export_dynamic=`($host_alias-libtool --config; echo eval echo \\$export_dynamic_flag_spec) | sh` + if test -n "$export_dynamic"; then + GDK_PIXBUF_DEP_LIBS=`echo $GDK_PIXBUF_DEP_LIBS | sed -e "s/$export_dynamic//"` + GDK_PIXBUF_XLIB_DEP_LIBS=`echo $GDK_PIXBUF_XLIB_DEP_LIBS | sed -e "s/$export_dynamic//"` diff --git a/recipes/gtk+/gtk+-2.16.6/no-demos.patch b/recipes/gtk+/gtk+-2.16.6/no-demos.patch new file mode 100644 index 0000000000..0fc4c48d1a --- /dev/null +++ b/recipes/gtk+/gtk+-2.16.6/no-demos.patch @@ -0,0 +1,10 @@ +--- gtk+-2.10.1/Makefile.am.orig 2006-08-08 12:37:30.000000000 +0100 ++++ gtk+-2.10.1/Makefile.am 2006-08-08 12:37:48.000000000 +0100 +@@ -1,6 +1,6 @@ + ## Makefile.am for GTK+ + +-SRC_SUBDIRS = gdk-pixbuf gdk gtk modules demos tests perf contrib ++SRC_SUBDIRS = gdk-pixbuf gdk gtk modules tests perf contrib + SUBDIRS = po po-properties $(SRC_SUBDIRS) docs m4macros + + # require automake 1.4 diff --git a/recipes/gtk+/gtk+-2.16.6/run-iconcache.patch b/recipes/gtk+/gtk+-2.16.6/run-iconcache.patch new file mode 100644 index 0000000000..ac15e9ab24 --- /dev/null +++ b/recipes/gtk+/gtk+-2.16.6/run-iconcache.patch @@ -0,0 +1,19 @@ +--- /tmp/Makefile.am 2007-01-08 17:44:47.000000000 +0100 ++++ gtk+-2.10.7/gtk/Makefile.am 2007-01-08 17:45:17.025251000 +0100 +@@ -1128,11 +1128,11 @@ + ./gtk-update-icon-cache + endif + +-gtkbuiltincache.h: @REBUILD@ stamp-icons +- $(MAKE) $(AM_MAKEFLAGS) gtk-update-icon-cache$(EXEEXT) +- $(gtk_update_icon_cache_program) --force --ignore-theme-index \ +- --source builtin_icons stock-icons > gtkbuiltincache.h.tmp && \ +- mv gtkbuiltincache.h.tmp gtkbuiltincache.h ++#gtkbuiltincache.h: @REBUILD@ stamp-icons ++# $(MAKE) $(AM_MAKEFLAGS) gtk-update-icon-cache$(EXEEXT) ++# $(gtk_update_icon_cache_program) --force --ignore-theme-index \ ++# --source builtin_icons stock-icons > gtkbuiltincache.h.tmp && \ ++# mv gtkbuiltincache.h.tmp gtkbuiltincache.h + + EXTRA_DIST += \ + $(STOCK_ICONS) \ diff --git a/recipes/gtk+/gtk+-2.16.6/toggle-font.diff b/recipes/gtk+/gtk+-2.16.6/toggle-font.diff new file mode 100644 index 0000000000..59ad150b2f --- /dev/null +++ b/recipes/gtk+/gtk+-2.16.6/toggle-font.diff @@ -0,0 +1,100 @@ +Index: gtk/gtkcellrenderertoggle.c +=================================================================== +--- gtk/gtkcellrenderertoggle.c (revision 18523) ++++ gtk/gtkcellrenderertoggle.c (working copy) +@@ -71,6 +71,8 @@ + PROP_INDICATOR_SIZE + }; + ++/* This is a hard-coded default which promptly gets overridden by a size ++ calculated from the font size. */ + #define TOGGLE_WIDTH 13 + + static guint toggle_cell_signals[LAST_SIGNAL] = { 0 }; +@@ -80,8 +82,9 @@ + typedef struct _GtkCellRendererTogglePrivate GtkCellRendererTogglePrivate; + struct _GtkCellRendererTogglePrivate + { +- gint indicator_size; +- ++ gint indicator_size; /* This is the real size */ ++ gint override_size; /* This is the size set from the indicator-size property */ ++ GtkWidget *cached_widget; + guint inconsistent : 1; + }; + +@@ -104,6 +107,7 @@ + GTK_CELL_RENDERER (celltoggle)->ypad = 2; + + priv->indicator_size = TOGGLE_WIDTH; ++ priv->override_size = 0; + priv->inconsistent = FALSE; + } + +@@ -210,7 +214,7 @@ + g_value_set_boolean (value, celltoggle->radio); + break; + case PROP_INDICATOR_SIZE: +- g_value_set_int (value, priv->indicator_size); ++ g_value_set_int (value, priv->override_size ? priv->override_size : priv->indicator_size); + break; + default: + G_OBJECT_WARN_INVALID_PROPERTY_ID (object, param_id, pspec); +@@ -245,7 +249,7 @@ + celltoggle->radio = g_value_get_boolean (value); + break; + case PROP_INDICATOR_SIZE: +- priv->indicator_size = g_value_get_int (value); ++ priv->override_size = g_value_get_int (value); + break; + default: + G_OBJECT_WARN_INVALID_PROPERTY_ID (object, param_id, pspec); +@@ -273,6 +277,27 @@ + } + + static void ++on_widget_style_set (GtkWidget *widget, GtkStyle *previous, gpointer user_data) ++{ ++ GtkCellRendererTogglePrivate *priv = user_data; ++ PangoContext *context; ++ PangoFontMetrics *metrics; ++ int height; ++ ++ context = gtk_widget_get_pango_context (widget); ++ metrics = pango_context_get_metrics (context, ++ widget->style->font_desc, ++ pango_context_get_language (context)); ++ ++ height = pango_font_metrics_get_ascent (metrics) + ++ pango_font_metrics_get_descent (metrics); ++ ++ pango_font_metrics_unref (metrics); ++ ++ priv->indicator_size = PANGO_PIXELS (height * 0.85); ++} ++ ++static void + gtk_cell_renderer_toggle_get_size (GtkCellRenderer *cell, + GtkWidget *widget, + GdkRectangle *cell_area, +@@ -287,6 +312,20 @@ + + priv = GTK_CELL_RENDERER_TOGGLE_GET_PRIVATE (cell); + ++ if (priv->override_size) { ++ priv->indicator_size = priv->override_size; ++ } else if (priv->cached_widget != widget) { ++ if (priv->cached_widget) { ++ g_object_remove_weak_pointer (widget, &priv->cached_widget); ++ g_signal_handlers_disconnect_by_func (priv->cached_widget, on_widget_style_set, priv); ++ } ++ priv->cached_widget = widget; ++ g_object_add_weak_pointer (widget, &priv->cached_widget); ++ g_signal_connect (widget, "style-set", on_widget_style_set, priv); ++ ++ on_widget_style_set (widget, NULL, priv); ++ } ++ + calc_width = (gint) cell->xpad * 2 + priv->indicator_size; + calc_height = (gint) cell->ypad * 2 + priv->indicator_size; + diff --git a/recipes/gtk+/gtk+_2.16.6.bb b/recipes/gtk+/gtk+_2.16.6.bb new file mode 100644 index 0000000000..43df738c30 --- /dev/null +++ b/recipes/gtk+/gtk+_2.16.6.bb @@ -0,0 +1,65 @@ +require gtk+.inc + +DEPENDS += "cairo jasper" + +# disabled per default - this uses as little patches as possible +DEFAULT_PREFERENCE = "-1" + +SRC_URI = "http://download.gnome.org/sources/gtk+/2.16/gtk+-${PV}.tar.bz2 \ + file://xsettings.patch;patch=1 \ + file://run-iconcache.patch;patch=1 \ + file://hardcoded_libtool.patch;patch=1 \ + file://no-demos.patch;patch=1 \ + file://toggle-font.diff;patch=1;pnum=0 \ + " + +EXTRA_OECONF = "--with-libtiff --disable-xkb --disable-glibtest --enable-display-migration gio_can_sniff=yes" + +LIBV = "2.10.0" + +PACKAGES_DYNAMIC = "gtk-module-* gdk-pixbuf-loader-* gtk-immodule-* gtk-printbackend-*" + +python populate_packages_prepend () { + import os.path + + prologue = bb.data.getVar("postinst_prologue", d, 1) + + gtk_libdir = bb.data.expand('${libdir}/gtk-2.0/${LIBV}', d) + loaders_root = os.path.join(gtk_libdir, 'loaders') + immodules_root = os.path.join(gtk_libdir, 'immodules') + printmodules_root = os.path.join(gtk_libdir, 'printbackends'); + modules_root = bb.data.expand('${libdir}/gtk-2.0/modules/',d) + + do_split_packages(d, loaders_root, '^libpixbufloader-(.*)\.so$', 'gdk-pixbuf-loader-%s', 'GDK pixbuf loader for %s', prologue + 'gdk-pixbuf-query-loaders > /etc/gtk-2.0/gdk-pixbuf.loaders', extra_depends='') + do_split_packages(d, immodules_root, '^im-(.*)\.so$', 'gtk-immodule-%s', 'GTK input module for %s', prologue + 'gtk-query-immodules-2.0 > /etc/gtk-2.0/gtk.immodules', extra_depends='') + do_split_packages(d, printmodules_root, '^libprintbackend-(.*)\.so$', 'gtk-printbackend-%s', 'GTK printbackend module for %s', extra_depends='') + do_split_packages(d, modules_root, '^lib(.*)\.so$', 'gtk-module-%s', 'GTK module for %s', extra_depends='') + + if (bb.data.getVar('DEBIAN_NAMES', d, 1)): + bb.data.setVar('PKG_${PN}', 'libgtk-2.0', d) +} + +# gail is part of gtk+ since gtk+-2.13.0 (targetting >=GNOME 2.23): +PROVIDES = "virtual/gail" +RPROVIDES_${PN} = "libgailutil18" +RCONFLICTS_${PN} = "libgailutil18" +RREPLACES_${PN} = "libgailutil18" +RPROVIDES_${PN}-dev = "libgailutil-dev" +RCONFLICTS_${PN}-dev = "libgailutil-dev" +RREPLACES_${PN}-dev = "libgailutil-dev" +RPROVIDES_${PN}-doc = "libgailutil-doc" +RCONFLICTS_${PN}-doc = "libgailutil-doc" +RREPLACES_${PN}-doc = "libgailutil-doc" +RPROVIDES_${PN}-dbg = "libgailutil-dbg" +RCONFLICTS_${PN}-dbg = "libgailutil-dbg" +RREPLACES_${PN}-dbg = "libgailutil-dbg" +# FIXME: replace locales as well + +do_stage_append() { + + # this tool is required by gnome-keyring 2.26.0 to get built + # it is written in Python and use only Python xml + install -d ${STAGING_BINDIR_NATIVE} + install -m 0755 ${S}/gtk/gtk-builder-convert ${STAGING_BINDIR_NATIVE} + +} -- cgit v1.2.3 From 18158e33775356f5d166908d253159b05125a2fb Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Sat, 12 Sep 2009 15:55:45 +0200 Subject: glibc-package bbclass: add hack to avoid "kernel too old" error when generating locales in angstrom The proper fix would be to patch linux-libc-headers with 0001-implement-TIF_RESTORE_SIGMASK-support-and-enable-the.patch and all arm kernels as well. Since that's quite an undertaking angstrom needs to short term hack like this commit to keep things building while the proper fix is being worked on. --- recipes/glibc/glibc-package.bbclass | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/glibc/glibc-package.bbclass b/recipes/glibc/glibc-package.bbclass index 69b569e346..4d7f6fdff9 100644 --- a/recipes/glibc/glibc-package.bbclass +++ b/recipes/glibc/glibc-package.bbclass @@ -265,7 +265,12 @@ python package_do_split_gconvs () { elif target_arch == "powerpc": target_arch = "ppc" - kernel_ver = bb.data.getVar("OLDEST_KERNEL", d, 1) + # This is a hack till linux-libc-headers gets patched for the missing arm syscalls and all arm device kernels as well + if bb.data.getVar("DISTRO_NAME", d, 1) == "Angstrom": + kernel_ver = "2.6.24" + else: + kernel_ver = bb.data.getVar("OLDEST_KERNEL", d, 1) + if kernel_ver is None: qemu = "qemu-%s -s 1048576" % target_arch else: -- cgit v1.2.3 From eabc33a1f14a92015dac4508e57a40d26cd385e6 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Sat, 12 Sep 2009 16:00:03 +0200 Subject: clutter.inc: rework armv7a machines a bit and add omap3517-evm to compatible machines --- recipes/clutter/clutter.inc | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) (limited to 'recipes') diff --git a/recipes/clutter/clutter.inc b/recipes/clutter/clutter.inc index 4e2457946a..4e36669d48 100644 --- a/recipes/clutter/clutter.inc +++ b/recipes/clutter/clutter.inc @@ -2,7 +2,7 @@ DESCRIPTION = "Clutter graphics library" HOMEPAGE = "http://www.clutter-project.org/" LICENSE = "LGPL" -COMPATIBLE_MACHINE = "(zylonite|mx31litekit|omap-3430ldp|omap-3430sdp|mx31ads|qemuarm|qemux86|ipodtouch|beagleboard|overo|omap3evm)" +COMPATIBLE_MACHINE = "(zylonite|mx31litekit|omap-3430ldp|omap-3430sdp|mx31ads|qemuarm|qemux86|ipodtouch|omap3517-evm|beagleboard|overo|omap3evm)" STDDEPENDS = "virtual/libx11 gtk-doc-native pango glib-2.0 libxfixes gtk+" BASE_CONF = "--disable-gtk-doc ${@get_clutter_fpu_setting(bb, d)}" @@ -20,6 +20,10 @@ EXTRA_OECONF_mx31litekit = "${BASE_CONF} --with-flavour=eglnative" PACKAGE_ARCH_mx31litekit = "${MACHINE_ARCH}" LDFLAGS_append_mx31litekit = " -lpvrNULLWSEGL -lstdc++ " +DEPENDS_armv7a = "${STDDEPENDS} libgles-omap3 tslib" +EXTRA_OECONF_armv7a = "${BASE_CONF} --with-flavour=eglx --with-gles=2.0" +PACKAGE_ARCH_armv7a = "${MACHINE_ARCH}" + DEPENDS_omap-3430ldp = "${STDDEPENDS} libgles-omap3 tslib" EXTRA_OECONF_omap-3430ldp = "${BASE_CONF} --with-flavour=eglx" PACKAGE_ARCH_omap-3430ldp = "${MACHINE_ARCH}" @@ -28,18 +32,6 @@ DEPENDS_omap-3430sdp = "${STDDEPENDS} libgles-omap3 tslib" EXTRA_OECONF_omap-3430sdp = "${BASE_CONF} --with-flavour=eglx" PACKAGE_ARCH_omap-3430sdp = "${MACHINE_ARCH}" -DEPENDS_beagleboard = "${STDDEPENDS} libgles-omap3 tslib" -EXTRA_OECONF_beagleboard = "${BASE_CONF} --with-flavour=eglx --with-gles=2.0" -PACKAGE_ARCH_beagleboard = "${MACHINE_ARCH}" - -DEPENDS_omap3evm = "${STDDEPENDS} libgles-omap3 tslib" -EXTRA_OECONF_omap3evm = "${BASE_CONF} --with-flavour=eglx --with-gles=2.0" -PACKAGE_ARCH_omap3evm = "${MACHINE_ARCH}" - -DEPENDS_overo = "${STDDEPENDS} libgles-omap3 tslib" -EXTRA_OECONF_overo = "${BASE_CONF} --with-flavour=eglx --with-gles=2.0" -PACKAGE_ARCH_overo = "${MACHINE_ARCH}" - DEPENDS_mx31ads = "${STDDEPENDS} libgles-mx31 tslib" EXTRA_OECONF_mx31ads = "${BASE_CONF} --with-flavour=eglnative" PACKAGE_ARCH_mx31ads = "${MACHINE_ARCH}" -- cgit v1.2.3 From ca6953db99a4cee228c1daf294913c5687a4d675 Mon Sep 17 00:00:00 2001 From: Michael 'Mickey' Lauer Date: Sat, 12 Sep 2009 17:19:59 +0200 Subject: libgee: move to git version while it's so much under development and depending on vala-native --- recipes/libgee/files/no-tests.patch | 12 ------------ recipes/libgee/libgee_0.3.0.bb | 11 ----------- recipes/libgee/libgee_git.bb | 16 ++++++++++++++++ 3 files changed, 16 insertions(+), 23 deletions(-) delete mode 100644 recipes/libgee/files/no-tests.patch delete mode 100644 recipes/libgee/libgee_0.3.0.bb create mode 100644 recipes/libgee/libgee_git.bb (limited to 'recipes') diff --git a/recipes/libgee/files/no-tests.patch b/recipes/libgee/files/no-tests.patch deleted file mode 100644 index d2d20b2c4e..0000000000 --- a/recipes/libgee/files/no-tests.patch +++ /dev/null @@ -1,12 +0,0 @@ -Index: libgee-0.1.2/Makefile.am -=================================================================== ---- libgee-0.1.2.orig/Makefile.am -+++ libgee-0.1.2/Makefile.am -@@ -4,7 +4,6 @@ NULL = - - SUBDIRS = \ - gee \ -- tests \ - $(NULL) - - pkgconfigdir = $(libdir)/pkgconfig diff --git a/recipes/libgee/libgee_0.3.0.bb b/recipes/libgee/libgee_0.3.0.bb deleted file mode 100644 index 00ef42d2f4..0000000000 --- a/recipes/libgee/libgee_0.3.0.bb +++ /dev/null @@ -1,11 +0,0 @@ -DESCRIPTION = "libgee is a collection library providing GObject-based interfaces \ -and classes for commonly used data structures." -HOMEPAGE = "http://live.gnome.org/Libgee" -SECTION = "libs" -DEPENDS = "glib-2.0" -LICENSE = "LGPL" - -SRC_URI = "ftp://ftp.gnome.org/pub/GNOME/sources/libgee/0.3/libgee-${PV}.tar.bz2 \ - file://no-tests.patch;patch=1" - -inherit autotools_stage pkgconfig vala diff --git a/recipes/libgee/libgee_git.bb b/recipes/libgee/libgee_git.bb new file mode 100644 index 0000000000..74e0eca488 --- /dev/null +++ b/recipes/libgee/libgee_git.bb @@ -0,0 +1,16 @@ +DESCRIPTION = "libgee is a collection library providing GObject-based interfaces \ +and classes for commonly used data structures." +HOMEPAGE = "http://live.gnome.org/Libgee" +SECTION = "libs" +DEPENDS = "glib-2.0" +LICENSE = "LGPL" +PV = "0.3.0+gitr${SRCREV}" + +SRC_URI = "\ + git://git.gnome.org/libgee;protocol=git;branch=master \ +" +S = "${WORKDIR}/git" + +inherit autotools_stage pkgconfig vala + +FILES_${PN}-dev += "${datadir}/gir-1.0" -- cgit v1.2.3 From 0c4cf4dcdebc57ec1a0f94f65f2a66bb31b17389 Mon Sep 17 00:00:00 2001 From: Michael 'Mickey' Lauer Date: Sat, 12 Sep 2009 17:36:50 +0200 Subject: fso-alsa-data: create dummy file so that git doesn't remove the directory --- recipes/freesmartphone/fso-alsa-data/default/dummy | 0 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 recipes/freesmartphone/fso-alsa-data/default/dummy (limited to 'recipes') diff --git a/recipes/freesmartphone/fso-alsa-data/default/dummy b/recipes/freesmartphone/fso-alsa-data/default/dummy new file mode 100644 index 0000000000..e69de29bb2 -- cgit v1.2.3 From 56ca890cdd6faff2afa66931fc31376d2d9afa87 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Sat, 12 Sep 2009 13:05:20 -0700 Subject: gcc-configure-common.inc: Fiddle with NATIVE_SYSTEM_HEADER_DIR only form cross gcc build * target gcc does not like the NATIVE_SYSTEM_HEADER_DIR being tweaked. for now conditionalize it so it gets included only for cross builds it could be that target gcc for micro wont work because it needs headers in /usr/include and the actual headers are in /include Signed-off-by: Khem Raj --- recipes/gcc/gcc-configure-common.inc | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) (limited to 'recipes') diff --git a/recipes/gcc/gcc-configure-common.inc b/recipes/gcc/gcc-configure-common.inc index fb792a8a88..a0a7dfab74 100644 --- a/recipes/gcc/gcc-configure-common.inc +++ b/recipes/gcc/gcc-configure-common.inc @@ -80,16 +80,20 @@ do_configure () { sed -i 's/^LDFLAGS = $/LDFLAGS = @LDFLAGS@/' ${S}/Makefile.tpl (cd ${S} && gnu-configize) || die "failure running gnu-configize" - # splice our idea of where the headers live into gcc's world - echo "NATIVE_SYSTEM_HEADER_DIR = ${layout_includedir}" > ${T}/t-oe - sed 's%^tmake_file=.*$%& ${T}/t-oe%' < ${S}/gcc/Makefile.in >${S}/gcc/Makefile.in.new - mv ${S}/gcc/Makefile.in.new ${S}/gcc/Makefile.in - cat ${S}/gcc/defaults.h | grep -v "\#endif.*GCC_DEFAULTS_H" > ${S}/gcc/defaults.h.new - echo "#ifndef STANDARD_INCLUDE_DIR" >> ${S}/gcc/defaults.h.new - echo "#define STANDARD_INCLUDE_DIR \"${layout_includedir}\"" >> ${S}/gcc/defaults.h.new - echo "#endif" >> ${S}/gcc/defaults.h.new - echo "#endif /* ! GCC_DEFAULTS_H */" >> ${S}/gcc/defaults.h.new - mv ${S}/gcc/defaults.h.new ${S}/gcc/defaults.h + + if [ "${HOST_SYS}" != "${TARGET_SYS}" ]; then + # splice our idea of where the headers live into gcc's world + echo "NATIVE_SYSTEM_HEADER_DIR = ${layout_includedir}" > ${T}/t-oe + sed 's%^tmake_file=.*$%& ${T}/t-oe%' < ${S}/gcc/Makefile.in >${S}/gcc/Makefile.in.new + mv ${S}/gcc/Makefile.in.new ${S}/gcc/Makefile.in + cat ${S}/gcc/defaults.h | grep -v "\#endif.*GCC_DEFAULTS_H" > ${S}/gcc/defaults.h.new + echo "#ifndef STANDARD_INCLUDE_DIR" >> ${S}/gcc/defaults.h.new + echo "#define STANDARD_INCLUDE_DIR \"${layout_includedir}\"" >> ${S}/gcc/defaults.h.new + echo "#endif" >> ${S}/gcc/defaults.h.new + echo "#endif /* ! GCC_DEFAULTS_H */" >> ${S}/gcc/defaults.h.new + mv ${S}/gcc/defaults.h.new ${S}/gcc/defaults.h + fi + oe_runconf # make sure that no @LDFLAG@ is left in the generated Makefile -- cgit v1.2.3 From 462d0b6fb1ff920f0be3ffb72e5d58ee70d166fe Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Sat, 12 Sep 2009 16:20:21 -0700 Subject: uclibc-initial: Create ${UCLIBC_STAGE_PREFIX}/lib Signed-off-by: Khem Raj --- recipes/uclibc/uclibc-initial_0.9.28.bb | 1 + recipes/uclibc/uclibc-initial_0.9.29.bb | 1 + recipes/uclibc/uclibc-initial_0.9.30.1.bb | 1 + recipes/uclibc/uclibc-initial_0.9.30.bb | 1 + recipes/uclibc/uclibc-initial_git.bb | 1 + recipes/uclibc/uclibc-initial_nptl.bb | 2 +- 6 files changed, 6 insertions(+), 1 deletion(-) (limited to 'recipes') diff --git a/recipes/uclibc/uclibc-initial_0.9.28.bb b/recipes/uclibc/uclibc-initial_0.9.28.bb index 6e82dcd50a..e0b93f9418 100644 --- a/recipes/uclibc/uclibc-initial_0.9.28.bb +++ b/recipes/uclibc/uclibc-initial_0.9.28.bb @@ -16,6 +16,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h + install -d ${UCLIBC_STAGE_PREFIX}/lib install -m 644 libc/sysdeps/linux/${TARGET_ARCH}/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib install -m 644 libc/libc.so ${UCLIBC_STAGE_PREFIX}/lib diff --git a/recipes/uclibc/uclibc-initial_0.9.29.bb b/recipes/uclibc/uclibc-initial_0.9.29.bb index 964f319783..f7abdec20f 100644 --- a/recipes/uclibc/uclibc-initial_0.9.29.bb +++ b/recipes/uclibc/uclibc-initial_0.9.29.bb @@ -16,6 +16,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h + install -d ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib diff --git a/recipes/uclibc/uclibc-initial_0.9.30.1.bb b/recipes/uclibc/uclibc-initial_0.9.30.1.bb index 5c803b99c6..46c0f66697 100644 --- a/recipes/uclibc/uclibc-initial_0.9.30.1.bb +++ b/recipes/uclibc/uclibc-initial_0.9.30.1.bb @@ -14,6 +14,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h + install -d ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib } diff --git a/recipes/uclibc/uclibc-initial_0.9.30.bb b/recipes/uclibc/uclibc-initial_0.9.30.bb index 7cd953605b..9fcb247f61 100644 --- a/recipes/uclibc/uclibc-initial_0.9.30.bb +++ b/recipes/uclibc/uclibc-initial_0.9.30.bb @@ -15,6 +15,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h + install -d ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib } diff --git a/recipes/uclibc/uclibc-initial_git.bb b/recipes/uclibc/uclibc-initial_git.bb index 6c91762723..a0077b167a 100644 --- a/recipes/uclibc/uclibc-initial_git.bb +++ b/recipes/uclibc/uclibc-initial_git.bb @@ -14,6 +14,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h + install -d ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib } diff --git a/recipes/uclibc/uclibc-initial_nptl.bb b/recipes/uclibc/uclibc-initial_nptl.bb index cca3c1e688..dc376f5bce 100644 --- a/recipes/uclibc/uclibc-initial_nptl.bb +++ b/recipes/uclibc/uclibc-initial_nptl.bb @@ -16,7 +16,7 @@ do_stage() { # This conflicts with the c++ version of this header rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h - + install -d ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib -- cgit v1.2.3 From 8d8f4b1fdc2738ddbc170d6911093eac3301886e Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Sun, 13 Sep 2009 10:43:53 +0200 Subject: libsoup-2.4: update to 2.27.91 --- recipes/gnome/libsoup-2.4_2.27.4.bb | 19 ------------------- recipes/gnome/libsoup-2.4_2.27.91.bb | 19 +++++++++++++++++++ 2 files changed, 19 insertions(+), 19 deletions(-) delete mode 100644 recipes/gnome/libsoup-2.4_2.27.4.bb create mode 100644 recipes/gnome/libsoup-2.4_2.27.91.bb (limited to 'recipes') diff --git a/recipes/gnome/libsoup-2.4_2.27.4.bb b/recipes/gnome/libsoup-2.4_2.27.4.bb deleted file mode 100644 index ae503065c0..0000000000 --- a/recipes/gnome/libsoup-2.4_2.27.4.bb +++ /dev/null @@ -1,19 +0,0 @@ -DESCRIPTION = "An HTTP library implementation in C" -SECTION = "x11/gnome/libs" -LICENSE = "GPL" -DEPENDS = "libproxy glib-2.0 gnutls libxml2 sqlite3" - -inherit gnome - -SRC_URI = "${GNOME_MIRROR}/libsoup/${@gnome_verdir("${PV}")}/libsoup-${PV}.tar.bz2" -S = "${WORKDIR}/libsoup-${PV}" - -do_stage() { - autotools_stage_all -} - -PACKAGES =+ "libsoup-gnome" -FILES_libsoup-gnome = "${libdir}/libsoup-gnome*.so.*" -FILES_${PN} = "${libdir}/libsoup-2*.so.*" -FILES_${PN}-dev = "${includedir}/ ${libdir}/" -FILES_${PN}-doc = "${datadir}/" diff --git a/recipes/gnome/libsoup-2.4_2.27.91.bb b/recipes/gnome/libsoup-2.4_2.27.91.bb new file mode 100644 index 0000000000..ae503065c0 --- /dev/null +++ b/recipes/gnome/libsoup-2.4_2.27.91.bb @@ -0,0 +1,19 @@ +DESCRIPTION = "An HTTP library implementation in C" +SECTION = "x11/gnome/libs" +LICENSE = "GPL" +DEPENDS = "libproxy glib-2.0 gnutls libxml2 sqlite3" + +inherit gnome + +SRC_URI = "${GNOME_MIRROR}/libsoup/${@gnome_verdir("${PV}")}/libsoup-${PV}.tar.bz2" +S = "${WORKDIR}/libsoup-${PV}" + +do_stage() { + autotools_stage_all +} + +PACKAGES =+ "libsoup-gnome" +FILES_libsoup-gnome = "${libdir}/libsoup-gnome*.so.*" +FILES_${PN} = "${libdir}/libsoup-2*.so.*" +FILES_${PN}-dev = "${includedir}/ ${libdir}/" +FILES_${PN}-doc = "${datadir}/" -- cgit v1.2.3 From 1cf11450bf8a5396cfda5ce758d12e167497a1c5 Mon Sep 17 00:00:00 2001 From: Brijesh Singh Date: Fri, 4 Sep 2009 23:42:09 -0500 Subject: lpm, sdma, cmem recipes: rename to match PV --- recipes/ti/ti-cmem-module_2.24.01.bb | 66 ++++++++++++++++++++++++++++++++++++ recipes/ti/ti-cmem-module_2.24.bb | 66 ------------------------------------ recipes/ti/ti-lpm-module_2.24.01.bb | 59 ++++++++++++++++++++++++++++++++ recipes/ti/ti-lpm-module_2.24.bb | 62 --------------------------------- recipes/ti/ti-sdma-module_2.24.01.bb | 54 +++++++++++++++++++++++++++++ recipes/ti/ti-sdma-module_2.24.bb | 54 ----------------------------- 6 files changed, 179 insertions(+), 182 deletions(-) create mode 100644 recipes/ti/ti-cmem-module_2.24.01.bb delete mode 100644 recipes/ti/ti-cmem-module_2.24.bb create mode 100644 recipes/ti/ti-lpm-module_2.24.01.bb delete mode 100644 recipes/ti/ti-lpm-module_2.24.bb create mode 100644 recipes/ti/ti-sdma-module_2.24.01.bb delete mode 100644 recipes/ti/ti-sdma-module_2.24.bb (limited to 'recipes') diff --git a/recipes/ti/ti-cmem-module_2.24.01.bb b/recipes/ti/ti-cmem-module_2.24.01.bb new file mode 100644 index 0000000000..7f5394647f --- /dev/null +++ b/recipes/ti/ti-cmem-module_2.24.01.bb @@ -0,0 +1,66 @@ +DESCRIPTION = "CMEM module for TI ARM/DSP processors" +inherit module + +# compile and run time dependencies +DEPENDS = "virtual/kernel perl-native" +RDEPENDS = "update-modules" + +SRC_URI = "http://install.source.dir.com/codec_engine_2_24_01.tar.gz \ + file://cmem-remove-show-pte-function.patch;patch=1 " + +# Set the source directory +S = "${WORKDIR}/codec_engine_2_24_01" + +#This is a kernel module, don't set PR directly +MACHINE_KERNEL_PR_append = "a" + +PV = "2241" + +do_compile() { + # TODO :: KERNEL_CC, etc need replacing with user CC + # TODO :: Need to understand why OBJDUMP is required for kernel module + # Unset these since LDFLAGS gets picked up and used incorrectly.... need + # investigation + + unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS + + cd ${S}/cetools/packages/ti/sdo/linuxutils/cmem + make \ + LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ + MVTOOL_PREFIX="${TARGET_PREFIX}" \ + UCTOOL_PREFIX="${TARGET_PREFIX}" \ + clean debug release +} + +do_install () { + install -d ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp + install -m 0755 ${S}/cetools/packages/ti/sdo/linuxutils/cmem/src/module/cmemk.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp + + cd ${S}/cetools/packages/ti/sdo/linuxutils/cmem/apps + make \ + LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ + MVTOOL_PREFIX="${TARGET_PREFIX}" \ + UCTOOL_PREFIX="${TARGET_PREFIX}" \ + EXEC_DIR="${D}${prefix}/ti/ti-cmem-apps" \ + install +} + +pkg_postinst () { + if [ -n "$D" ]; then + exit 1 + fi + depmod -a + update-modules || true +} + +pkg_postrm () { + update-modules || true +} + +INHIBIT_PACKAGE_STRIP = "1" +FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp/cmemk.ko" +PACKAGES += " ti-cmem-apps" +FILES_ti-cmem-apps = "${prefix}/ti/ti-cmem-apps/*" +INSANE_SKIP_ti-cmem-apps = True + + diff --git a/recipes/ti/ti-cmem-module_2.24.bb b/recipes/ti/ti-cmem-module_2.24.bb deleted file mode 100644 index 7f5394647f..0000000000 --- a/recipes/ti/ti-cmem-module_2.24.bb +++ /dev/null @@ -1,66 +0,0 @@ -DESCRIPTION = "CMEM module for TI ARM/DSP processors" -inherit module - -# compile and run time dependencies -DEPENDS = "virtual/kernel perl-native" -RDEPENDS = "update-modules" - -SRC_URI = "http://install.source.dir.com/codec_engine_2_24_01.tar.gz \ - file://cmem-remove-show-pte-function.patch;patch=1 " - -# Set the source directory -S = "${WORKDIR}/codec_engine_2_24_01" - -#This is a kernel module, don't set PR directly -MACHINE_KERNEL_PR_append = "a" - -PV = "2241" - -do_compile() { - # TODO :: KERNEL_CC, etc need replacing with user CC - # TODO :: Need to understand why OBJDUMP is required for kernel module - # Unset these since LDFLAGS gets picked up and used incorrectly.... need - # investigation - - unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS - - cd ${S}/cetools/packages/ti/sdo/linuxutils/cmem - make \ - LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ - MVTOOL_PREFIX="${TARGET_PREFIX}" \ - UCTOOL_PREFIX="${TARGET_PREFIX}" \ - clean debug release -} - -do_install () { - install -d ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp - install -m 0755 ${S}/cetools/packages/ti/sdo/linuxutils/cmem/src/module/cmemk.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp - - cd ${S}/cetools/packages/ti/sdo/linuxutils/cmem/apps - make \ - LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ - MVTOOL_PREFIX="${TARGET_PREFIX}" \ - UCTOOL_PREFIX="${TARGET_PREFIX}" \ - EXEC_DIR="${D}${prefix}/ti/ti-cmem-apps" \ - install -} - -pkg_postinst () { - if [ -n "$D" ]; then - exit 1 - fi - depmod -a - update-modules || true -} - -pkg_postrm () { - update-modules || true -} - -INHIBIT_PACKAGE_STRIP = "1" -FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp/cmemk.ko" -PACKAGES += " ti-cmem-apps" -FILES_ti-cmem-apps = "${prefix}/ti/ti-cmem-apps/*" -INSANE_SKIP_ti-cmem-apps = True - - diff --git a/recipes/ti/ti-lpm-module_2.24.01.bb b/recipes/ti/ti-lpm-module_2.24.01.bb new file mode 100644 index 0000000000..7f47a0d232 --- /dev/null +++ b/recipes/ti/ti-lpm-module_2.24.01.bb @@ -0,0 +1,59 @@ +DESCRIPTION = "LPM module for TI OMAP3 processors" + +require ti-paths.inc + +inherit module +# compile and run time dependencies +DEPENDS = " virtual/kernel perl-native ti-dsplink-module" + +#This is a kernel module, don't set PR directly +MACHINE_KERNEL_PR_append = "a" + +PV = "2241" + +SRC_URI = "http://install.source.dir.com/local_power_manager_1_24.tar.gz" + +# Set the source directory +S = "${WORKDIR}/local_power_manager_1_24" + +do_compile () { + # TODO :: KERNEL_CC, etc need replacing with user CC + # TODO :: Need to understand why OBJDUMP is required for kernel module + # Unset these since LDFLAGS gets picked up and used incorrectly.... need + # investigation + + unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS + + cd ${S}/packages/ti/bios/power/modules/${LPMDSPPOWERSOC}/lpm + make \ + DSPLINK_REPO="${DSPLINK}/.." \ + LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ + MVTOOL_PREFIX="${TARGET_PREFIX}" \ + clean default +} + +do_install () { + + # LPM/CMEM/SDMA drivers - kernel modules + install -d ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp + install -m 0755 ${S}/packages/ti/bios/power/modules/${LPMDSPPOWERSOC}/lpm/*.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp +} + + +pkg_postinst () { + if [ -n "$D" ]; then + exit 1 + fi + depmod -a + update-modules || true +} + +pkg_postrm () { + update-modules || true +} + +INHIBIT_PACKAGE_STRIP = "1" + +FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp/*lpm*ko" +RDEPENDS += " ti-dsplink-module" + diff --git a/recipes/ti/ti-lpm-module_2.24.bb b/recipes/ti/ti-lpm-module_2.24.bb deleted file mode 100644 index 74cb7ca86a..0000000000 --- a/recipes/ti/ti-lpm-module_2.24.bb +++ /dev/null @@ -1,62 +0,0 @@ -DESCRIPTION = "LPM module for TI OMAP3 processors" - -require ti-paths.inc - -inherit module -# compile and run time dependencies -DEPENDS = " virtual/kernel perl-native ti-dsplink-module" - -#This is a kernel module, don't set PR directly -MACHINE_KERNEL_PR_append = "a" - -PV = "2241" - -# LPM seems to be missing from 2.24.01 -DEFAULT_PREFERENCE = "-1" - -SRC_URI = "http://install.source.dir.com/local_power_manager_1_24.tar.gz" - -# Set the source directory -S = "${WORKDIR}/local_power_manager_1_24" - -do_compile () { - # TODO :: KERNEL_CC, etc need replacing with user CC - # TODO :: Need to understand why OBJDUMP is required for kernel module - # Unset these since LDFLAGS gets picked up and used incorrectly.... need - # investigation - - unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS - - cd ${S}/packages/ti/bios/power/modules/${LPMDSPPOWERSOC}/lpm - make \ - DSPLINK_REPO="${DSPLINK}/.." \ - LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ - MVTOOL_PREFIX="${TARGET_PREFIX}" \ - clean default -} - -do_install () { - - # LPM/CMEM/SDMA drivers - kernel modules - install -d ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp - install -m 0755 ${S}/packages/ti/bios/power/modules/${LPMDSPPOWERSOC}/lpm/*.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp -} - - -pkg_postinst () { - if [ -n "$D" ]; then - exit 1 - fi - depmod -a - update-modules || true -} - -pkg_postrm () { - update-modules || true -} - -INHIBIT_PACKAGE_STRIP = "1" - -FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp/*lpm*ko" -RDEPENDS += " ti-dsplink-module" - diff --git a/recipes/ti/ti-sdma-module_2.24.01.bb b/recipes/ti/ti-sdma-module_2.24.01.bb new file mode 100644 index 0000000000..2d9b3a8df7 --- /dev/null +++ b/recipes/ti/ti-sdma-module_2.24.01.bb @@ -0,0 +1,54 @@ +DESCRIPTION = "SDMA module for TI OMAP3 processors" + +inherit module +# compile and run time dependencies +DEPENDS = "virtual/kernel perl-native" + +#This is a kernel module, don't set PR directly +MACHINE_KERNEL_PR_append = "a" + +PV = "2241" + +SRC_URI = "http://install.source.dir.com/codec_engine_2_24_01.tar.gz " + +# Set the source directory +S = "${WORKDIR}/codec_engine_2_24_01" + +do_compile() { + # SDMA - Build the sdma module + # TODO :: KERNEL_CC, etc need replacing with user CC + # TODO :: Need to understand why OBJDUMP is required for kernel module + # Unset these since LDFLAGS gets picked up and used incorrectly.... need + # investigation + + unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS + + cd ${S}/cetools/packages/ti/sdo/linuxutils/sdma + make \ + LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ + MVTOOL_PREFIX="${TARGET_PREFIX}" \ + UCTOOL_PREFIX="${TARGET_PREFIX}" \ + clean debug release +} + +do_install () { + install -d ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp + install -m 0755 ${S}/cetools/packages/ti/sdo/linuxutils/sdma/src/module/sdmak.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp +} + +pkg_postinst () { + if [ -n "$D" ]; then + exit 1 + fi + depmod -a + update-modules || true +} + +pkg_postrm () { + update-modules || true +} + +INHIBIT_PACKAGE_STRIP = "1" + +FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp/sdmak.ko" + diff --git a/recipes/ti/ti-sdma-module_2.24.bb b/recipes/ti/ti-sdma-module_2.24.bb deleted file mode 100644 index 2d9b3a8df7..0000000000 --- a/recipes/ti/ti-sdma-module_2.24.bb +++ /dev/null @@ -1,54 +0,0 @@ -DESCRIPTION = "SDMA module for TI OMAP3 processors" - -inherit module -# compile and run time dependencies -DEPENDS = "virtual/kernel perl-native" - -#This is a kernel module, don't set PR directly -MACHINE_KERNEL_PR_append = "a" - -PV = "2241" - -SRC_URI = "http://install.source.dir.com/codec_engine_2_24_01.tar.gz " - -# Set the source directory -S = "${WORKDIR}/codec_engine_2_24_01" - -do_compile() { - # SDMA - Build the sdma module - # TODO :: KERNEL_CC, etc need replacing with user CC - # TODO :: Need to understand why OBJDUMP is required for kernel module - # Unset these since LDFLAGS gets picked up and used incorrectly.... need - # investigation - - unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS - - cd ${S}/cetools/packages/ti/sdo/linuxutils/sdma - make \ - LINUXKERNEL_INSTALL_DIR="${STAGING_KERNEL_DIR}" \ - MVTOOL_PREFIX="${TARGET_PREFIX}" \ - UCTOOL_PREFIX="${TARGET_PREFIX}" \ - clean debug release -} - -do_install () { - install -d ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp - install -m 0755 ${S}/cetools/packages/ti/sdo/linuxutils/sdma/src/module/sdmak.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp -} - -pkg_postinst () { - if [ -n "$D" ]; then - exit 1 - fi - depmod -a - update-modules || true -} - -pkg_postrm () { - update-modules || true -} - -INHIBIT_PACKAGE_STRIP = "1" - -FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp/sdmak.ko" - -- cgit v1.2.3 From 65a3216b1d40c6ced527adc13d09e1b7abdbec68 Mon Sep 17 00:00:00 2001 From: Brijesh Singh Date: Fri, 4 Sep 2009 23:45:10 -0500 Subject: dvsdk: update README to use ce 2.24.01 --- recipes/ti/README | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'recipes') diff --git a/recipes/ti/README b/recipes/ti/README index 011bd0ae51..cf37c06844 100644 --- a/recipes/ti/README +++ b/recipes/ti/README @@ -2,7 +2,7 @@ Depending on platform you need to download one or more components from the exter DM355 ----- - - Code Engine 2.24 + - Code Engine 2.24.01 OMAP3530 ------ @@ -14,7 +14,7 @@ OMAP3530 URL's: ------ -* CE 2.24 (codec_engine_2_24.tar.gz) +* CE 2.24.01 (codec_engine_2_24.01.tar.gz) http://software-dl.ti.com/dsps/dsps_registered_sw/sdo_sb/targetcontent/CE/ce_2_24/index.html * DSP/BIOS 5.33.04 (bios_setuplinux_5_33_04.bin) -- cgit v1.2.3 From 5c635b365fd3f67c35a777624dc0ac26aedb27f6 Mon Sep 17 00:00:00 2001 From: Brijesh Singh Date: Sat, 5 Sep 2009 04:13:43 -0500 Subject: gstreamer-ti: bump SRCREV and apply patch from tracker 462 --- .../gstreamer-ti/codec_combo_directory_fix.patch | 52 -------- recipes/ti/gstreamer-ti/gst-buffsize.diff | 113 ---------------- .../ti/gstreamer-ti/gstreamer-ti-tracker-462.patch | 68 ++++++++++ .../ti/gstreamer-ti/gstreamer-ti-tracker-824.patch | 147 +++++++++++++++++++++ recipes/ti/gstreamer-ti_svn.bb | 5 +- 5 files changed, 218 insertions(+), 167 deletions(-) delete mode 100644 recipes/ti/gstreamer-ti/codec_combo_directory_fix.patch delete mode 100644 recipes/ti/gstreamer-ti/gst-buffsize.diff create mode 100644 recipes/ti/gstreamer-ti/gstreamer-ti-tracker-462.patch create mode 100644 recipes/ti/gstreamer-ti/gstreamer-ti-tracker-824.patch (limited to 'recipes') diff --git a/recipes/ti/gstreamer-ti/codec_combo_directory_fix.patch b/recipes/ti/gstreamer-ti/codec_combo_directory_fix.patch deleted file mode 100644 index 7c03641707..0000000000 --- a/recipes/ti/gstreamer-ti/codec_combo_directory_fix.patch +++ /dev/null @@ -1,52 +0,0 @@ -From: Vishnudas P - -Found the fix here. -http://wiki.davincidsp.com/index.php?title=Configuring_Codec_Engine_in_Arm_apps_with_createFromServer -In the section "Advanced: overwriting fields, creating multiple engines" - -Needed tor reverse the previous patch 263 and apply the attached patch. - -When you call createFromServer the path you give is relative to -package, not the filesystem one. For that you need to set -"engine.server" to the desired full filesystem path. -This is what the attached patch does. - --- - - -diff -Naur ticodecplugin.orig/src/gstticodecplugin_dm6446.cfg ticodecplugin/src/gstticodecplugin_dm6446.cfg ---- ticodecplugin.orig/src/gstticodecplugin_dm6446.cfg 2009-07-21 12:55:32.000000000 -0700 -+++ ticodecplugin/src/gstticodecplugin_dm6446.cfg 2009-07-21 12:55:26.000000000 -0700 -@@ -38,6 +38,8 @@ - "./encodeCombo.x64P", - "ti.sdo.servers.encode" - ); -+codecServer.server = "/usr/share/ti-codec-combos/cs.x64P"; -+ - - /* Load support for the 'Davinci Multimedia Application Interface' modules */ - var DMAI = xdc.loadPackage('ti.sdo.dmai'); -diff -Naur ticodecplugin.orig/src/gstticodecplugin_dm6467.cfg ticodecplugin/src/gstticodecplugin_dm6467.cfg ---- ticodecplugin.orig/src/gstticodecplugin_dm6467.cfg 2009-07-21 12:55:32.000000000 -0700 -+++ ticodecplugin/src/gstticodecplugin_dm6467.cfg 2009-07-21 12:55:26.000000000 -0700 -@@ -39,6 +39,8 @@ - "./encodeCombo.x64P", - "ti.sdo.servers.encode" - ); -+codecServer.server = "/usr/share/ti-codec-combos/cs.x64P"; -+ - - /* Load support for the 'Davinci Multimedia Application Interface' modules */ - var DMAI = xdc.loadPackage('ti.sdo.dmai'); -diff -Naur ticodecplugin.orig/src/gstticodecplugin_omap3530.cfg ticodecplugin/src/gstticodecplugin_omap3530.cfg ---- ticodecplugin.orig/src/gstticodecplugin_omap3530.cfg 2009-07-21 12:55:32.000000000 -0700 -+++ ticodecplugin/src/gstticodecplugin_omap3530.cfg 2009-07-21 12:55:26.000000000 -0700 -@@ -38,6 +38,8 @@ - "./decodeCombo.x64P", - "ti.sdo.servers.decode" - ); -+codecServer.server = "/usr/share/ti-codec-combos/cs.x64P"; -+ - - /* Load support for the DMAI module */ - var DMAI = xdc.loadPackage('ti.sdo.dmai'); diff --git a/recipes/ti/gstreamer-ti/gst-buffsize.diff b/recipes/ti/gstreamer-ti/gst-buffsize.diff deleted file mode 100644 index 2d71286498..0000000000 --- a/recipes/ti/gstreamer-ti/gst-buffsize.diff +++ /dev/null @@ -1,113 +0,0 @@ - ChangeLog | 10 ++++++++++ - src/gsttividdec2.c | 25 +++++++++++++++++++++---- - src/gsttividdec2.h | 2 ++ - 3 files changed, 33 insertions(+), 4 deletions(-) - -diff -Nurd --exclude .svn trunk/gstreamer_ti/ti_build/ticodecplugin/ChangeLog branches/BRANCH_DDOMPE_BUFFERSIZES/gstreamer_ti/ti_build/ticodecplugin/ChangeLog ---- ticodecplugin/ChangeLog 2009-03-03 08:57:50.000000000 +0100 -+++ ticodecplugin/ChangeLog 2009-03-03 08:59:20.000000000 +0100 -@@ -1,3 +1,13 @@ -+2009-03-01 Diego Dompe, RidgeRun -+ * src/gsttividdec2.{c.h}: -+ Create the output buffer tab using the recently added height and width -+ attributes passed by the capabilities. This solves integration problems -+ with other elements like ffmpegcolorspace and xvimagesink, where they -+ will fail because the second buffer pushed over the src pad of the -+ decoder has a size different from the first one. Using the input caps -+ for the creation of the buffer tab we have a more educated guess on the -+ output buffer size, and the resizing won't be required. -+ - 2009-02-25 Brijesh Singh, Texas Instruments, Inc. - * src/{gsttividenc1.{c,h},gsttividenc.{c,h},gsttividdec1.{c,h},gsttividdec. - {c,h},gsttiauddec1.{c,h},gsttiauddec.{c,h},gsttiimgdec1.{c,h},gsttiimgenc1. -diff -Nurd --exclude .svn trunk/gstreamer_ti/ti_build/ticodecplugin/src/gsttividdec2.c branches/BRANCH_DDOMPE_BUFFERSIZES/gstreamer_ti/ti_build/ticodecplugin/src/gsttividdec2.c ---- ticodecplugin/src/gsttividdec2.c 2009-03-03 08:57:50.000000000 +0100 -+++ ticodecplugin/src/gsttividdec2.c 2009-03-03 08:59:20.000000000 +0100 -@@ -21,7 +21,11 @@ - * Original Author: - * Don Darling, Texas Instruments, Inc. - * -+ * Contributors: -+ * Diego Dompe, RidgeRun -+ * - * Copyright (C) $year Texas Instruments Incorporated - http://www.ti.com/ -+ * Copyright (C) $year RidgeRun - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as -@@ -350,6 +354,8 @@ - - viddec2->framerateNum = 0; - viddec2->framerateDen = 0; -+ viddec2->height = 0; -+ viddec2->width = 0; - - viddec2->numOutputBufs = 0UL; - viddec2->hOutBufTab = NULL; -@@ -484,6 +490,14 @@ - viddec2->framerateNum = framerateNum; - viddec2->framerateDen = framerateDen; - } -+ -+ if (!gst_structure_get_int(capStruct, "height", &viddec2->height)) { -+ viddec2->height = 0; -+ } -+ -+ if (!gst_structure_get_int(capStruct, "width", &viddec2->width)) { -+ viddec2->width = 0; -+ } - } - - /* MPEG Decode */ -@@ -1048,6 +1062,7 @@ - Cpu_Device device; - ColorSpace_Type colorSpace; - Int defaultNumBufs; -+ Int outBufSize; - - /* Open the codec engine */ - GST_LOG("opening codec engine \"%s\"\n", viddec2->engineName); -@@ -1116,8 +1131,8 @@ - /* Create codec output buffers */ - GST_LOG("creating output buffer table\n"); - gfxAttrs.colorSpace = colorSpace; -- gfxAttrs.dim.width = params.maxWidth; -- gfxAttrs.dim.height = params.maxHeight; -+ gfxAttrs.dim.width = viddec2->width; -+ gfxAttrs.dim.height = viddec2->height; - gfxAttrs.dim.lineLength = BufferGfx_calcLineLength( - gfxAttrs.dim.width, gfxAttrs.colorSpace); - -@@ -1125,8 +1140,10 @@ - gfxAttrs.bAttrs.useMask = gst_tidmaibuffertransport_GST_FREE | - gst_tividdec2_CODEC_FREE; - -+ outBufSize = gfxAttrs.dim.lineLength * viddec2->height; -+ - viddec2->hOutBufTab = -- BufTab_create(viddec2->numOutputBufs, Vdec2_getOutBufSize(viddec2->hVd), -+ BufTab_create(viddec2->numOutputBufs, outBufSize, - BufferGfx_getBufferAttrs(&gfxAttrs)); - - if (viddec2->hOutBufTab == NULL) { -@@ -1295,7 +1312,7 @@ - */ - outBuf = gst_tidmaibuffertransport_new(hDstBuf); - gst_buffer_set_data(outBuf, GST_BUFFER_DATA(outBuf), -- Buffer_getNumBytesUsed(hDstBuf)); -+ Vdec2_getOutBufSize(viddec2->hVd)); - gst_buffer_set_caps(outBuf, GST_PAD_CAPS(viddec2->srcpad)); - - /* If we have a valid time stamp, set it on the buffer */ -diff -Nurd --exclude .svn trunk/gstreamer_ti/ti_build/ticodecplugin/src/gsttividdec2.h branches/BRANCH_DDOMPE_BUFFERSIZES/gstreamer_ti/ti_build/ticodecplugin/src/gsttividdec2.h ---- ticodecplugin/src/gsttividdec2.h 2009-03-03 08:57:50.000000000 +0100 -+++ ticodecplugin/src/gsttividdec2.h 2009-03-03 08:59:20.000000000 +0100 -@@ -96,6 +96,8 @@ - /* Framerate (Num/Den) */ - gint framerateNum; - gint framerateDen; -+ gint height; -+ gint width; - - /* Buffer management */ - UInt32 numOutputBufs; diff --git a/recipes/ti/gstreamer-ti/gstreamer-ti-tracker-462.patch b/recipes/ti/gstreamer-ti/gstreamer-ti-tracker-462.patch new file mode 100644 index 0000000000..c115161dcc --- /dev/null +++ b/recipes/ti/gstreamer-ti/gstreamer-ti-tracker-462.patch @@ -0,0 +1,68 @@ +diff -uNr ticodecplugin/src/gsttividdec.c ticodecplugin.new/src/gsttividdec.c +--- ticodecplugin/src/gsttividdec.c 2009-09-05 00:04:51.000000000 -0500 ++++ ticodecplugin.new/src/gsttividdec.c 2009-09-05 03:54:42.000000000 -0500 +@@ -82,7 +82,7 @@ + GST_PAD_ALWAYS, + GST_STATIC_CAPS + ("video/mpeg, " +- "mpegversion=(int){ 2, 4 }, " /* MPEG versions 2 and 4 */ ++ "mpegversion=(int){ 2, 4 }, " /* MPEG versions 2 and 4 */ + "systemstream=(boolean)false, " + "framerate=(fraction)[ 0, MAX ], " + "width=(int)[ 1, MAX ], " +@@ -90,7 +90,8 @@ + "video/x-h264, " /* H264 */ + "framerate=(fraction)[ 0, MAX ], " + "width=(int)[ 1, MAX ], " +- "height=(int)[ 1, MAX ]" ++ "height=(int)[ 1, MAX ] ;" ++ "video/x-xvid" /* XVID */ + ) + ); + +@@ -614,6 +615,11 @@ + codec = gst_ticodec_get_codec("H.264 Video Decoder"); + } + ++ /* XVID Decode */ ++ else if (!strcmp(mime, "video/x-xvid")) { ++ codec = gst_ticodec_get_codec("MPEG4 Video Decoder"); ++ } ++ + /* Mime type not supported */ + else { + GST_ERROR("stream type not supported"); +diff -uNr ticodecplugin/src/gsttividdec2.c ticodecplugin.new/src/gsttividdec2.c +--- ticodecplugin/src/gsttividdec2.c 2009-09-05 00:04:51.000000000 -0500 ++++ ticodecplugin.new/src/gsttividdec2.c 2009-09-05 03:54:42.000000000 -0500 +@@ -83,7 +83,7 @@ + GST_PAD_ALWAYS, + GST_STATIC_CAPS + ("video/mpeg, " +- "mpegversion=(int){ 2, 4 }, " /* MPEG versions 2 and 4 */ ++ "mpegversion=(int){ 2, 4 }, " /* MPEG versions 2 and 4 */ + "systemstream=(boolean)false, " + "framerate=(fraction)[ 0, MAX ], " + "width=(int)[ 1, MAX ], " +@@ -91,7 +91,8 @@ + "video/x-h264, " /* H264 */ + "framerate=(fraction)[ 0, MAX ], " + "width=(int)[ 1, MAX ], " +- "height=(int)[ 1, MAX ]" ++ "height=(int)[ 1, MAX ] ;" ++ "video/x-xvid" /* XVID */ + ) + ); + +@@ -625,6 +626,11 @@ + codec = gst_ticodec_get_codec("H.264 Video Decoder"); + } + ++ /* XVID Decode */ ++ else if (!strcmp(mime, "video/x-xvid")) { ++ codec = gst_ticodec_get_codec("MPEG4 Video Decoder"); ++ } ++ + /* Mime type not supported */ + else { + GST_ERROR("stream type not supported"); diff --git a/recipes/ti/gstreamer-ti/gstreamer-ti-tracker-824.patch b/recipes/ti/gstreamer-ti/gstreamer-ti-tracker-824.patch new file mode 100644 index 0000000000..634fa4aaf6 --- /dev/null +++ b/recipes/ti/gstreamer-ti/gstreamer-ti-tracker-824.patch @@ -0,0 +1,147 @@ +--- ticodecplugin/ChangeLog ++++ ticodecplugin.new/ChangeLog +@@ -1,3 +1,7 @@ ++2009-08-14 Don Darling, Texas Instruments, Inc. ++ * src/{gstticodecplugin_omap3530.cfg,gstticodecs_omap3530.c}: ++ Update OMAP3530 Support to use DVSDK 3.00.00.40. ++ + 2009-07-28 Brijesh Singh, Texas Instruments, Inc. + * src/{gstticircbuffer.c}: + Fix potential memory leak in circular buffer when accel framecopy flag is +--- ticodecplugin/src/gstticodecplugin_omap3530.cfg ++++ ticodecplugin.new/src/gstticodecplugin_omap3530.cfg +@@ -12,8 +12,6 @@ + * + */ + +-prog.build.platform = "ti.platforms.evm3530"; +- + /* Load the Codec Engine 'Operating System Abstraction Layer' */ + var osalGlobal = xdc.useModule('ti.sdo.ce.osal.Global'); + +@@ -27,31 +25,20 @@ ipc.commType = ipc.COMM_DSPLINK; + /* + * ======== Engine Configuration ======== + */ +-var Engine = xdc.useModule('ti.sdo.ce.Engine'); +-var encEngine = Engine.createFromServer( +- "encode", +- "./encodeCombo.x64P", +- "ti.sdo.servers.encode" +- ); +-var decEngine = Engine.createFromServer( +- "decode", +- "./decodeCombo.x64P", +- "ti.sdo.servers.decode" ++var Engine = xdc.useModule('ti.sdo.ce.Engine'); ++var demoEngine = Engine.createFromServer( ++ "codecServer", ++ "./bin/cs.x64P", ++ "ti.sdo.server.cs" + ); + +-var encpath = "" + java.lang.System.getenv("ENCODE_COMBO"); +-if (encpath != "" && encpath != "null") { +- encEngine.server = java.lang.System.getenv("ENCODE_COMBO"); +-} +- +-var decpath = "" + java.lang.System.getenv("DECODE_COMBO"); +-if (decpath != "" && decpath != "null") { +- decEngine.server = java.lang.System.getenv("DECODE_COMBO"); ++var combopath = "" + java.lang.System.getenv("CODEC_SERVER"); ++if (combopath != "" && combopath != "null") { ++ demoEngine.server = java.lang.System.getenv("CODEC_SERVER"); + } + + /* Load support for the DMAI module */ + var DMAI = xdc.loadPackage('ti.sdo.dmai'); + +-/* Load support for user space DMA */ +-var SCPY = xdc.useModule("ti.sdo.fc.scpy.SCPY"); +-var SDMA = xdc.useModule("ti.sdo.linuxutils.sdma.SDMA"); ++var SCPY = xdc.useModule('ti.sdo.fc.scpy.SCPY'); ++var SDMA = xdc.useModule('ti.sdo.linuxutils.sdma.SDMA'); +--- ticodecplugin/src/gstticodecs_omap3530.c ++++ ticodecplugin.new/src/gstticodecs_omap3530.c +@@ -22,8 +22,7 @@ + #include "gstticodecs.h" + + /* Declaration of the production engine and decoders shipped with the DVSDK */ +-static Char decodeEngine[] = "decode"; +-static Char encodeEngine[] = "encode"; ++static Char codecServer[] = "codecServer"; + + /* NULL terminated list of speech decoders in the engine to use in the demo */ + GstTICodec gst_ticodec_codecs[] = { +@@ -32,59 +31,55 @@ GstTICodec gst_ticodec_codecs[] = { + { + "AAC Audio Decoder", /* String name of codec used by plugin */ + "aachedec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, { + "MPEG1L2 Audio Decoder", /* String name of codec used by plugin */ + "mp3dec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, { + "MPEG1L3 Audio Decoder", /* String name of codec used by plugin */ + "mp3dec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ +- }, { +- "WMA Audio Decoder", /* String name of codec used by plugin */ +- "wmadec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, +- ++ + /* Video Decoders */ + { + "H.264 Video Decoder", /* String name of codec used by plugin */ + "h264dec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, { + "MPEG4 Video Decoder", /* String name of codec used by plugin */ + "mpeg4dec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, { + "MPEG2 Video Decoder", /* String name of codec used by plugin */ + "mpeg2dec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, + + /* Image Decoders */ + { + "JPEG Image Decoder", /* String name of codec used by plugin */ + "jpegdec", /* String name of codec used by CE */ +- decodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, + + /* Video Encoders */ + { + "H.264 Video Encoder", /* String name of codec used by plugin */ + "h264enc", /* String name of codec used by CE */ +- encodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, { + "MPEG4 Video Encoder", /* String name of codec used by plugin */ + "mpeg4enc", /* String name of codec used by CE */ +- encodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, + + /* Image Encoders */ + { + "JPEG Image Encoder", /* String name of codec used by plugin */ + "jpegenc", /* String name of codec used by CE */ +- encodeEngine /* Engine that contains this codec */ ++ codecServer /* Engine that contains this codec */ + }, + + { NULL } + diff --git a/recipes/ti/gstreamer-ti_svn.bb b/recipes/ti/gstreamer-ti_svn.bb index 59f7046bac..8fcc528019 100644 --- a/recipes/ti/gstreamer-ti_svn.bb +++ b/recipes/ti/gstreamer-ti_svn.bb @@ -7,13 +7,14 @@ inherit autotools DEPENDS = "ti-dmai gstreamer gst-plugins-base gst-plugins-good gst-plugins-ugly" # Fetch source from svn repo -SRCREV = "331" +SRCREV = "335" SRC_URI = "svn://gforge.ti.com/svn/gstreamer_ti/trunk;module=gstreamer_ti;proto=https;user=anonymous;pswd='' \ file://gstreamer-ti-tracker-824.patch;patch=1 \ + file://gstreamer-ti-tracker-462.patch;patch=1 \ " # Again, no '.' in PWD allowed :( -PR = "r32" +PR = "r33" PV = "svnr${SRCREV}" S = "${WORKDIR}/gstreamer_ti/ti_build/ticodecplugin" -- cgit v1.2.3 From dbecbf49e28a9a0f9012482c8de2afdc41701e17 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Sun, 13 Sep 2009 12:17:04 -0700 Subject: sysstat_8.1.6.bb: Fix compilation on uclibc * Add dependency on virtual/libintl Signed-off-by: Khem Raj --- recipes/sysstat/sysstat_8.1.6.bb | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'recipes') diff --git a/recipes/sysstat/sysstat_8.1.6.bb b/recipes/sysstat/sysstat_8.1.6.bb index a734d14f57..42dd5e2d75 100644 --- a/recipes/sysstat/sysstat_8.1.6.bb +++ b/recipes/sysstat/sysstat_8.1.6.bb @@ -4,6 +4,8 @@ LICENSE = "GPL" SECTION = "console/utils" PR = "r1" +DEPENDS = "virtual/libintl" + SRC_URI = "http://pagesperso-orange.fr/sebastien.godard/sysstat-${PV}.tar.gz" inherit autotools @@ -15,3 +17,6 @@ do_configure_prepend() { FILES_${PN} += "${libdir}/sa" TARGET_CC_ARCH += "${LDFLAGS}" +LDFLAGS_append_linux-uclibc = " -lintl" +LDFLAGS_append_linux-uclibceabi = " -lintl" +LDFLAGS_append_linux-uclibcspe = " -lintl" -- cgit v1.2.3 From 34e6a1ce23f1ef5f627447286c4ae768d8bcb1ad Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Sun, 13 Sep 2009 12:20:02 -0700 Subject: nfs-utils_1.1.2.bb: Fix compilation on uclibc Signed-off-by: Khem Raj --- .../nfs-utils-1.1.2/nfs-utils-uclibc-compile.patch | 49 ++++++++++++++++++++++ recipes/nfs-utils/nfs-utils_1.1.2.bb | 3 +- 2 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 recipes/nfs-utils/nfs-utils-1.1.2/nfs-utils-uclibc-compile.patch (limited to 'recipes') diff --git a/recipes/nfs-utils/nfs-utils-1.1.2/nfs-utils-uclibc-compile.patch b/recipes/nfs-utils/nfs-utils-1.1.2/nfs-utils-uclibc-compile.patch new file mode 100644 index 0000000000..f242eade45 --- /dev/null +++ b/recipes/nfs-utils/nfs-utils-1.1.2/nfs-utils-uclibc-compile.patch @@ -0,0 +1,49 @@ +--- a/support/nfs/svc_socket.c.org 2007-05-11 03:40:57 +0000 ++++ b/support/nfs/svc_socket.c 2007-10-24 15:20:05 +0000 +@@ -67,8 +67,13 @@ + memset (&addr, 0, sizeof (addr)); + addr.sin_family = AF_INET; + ++#ifdef __UCLIBC__ ++ rpcp = getrpcbynumber (number); ++ ret = 0; ++#else + ret = getrpcbynumber_r (number, &rpcbuf, rpcdata, sizeof rpcdata, + &rpcp); ++#endif + if (ret == 0 && rpcp != NULL) + { + /* First try name. */ +--- a/utils/mountd/cache.c.org 2007-05-11 03:40:57 +0000 ++++ b/utils/mountd/cache.c 2007-10-24 15:21:53 +0000 +@@ -131,6 +131,7 @@ + pw = getpwuid(uid); + if (!pw) + rv = -1; ++#ifndef __UCLIBC__ + else { + rv = getgrouplist(pw->pw_name, pw->pw_gid, groups, &ngroups); + if (rv == -1 && ngroups >= 100) { +@@ -142,6 +143,7 @@ + groups, &ngroups); + } + } ++#endif + qword_printint(f, uid); + qword_printint(f, time(0)+30*60); + if (rv >= 0) { +--- a/tools/rpcgen/rpc_cout.c.org 2007-05-11 03:40:57 +0000 ++++ b/tools/rpcgen/rpc_cout.c 2007-10-24 15:23:17 +0000 +@@ -647,7 +647,11 @@ + int freed=0; + + if(flag == PUT) ++#ifdef __UCLIBC__ ++ f_print(fout,"\t\t IXDR_PUT_"); ++#else + f_print(fout,"\t\t (void) IXDR_PUT_"); ++#endif + else + if(rel== REL_ALIAS) + f_print(fout,"\t\t objp->%s = IXDR_GET_",decl->name); + diff --git a/recipes/nfs-utils/nfs-utils_1.1.2.bb b/recipes/nfs-utils/nfs-utils_1.1.2.bb index 7f29d8a851..cdd5d372cd 100644 --- a/recipes/nfs-utils/nfs-utils_1.1.2.bb +++ b/recipes/nfs-utils/nfs-utils_1.1.2.bb @@ -3,12 +3,13 @@ PRIORITY = "optional" SECTION = "console/network" LICENSE = "GPL" -PR = "r5" +PR = "r6" DEPENDS = "e2fsprogs-libs tcp-wrappers libevent" SRC_URI = "${SOURCEFORGE_MIRROR}/nfs/nfs-utils-${PV}.tar.gz \ file://nfs-utils-tools-unset-cflags.patch;patch=1 \ + file://nfs-utils-uclibc-compile.patch;patch=1 \ file://nfsserver \ " -- cgit v1.2.3