From 709c4d66e0b107ca606941b988bad717c0b45d9b Mon Sep 17 00:00:00 2001 From: Denys Dmytriyenko Date: Tue, 17 Mar 2009 14:32:59 -0400 Subject: rename packages/ to recipes/ per earlier agreement See links below for more details: http://thread.gmane.org/gmane.comp.handhelds.openembedded/21326 http://thread.gmane.org/gmane.comp.handhelds.openembedded/21816 Signed-off-by: Denys Dmytriyenko Acked-by: Mike Westerhof Acked-by: Philip Balister Acked-by: Khem Raj Acked-by: Marcin Juszkiewicz Acked-by: Koen Kooi Acked-by: Frans Meulenbroeks --- .../arm-crunch-floatsi-disable-single.patch | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 recipes/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch (limited to 'recipes/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch') diff --git a/recipes/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch b/recipes/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch new file mode 100644 index 0000000000..cdd52244a6 --- /dev/null +++ b/recipes/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch @@ -0,0 +1,38 @@ +--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:12:39.000000000 +1000 ++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:16:13.000000000 +1000 +@@ -301,13 +301,14 @@ + ) + + ;; Convert Cirrus-SI to Cirrus-SF ++; appears to be buggy + (define_insn "cirrus_floatsisf2" + [(set (match_operand:SF 0 "cirrus_fp_register" "=v") + (float:SF (match_operand:SI 1 "s_register_operand" "r"))) + (clobber (match_scratch:DF 2 "=v"))] +- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" ++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0" + "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2" + [(set_attr "length" "8") + (set_attr "cirrus" "move")] + ) + +--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:16:53.000000000 +1000 ++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:18:20.000000000 +1000 +@@ -3125,14 +3125,15 @@ + + ;; Fixed <--> Floating conversion insns + ++;; Maverick Crunch floatsisf2 is buggy - see cirrus.md + (define_expand "floatsisf2" + [(set (match_operand:SF 0 "s_register_operand" "") + (float:SF (match_operand:SI 1 "s_register_operand" "")))] +- "TARGET_ARM && TARGET_HARD_FLOAT" ++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" + " +- if (TARGET_MAVERICK) ++ if (TARGET_MAVERICK && 0) + { + emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1])); + DONE; + } + ") -- cgit v1.2.3