svn.openezx.org Repository - markup - svn.openezx.org: branches/kernel-2.6.20.7-patches/defconfig-a780

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[svn.openezx.org] / branches / kernel-2.6.20.7-patches / defconfig-a780

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svn.openezx.org: branches/kernel-2.6.20.7-patches/defconfig-a780

+File: [svn.openezx.org] / branches / kernel-2.6.20.7-patches / defconfig-a780 +(download) + +
+ +Revision: 1981, +Sun Apr 22 20:32:25 2007 UTC (16 hours, 45 minutes ago) by wyrm + + + + + +
File size: 25011 byte(s) + + +

latest .config
+
+

+ +

# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.20.7 +# Sun Apr 22 15:03:36 2007 +# +CONFIG_ARM=y +# CONFIG_GENERIC_TIME is not set +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="-ezxdev" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=m +CONFIG_IOSCHED_CFQ=m +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_MACH_TRIZEPS4 is not set +CONFIG_PXA_EZX=y +# CONFIG_PXA_EZX_E680 is not set +CONFIG_PXA_EZX_A780=y +# CONFIG_PXA_EZX_E2 is not set +CONFIG_PXA27x=y +CONFIG_PXA_SSP=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_PREEMPT is not set +CONFIG_NO_IDLE_HZ=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="console=tty1 noinitrd root=/dev/mmcblk0p2 rootfstype=ext3 ip=169.254.1.11:169.254.1.10:169.254.1.10:255.255.255.254:ezx:usb0:off debug mem=32M@0xA0000000 mem=16M@0xAC000000" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=m + +# +# Power management options +# +# CONFIG_PM is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIUSB is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +CONFIG_CONNECTOR=m + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +CONFIG_MTD_XIP=y + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_NETLINK is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_TSDEV=y +CONFIG_INPUT_TSDEV_SCREEN_X=240 +CONFIG_INPUT_TSDEV_SCREEN_Y=320 +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=8 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +CONFIG_SPI=y +CONFIG_SPI_DEBUG=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=y + +# +# SPI Protocol Masters +# + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# +# CONFIG_TIFM_CORE is not set + +# +# LED devices +# +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +CONFIG_FB_PXA_PARAMETERS=y +# CONFIG_FB_MBX is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +CONFIG_FONT_MINI_4x6=y +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set + +# +# Logo configuration +# +# CONFIG_LOGO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_PXA2XX_AC97 is not set + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# HID Devices +# +CONFIG_HID=y + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_USBNET is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_AT91 is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=y +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +# CONFIG_USB_ETH_RNDIS is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set + +# +# MMC/SD Card support +# +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_PXA=y +# CONFIG_MMC_TIFM_SD is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_SA1100=y +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_NFSD_TCP=y +# CONFIG_ROOT_NFS is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_MUST_CHECK is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_RWSEMS=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=m +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_PLIST=y +CONFIG_IOMAP_COPY=y +

++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "ezx.h" ++#include "generic.h" ++#include ++#include ++ ++ ++extern void usb_send_readurb(void); ++extern int ezx_ssp_set_machinfo(struct ezxssp_machinfo *); ++//FIXME extern void pm_do_poweroff(void); ++ ++/* BP Handshake */ ++#define FIRST_STEP 2 ++#define LAST_STEP 3 ++#define BP_RDY_TIMEOUT 0x000c0000 ++ ++/* check power down condition */ ++inline void check_power_off(void) ++{ ++ if (!(GPIO_is_high(GPIO_BB_WDI2))) { ++#ifdef CONFIG_PM ++//FIXME pm_do_poweroff(); ++#endif ++ } ++} ++ ++/* SSP */ ++struct platform_device ezxssp_device = { ++ .name = "ezx-ssp", ++ .id = -1, ++}; ++ ++struct ezxssp_machinfo ezx_ssp_machinfo = { ++ .port = 1, ++ .cs_pcap = GPIO_SPI_CE, ++ .clk_pcap = 1, ++}; ++ ++ ++/* OHCI Controller */ ++ ++static int ezx_ohci_init(struct device *dev) ++{ ++ /* for A780 support (connected with Neptune) */ ++ pxa_gpio_mode(GPIO30_USB_P3_2); /* GPIO30 - USB_P3_2/ICL_TXENB */ ++ pxa_gpio_mode(GPIO31_USB_P3_6); /* GPIO31 - USB_P3_6/ICL_VPOUT */ ++ pxa_gpio_mode(GPIO90_USB_P3_5); /* GPIO90 - USB_P3_5/ICL_VPIN */ ++ pxa_gpio_mode(GPIO91_USB_P3_1); /* GPIO91 - USB_P3_1/ICL_XRXD */ ++ pxa_gpio_mode(GPIO56_USB_P3_4); /* GPIO56 - USB_P3_4/ICL_VMOUT */ ++ pxa_gpio_mode(GPIO113_USB_P3_3);/* GPIO113 - USB_P3_3/ICL_VMIN */ ++ UP3OCR = 0x00000002; ++ ++ UHCHR = UHCHR & ~(UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); ++ ++ return 0; ++} ++ ++static struct pxaohci_platform_data ezx_ohci_platform_data = { ++ .port_mode = PMM_NPS_MODE, ++ .init = ezx_ohci_init, ++}; ++ ++static int step = FIRST_STEP; ++void handshake(void) ++{ ++ /* step 1: check MCU_INT_SW or BP_RDY is low (now it is checked in apboot) */ ++ if (step == 1) { ++ int timeout = BP_RDY_TIMEOUT; ++ ++ /* config MCU_INT_SW, BP_RDY as input */ ++ GPDR(GPIO_MCU_INT_SW) &= ~GPIO_bit(GPIO_MCU_INT_SW); ++ GPDR(GPIO_BP_RDY) &= ~GPIO_bit(GPIO_BP_RDY); ++ ++ while ( timeout -- ) { ++ if ( (!(GPIO_is_high(GPIO_MCU_INT_SW))) ++ || (!(GPIO_is_high(GPIO_BP_RDY))) ) { ++ step ++; ++ break; ++ } ++ ++ check_power_off(); ++ } ++ } ++ ++ /* step 2: wait BP_RDY is low */ ++ if (step == 2) { ++ if (!(GPIO_is_high(GPIO_BP_RDY))) { ++ ++ /* config MCU_INT_SW as output */ ++ pxa_gpio_mode(GPIO_MCU_INT_SW | GPIO_OUT); ++ clr_GPIO(GPIO_MCU_INT_SW); ++ ++ step ++; ++ } ++ } ++ ++ /* step 3: wait BP_RDY is high */ ++ if (step == 3) { ++ if (GPIO_is_high(GPIO_BP_RDY)) { ++ step ++; ++ //FIXME delay_bklight(); ++ set_GPIO(GPIO_MCU_INT_SW); ++ } ++ } ++} ++ ++#ifdef CONFIG_APM ++static unsigned long idle_limit = 0; ++int pm_handle_irq(int irq) ++{ ++ ++ //FIXME: extern unsigned long idle_limit; ++ //FIXME: extern int can_idle, can_sleep; ++ static unsigned long tmp_jiffy; /* for temporary store of jiffies */ ++ ++ /* ++ * if idle_limit is zero, never enter idle. ++ * if not OS timer, reset idle timer count ++ */ ++ if (idle_limit == 0) { ++ tmp_jiffy = jiffies; ++ return irq; ++ } ++#if 0 ++ if (irq != IRQ_OST0) { ++ tmp_jiffy = jiffies; ++ can_idle = 0; ++ can_sleep = 0; ++ } else if (jiffies > tmp_jiffy + idle_limit) { ++ ++ /* ++ * I think this is enough to prevent from reentering here ++ * due to jiffies will be stoped ++ */ ++ tmp_jiffy = jiffies; ++ ++ /* if pm idle timer expired, queue event */ ++ apm_queue_event(KRNL_PROC_INACT); ++ can_idle = 1; ++ } ++#endif ++ ++ return irq; ++} ++ ++irqreturn_t bp_wdi_intr(int irq, void *dev_id) ++{ ++//FIXME apm_queue_event(KRNL_BP_WDI); ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_wdi_irq = { ++ .name = "BP wdi", ++ .handler = &bp_wdi_intr, ++}; ++#endif ++ ++int handshake_pass(void) ++{ ++ return (step > LAST_STEP); ++} ++ ++static irqreturn_t bp_rdy_intr(int irq, void *dev_id) ++{ ++ static int usbipc_ready = 0; ++ ++ if (!usbipc_ready) { ++ handshake(); ++ if (handshake_pass()) { ++ disable_irq(IRQ_GPIO(GPIO_BB_WDI2)); ++ ++ /* set bp_rdy handle for usb ipc */ ++ set_irq_type(GPIO_BP_RDY, IRQT_FALLING); ++ usbipc_ready = 1; ++ } ++ } else ++ // FIXME usb_send_readurb(); ++ {} ++ ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_rdy_irq = { ++ .name = "BP rdy", ++ .handler = bp_rdy_intr, ++}; ++ ++static irqreturn_t bp_wdi2_intr(int irq, void *dev_id) ++{ ++#ifdef CONFIG_PM ++//FIXME pm_do_poweroff(); ++#endif ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_wdi2_irq = { ++ .name = "BP wdi2", ++ .handler = bp_wdi2_intr, ++}; ++ ++ ++static struct resource ezx_bp_resources[] = { ++ [0] = { ++ .start = GPIO_BP_RDY, ++ .end = GPIO_BP_RDY, ++ .flags = IORESOURCE_IRQ, ++ }, ++ [1] = { ++ .start = GPIO_BB_WDI2, ++ .end = GPIO_BB_WDI2, ++ .flags = IORESOURCE_IRQ, ++ }, ++#ifdef CONFIG_APM ++ [2] = { ++ .start = GPIO_BB_WDI, ++ .end = GPIO_BB_WDI, ++ .flags = IORESOURCE_IRQ, ++ }, ++#endif ++}; ++ ++static struct platform_device ezx_bp_device = { ++ .name = "ezx-bp", ++ .dev = { ++ //.parent = ++ //.platform_data = ++ }, ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ezx_bp_resources), ++ .resource = ezx_bp_resources, ++}; ++ ++static void __init ezx_init_gpio_irq(void) ++{ ++#ifdef CONFIG_APM ++ set_irq_type(GPIO_BB_WDI, IRQT_FALLING); ++ setup_irq(IRQ_GPIO(GPIO_BB_WDI), &bp_wdi_irq); ++#endif ++ set_irq_type(GPIO_BP_RDY, IRQT_BOTHEDGE); ++ setup_irq(IRQ_GPIO(GPIO_BP_RDY), &bp_rdy_irq); ++ ++ set_irq_type(GPIO_BB_WDI2, IRQT_FALLING); ++ setup_irq(IRQ_GPIO(GPIO_BB_WDI2), &bp_wdi2_irq); ++} ++ ++static void __init a780_init_irq(void) ++{ ++ pxa_init_irq(); ++ ++ /* init ezx specfic gpio irq */ ++ ezx_init_gpio_irq(); ++ ++ check_power_off(); ++ handshake(); ++ if (handshake_pass()) { ++ disable_irq(IRQ_GPIO(GPIO_BP_RDY)); ++ disable_irq(IRQ_GPIO(GPIO_BB_WDI2)); ++ } ++} ++ ++static struct platform_device *devices[] __initdata = { ++ &ezxssp_device, ++ &ezx_bp_device, ++}; ++ ++static void __init a780_init(void) ++{ ++//FIXME CKEN = CKEN9_OSTIMER | CKEN22_MEMC | CKEN5_STUART; ++ ++ ezx_ssp_set_machinfo(&ezx_ssp_machinfo); ++ ++ /* set BB_RESET PIN out put high */ ++ pxa_gpio_mode(GPIO_BB_RESET|GPIO_OUT); ++ set_GPIO(GPIO_BB_RESET); ++ ++ pxa_gpio_mode(GPIO_ICL_FFRXD_MD); ++ pxa_gpio_mode(GPIO_ICL_FFTXD_MD); ++ pxa_gpio_mode(GPIO_ICL_FFCTS_MD); ++ pxa_gpio_mode(GPIO_ICL_FFRTS_MD); ++ ++ pxa_gpio_mode(GPIO42_BTRXD_MD); ++ pxa_gpio_mode(GPIO43_BTTXD_MD); ++ pxa_gpio_mode(GPIO44_BTCTS_MD); ++ pxa_gpio_mode(GPIO45_BTRTS_MD); ++ ++ /* clear EMU MUX1/MUX2 (low) to close the audio path to EMU */ ++ pxa_gpio_mode(GPIO_EMU_MUX1|GPIO_OUT); ++ clr_GPIO(GPIO_EMU_MUX1); ++ pxa_gpio_mode(GPIO_EMU_MUX2|GPIO_OUT); ++ clr_GPIO(GPIO_EMU_MUX2); ++ ++#if defined(CONFIG_PXA_EZX_E680) ++ pxa_gpio_mode(GPIO46_STRXD_MD); ++ pxa_gpio_mode(GPIO47_STTXD_MD); ++ ++ /* setup sleep mode values */ ++ PWER = 0xc000f803; // disable usb 0xdc00f803; ++ PFER = 0x0000f803; ++ PRER = 0x00001802; ++ // keypad wakeup (PKWR,PGSR3) should be in keypad.c ++ PGSR0 = 0x00000010; ++ PGSR1 = 0x02800000; ++ PGSR2 = 0x00040000; ++ PGSR3 = 0x00000000; ++ PCFR = PCFR_DC_EN | PCFR_FS | PCFR_FP | PCFR_OPDE; ++ PSLR = 0x05800f00; ++ ++#elif defined(CONFIG_PXA_EZX_A780) ++ ++ /* Standard UART */ ++ pxa_gpio_mode(GPIO46_STRXD_MD); ++ pxa_gpio_mode(GPIO47_STTXD_MD); ++ ++ /* setup sleep mode values */ ++ PWER = 0xc0007803; // disable usb, GPIO15 NC ++ PFER = 0x00007803; ++ PRER = 0x00001802; ++ // keypad wakeup (PKWR,PGSR3) should be in keypad.c ++ PGSR0 = 0x00000010; ++ PGSR1 = 0x02800000; ++ PGSR2 = 0x00040000; ++ PGSR3 = 0x00000008; ++ PCFR = PCFR_DC_EN | PCFR_FS | PCFR_FP | PCFR_OPDE; ++ PSLR = 0x05800f00; ++ ++#endif ++ pxa_set_ohci_info(&ezx_ohci_platform_data); ++ ++ platform_add_devices(devices, ARRAY_SIZE(devices)); ++ ++} ++ ++MACHINE_START(EZX, "Motorola Ezx Platform") ++ /* Maintainer: Harald Welte */ ++ .phys_io = 0x40000000, ++ .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, ++ .boot_params = 0xa0000100, ++ .map_io = pxa_map_io, ++ .init_irq = a780_init_irq, ++ .timer = &pxa_timer, ++ .init_machine = a780_init, ++MACHINE_END +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/ezx.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/ezx.h 2007-04-21 22:32:53.000000000 -0300 +@@ -0,0 +1,225 @@ ++/* ++ * linux/include/asm-arm/arch-pxa/ezx.h ++ * ++ * Specific macro defines for Motorola Ezx Development Platform ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++/* support E680 p3 and ealier PCB */ ++//#define E680_P3_AND_EARLY ++ ++#define GPIO_is_high(x) (GPLR(x) & GPIO_bit(x)) ++#define set_GPIO(x) (GPSR(x) = GPIO_bit(x)) ++#define clr_GPIO(x) (GPCR(x) = GPIO_bit(x)) ++ ++/* ++ * Flags in memory for sleep use ++ */ ++#define FLAG_ADDR PHYS_OFFSET ++#define RESUME_ADDR (PHYS_OFFSET + 4) ++#define BPSIG_ADDR (PHYS_OFFSET + 8) ++ ++#define USER_OFF_FLAG 0x5a5a5a5a ++#define SLEEP_FLAG 0x6b6b6b6b ++#define OFF_FLAG 0x7c7c7c7c ++#define REFLASH_FLAG 0x0C1D2E3F ++#define PASS_THRU_FLAG 0x12345678 ++ ++#define WDI_FLAG 0xbb00dead ++#define NO_FLAG 0xaa00dead ++ ++/* ++ * GPIO control pin, have to change when hardware lock down ++ */ ++ ++#ifdef E680_P3_AND_EARLY ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 57 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 115 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 89 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 23 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 2 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* bluetooth module wake up Ap module */ ++#define GPIO_BT_RESET 56 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#elif defined(A780_P1_AND_EARLY) ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 82 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 57 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 89 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 29 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 2 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* bluetooth module wake up Ap module */ ++#define GPIO_BT_RESET 56 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#else ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 82 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 57 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 99 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++//#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 29 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 28 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* AP wake up bluetooth module */ ++#define GPIO_BT_RESET 48 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#endif ++/* ++ * ezx platform, wake up source edge detect bit ++ */ ++#define PEDR_INT_SEC 1 ++ ++#define GPIO_FLIP_PIN 12 ++/*E680 screen lock button*/ ++ ++#define GPIO_LOCK_SCREEN_PIN GPIO_FLIP_PIN ++ ++/* MMC interface */ ++#define GPIO_MMC_DETECT 11 ++#define GPIO_MMC_CLK 32 ++#define GPIO_MMC_DATA0 92 ++#define GPIO_MMC_WP 107 ++#define GPIO_MMC_DATA1 109 ++#define GPIO_MMC_DATA2 110 ++#define GPIO_MMC_DATA3 111 ++#define GPIO_MMC_CMD 112 ++ ++/* interface function */ ++#define GPIO_MMC_CLK_MD (GPIO_MMC_CLK | GPIO_ALT_FN_2_OUT) ++#define GPIO_MMC_DATA0_MD (GPIO_MMC_DATA0 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA1_MD (GPIO_MMC_DATA1 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA2_MD (GPIO_MMC_DATA2 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA3_MD (GPIO_MMC_DATA3 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++ ++#define GPIO_MMC_CMD_MD (GPIO_MMC_CMD | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++ ++/* EMU GPIO 119 ---MUX2 120 --- MUX1 */ ++#define GPIO_EMU_MUX1 120 ++#define GPIO_EMU_MUX2 119 ++#define GPIO_SNP_INT_CTL 86 ++#define GPIO_SNP_INT_IN 87 ++ ++ ++/* audio related pins */ ++#define AP_13MHZ_OUTPUT_PIN 9 ++ ++#ifdef CONFIG_ARCH_EZX_E680 ++#define GPIO_VA_SEL_BUL 79 ++#define GPIO_FLT_SEL_BUL 80 /* out filter select pin */ ++#define GPIO_MIDI_RESET 78 /* GPIO used by MIDI chipset */ ++#define GPIO_MIDI_CS 33 ++#define GPIO_MIDI_IRQ 15 ++#define GPIO_MIDI_NPWE 49 ++#define GPIO_MIDI_RDY 18 ++#endif ++ ++#ifdef CONFIG_ARCH_EZX_A780 ++#define GPIO_HW_ATTENUATE_A780 96 /* hw noise attenuation be used or bypassed, for receiver or louderspeaker mode */ ++#endif ++ ++ ++/* bp status pin */ ++#define GPIO_BP_STATE 41 ++ ++/* define usb related pin */ ++#define GPIO34_TXENB 34 ++#define GPIO35_XRXD 35 ++#define GPIO36_VMOUT 36 ++#define GPIO39_VPOUT 39 ++#define GPIO40_VPIN 40 ++#define GPIO53_VMIN 53 ++ ++/* USB client 6 pin defination */ ++#define GPIO34_TXENB_MD (GPIO34_TXENB | GPIO_ALT_FN_1_OUT) ++#define GPIO35_XRXD_MD (GPIO35_XRXD | GPIO_ALT_FN_2_IN ) ++#define GPIO36_VMOUT_MD (GPIO36_VMOUT | GPIO_ALT_FN_1_OUT) ++#define GPIO39_VPOUT_MD (GPIO39_VPOUT | GPIO_ALT_FN_1_OUT) ++#define GPIO40_VPIN_MD (GPIO40_VPIN | GPIO_ALT_FN_3_IN ) ++#define GPIO53_VMIN_MD (GPIO53_VMIN | GPIO_ALT_FN_2_IN ) ++ ++#define GPIO53_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++ +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/pxa-regs.h +=================================================================== +--- linux-2.6.20.7.orig/include/asm/arch/pxa-regs.h 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/pxa-regs.h 2007-04-21 22:32:53.000000000 -0300 +@@ -854,6 +854,8 @@ + #define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ + #define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ + ++#define UP3OCR __REG(0x40600024) /* USB Port 3 Output Control register */ ++ + #define UDCCSN(x) __REG2(0x40600100, (x) << 2) + #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ + #define UDCCSR0_SA (1 << 7) /* Setup Active */ +@@ -1257,6 +1259,7 @@ + #define GPIO33_nCS_5 33 /* chip select 5 */ + #define GPIO34_FFRXD 34 /* FFUART receive */ + #define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */ ++#define GPIO34_USB_P2_2 34 /* USB Port2 Pin 2 */ + #define GPIO35_FFCTS 35 /* FFUART Clear to send */ + #define GPIO36_FFDCD 36 /* FFUART Data carrier detect */ + #define GPIO37_FFDSR 37 /* FFUART data set ready */ +@@ -1370,6 +1373,7 @@ + #define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) + #define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) + #define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) ++#define GPIO22_SCLK2_MD (22 | GPIO_ALT_FN_3_IN) + #define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT) + #define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT) + #define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT) +@@ -1380,23 +1384,33 @@ + #define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT) + #define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN) + #define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN) ++#define GPIO29_SCLK_MD (29 | GPIO_ALT_FN_3_IN) + #define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT) + #define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT) ++#define GPIO30_USB_P3_2 (30 | GPIO_ALT_FN_3_OUT) + #define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT) + #define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) ++#define GPIO31_USB_P3_6 (31 | GPIO_ALT_FN_3_OUT) + #define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) + #define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT) + #define GPIO32_MMCCLK_MD ( 32 | GPIO_ALT_FN_2_OUT) + #define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) + #define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) + #define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) ++#define GPIO34_USB_P2_2_MD (34 | GPIO_ALT_FN_1_OUT) + #define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO35_USB_P2_1_MD (35 | GPIO_ALT_FN_2_IN) + #define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) ++#define GPIO36_USB_P2_4_MD (36 | GPIO_ALT_FN_1_OUT) + #define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) ++#define GPIO37_SFRM2_MD (37 | GPIO_ALT_FN_2_IN) + #define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) ++#define GPIO38_STXD2_MD (38 | GPIO_ALT_FN_2_OUT) + #define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT) + #define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO39_USB_P2_6_MD (39 | GPIO_ALT_FN_1_OUT) + #define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) ++#define GPIO40_USB_P2_5_MD (40 | GPIO_ALT_FN_3_IN) + #define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) + #define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) + #define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) +@@ -1421,13 +1435,17 @@ + #define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) + #define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) + #define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) ++#define GPIO52_SCLK3_MD (52 | GPIO_ALT_FN_2_OUT) + #define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) + #define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) ++#define GPIO53_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO53_USB_P2_3_MD (53 | GPIO_ALT_FN_2_IN) + #define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) + #define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT) + #define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) + #define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) + #define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) ++#define GPIO56_USB_P3_4 (56 | GPIO_ALT_FN_1_OUT) + #define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) + #define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) + #define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT) +@@ -1463,13 +1481,19 @@ + #define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) + #define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT) + #define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN) ++#define GPIO81_STXD3_MD (81 | GPIO_ALT_FN_1_OUT) + #define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT) + #define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN) + #define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT) + #define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN) ++#define GPIO83_SFRM3_MD (83 | GPIO_ALT_FN_1_IN) + #define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT) + #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) + #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) ++#define GPIO88_SRXD2_MD (88 | GPIO_ALT_FN_2_IN) ++#define GPIO89_SRXD3_MD (89 | GPIO_ALT_FN_1_IN) ++#define GPIO90_USB_P3_5 (90 | GPIO_ALT_FN_2_IN) ++#define GPIO91_USB_P3_1 (91 | GPIO_ALT_FN_2_IN) + #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) + #define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) + #define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) +@@ -1481,6 +1505,7 @@ + #define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) + #define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT) + #define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) ++#define GPIO113_USB_P3_3 (113 | GPIO_ALT_FN_3_IN) + #define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT) + #define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) + +@@ -1496,6 +1521,7 @@ + #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */ + #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */ + #define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */ ++#define PGSR(x) (__REG(0x40F00020 + ((unsigned long)(x)/32*4))) + #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */ + #define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */ + #define PGSR2 __REG(0x40F00028) /* Power Manager GPIO Sleep State Register for GP[84-64] */ +Index: linux-2.6.20.7/arch/arm/boot/compressed/head.S +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/boot/compressed/head.S 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/boot/compressed/head.S 2007-04-21 22:32:53.000000000 -0300 +@@ -117,6 +117,9 @@ + mov r0, r0 + .endr + ++ mov r1, #0x300 @ mach_id 0x363 is official EZX ++ orr r1, r1, #0x63 @ bootloader JUMP doesn't set r1 ++ + b 1f + .word 0x016f2818 @ Magic numbers to help the loader + .word start @ absolute load/run zImage address +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/uncompress.h +=================================================================== +--- linux-2.6.20.7.orig/include/asm-arm/arch-pxa/uncompress.h 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/uncompress.h 2007-04-21 22:32:53.000000000 -0300 +@@ -14,14 +14,14 @@ + #define STUART ((volatile unsigned long *)0x40700000) + #define HWUART ((volatile unsigned long *)0x41600000) + +-#define UART FFUART ++#define UART STUART + + + static inline void putc(char c) + { +- while (!(UART[5] & 0x20)) ++/* while (!(UART[5] & 0x40)) + barrier(); +- UART[0] = c; ++ UART[0] = c;*/ + } + + /* +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx_ssp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx_ssp.c 2007-04-22 01:36:48.000000000 -0300 +@@ -0,0 +1,130 @@ ++/* ++ * SSP control code for Motorola EZX phones ++ * ++ * Copyright (c) 2007 Daniel Ribeiro ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "ezx.h" ++ ++static DEFINE_SPINLOCK(ezx_ssp_lock); ++static struct ssp_dev ezx_ssp_dev; ++static struct ssp_state ezx_ssp_state; ++static struct ezxssp_machinfo *ssp_machinfo; ++ ++/* PCAP */ ++unsigned long ezx_ssp_pcap_putget(ulong data) ++{ ++ unsigned long flag; ++ u32 ret = 0; ++ ++ spin_lock_irqsave(&ezx_ssp_lock, flag); ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPCR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ ++ ssp_write_word(&ezx_ssp_dev,data); ++ ssp_read_word(&ezx_ssp_dev, &ret); ++ ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPSR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ spin_unlock_irqrestore(&ezx_ssp_lock, flag); ++ ++ return ret; ++} ++EXPORT_SYMBOL(ezx_ssp_pcap_putget); ++ ++/* ASSP */ ++ ++/* NSSP */ ++ ++void __init ezx_ssp_set_machinfo(struct ezxssp_machinfo *machinfo) ++{ ++ ssp_machinfo = machinfo; ++} ++ ++static int __init ezx_ssp_probe(struct platform_device *dev) ++{ ++ int ret; ++ /* PCAP init */ ++ pxa_gpio_mode(29|GPIO_ALT_FN_3_OUT); ++ pxa_gpio_mode(GPIO24_SFRM_MD); ++ pxa_gpio_mode(GPIO25_STXD_MD); ++ pxa_gpio_mode(GPIO26_SRXD_MD); ++ ++ /* Chip Select - Disable All */ ++ if (ssp_machinfo->cs_pcap >= 0) ++ pxa_gpio_mode(ssp_machinfo->cs_pcap | GPIO_OUT | GPIO_DFLT_HIGH); ++ ++ ret = ssp_init(&ezx_ssp_dev, ssp_machinfo->port, 0); ++ ++ if (ret) ++ printk(KERN_ERR "Unable to register SSP handler!\n"); ++ else { ++ ssp_disable(&ezx_ssp_dev); ++ ssp_config(&ezx_ssp_dev, ++ (SSCR0_Motorola | SSCR0_DataSize(16) | SSCR0_EDSS), ++ (SSCR1_TxTresh(1) | SSCR1_RxTresh(1)), ++ 0, SSCR0_SerClkDiv(ssp_machinfo->clk_pcap)); ++ ssp_enable(&ezx_ssp_dev); ++ } ++ ++ return ret; ++} ++ ++static int ezx_ssp_remove(struct platform_device *dev) ++{ ++ ssp_exit(&ezx_ssp_dev); ++ return 0; ++} ++ ++static int ezx_ssp_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ ssp_flush(&ezx_ssp_dev); ++ ssp_save_state(&ezx_ssp_dev,&ezx_ssp_state); ++ ++ return 0; ++} ++ ++static int ezx_ssp_resume(struct platform_device *dev) ++{ ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPSR(ssp_machinfo->cs_pcap) = GPIO

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