From 1be23a85a9044ac34ebd07d561b8029d0764f916 Mon Sep 17 00:00:00 2001 From: Jeremy Laine Date: Wed, 17 Sep 2008 13:15:56 +0000 Subject: u-boot: add SPI, EEPROM and DTT support for mpc8313e-rdb --- .../u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch (limited to 'packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch') diff --git a/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch new file mode 100644 index 0000000000..bdc69d9562 --- /dev/null +++ b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch @@ -0,0 +1,21 @@ +Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h +=================================================================== +--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-09-12 18:52:50.000000000 +0200 ++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-09-12 18:52:58.000000000 +0200 +@@ -263,6 +263,16 @@ + #define CFG_I2C_OFFSET 0x3000 + #define CFG_I2C2_OFFSET 0x3100 + ++/* ++ * EEPROM configuration ++ */ ++#define CONFIG_CMD_EEPROM ++#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ ++#define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C256*/ ++#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ ++#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64-Byte Page Write Mode */ ++#define CFG_EEPROM_PAGE_WRITE_ENABLE ++ + /* TSEC */ + #define CFG_TSEC1_OFFSET 0x24000 + #define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET) -- cgit v1.2.3