From 0c4549cead750f8f461490c720a5e3121ea96d10 Mon Sep 17 00:00:00 2001 From: Philip Balister Date: Thu, 3 Jul 2008 15:05:44 +0000 Subject: u-boot : Update SFF SDR board patch and bump git rev to current HEAD. --- packages/u-boot/files/sffsdr-u-boot.patch | 522 ++++++++++++++++++------------ 1 file changed, 317 insertions(+), 205 deletions(-) (limited to 'packages/u-boot/files') diff --git a/packages/u-boot/files/sffsdr-u-boot.patch b/packages/u-boot/files/sffsdr-u-boot.patch index cf8415330b..dcb34e2c51 100644 --- a/packages/u-boot/files/sffsdr-u-boot.patch +++ b/packages/u-boot/files/sffsdr-u-boot.patch @@ -1,93 +1,103 @@ -X-Mozilla-Status: 0003 +X-Mozilla-Status: 0001 X-Mozilla-Status2: 00000000 -Return-Path: -Received: from mail6.zoneedit.com (mail6.zoneedit.com [66.240.226.247]) - by www.balister.org (8.13.8/8.13.5) with ESMTP id m4GGYUC2017393 - for ; Fri, 16 May 2008 12:34:31 -0400 -Received: from listserv.vt.edu (listserv.vt.edu [198.82.161.192]) - by mail6.zoneedit.com (Postfix) with ESMTP id B457D5D5B6 - for ; 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+ Fri, 6 Jun 2008 16:38:46 -0400 +From: Hugo Villeneuve +To: u-boot-users@lists.sourceforge.net +Date: Fri, 6 Jun 2008 16:39:10 -0400 +Message-Id: <1212784750-10682-1-git-send-email-hugo.villeneuve@lyrtech.com> X-Mailer: git-send-email 1.5.4.5 -X-Greylist: Default is to whitelist mail, - not delayed by milter-greylist-3.0 (server.hugovil.com - [64.235.217.201]); Fri, 16 May 2008 12:34:25 -0400 (EDT) -X-Junkmail-Status: score=10/50, host=freya.cc.vt.edu -X-Junkmail-SD-Raw: score=unknown, - refid=str=0001.0A090205.482DB793.02F2,ss=1,fgs=0, - ip=64.235.217.201, so=2007-10-30 19:00:17, - dmn=5.4.3/2007-10-19 -X-Junkmail-IWF: false -Message-ID: <1210970183-26615-1-git-send-email-hugo.villeneuve@lyrtech.com> -Date: Fri, 16 May 2008 16:36:23 -0400 -Reply-To: sffsdr Discussion List -Sender: sffsdr Discussion List -From: Hugo Villeneuve -Subject: [PATCH] Add support for Lyrtech SFF-SDR board (ARM926EJS) -To: SFFSDR@LISTSERV.VT.EDU +X-Greylist: Default is to whitelist mail, not delayed by milter-greylist-3.0 + (server.hugovil.com [64.235.217.201]); + Fri, 06 Jun 2008 16:38:46 -0400 (EDT) +X-Spam-Score: 1.2 (+) +X-Spam-Report: Spam Filtering performed by sourceforge.net. + See http://spamassassin.org/tag/ for more details. + Report problems to + http://sf.net/tracker/?func=add&group_id=1&atid=200001 + 1.0 FORGED_RCVD_HELO Received: contains a forged HELO + 0.2 UPPERCASE_25_50 message body is 25-50% uppercase + 0.0 DRUGS_SLEEP Refers to a sleep aid drug +Cc: "Philip Balister, OpenSDR" +Subject: [U-Boot-Users] [PATCH V8] ARM: Add support for Lyrtech SFF-SDR + board (ARM926EJS) +X-BeenThere: u-boot-users@lists.sourceforge.net +X-Mailman-Version: 2.1.8 Precedence: list +List-Id: Universal Boot Loader general discussion + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +MIME-Version: 1.0 +Content-Type: text/plain; charset="us-ascii" +Content-Transfer-Encoding: 7bit +Sender: u-boot-users-bounces@lists.sourceforge.net +Errors-To: u-boot-users-bounces@lists.sourceforge.net -Philip, -this is the patch I´m planning on sending to the U-Boot -folks so that the SFFSDR is integrated into mainline -U-Boot. - -It is mostly based on the work you have done. - -I added code to make the EEPROM accessible through -the I2C bus. This is needed because we use an I2C -switch on the SFFSDR that is turned OFF by default. -I also added code to read the MAC address from the -EEPROM. - -I also removed unused stuff specific to the -Schmoogie board. - -The network and NAND are both working fine with -that patch. - -I´m looking forward to your comments. - -Hugo V. - ---- - -This patch adds support for the Lyrtech SFF-SDR, based -on the TI DaVinci architecture (ARM926EJS). +ARM: This patch adds support for the Lyrtech SFF-SDR +board, based on the TI DaVinci architecture (ARM926EJS). Signed-off-by: Hugo Villeneuve +Signed-off-by: Philip Balister, OpenSDR + --- + CREDITS | 5 + MAKEALL | 1 + Makefile | 3 + - board/davinci/sffsdr/Makefile | 52 +++++++++ - board/davinci/sffsdr/board_init.S | 29 +++++ - board/davinci/sffsdr/config.mk | 24 ++++ - board/davinci/sffsdr/dv_board.c | 211 +++++++++++++++++++++++++++++++++++++ - board/davinci/sffsdr/u-boot.lds | 52 +++++++++ - include/asm-arm/mach-types.h | 13 +++ - include/configs/davinci_sffsdr.h | 171 ++++++++++++++++++++++++++++++ - 9 files changed, 556 insertions(+), 0 deletions(-) + board/davinci/sffsdr/Makefile | 51 ++++++ + board/davinci/sffsdr/board_init.S | 32 ++++ + board/davinci/sffsdr/config.mk | 42 +++++ + board/davinci/sffsdr/sffsdr.c | 306 +++++++++++++++++++++++++++++++++++++ + board/davinci/sffsdr/u-boot.lds | 52 +++++++ + include/asm-arm/mach-types.h | 13 ++ + include/configs/davinci_sffsdr.h | 148 ++++++++++++++++++ + 10 files changed, 653 insertions(+), 0 deletions(-) +diff --git a/CREDITS b/CREDITS +index e84ef38..b855904 100644 +--- a/CREDITS ++++ b/CREDITS +@@ -533,3 +533,8 @@ N: Timo Tuunainen + E: timo.tuunainen@sysart.fi + D: Support for Artila M-501 starter kit + W: http://www.sysart.fi/ ++ ++N: Philip Balister ++E: philip@opensdr.com ++D: Port to Lyrtech SFFSDR development board. ++W: www.opensdr.com diff --git a/MAKEALL b/MAKEALL -index 791eabc..1a0cb37 100755 +index 37b4334..f53ceec 100755 --- a/MAKEALL +++ b/MAKEALL -@@ -495,6 +495,7 @@ LIST_ARM9=" \ +@@ -496,6 +496,7 @@ LIST_ARM9=" \ voiceblue \ davinci_dvevm \ davinci_schmoogie \ @@ -96,10 +106,10 @@ index 791eabc..1a0cb37 100755 " diff --git a/Makefile b/Makefile -index 167a717..6280a59 100644 +index 6548f8e..05d90aa 100644 --- a/Makefile +++ b/Makefile -@@ -2402,6 +2402,9 @@ davinci_dvevm_config : unconfig +@@ -2408,6 +2408,9 @@ davinci_dvevm_config : unconfig davinci_schmoogie_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci @@ -111,10 +121,10 @@ index 167a717..6280a59 100644 diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile new file mode 100644 -index 0000000..fa00138 +index 0000000..4413b33 --- /dev/null +++ b/board/davinci/sffsdr/Makefile -@@ -0,0 +1,52 @@ +@@ -0,0 +1,51 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -138,13 +148,12 @@ index 0000000..fa00138 +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA -+# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + -+COBJS := dv_board.o ++COBJS := $(BOARD).o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) @@ -169,17 +178,20 @@ index 0000000..fa00138 +######################################################################### diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S new file mode 100644 -index 0000000..22d8adc +index 0000000..84ecd96 --- /dev/null +++ b/board/davinci/sffsdr/board_init.S -@@ -0,0 +1,29 @@ +@@ -0,0 +1,32 @@ +/* -+ * Copyright (C) 2007 Sergey Kubushyn -+ * + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * ++ * Copyright (C) 2007 Sergey Kubushyn ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of @@ -204,17 +216,38 @@ index 0000000..22d8adc + mov pc, lr diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk new file mode 100644 -index 0000000..e8a329c +index 0000000..b1c4ead --- /dev/null +++ b/board/davinci/sffsdr/config.mk -@@ -0,0 +1,24 @@ +@@ -0,0 +1,42 @@ ++# ++# Lyrtech SFF SDR board (ARM926EJS) cpu +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, +# David Mueller, ELSOFT AG, +# -+# Lyrtech SFF SDR board (ARM926EJS) cpu -+# see http://www.lyrtech.com/ for more information on Lyrtech ++# Copyright (C) 2008 Lyrtech ++# Copyright (C) 2008 Philip Balister, OpenSDR ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++ +# +# SFF SDR board has 1 bank of 128 MB DDR RAM +# Physical Address: @@ -226,28 +259,29 @@ index 0000000..e8a329c +# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0, +# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc). +# -+# we load ourself to 8400'0000 -+# -+# -+ -+# Provide at least 32MB spacing between us and the Integrity kernel image ++# we load ourself to 8400'0000 to provide at least 32MB spacing ++# between us and the Integrity kernel image +TEXT_BASE = 0x84000000 -diff --git a/board/davinci/sffsdr/dv_board.c b/board/davinci/sffsdr/dv_board.c +diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c new file mode 100644 -index 0000000..a3f60cb +index 0000000..31e0f24 --- /dev/null -+++ b/board/davinci/sffsdr/dv_board.c -@@ -0,0 +1,211 @@ ++++ b/board/davinci/sffsdr/sffsdr.c +@@ -0,0 +1,306 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn + * ++ * Copyright (C) 2008 Lyrtech ++ * Copyright (C) 2008 Philip Balister, OpenSDR ++ * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: -+ * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * -+ * ---------------------------------------------------------------------------- ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or @@ -258,10 +292,9 @@ index 0000000..a3f60cb + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ * ---------------------------------------------------------------------------- ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include @@ -269,18 +302,24 @@ index 0000000..a3f60cb +#include +#include + ++#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ ++#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */ ++ ++#define INTEGRITY_SYSCFG_OFFSET 0x7E8 ++#define INTEGRITY_CHECKWORD_OFFSET 0x7F8 ++#define INTEGRITY_CHECKWORD_VALUE 0x10ADBEEF ++ +DECLARE_GLOBAL_DATA_PTR; + -+extern void i2c_init(int speed, int slaveaddr); -+extern void timer_init(void); -+extern int eth_hw_init(void); -+extern phy_t phy; ++extern void timer_init(void); ++extern int eth_hw_init(void); ++extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ -+ dv_reg_p mdstat, mdctl; ++ dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ @@ -288,7 +327,7 @@ index 0000000..a3f60cb + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + -+ while (REG(PSC_PTSTAT) & 0x01) {;} ++ while (REG(PSC_PTSTAT) & 0x01); + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ @@ -296,32 +335,34 @@ index 0000000..a3f60cb + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ -+ if ( (id == DAVINCI_LPSC_VPSSSLV) || -+ (id == DAVINCI_LPSC_EMAC) || -+ (id == DAVINCI_LPSC_EMAC_WRAPPER) || -+ (id == DAVINCI_LPSC_MDIO) || -+ (id == DAVINCI_LPSC_USB) || -+ (id == DAVINCI_LPSC_ATA) || -+ (id == DAVINCI_LPSC_VLYNQ) || -+ (id == DAVINCI_LPSC_UHPI) || -+ (id == DAVINCI_LPSC_DDR_EMIF) || -+ (id == DAVINCI_LPSC_AEMIF) || -+ (id == DAVINCI_LPSC_MMC_SD) || -+ (id == DAVINCI_LPSC_MEMSTICK) || -+ (id == DAVINCI_LPSC_McBSP) || -+ (id == DAVINCI_LPSC_GPIO) -+ ) -+ *mdctl |= 0x200; ++ switch (id) { ++ case DAVINCI_LPSC_VPSSSLV: ++ case DAVINCI_LPSC_EMAC: ++ case DAVINCI_LPSC_EMAC_WRAPPER: ++ case DAVINCI_LPSC_MDIO: ++ case DAVINCI_LPSC_USB: ++ case DAVINCI_LPSC_ATA: ++ case DAVINCI_LPSC_VLYNQ: ++ case DAVINCI_LPSC_UHPI: ++ case DAVINCI_LPSC_DDR_EMIF: ++ case DAVINCI_LPSC_AEMIF: ++ case DAVINCI_LPSC_MMC_SD: ++ case DAVINCI_LPSC_MEMSTICK: ++ case DAVINCI_LPSC_McBSP: ++ case DAVINCI_LPSC_GPIO: ++ *mdctl |= 0x200; ++ break; ++ } + + REG(PSC_PTCMD) = 0x01; + -+ while (REG(PSC_PTSTAT) & 0x03) {;} -+ while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */ ++ while (REG(PSC_PTSTAT) & 0x03); ++ while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ +} + +void dsp_on(void) +{ -+ int i; ++ int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ @@ -352,7 +393,6 @@ index 0000000..a3f60cb + REG(PSC_GBLCTL) &= ~0x1f; +} + -+ +int board_init(void) +{ + /* arch number of the board */ @@ -399,46 +439,131 @@ index 0000000..a3f60cb + return(0); +} + -+int misc_init_r (void) ++/* Read ethernet MAC address from Integrity data structure inside EEPROM. */ ++int read_mac_address(uint8_t *buf) +{ -+ u_int8_t tmp[20], buf[10]; -+ int i = 0; -+ int clk = 0; ++ u_int32_t value, mac[2], address; ++ ++ /* Read Integrity data structure checkword. */ ++ if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET, ++ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) ++ goto err; ++ if (value != INTEGRITY_CHECKWORD_VALUE) ++ return 1; ++ ++ /* Read SYSCFG structure offset. */ ++ if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET, ++ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) ++ goto err; ++ address = 0x800 + (int) value; /* Address of SYSCFG structure. */ ++ ++ /* Read NET CONFIG structure offset. */ ++ if (i2c_read(CFG_I2C_EEPROM_ADDR, address, ++ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) ++ goto err; ++ address = 0x800 + (int) value; /* Address of NET CONFIG structure. */ ++ address += 12; /* Address of NET INTERFACE CONFIG structure. */ ++ ++ /* Read NET INTERFACE CONFIG 2 structure offset. */ ++ if (i2c_read(CFG_I2C_EEPROM_ADDR, address, ++ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) ++ goto err; ++ address = 0x800 + 16 + (int) value; /* Address of NET INTERFACE ++ * CONFIG 2 structure. */ ++ ++ /* Read MAC address. */ ++ if (i2c_read(CFG_I2C_EEPROM_ADDR, address, ++ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8)) ++ goto err; ++ ++ buf[0] = mac[0] >> 24; ++ buf[1] = mac[0] >> 16; ++ buf[2] = mac[0] >> 8; ++ buf[3] = mac[0]; ++ buf[4] = mac[1] >> 24; ++ buf[5] = mac[1] >> 16; ++ ++ return 0; ++ ++err: ++ printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR); ++ return 1; ++} ++ ++/* Platform dependent initialisation. */ ++int misc_init_r(void) ++{ ++ int i; ++ u_int8_t i2cbuf; ++ u_int8_t env_enetaddr[6], eeprom_enetaddr[6]; ++ char *tmp = getenv("ethaddr"); ++ char *end; ++ int clk; ++ ++ /* EMIF-A CS3 configuration for FPGA. */ ++ REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + -+ printf ("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2); -+ printf ("DDR Clock: %dMHz\n", (clk / 2)); ++ printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2); ++ printf("DDR Clock: %dMHz\n", (clk / 2)); + + /* Configure I2C switch (PCA9543) to enable channel 0. */ -+ tmp[0] = CFG_I2C_PCA9543_ENABLE_CH0; -+ if (i2c_write(CFG_I2C_PCA9543_ADDR, 0, CFG_I2C_PCA9543_ADDR_LEN, tmp, 1)) { -+ printf ("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR); ++ i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0; ++ if (i2c_write(CFG_I2C_PCA9543_ADDR, 0, ++ CFG_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) { ++ printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR); ++ return 1; + } + -+ /* Set Ethernet MAC address from EEPROM. -+ * We must read 8 bytes because data is stored in little-endian. */ -+ if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x05A8, CFG_I2C_EEPROM_ADDR_LEN, buf, 8)) { -+ printf ("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR); -+ } else { -+ tmp[0] = 0xff; -+ for (i = 0; i < 6; i++) -+ tmp[0] &= buf[i]; -+ -+ if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) { -+ sprintf ((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x", -+ buf[3], buf[2], buf[1], buf[0], -+ buf[7], buf[6]); -+ setenv ("ethaddr", (char *)&tmp[0]); ++ /* Read Ethernet MAC address from the U-Boot environment. */ ++ for (i = 0; i < 6; i++) { ++ env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; ++ if (tmp) ++ tmp = (*end) ? end+1 : end; ++ } ++ ++ /* Read Ethernet MAC address from EEPROM. */ ++ if (read_mac_address(eeprom_enetaddr) == 0) { ++ if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && ++ memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) { ++ printf("\nWarning: MAC addresses don't match:\n"); ++ printf("\tHW MAC address: " ++ "%02X:%02X:%02X:%02X:%02X:%02X\n", ++ eeprom_enetaddr[0], eeprom_enetaddr[1], ++ eeprom_enetaddr[2], eeprom_enetaddr[3], ++ eeprom_enetaddr[4], eeprom_enetaddr[5]); ++ printf("\t\"ethaddr\" value: " ++ "%02X:%02X:%02X:%02X:%02X:%02X\n", ++ env_enetaddr[0], env_enetaddr[1], ++ env_enetaddr[2], env_enetaddr[3], ++ env_enetaddr[4], env_enetaddr[5]) ; ++ debug("### Set MAC addr from environment\n"); ++ memcpy(eeprom_enetaddr, env_enetaddr, 6); ++ } ++ if (!tmp) { ++ char ethaddr[20]; ++ ++ sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", ++ eeprom_enetaddr[0], eeprom_enetaddr[1], ++ eeprom_enetaddr[2], eeprom_enetaddr[3], ++ eeprom_enetaddr[4], eeprom_enetaddr[5]) ; ++ debug("### Set environment from HW MAC addr = \"%s\"\n", ++ ethaddr); ++ setenv("ethaddr", ethaddr); + } + } + + if (!eth_hw_init()) { -+ printf ("Ethernet init failed\n"); ++ printf("Ethernet init failed\n"); + } else { -+ printf ("ETH PHY: %s\n", phy.name); ++ printf("ETH PHY: %s\n", phy.name); + } -+ ++ ++ /* On this platform, U-Boot is copied in RAM by the UBL, ++ * so we are always in the relocated state. */ ++ gd->flags |= GD_FLG_RELOC; ++ + return(0); +} + @@ -540,13 +665,16 @@ index aaf2ea2..b347857 100644 # undef machine_arch_type diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h new file mode 100644 -index 0000000..a9b480b +index 0000000..897e9e5 --- /dev/null +++ b/include/configs/davinci_sffsdr.h -@@ -0,0 +1,171 @@ +@@ -0,0 +1,148 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn + * ++ * Copyright (C) 2008 Lyrtech ++ * Copyright (C) 2008 Philip Balister, OpenSDR ++ * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of @@ -567,30 +695,22 @@ index 0000000..a9b480b +#define __CONFIG_H +#include + -+/*=======*/ +/* Board */ -+/*=======*/ +#define SFFSDR +#define CFG_NAND_LARGEPAGE +#define CFG_USE_NAND -+/*===================*/ +/* SoC Configuration */ -+/*===================*/ +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ +#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ +#define CFG_HZ 1000 -+/*==================================================*/ -+/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ -+/*==================================================*/ ++/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ +#define CFG_I2C_EEPROM_ADDR_LEN 2 +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_EEPROM_PAGE_WRITE_BITS 5 +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 -+/*=============*/ +/* Memory Info */ -+/*=============*/ +#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define CFG_MEMTEST_START 0x80000000 /* memtest start address */ @@ -600,9 +720,7 @@ index 0000000..a9b480b +#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ +#define DDR_4BANKS /* 4-bank DDR2 (128MB) */ -+/*====================*/ +/* Serial Driver info */ -+/*====================*/ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ @@ -611,16 +729,12 @@ index 0000000..a9b480b +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -+/*===================*/ +/* I2C Configuration */ -+/*===================*/ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ +#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ -+/*==================================*/ +/* Network & Ethernet Configuration */ -+/*==================================*/ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT @@ -629,9 +743,7 @@ index 0000000..a9b480b +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_OVERWRITE_ETHADDR_ONCE -+/*=====================*/ +/* Flash & Environment */ -+/*=====================*/ +#undef CFG_ENV_IS_IN_FLASH +#define CFG_NO_FLASH +#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ @@ -644,54 +756,46 @@ index 0000000..a9b480b +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -+/*=====================*/ -+/* Board related stuff */ -+/*=====================*/ -+/*==========================================*/ -+/* I2C switch definitions for PCA9543 chip */ -+/* on Lyrtech SFF SDR board. */ -+/*==========================================*/ ++/* I2C switch definitions for PCA9543 chip */ +#define CFG_I2C_PCA9543_ADDR 0x70 -+#define CFG_I2C_PCA9543_ADDR_LEN 0 /* This chip has a single register. */ ++#define CFG_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ +#define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */ -+/*==============================*/ +/* U-Boot general configuration */ -+/*==============================*/ -+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ ++#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#define CONFIG_MISC_INIT_R -+#undef CONFIG_BOOTDELAY ++#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds. */ +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ -+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */ ++#define CFG_PBSIZE \ ++ (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print buffer size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ -+#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ ++#define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel ++ * load address. */ +#define CONFIG_VERSION_VARIABLE -+#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ ++#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, ++ * may be later */ +#define CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CFG_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC -+/* -+ * Define this to load an Integrity kernel. -+ * -+#define CONFIG_CMD_ELF -+ */ -+ -+/*===================*/ +/* Linux Information */ -+/*===================*/ +#define LINUX_BOOT_PARAM_ADDR 0x80000100 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS -+#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" -+#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" -+/*=================*/ ++#define CONFIG_BOOTARGS \ ++ "mem=56M " \ ++ "console=ttyS0,115200n8 " \ ++ "root=/dev/nfs rw noinitrd ip=dhcp " \ ++ "nfsroot=${serverip}:/nfsroot/sffsdr " \ ++ "nwhwconf=device:eth0,hwaddr:${ethaddr}" ++#define CONFIG_BOOTCOMMAND \ ++ "nand read 87A00000 100000 300000;" \ ++ "bootelf 87A00000" +/* U-Boot commands */ -+/*=================*/ +#include +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP @@ -707,12 +811,20 @@ index 0000000..a9b480b +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS -+/*=======================*/ +/* KGDB support (if any) */ -+/*=======================*/ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif +#endif /* __CONFIG_H */ +------------------------------------------------------------------------- +Check out the new SourceForge.net Marketplace. +It's the best place to buy or sell services for +just about anything Open Source. +http://sourceforge.net/services/buy/index.php +_______________________________________________ +U-Boot-Users mailing list +U-Boot-Users@lists.sourceforge.net +https://lists.sourceforge.net/lists/listinfo/u-boot-users + -- cgit v1.2.3