From 79feff84d18b7b834da765114a892650eb720b77 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Tue, 23 Oct 2007 13:11:51 +0000 Subject: linux-rp: merge .23 and .23+git from poky --- .../linux-rp-2.6.23+2.6.24-rc0+git/.mtn2git_empty | 0 .../arm_pxa_20070923.patch | 5877 ++++ .../binutils-buildid-arm.patch | 16 + .../connectplus-remove-ide-HACK.patch | 12 + .../linux-rp-2.6.23+2.6.24-rc0+git/defconfig-akita | 1678 + .../defconfig-bootcdx86 | 1607 + .../linux-rp-2.6.23+2.6.24-rc0+git/defconfig-c7x0 | 1695 + .../defconfig-collie | 1741 + .../defconfig-htcuniversal | 1281 + .../defconfig-hx2000 | 1168 + .../defconfig-poodle | 1659 + .../defconfig-qemuarm | 1194 + .../defconfig-qemux86 | 1568 + .../linux-rp-2.6.23+2.6.24-rc0+git/defconfig-spitz | 1690 + .../linux-rp-2.6.23+2.6.24-rc0+git/defconfig-tosa | 1614 + .../defconfig-zylonite | 1457 + .../hostap-monitor-mode.patch | 209 + .../htcuni-acx.patch | 33526 +++++++++++++++++++ .../linux-rp-2.6.23+2.6.24-rc0+git/htcuni.patch | 8044 +++++ .../mmcsd_no_scr_check-r2.patch | 29 + .../linux-rp-2.6.23+2.6.24-rc0+git/pda-power.patch | 3373 ++ .../pxa-serial-hack.patch | 90 + .../pxa_fb_overlay.patch | 26 + ...t-for-non-standard-xtals-to-16c950-driver.patch | 155 + .../squashfs3.0-2.6.15.patch | 4189 +++ .../uvesafb-0.1-rc3-2.6.22.patch | 2590 ++ .../vt_ioctl_race.patch | 46 + .../w100fb-unused-var.patch | 17 + .../wm97xx-lcdnoise-r0.patch | 208 + .../zylonite-boot.patch | 45 + packages/linux/linux-rp-2.6.23/.mtn2git_empty | 0 .../linux/linux-rp-2.6.23/arm_pxa_20070923.patch | 5877 ++++ .../linux-rp-2.6.23/binutils-buildid-arm.patch | 16 + .../connectplus-remove-ide-HACK.patch | 12 + packages/linux/linux-rp-2.6.23/defconfig-akita | 1678 + packages/linux/linux-rp-2.6.23/defconfig-bootcdx86 | 1607 + packages/linux/linux-rp-2.6.23/defconfig-c7x0 | 1695 + packages/linux/linux-rp-2.6.23/defconfig-collie | 1741 + .../linux/linux-rp-2.6.23/defconfig-htcuniversal | 1281 + packages/linux/linux-rp-2.6.23/defconfig-hx2000 | 1168 + packages/linux/linux-rp-2.6.23/defconfig-poodle | 1659 + packages/linux/linux-rp-2.6.23/defconfig-qemuarm | 1194 + packages/linux/linux-rp-2.6.23/defconfig-qemux86 | 1568 + packages/linux/linux-rp-2.6.23/defconfig-spitz | 1690 + packages/linux/linux-rp-2.6.23/defconfig-tosa | 1614 + packages/linux/linux-rp-2.6.23/defconfig-zylonite | 1457 + .../linux-rp-2.6.23/hostap-monitor-mode.patch | 209 + packages/linux/linux-rp-2.6.23/htcuni-acx.patch | 33526 +++++++++++++++++++ packages/linux/linux-rp-2.6.23/htcuni.patch | 8044 +++++ .../linux-rp-2.6.23/mmcsd_no_scr_check-r2.patch | 29 + packages/linux/linux-rp-2.6.23/pda-power.patch | 3373 ++ .../linux/linux-rp-2.6.23/pxa-serial-hack.patch | 90 + .../linux/linux-rp-2.6.23/pxa_fb_overlay.patch | 26 + ...t-for-non-standard-xtals-to-16c950-driver.patch | 155 + .../linux/linux-rp-2.6.23/squashfs3.0-2.6.15.patch | 4189 +++ .../linux-rp-2.6.23/uvesafb-0.1-rc3-2.6.22.patch | 2590 ++ packages/linux/linux-rp-2.6.23/vt_ioctl_race.patch | 46 + .../linux/linux-rp-2.6.23/w100fb-unused-var.patch | 17 + .../linux/linux-rp-2.6.23/wm97xx-lcdnoise-r0.patch | 208 + packages/linux/linux-rp-2.6.23/zylonite-boot.patch | 45 + packages/linux/linux-rp_2.6.23+2.6.24-rc0+git.bb | 128 + packages/linux/linux-rp_2.6.23.bb | 129 + 62 files changed, 153865 insertions(+) create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/.mtn2git_empty create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/arm_pxa_20070923.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/binutils-buildid-arm.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/connectplus-remove-ide-HACK.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-akita create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-bootcdx86 create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-c7x0 create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-collie create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-htcuniversal create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-hx2000 create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-poodle create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-qemuarm create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-qemux86 create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-spitz create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-tosa create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/defconfig-zylonite create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/hostap-monitor-mode.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/htcuni-acx.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/htcuni.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/mmcsd_no_scr_check-r2.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/pda-power.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/pxa-serial-hack.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/pxa_fb_overlay.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/serial-add-support-for-non-standard-xtals-to-16c950-driver.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/squashfs3.0-2.6.15.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/uvesafb-0.1-rc3-2.6.22.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/vt_ioctl_race.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/w100fb-unused-var.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/wm97xx-lcdnoise-r0.patch create mode 100644 packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/zylonite-boot.patch create mode 100644 packages/linux/linux-rp-2.6.23/.mtn2git_empty create mode 100644 packages/linux/linux-rp-2.6.23/arm_pxa_20070923.patch create mode 100644 packages/linux/linux-rp-2.6.23/binutils-buildid-arm.patch create mode 100644 packages/linux/linux-rp-2.6.23/connectplus-remove-ide-HACK.patch create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-akita create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-bootcdx86 create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-c7x0 create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-collie create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-htcuniversal create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-hx2000 create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-poodle create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-qemuarm create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-qemux86 create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-spitz create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-tosa create mode 100644 packages/linux/linux-rp-2.6.23/defconfig-zylonite create mode 100644 packages/linux/linux-rp-2.6.23/hostap-monitor-mode.patch create mode 100644 packages/linux/linux-rp-2.6.23/htcuni-acx.patch create mode 100644 packages/linux/linux-rp-2.6.23/htcuni.patch create mode 100644 packages/linux/linux-rp-2.6.23/mmcsd_no_scr_check-r2.patch create mode 100644 packages/linux/linux-rp-2.6.23/pda-power.patch create mode 100644 packages/linux/linux-rp-2.6.23/pxa-serial-hack.patch create mode 100644 packages/linux/linux-rp-2.6.23/pxa_fb_overlay.patch create mode 100644 packages/linux/linux-rp-2.6.23/serial-add-support-for-non-standard-xtals-to-16c950-driver.patch create mode 100644 packages/linux/linux-rp-2.6.23/squashfs3.0-2.6.15.patch create mode 100644 packages/linux/linux-rp-2.6.23/uvesafb-0.1-rc3-2.6.22.patch create mode 100644 packages/linux/linux-rp-2.6.23/vt_ioctl_race.patch create mode 100644 packages/linux/linux-rp-2.6.23/w100fb-unused-var.patch create mode 100644 packages/linux/linux-rp-2.6.23/wm97xx-lcdnoise-r0.patch create mode 100644 packages/linux/linux-rp-2.6.23/zylonite-boot.patch create mode 100644 packages/linux/linux-rp_2.6.23+2.6.24-rc0+git.bb create mode 100644 packages/linux/linux-rp_2.6.23.bb (limited to 'packages/linux') diff --git a/packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/.mtn2git_empty b/packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 diff --git a/packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/arm_pxa_20070923.patch b/packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/arm_pxa_20070923.patch new file mode 100644 index 0000000000..ad4ce996df --- /dev/null +++ b/packages/linux/linux-rp-2.6.23+2.6.24-rc0+git/arm_pxa_20070923.patch @@ -0,0 +1,5877 @@ +# Base git commit: da8f153e51290e7438ba7da66234a864e5d3e1c1 +# (Revert "x86_64: Quicklist support for x86_64") +# +# Author: eric miao (Wed Sep 12 03:13:17 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:19 BST 2007) +# +# [ARM] pxa: PXA3xx base support +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# arch/arm/Kconfig | 6 +# arch/arm/boot/compressed/head-xscale.S | 4 +# arch/arm/mach-pxa/Kconfig | 30 + +# arch/arm/mach-pxa/Makefile | 9 +# arch/arm/mach-pxa/clock.c | 79 ++-- +# arch/arm/mach-pxa/clock.h | 43 ++ +# arch/arm/mach-pxa/devices.h | 3 +# arch/arm/mach-pxa/generic.c | 146 ++++--- +# arch/arm/mach-pxa/generic.h | 26 + +# arch/arm/mach-pxa/irq.c | 80 ---- +# arch/arm/mach-pxa/mfp.c | 235 ++++++++++++ +# arch/arm/mach-pxa/pxa25x.c | 90 ++++ +# arch/arm/mach-pxa/pxa27x.c | 127 ++++++ +# arch/arm/mach-pxa/pxa300.c | 93 +++++ +# arch/arm/mach-pxa/pxa320.c | 88 ++++ +# arch/arm/mach-pxa/pxa3xx.c | 216 +++++++++++ +# arch/arm/mach-pxa/time.c | 53 ++ +# arch/arm/mach-pxa/zylonite.c | 184 +++++++++ +# arch/arm/mach-pxa/zylonite_pxa300.c | 188 ++++++++++ +# arch/arm/mach-pxa/zylonite_pxa320.c | 173 +++++++++ +# arch/arm/mm/Kconfig | 4 +# drivers/i2c/busses/i2c-pxa.c | 45 +- +# drivers/input/keyboard/pxa27x_keyboard.c | 25 + +# drivers/mmc/host/pxamci.c | 43 +- +# drivers/mmc/host/pxamci.h | 14 +# drivers/mtd/maps/lubbock-flash.c | 9 +# drivers/mtd/maps/mainstone-flash.c | 5 +# drivers/net/irda/pxaficp_ir.c | 51 ++ +# drivers/net/smc91x.c | 62 --- +# drivers/net/smc91x.h | 71 +++ +# drivers/serial/pxa.c | 163 ++++---- +# drivers/serial/serial_core.c | 18 +# drivers/usb/gadget/pxa2xx_udc.c | 68 ++- +# drivers/usb/gadget/pxa2xx_udc.h | 1 +# drivers/video/pxafb.c | 36 + +# drivers/video/pxafb.h | 1 +# include/asm-arm/arch-pxa/hardware.h | 72 +++ +# include/asm-arm/arch-pxa/irqs.h | 6 +# include/asm-arm/arch-pxa/mfp-pxa300.h | 574 ++++++++++++++++++++++++++++++ +# include/asm-arm/arch-pxa/mfp-pxa320.h | 446 ++++++++++++++++++++++++ +# include/asm-arm/arch-pxa/mfp.h | 576 +++++++++++++++++++++++++++++++ +# include/asm-arm/arch-pxa/pxa-regs.h | 2 +# include/asm-arm/arch-pxa/pxa3xx-regs.h | 75 ++++ +# include/asm-arm/arch-pxa/timex.h | 2 +# include/asm-arm/arch-pxa/zylonite.h | 35 + +# 45 files changed, 3825 insertions(+), 452 deletions(-) +# create mode 100644 arch/arm/mach-pxa/mfp.c +# create mode 100644 arch/arm/mach-pxa/pxa300.c +# create mode 100644 arch/arm/mach-pxa/pxa320.c +# create mode 100644 arch/arm/mach-pxa/pxa3xx.c +# create mode 100644 arch/arm/mach-pxa/zylonite.c +# create mode 100644 arch/arm/mach-pxa/zylonite_pxa300.c +# create mode 100644 arch/arm/mach-pxa/zylonite_pxa320.c +# create mode 100644 include/asm-arm/arch-pxa/mfp-pxa300.h +# create mode 100644 include/asm-arm/arch-pxa/mfp-pxa320.h +# create mode 100644 include/asm-arm/arch-pxa/mfp.h +# create mode 100644 include/asm-arm/arch-pxa/pxa3xx-regs.h +# create mode 100644 include/asm-arm/arch-pxa/zylonite.h +# +# Author: Russell King (Sat Sep 1 21:27:18 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:17 BST 2007) +# +# [NET] smc91x: fix PXA DMA support code +# +# The PXA DMA support code for smc91x doesn't pass a struct device to +# the dma_*map_single() functions, which leads to an oops in the dma +# bounce code. We have a struct device which was used to probe the +# SMC chip. Use it. +# +# (This patch is slightly larger because it requires struct smc_local +# to move into the header file.) +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sat Sep 1 21:25:09 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:12 BST 2007) +# +# [SERIAL] Fix console initialisation ordering +# +# Ensure pm callback is called upon initialisation to place port in +# correct power saving state. Ensure console is initialised prior +# to deciding whether to power down the port. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Wed Sep 19 09:21:51 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:07 BST 2007) +# +# [ARM] pxa: tidy up arch/arm/mach-pxa/Makefile +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sat Sep 1 21:28:55 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:03 BST 2007) +# +# [ARM] lubbock, mainstone: only initialise if running on that platform +# +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Aug 29 10:22:17 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:01 BST 2007) +# +# [ARM] 4560/1: pxa: move processor specific set_wake logic out of irq.c +# +# a function pxa_init_irq_set_wake() was introduced, so that +# processor specific code could install their own version +# +# code setting PFER and PRER registers within pxa_gpio_irq_type +# are removed, and the edge configuration is postponed to the +# (*set_wake) and copies the GRER and GFER register, which will +# always be set up correctly by pxa_gpio_irq_type() +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Aug 29 10:18:47 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:59 BST 2007) +# +# [ARM] 4559/1: pxa: make PXA_LAST_GPIO a run-time variable +# +# This definition produces processor specific code in generic function +# pxa_gpio_mode(), thus creating inconsistencies for support of pxa25x +# and pxa27x in a single zImage. +# +# As David Brownell suggests, make it a run-time variable and initialize +# at run-time according to the number of GPIOs on the processor. For now +# the initialization happens in pxa_init_irq_gpio(), since there is +# already a parameter for that, besides, this is and MUST be earlier +# than any subsequent calls to pxa_gpio_mode(). +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Aug 29 10:15:41 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:57 BST 2007) +# +# [ARM] 4558/1: pxa: remove MACH_TYPE_LUBBOCK assignment and leave it to boot loader +# +# since both u-boot and blob support passing MACH_TYPE_LUBBOCK to the +# kernel, it should be quite safe to remove this +# +# Signed-off-by: eric miao +# Acked-by: Nicolas Pitre +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Sep 12 03:13:17 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:55 BST 2007) +# +# [ARM] pxa: add PXA3 cpu_is_xxx() macros +# +# Extracted from patch by Eric Miao, this adds the cpu_is_xxx() macros +# for identifying PXA3 SoCs. +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# +# Author: Russell King (Wed Sep 19 09:38:32 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:51 BST 2007) +# +# [ARM] pxa: Make CPU_XSCALE depend on PXA25x or PXA27x +# +# PXA3 SoCs are supported by the Xscale3 CPU code rather than the +# Xscale CPU code. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Wed Sep 19 09:33:55 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:48 BST 2007) +# +# [ARM] pxa: mark pxa_set_cken deprecated +# +# Allow the generic clock support code to fiddle with the CKEN register +# and mark pxa_set_cken() deprecated. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:34:37 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:43 BST 2007) +# +# [ARM] pxa: remove get_lcdclk_frequency_10khz() +# +# get_lcdclk_frequency_10khz() is now redundant, remove it. Hide +# pxa27x_get_lcdclk_frequency_10khz() from public view. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sun Sep 2 17:09:23 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:39 BST 2007) +# +# [ARM] pxa: update pxa irda driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sun Sep 2 17:08:42 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:36 BST 2007) +# +# [ARM] pxa: Make STUART and FICP clocks available +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:33:35 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:34 BST 2007) +# +# [ARM] pxa: update PXA UDC driver to use clk support +# +# Note: this produces a WARN() dump. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:28:15 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:31 BST 2007) +# +# [ARM] pxa: update pxa serial driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:20:03 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:27 BST 2007) +# +# [ARM] pxa: update PXA MMC interface driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:19:39 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:23 BST 2007) +# +# [ARM] pxa: update pxa27x keypad driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:19:10 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:19 BST 2007) +# +# [ARM] pxa: update pxa i2c driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:18:42 BST 2007) +# Committer: Russell King (Sun Sep 23 14:16:50 BST 2007) +# +# [ARM] pxa: update pxafb to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:18:02 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:09 BST 2007) +# +# [ARM] pxa: introduce clk support for PXA SoC clocks +# +# Signed-off-by: Russell King +# +# create mode 100644 arch/arm/mach-pxa/clock.h +# +# Author: Russell King (Mon Aug 20 10:09:18 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:09 BST 2007) +# +# [ARM] pxa: make pxa27x devices globally visible +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:07:44 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:08 BST 2007) +# +# [ARM] pxa: fix naming of memory/lcd/core clock functions +# +# Rename pxa25x and pxa27x memory/lcd/core clock functions, and +# select the correct version at run time. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 09:47:41 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:08 BST 2007) +# +# [ARM] pxa: convert PXA serial drivers to use platform resources +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sat Sep 1 21:12:50 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:07 BST 2007) +# +# [ARM] pxa: make pxa timer initialisation select clock rate at runtime +# +# Rather than using the compile-time constant CLOCK_TICK_RATE, select +# the clock tick rate at run time. We organise the selection so that +# PXA3 automatically falls out with the right tick rate. +# +# Signed-off-by: Russell King +# +# +# Author: Nicolas Pitre (Fri Aug 17 16:55:22 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:05 BST 2007) +# +# [ARM] 4550/1: sched_clock on PXA should cope with run time clock rate selection +# +# The previous implementation was relying on compile time optimizations +# based on a constant clock rate. However, support for different PXA +# flavors in the same kernel binary requires that the clock be selected at +# run time, so here it is. +# +# Let's move this code to a more appropriate location while at it. +# +# Signed-off-by: Nicolas Pitre +# Signed-off-by: Russell King +# +# +--- linux-2.6.23.orig/arch/arm/Kconfig ++++ linux-2.6.23/arch/arm/Kconfig +@@ -336,14 +336,14 @@ + This enables support for Philips PNX4008 mobile platform. + + config ARCH_PXA +- bool "PXA2xx-based" ++ bool "PXA2xx/PXA3xx-based" + depends on MMU + select ARCH_MTD_XIP + select GENERIC_GPIO + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + help +- Support for Intel's PXA2XX processor line. ++ Support for Intel/Marvell's PXA2xx/PXA3xx processor line. + + config ARCH_RPC + bool "RiscPC" +@@ -486,7 +486,7 @@ + config IWMMXT + bool "Enable iWMMXt support" + depends on CPU_XSCALE || CPU_XSC3 +- default y if PXA27x ++ default y if PXA27x || PXA3xx + help + Enable support for iWMMXt context switching at run time if + running on a CPU that supports it. +--- linux-2.6.23.orig/arch/arm/boot/compressed/head-xscale.S ++++ linux-2.6.23/arch/arm/boot/compressed/head-xscale.S +@@ -33,10 +33,6 @@ + bic r0, r0, #0x1000 @ clear Icache + mcr p15, 0, r0, c1, c0, 0 + +-#ifdef CONFIG_ARCH_LUBBOCK +- mov r7, #MACH_TYPE_LUBBOCK +-#endif +- + #ifdef CONFIG_ARCH_COTULLA_IDP + mov r7, #MACH_TYPE_COTULLA_IDP + #endif +--- linux-2.6.23.orig/arch/arm/mach-pxa/Kconfig ++++ linux-2.6.23/arch/arm/mach-pxa/Kconfig +@@ -1,6 +1,24 @@ + if ARCH_PXA + +-menu "Intel PXA2xx Implementations" ++menu "Intel PXA2xx/PXA3xx Implementations" ++ ++if PXA3xx ++ ++menu "Supported PXA3xx Processor Variants" ++ ++config CPU_PXA300 ++ bool "PXA300 (codename Monahans-L)" ++ ++config CPU_PXA310 ++ bool "PXA310 (codename Monahans-LV)" ++ select CPU_PXA300 ++ ++config CPU_PXA320 ++ bool "PXA320 (codename Monahans-P)" ++ ++endmenu ++ ++endif + + choice + prompt "Select target board" +@@ -41,6 +59,11 @@ + bool "CompuLab EM-x270 platform" + select PXA27x + ++ ++config MACH_ZYLONITE ++ bool "PXA3xx Development Platform" ++ select PXA3xx ++ + config MACH_HX2750 + bool "HP iPAQ hx2750" + select PXA27x +@@ -228,6 +251,11 @@ + help + Select code specific to PXA27x variants + ++config PXA3xx ++ bool ++ help ++ Select code specific to PXA3xx variants ++ + config PXA_SHARP_C7xx + bool + select PXA_SSP +--- linux-2.6.23.orig/arch/arm/mach-pxa/Makefile ++++ linux-2.6.23/arch/arm/mach-pxa/Makefile +@@ -6,6 +6,9 @@ + obj-y += clock.o generic.o irq.o dma.o time.o + obj-$(CONFIG_PXA25x) += pxa25x.o + obj-$(CONFIG_PXA27x) += pxa27x.o ++obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o ++obj-$(CONFIG_CPU_PXA300) += pxa300.o ++obj-$(CONFIG_CPU_PXA320) += pxa320.o + + # Specific board support + obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o +@@ -19,6 +22,12 @@ + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o sharpsl_pm.o poodle_pm.o + obj-$(CONFIG_MACH_TOSA) += tosa.o + obj-$(CONFIG_MACH_EM_X270) += em-x270.o ++ifeq ($(CONFIG_MACH_ZYLONITE),y) ++ obj-y += zylonite.o ++ obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o ++ obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o ++endif ++ + obj-$(CONFIG_MACH_HX2750) += hx2750.o hx2750_test.o + obj-$(CONFIG_MACH_HTCUNIVERSAL) += htcuniversal/ + +--- linux-2.6.23.orig/arch/arm/mach-pxa/clock.c ++++ linux-2.6.23/arch/arm/mach-pxa/clock.c +@@ -9,19 +9,15 @@ + #include + #include + #include ++#include ++#include + + #include + #include + +-struct clk { +- struct list_head node; +- unsigned long rate; +- struct module *owner; +- const char *name; +- unsigned int enabled; +- void (*enable)(void); +- void (*disable)(void); +-}; ++#include "devices.h" ++#include "generic.h" ++#include "clock.h" + + static LIST_HEAD(clocks); + static DEFINE_MUTEX(clocks_mutex); +@@ -33,7 +29,8 @@ + + mutex_lock(&clocks_mutex); + list_for_each_entry(p, &clocks, node) { +- if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { ++ if (strcmp(id, p->name) == 0 && ++ (p->dev == NULL || p->dev == dev)) { + clk = p; + break; + } +@@ -46,7 +43,6 @@ + + void clk_put(struct clk *clk) + { +- module_put(clk->owner); + } + EXPORT_SYMBOL(clk_put); + +@@ -56,8 +52,12 @@ + + spin_lock_irqsave(&clocks_lock, flags); + if (clk->enabled++ == 0) +- clk->enable(); ++ clk->ops->enable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); ++ ++ if (clk->delay) ++ udelay(clk->delay); ++ + return 0; + } + EXPORT_SYMBOL(clk_enable); +@@ -70,54 +70,75 @@ + + spin_lock_irqsave(&clocks_lock, flags); + if (--clk->enabled == 0) +- clk->disable(); ++ clk->ops->disable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); + } + EXPORT_SYMBOL(clk_disable); + + unsigned long clk_get_rate(struct clk *clk) + { +- return clk->rate; ++ unsigned long rate; ++ ++ rate = clk->rate; ++ if (clk->ops->getrate) ++ rate = clk->ops->getrate(clk); ++ ++ return rate; + } + EXPORT_SYMBOL(clk_get_rate); + + +-static void clk_gpio27_enable(void) ++static void clk_gpio27_enable(struct clk *clk) + { + pxa_gpio_mode(GPIO11_3_6MHz_MD); + } + +-static void clk_gpio27_disable(void) ++static void clk_gpio27_disable(struct clk *clk) + { + } + +-static struct clk clk_gpio27 = { +- .name = "GPIO27_CLK", +- .rate = 3686400, ++static const struct clkops clk_gpio27_ops = { + .enable = clk_gpio27_enable, + .disable = clk_gpio27_disable, + }; + +-int clk_register(struct clk *clk) ++ ++void clk_cken_enable(struct clk *clk) + { +- mutex_lock(&clocks_mutex); +- list_add(&clk->node, &clocks); +- mutex_unlock(&clocks_mutex); +- return 0; ++ CKEN |= 1 << clk->cken; + } +-EXPORT_SYMBOL(clk_register); + +-void clk_unregister(struct clk *clk) ++void clk_cken_disable(struct clk *clk) + { ++ CKEN &= ~(1 << clk->cken); ++} ++ ++const struct clkops clk_cken_ops = { ++ .enable = clk_cken_enable, ++ .disable = clk_cken_disable, ++}; ++ ++static struct clk common_clks[] = { ++ { ++ .name = "GPIO27_CLK", ++ .ops = &clk_gpio27_ops, ++ .rate = 3686400, ++ }, ++}; ++ ++void clks_register(struct clk *clks, size_t num) ++{ ++ int i; ++ + mutex_lock(&clocks_mutex); +- list_del(&clk->node); ++ for (i = 0; i < num; i++) ++ list_add(&clks[i].node, &clocks); + mutex_unlock(&clocks_mutex); + } +-EXPORT_SYMBOL(clk_unregister); + + static int __init clk_init(void) + { +- clk_register(&clk_gpio27); ++ clks_register(common_clks, ARRAY_SIZE(common_clks)); + return 0; + } + arch_initcall(clk_init); +--- /dev/null ++++ linux-2.6.23/arch/arm/mach-pxa/clock.h +@@ -0,0 +1,43 @@ ++struct clk; ++ ++struct clkops { ++ void (*enable)(struct clk *); ++ void (*disable)(struct clk *); ++ unsigned long (*getrate)(struct clk *); ++}; ++ ++struct clk { ++ struct list_head node; ++ const char *name; ++ struct device *dev; ++ const struct clkops *ops; ++ unsigned long rate; ++ unsigned int cken; ++ unsigned int delay; ++ unsigned int enabled; ++}; ++ ++#define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ ++ { \ ++ .name = _name, \ ++ .dev = _dev, \ ++ .ops = &clk_cken_ops, \ ++ .rate = _rate, \ ++ .cken = CKEN_##_cken, \ ++ .delay = _delay, \ ++ } ++ ++#define INIT_CK(_name, _cken, _ops, _dev) \ ++ { \ ++ .name = _name, \ ++ .dev = _dev, \ ++ .ops = _ops, \ ++ .cken = CKEN_##_cken, \ ++ } ++ ++extern const struct clkops clk_cken_ops; ++ ++void clk_cken_enable(struct clk *clk); ++void clk_cken_disable(struct clk *clk); ++ ++void clks_register(struct clk *clks, size_t num); +--- linux-2.6.23.orig/arch/arm/mach-pxa/devices.h ++++ linux-2.6.23/arch/arm/mach-pxa/devices.h +@@ -9,3 +9,6 @@ + extern struct platform_device pxa_device_i2s; + extern struct platform_device pxa_device_ficp; + extern struct platform_device pxa_device_rtc; ++ ++extern struct platform_device pxa27x_device_i2c_power; ++extern struct platform_device pxa27x_device_ohci; +--- linux-2.6.23.orig/arch/arm/mach-pxa/generic.c ++++ linux-2.6.23/arch/arm/mach-pxa/generic.c +@@ -25,10 +25,6 @@ + #include + #include + +-#include +-#include +-#include +- + #include + #include + #include +@@ -48,66 +44,39 @@ + #include "generic.h" + + /* +- * This is the PXA2xx sched_clock implementation. This has a resolution +- * of at least 308ns and a maximum value that depends on the value of +- * CLOCK_TICK_RATE. +- * +- * The return value is guaranteed to be monotonic in that range as +- * long as there is always less than 582 seconds between successive +- * calls to this function. ++ * Get the clock frequency as reflected by CCCR and the turbo flag. ++ * We assume these values have been applied via a fcs. ++ * If info is not 0 we also display the current settings. + */ +-unsigned long long sched_clock(void) ++unsigned int get_clk_frequency_khz(int info) + { +- unsigned long long v = cnt32_to_63(OSCR); +- /* Note: top bit ov v needs cleared unless multiplier is even. */ +- +-#if CLOCK_TICK_RATE == 3686400 +- /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */ +- /* The <<1 is used to get rid of tick.hi top bit */ +- v *= 78125<<1; +- do_div(v, 288<<1); +-#elif CLOCK_TICK_RATE == 3250000 +- /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */ +- v *= 4000; +- do_div(v, 13); +-#elif CLOCK_TICK_RATE == 3249600 +- /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */ +- v *= 625000; +- do_div(v, 2031); +-#else +-#warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE" +- /* +- * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for +- * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand +- * years range and truncation to unsigned long long limits it to +- * sched_clock's max range of ~584 years. This is nice but with +- * higher computation cost. +- */ +- { +- union { +- unsigned long long val; +- struct { unsigned long lo, hi; }; +- } x; +- unsigned long long y; +- +- x.val = v; +- x.hi &= 0x7fffffff; +- y = (unsigned long long)x.lo * NSEC_PER_SEC; +- x.lo = y; +- y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC; +- x.hi = do_div(y, CLOCK_TICK_RATE); +- do_div(x.val, CLOCK_TICK_RATE); +- x.hi += y; +- v = x.val; +- } +-#endif ++ if (cpu_is_pxa21x() || cpu_is_pxa25x()) ++ return pxa25x_get_clk_frequency_khz(info); ++ else if (cpu_is_pxa27x()) ++ return pxa27x_get_clk_frequency_khz(info); ++ else ++ return pxa3xx_get_clk_frequency_khz(info); ++} ++EXPORT_SYMBOL(get_clk_frequency_khz); + +- return v; ++/* ++ * Return the current memory clock frequency in units of 10kHz ++ */ ++unsigned int get_memclk_frequency_10khz(void) ++{ ++ if (cpu_is_pxa21x() || cpu_is_pxa25x()) ++ return pxa25x_get_memclk_frequency_10khz(); ++ else if (cpu_is_pxa27x()) ++ return pxa27x_get_memclk_frequency_10khz(); ++ else ++ return pxa3xx_get_memclk_frequency_10khz(); + } ++EXPORT_SYMBOL(get_memclk_frequency_10khz); + + /* + * Handy function to set GPIO alternate functions + */ ++int pxa_last_gpio; + + int pxa_gpio_mode(int gpio_mode) + { +@@ -116,7 +85,7 @@ + int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; + int gafr; + +- if (gpio > PXA_LAST_GPIO) ++ if (gpio > pxa_last_gpio) + return -EINVAL; + + local_irq_save(flags); +@@ -160,7 +129,7 @@ + /* + * Routine to safely enable or disable a clock in the CKEN + */ +-void pxa_set_cken(int clock, int enable) ++void __pxa_set_cken(int clock, int enable) + { + unsigned long flags; + local_irq_save(flags); +@@ -173,7 +142,7 @@ + local_irq_restore(flags); + } + +-EXPORT_SYMBOL(pxa_set_cken); ++EXPORT_SYMBOL(__pxa_set_cken); + + /* + * Intel PXA2xx internal register mapping. +@@ -330,21 +299,80 @@ + pxa_device_fb.dev.parent = parent_dev; + } + ++static struct resource pxa_resource_ffuart[] = { ++ { ++ .start = __PREG(FFUART), ++ .end = __PREG(FFUART) + 35, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_FFUART, ++ .end = IRQ_FFUART, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ + struct platform_device pxa_device_ffuart= { + .name = "pxa2xx-uart", + .id = 0, ++ .resource = pxa_resource_ffuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_ffuart), ++}; ++ ++static struct resource pxa_resource_btuart[] = { ++ { ++ .start = __PREG(BTUART), ++ .end = __PREG(BTUART) + 35, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_BTUART, ++ .end = IRQ_BTUART, ++ .flags = IORESOURCE_IRQ, ++ } + }; ++ + struct platform_device pxa_device_btuart = { + .name = "pxa2xx-uart", + .id = 1, ++ .resource = pxa_resource_btuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_btuart), + }; ++ ++static struct resource pxa_resource_stuart[] = { ++ { ++ .start = __PREG(STUART), ++ .end = __PREG(STUART) + 35, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_STUART, ++ .end = IRQ_STUART, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ + struct platform_device pxa_device_stuart = { + .name = "pxa2xx-uart", + .id = 2, ++ .resource = pxa_resource_stuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_stuart), ++}; ++ ++static struct resource pxa_resource_hwuart[] = { ++ { ++ .start = __PREG(HWUART), ++ .end = __PREG(HWUART) + 47, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_HWUART, ++ .end = IRQ_HWUART, ++ .flags = IORESOURCE_IRQ, ++ } + }; ++ + struct platform_device pxa_device_hwuart = { + .name = "pxa2xx-uart", + .id = 3, ++ .resource = pxa_resource_hwuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_hwuart), + }; + + void __init pxa_set_ffuart_info(struct platform_pxa_serial_funcs *info) +--- linux-2.6.23.orig/arch/arm/mach-pxa/generic.h ++++ linux-2.6.23/arch/arm/mach-pxa/generic.h +@@ -15,14 +15,40 @@ + extern void __init pxa_init_irq_low(void); + extern void __init pxa_init_irq_high(void); + extern void __init pxa_init_irq_gpio(int gpio_nr); ++extern void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int)); + extern void __init pxa25x_init_irq(void); + extern void __init pxa27x_init_irq(void); ++extern void __init pxa3xx_init_irq(void); + extern void __init pxa_map_io(void); + + extern unsigned int get_clk_frequency_khz(int info); ++extern int pxa_last_gpio; + + #define SET_BANK(__nr,__start,__size) \ + mi->bank[__nr].start = (__start), \ + mi->bank[__nr].size = (__size), \ + mi->bank[__nr].node = (((unsigned)(__start) - PHYS_OFFSET) >> 27) + ++#ifdef CONFIG_PXA25x ++extern unsigned pxa25x_get_clk_frequency_khz(int); ++extern unsigned pxa25x_get_memclk_frequency_10khz(void); ++#else ++#define pxa25x_get_clk_frequency_khz(x) (0) ++#define pxa25x_get_memclk_frequency_10khz() (0) ++#endif ++ ++#ifdef CONFIG_PXA27x ++extern unsigned pxa27x_get_clk_frequency_khz(int); ++extern unsigned pxa27x_get_memclk_frequency_10khz(void); ++#else ++#define pxa27x_get_clk_frequency_khz(x) (0) ++#define pxa27x_get_memclk_frequency_10khz() (0) ++#endif ++ ++#ifdef CONFIG_PXA3xx ++extern unsigned pxa3xx_get_clk_frequency_khz(int); ++extern unsigned pxa3xx_get_memclk_frequency_10khz(void); ++#else ++#define pxa3xx_get_clk_frequency_khz(x) (0) ++#define pxa3xx_get_memclk_frequency_10khz() (0) ++#endif +--- linux-2.6.23.orig/arch/arm/mach-pxa/irq.c ++++ linux-2.6.23/arch/arm/mach-pxa/irq.c +@@ -38,33 +38,11 @@ + ICMR |= (1 << irq); + } + +-static int pxa_set_wake(unsigned int irq, unsigned int on) +-{ +- u32 mask; +- +- switch (irq) { +- case IRQ_RTCAlrm: +- mask = PWER_RTC; +- break; +-#ifdef CONFIG_PXA27x +- /* REVISIT can handle USBH1, USBH2, USB, MSL, USIM, ... */ +-#endif +- default: +- return -EINVAL; +- } +- if (on) +- PWER |= mask; +- else +- PWER &= ~mask; +- return 0; +-} +- + static struct irq_chip pxa_internal_chip_low = { + .name = "SC", + .ack = pxa_mask_low_irq, + .mask = pxa_mask_low_irq, + .unmask = pxa_unmask_low_irq, +- .set_wake = pxa_set_wake, + }; + + void __init pxa_init_irq_low(void) +@@ -87,7 +65,7 @@ + } + } + +-#ifdef CONFIG_PXA27x ++#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) + + /* + * This is for the second set of internal IRQs as found on the PXA27x. +@@ -125,26 +103,6 @@ + } + #endif + +-/* Note that if an input/irq line ever gets changed to an output during +- * suspend, the relevant PWER, PRER, and PFER bits should be cleared. +- */ +-#ifdef CONFIG_PXA27x +- +-/* PXA27x: Various gpios can issue wakeup events. This logic only +- * handles the simple cases, not the WEMUX2 and WEMUX3 options +- */ +-#define PXA27x_GPIO_NOWAKE_MASK \ +- ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2)) +-#define WAKEMASK(gpio) \ +- (((gpio) <= 15) \ +- ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \ +- : ((gpio == 35) ? (1 << 24) : 0)) +-#else +- +-/* pxa 210, 250, 255, 26x: gpios 0..15 can issue wakeups */ +-#define WAKEMASK(gpio) (((gpio) <= 15) ? (1 << (gpio)) : 0) +-#endif +- + /* + * PXA GPIO edge detection for IRQs: + * IRQs are generated on Falling-Edge, Rising-Edge, or both. +@@ -158,11 +116,9 @@ + static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) + { + int gpio, idx; +- u32 mask; + + gpio = IRQ_TO_GPIO(irq); + idx = gpio >> 5; +- mask = WAKEMASK(gpio); + + if (type == IRQT_PROBE) { + /* Don't mess with enabled GPIOs using preconfigured edges or +@@ -182,19 +138,15 @@ + if (type & __IRQT_RISEDGE) { + /* printk("rising "); */ + __set_bit (gpio, GPIO_IRQ_rising_edge); +- PRER |= mask; + } else { + __clear_bit (gpio, GPIO_IRQ_rising_edge); +- PRER &= ~mask; + } + + if (type & __IRQT_FALEDGE) { + /* printk("falling "); */ + __set_bit (gpio, GPIO_IRQ_falling_edge); +- PFER |= mask; + } else { + __clear_bit (gpio, GPIO_IRQ_falling_edge); +- PFER &= ~mask; + } + + /* printk("edges\n"); */ +@@ -213,29 +165,12 @@ + GEDR0 = (1 << (irq - IRQ_GPIO0)); + } + +-static int pxa_set_gpio_wake(unsigned int irq, unsigned int on) +-{ +- int gpio = IRQ_TO_GPIO(irq); +- u32 mask = WAKEMASK(gpio); +- +- if (!mask) +- return -EINVAL; +- +- if (on) +- PWER |= mask; +- else +- PWER &= ~mask; +- return 0; +-} +- +- + static struct irq_chip pxa_low_gpio_chip = { + .name = "GPIO-l", + .ack = pxa_ack_low_gpio, + .mask = pxa_mask_low_irq, + .unmask = pxa_unmask_low_irq, + .set_type = pxa_gpio_irq_type, +- .set_wake = pxa_set_gpio_wake, + }; + + /* +@@ -342,13 +277,14 @@ + .mask = pxa_mask_muxed_gpio, + .unmask = pxa_unmask_muxed_gpio, + .set_type = pxa_gpio_irq_type, +- .set_wake = pxa_set_gpio_wake, + }; + + void __init pxa_init_irq_gpio(int gpio_nr) + { + int irq, i; + ++ pxa_last_gpio = gpio_nr - 1; ++ + /* clear all GPIO edge detects */ + for (i = 0; i < gpio_nr; i += 32) { + GFER(i) = 0; +@@ -375,3 +311,13 @@ + set_irq_chip(IRQ_GPIO_2_x, &pxa_internal_chip_low); + set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler); + } ++ ++void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int)) ++{ ++ pxa_internal_chip_low.set_wake = set_wake; ++#ifdef CONFIG_PXA27x ++ pxa_internal_chip_high.set_wake = set_wake; ++#endif ++ pxa_low_gpio_chip.set_wake = set_wake; ++ pxa_muxed_gpio_chip.set_wake = set_wake; ++} +--- /dev/null ++++ linux-2.6.23/arch/arm/mach-pxa/mfp.c +@@ -0,0 +1,235 @@ ++/* ++ * linux/arch/arm/mach-pxa/mfp.c ++ * ++ * PXA3xx Multi-Function Pin Support ++ * ++ * Copyright (C) 2007 Marvell Internation Ltd. ++ * ++ * 2007-08-21: eric miao ++ * initial version ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++/* mfp_spin_lock is used to ensure that MFP register configuration ++ * (most likely a read-modify-write operation) is atomic, and that ++ * mfp_table[] is consistent ++ */ ++static DEFINE_SPINLOCK(mfp_spin_lock); ++ ++static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE); ++static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX]; ++ ++#define mfpr_readl(off) \ ++ __raw_readl(mfpr_mmio_base + (off)) ++ ++#define mfpr_writel(off, val) \ ++ __raw_writel(val, mfpr_mmio_base + (off)) ++ ++/* ++ * perform a read-back of any MFPR register to make sure the ++ * previous writings are finished ++ */ ++#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0) ++ ++static inline void __mfp_config(int pin, unsigned long val) ++{ ++ unsigned long off = mfp_table[pin].mfpr_off; ++ ++ mfp_table[pin].mfpr_val = val; ++ mfpr_writel(off, val); ++} ++ ++void pxa3xx_mfp_config(mfp_cfg_t *mfp_cfgs, int num) ++{ ++ int i, pin; ++ unsigned long val, flags; ++ mfp_cfg_t *mfp_cfg = mfp_cfgs; ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ ++ for (i = 0; i < num; i++, mfp_cfg++) { ++ pin = MFP_CFG_PIN(*mfp_cfg); ++ val = MFP_CFG_VAL(*mfp_cfg); ++ ++ BUG_ON(pin >= MFP_PIN_MAX); ++ ++ __mfp_config(pin, val); ++ } ++ ++ mfpr_sync(); ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++unsigned long pxa3xx_mfp_read(int mfp) ++{ ++ unsigned long val, flags; ++ ++ BUG_ON(mfp >= MFP_PIN_MAX); ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ val = mfpr_readl(mfp_table[mfp].mfpr_off); ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++ ++ return val; ++} ++ ++void pxa3xx_mfp_write(int mfp, unsigned long val) ++{ ++ unsigned long flags; ++ ++ BUG_ON(mfp >= MFP_PIN_MAX); ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ mfpr_writel(mfp_table[mfp].mfpr_off, val); ++ mfpr_sync(); ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++void pxa3xx_mfp_set_afds(int mfp, int af, int ds) ++{ ++ uint32_t mfpr_off, mfpr_val; ++ unsigned long flags; ++ ++ BUG_ON(mfp >= MFP_PIN_MAX); ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ mfpr_off = mfp_table[mfp].mfpr_off; ++ ++ mfpr_val = mfpr_readl(mfpr_off); ++ mfpr_val &= ~(MFPR_AF_MASK | MFPR_DRV_MASK); ++ mfpr_val |= (((af & 0x7) << MFPR_ALT_OFFSET) | ++ ((ds & 0x7) << MFPR_DRV_OFFSET)); ++ ++ mfpr_writel(mfpr_off, mfpr_val); ++ mfpr_sync(); ++ ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++void pxa3xx_mfp_set_rdh(int mfp, int rdh) ++{ ++ uint32_t mfpr_off, mfpr_val; ++ unsigned long flags; ++ ++ BUG_ON(mfp >= MFP_PIN_MAX); ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ ++ mfpr_off = mfp_table[mfp].mfpr_off; ++ ++ mfpr_val = mfpr_readl(mfpr_off); ++ mfpr_val &= ~MFPR_RDH_MASK; ++ ++ if (likely(rdh)) ++ mfpr_val |= (1u << MFPR_SS_OFFSET); ++ ++ mfpr_writel(mfpr_off, mfpr_val); ++ mfpr_sync(); ++ ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++void pxa3xx_mfp_set_lpm(int mfp, int lpm) ++{ ++ uint32_t mfpr_off, mfpr_val; ++ unsigned long flags; ++ ++ BUG_ON(mfp >= MFP_PIN_MAX); ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ ++ mfpr_off = mfp_table[mfp].mfpr_off; ++ mfpr_val = mfpr_readl(mfpr_off); ++ mfpr_val &= ~MFPR_LPM_MASK; ++ ++ if (lpm & 0x1) mfpr_val |= 1u << MFPR_SON_OFFSET; ++ if (lpm & 0x2) mfpr_val |= 1u << MFPR_SD_OFFSET; ++ if (lpm & 0x4) mfpr_val |= 1u << MFPR_PU_OFFSET; ++ if (lpm & 0x8) mfpr_val |= 1u << MFPR_PD_OFFSET; ++ if (lpm &0x10) mfpr_val |= 1u << MFPR_PS_OFFSET; ++ ++ mfpr_writel(mfpr_off, mfpr_val); ++ mfpr_sync(); ++ ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++void pxa3xx_mfp_set_pull(int mfp, int pull) ++{ ++ uint32_t mfpr_off, mfpr_val; ++ unsigned long flags; ++ ++ BUG_ON(mfp >= MFP_PIN_MAX); ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ ++ mfpr_off = mfp_table[mfp].mfpr_off; ++ mfpr_val = mfpr_readl(mfpr_off); ++ mfpr_val &= ~MFPR_PULL_MASK; ++ mfpr_val |= ((pull & 0x7u) << MFPR_PD_OFFSET); ++ ++ mfpr_writel(mfpr_off, mfpr_val); ++ mfpr_sync(); ++ ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++void pxa3xx_mfp_set_edge(int mfp, int edge) ++{ ++ uint32_t mfpr_off, mfpr_val; ++ unsigned long flags; ++ ++ BUG_ON(mfp >= MFP_PIN_MAX); ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ ++ mfpr_off = mfp_table[mfp].mfpr_off; ++ mfpr_val = mfpr_readl(mfpr_off); ++ ++ mfpr_val &= ~MFPR_EDGE_MASK; ++ mfpr_val |= (edge & 0x3u) << MFPR_ERE_OFFSET; ++ mfpr_val |= (!edge & 0x1) << MFPR_EC_OFFSET; ++ ++ mfpr_writel(mfpr_off, mfpr_val); ++ mfpr_sync(); ++ ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map) ++{ ++ struct pxa3xx_mfp_addr_map *p; ++ unsigned long offset, flags; ++ int i; ++ ++ spin_lock_irqsave(&mfp_spin_lock, flags); ++ ++ for (p = map; p->start != MFP_PIN_INVALID; p++) { ++ offset = p->offset; ++ i = p->start; ++ ++ do { ++ mfp_table[i].mfpr_off = offset; ++ mfp_table[i].mfpr_val = 0; ++ offset += 4; i++; ++ } while ((i <= p->end) && (p->end != -1)); ++ } ++ ++ spin_unlock_irqrestore(&mfp_spin_lock, flags); ++} ++ ++void __init pxa3xx_init_mfp(void) ++{ ++ memset(mfp_table, 0, sizeof(mfp_table)); ++} +--- linux-2.6.23.orig/arch/arm/mach-pxa/pxa25x.c ++++ linux-2.6.23/arch/arm/mach-pxa/pxa25x.c +@@ -30,6 +30,7 @@ + + #include "generic.h" + #include "devices.h" ++#include "clock.h" + + /* + * Various clock factors driven by the CCCR register. +@@ -53,7 +54,7 @@ + * We assume these values have been applied via a fcs. + * If info is not 0 we also display the current settings. + */ +-unsigned int get_clk_frequency_khz(int info) ++unsigned int pxa25x_get_clk_frequency_khz(int info) + { + unsigned long cccr, turbo; + unsigned int l, L, m, M, n2, N; +@@ -86,27 +87,48 @@ + return (turbo & 1) ? (N/1000) : (M/1000); + } + +-EXPORT_SYMBOL(get_clk_frequency_khz); +- + /* + * Return the current memory clock frequency in units of 10kHz + */ +-unsigned int get_memclk_frequency_10khz(void) ++unsigned int pxa25x_get_memclk_frequency_10khz(void) + { + return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000; + } + +-EXPORT_SYMBOL(get_memclk_frequency_10khz); +- +-/* +- * Return the current LCD clock frequency in units of 10kHz +- */ +-unsigned int get_lcdclk_frequency_10khz(void) ++static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk) + { +- return get_memclk_frequency_10khz(); ++ return pxa25x_get_memclk_frequency_10khz() * 10000; + } + +-EXPORT_SYMBOL(get_lcdclk_frequency_10khz); ++static const struct clkops clk_pxa25x_lcd_ops = { ++ .enable = clk_cken_enable, ++ .disable = clk_cken_disable, ++ .getrate = clk_pxa25x_lcd_getrate, ++}; ++ ++/* ++ * 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz) ++ * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz ++ * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) ++ */ ++static struct clk pxa25x_clks[] = { ++ INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), ++ INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), ++ INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), ++ INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), ++ INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), ++ INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev), ++ INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), ++ INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), ++ /* ++ INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), ++ INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), ++ INIT_CKEN("SSPCLK", SSP, 3686400, 0, NULL), ++ INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), ++ INIT_CKEN("NSSPCLK", NSSP, 3686400, 0, NULL), ++ */ ++ INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), ++}; + + #ifdef CONFIG_PM + +@@ -207,10 +229,52 @@ + } + #endif + ++/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm ++ */ ++ ++static int pxa25x_set_wake(unsigned int irq, unsigned int on) ++{ ++ int gpio = IRQ_TO_GPIO(irq); ++ uint32_t gpio_bit, mask = 0; ++ ++ if (gpio >= 0 && gpio <= 15) { ++ gpio_bit = GPIO_bit(gpio); ++ mask = gpio_bit; ++ if (on) { ++ if (GRER(gpio) | gpio_bit) ++ PRER |= gpio_bit; ++ else ++ PRER &= ~gpio_bit; ++ ++ if (GFER(gpio) | gpio_bit) ++ PFER |= gpio_bit; ++ else ++ PFER &= ~gpio_bit; ++ } ++ goto set_pwer; ++ } ++ ++ if (irq == IRQ_RTCAlrm) { ++ mask = PWER_RTC; ++ goto set_pwer; ++ } ++ ++ return -EINVAL; ++ ++set_pwer: ++ if (on) ++ PWER |= mask; ++ else ++ PWER &=~mask; ++ ++ return 0; ++} ++ + void __init pxa25x_init_irq(void) + { + pxa_init_irq_low(); + pxa_init_irq_gpio(85); ++ pxa_init_irq_set_wake(pxa25x_set_wake); + } + + static struct platform_device *pxa25x_devices[] __initdata = { +@@ -231,6 +295,8 @@ + int ret = 0; + + if (cpu_is_pxa21x() || cpu_is_pxa25x()) { ++ clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); ++ + if ((ret = pxa_init_dma(16))) + return ret; + #ifdef CONFIG_PM +--- linux-2.6.23.orig/arch/arm/mach-pxa/pxa27x.c ++++ linux-2.6.23/arch/arm/mach-pxa/pxa27x.c +@@ -27,6 +27,7 @@ + + #include "generic.h" + #include "devices.h" ++#include "clock.h" + + /* Crystal clock: 13MHz */ + #define BASE_CLK 13000000 +@@ -36,7 +37,7 @@ + * We assume these values have been applied via a fcs. + * If info is not 0 we also display the current settings. + */ +-unsigned int get_clk_frequency_khz( int info) ++unsigned int pxa27x_get_clk_frequency_khz(int info) + { + unsigned long ccsr, clkcfg; + unsigned int l, L, m, M, n2, N, S; +@@ -79,7 +80,7 @@ + * Return the current mem clock frequency in units of 10kHz as + * reflected by CCCR[A], B, and L + */ +-unsigned int get_memclk_frequency_10khz(void) ++unsigned int pxa27x_get_memclk_frequency_10khz(void) + { + unsigned long ccsr, clkcfg; + unsigned int l, L, m, M; +@@ -104,7 +105,7 @@ + /* + * Return the current LCD clock frequency in units of 10kHz as + */ +-unsigned int get_lcdclk_frequency_10khz(void) ++static unsigned int pxa27x_get_lcdclk_frequency_10khz(void) + { + unsigned long ccsr; + unsigned int l, L, k, K; +@@ -120,9 +121,47 @@ + return (K / 10000); + } + +-EXPORT_SYMBOL(get_clk_frequency_khz); +-EXPORT_SYMBOL(get_memclk_frequency_10khz); +-EXPORT_SYMBOL(get_lcdclk_frequency_10khz); ++static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk) ++{ ++ return pxa27x_get_lcdclk_frequency_10khz() * 10000; ++} ++ ++static const struct clkops clk_pxa27x_lcd_ops = { ++ .enable = clk_cken_enable, ++ .disable = clk_cken_disable, ++ .getrate = clk_pxa27x_lcd_getrate, ++}; ++ ++static struct clk pxa27x_clks[] = { ++ INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev), ++ INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL), ++ ++ INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev), ++ INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev), ++ INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL), ++ ++ INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev), ++ INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), ++ INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa_device_udc.dev), ++ INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev), ++ INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev), ++ ++ INIT_CKEN("USBCLK", USB, 48000000, 0, &pxa27x_device_ohci.dev), ++ INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), ++ INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL), ++ ++ /* ++ INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL), ++ INIT_CKEN("SSPCLK", SSP1, 13000000, 0, NULL), ++ INIT_CKEN("SSPCLK", SSP2, 13000000, 0, NULL), ++ INIT_CKEN("SSPCLK", SSP3, 13000000, 0, NULL), ++ INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), ++ INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), ++ INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), ++ INIT_CKEN("IMCLK", IM, 0, 0, NULL), ++ INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL), ++ */ ++}; + + #ifdef CONFIG_PM + +@@ -269,6 +308,69 @@ + } + #endif + ++/* PXA27x: Various gpios can issue wakeup events. This logic only ++ * handles the simple cases, not the WEMUX2 and WEMUX3 options ++ */ ++#define PXA27x_GPIO_NOWAKE_MASK \ ++ ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2)) ++#define WAKEMASK(gpio) \ ++ (((gpio) <= 15) \ ++ ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \ ++ : ((gpio == 35) ? (1 << 24) : 0)) ++ ++static int pxa27x_set_wake(unsigned int irq, unsigned int on) ++{ ++ int gpio = IRQ_TO_GPIO(irq); ++ uint32_t mask; ++ ++ if ((gpio >= 0 && gpio <= 15) || (gpio == 35)) { ++ if (WAKEMASK(gpio) == 0) ++ return -EINVAL; ++ ++ mask = WAKEMASK(gpio); ++ ++ if (on) { ++ if (GRER(gpio) | GPIO_bit(gpio)) ++ PRER |= mask; ++ else ++ PRER &= ~mask; ++ ++ if (GFER(gpio) | GPIO_bit(gpio)) ++ PFER |= mask; ++ else ++ PFER &= ~mask; ++ } ++ goto set_pwer; ++ } ++ ++ switch (irq) { ++ case IRQ_RTCAlrm: ++ mask = PWER_RTC; ++ break; ++ case IRQ_USB: ++ mask = 1u << 26; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++set_pwer: ++ if (on) ++ PWER |= mask; ++ else ++ PWER &=~mask; ++ ++ return 0; ++} ++ ++void __init pxa27x_init_irq(void) ++{ ++ pxa_init_irq_low(); ++ pxa_init_irq_high(); ++ pxa_init_irq_gpio(128); ++ pxa_init_irq_set_wake(pxa27x_set_wake); ++} ++ + /* + * device registration specific to PXA27x. + */ +@@ -288,7 +390,7 @@ + }, + }; + +-static struct platform_device pxa27x_device_ohci = { ++struct platform_device pxa27x_device_ohci = { + .name = "pxa27x-ohci", + .id = -1, + .dev = { +@@ -316,7 +418,7 @@ + }, + }; + +-static struct platform_device pxa27x_device_i2c_power = { ++struct platform_device pxa27x_device_i2c_power = { + .name = "pxa2xx-i2c", + .id = 1, + .resource = i2c_power_resources, +@@ -338,17 +440,12 @@ + &pxa27x_device_ohci, + }; + +-void __init pxa27x_init_irq(void) +-{ +- pxa_init_irq_low(); +- pxa_init_irq_high(); +- pxa_init_irq_gpio(128); +-} +- + static int __init pxa27x_init(void) + { + int ret = 0; + if (cpu_is_pxa27x()) { ++ clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); ++ + if ((ret = pxa_init_dma(32))) + return ret; + #ifdef CONFIG_PM +--- /dev/null ++++ linux-2.6.23/arch/arm/mach-pxa/pxa300.c +@@ -0,0 +1,93 @@ ++/* ++ * linux/arch/arm/mach-pxa/pxa300.c ++ * ++ * Code specific to PXA300/PXA310 ++ * ++ * Copyright (C) 2007 Marvell Internation Ltd. ++ * ++ * 2007-08-21: eric miao ++ * initial version ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = { ++ ++ MFP_ADDR_X(GPIO0, GPIO2, 0x00b4), ++ MFP_ADDR_X(GPIO3, GPIO26, 0x027c), ++ MFP_ADDR_X(GPIO27, GPIO127, 0x0400), ++ MFP_ADDR_X(GPIO0_2, GPIO6_2, 0x02ec), ++ ++ MFP_ADDR(nBE0, 0x0204), ++ MFP_ADDR(nBE1, 0x0208), ++ ++ MFP_ADDR(nLUA, 0x0244), ++ MFP_ADDR(nLLA, 0x0254), ++ ++ MFP_ADDR(DF_CLE_nOE, 0x0240), ++ MFP_ADDR(DF_nRE_nOE, 0x0200), ++ MFP_ADDR(DF_ALE_nWE, 0x020C), ++ MFP_ADDR(DF_INT_RnB, 0x00C8), ++ MFP_ADDR(DF_nCS0, 0x0248), ++ MFP_ADDR(DF_nCS1, 0x0278), ++ MFP_ADDR(DF_nWE, 0x00CC), ++ ++ MFP_ADDR(DF_ADDR0, 0x0210), ++ MFP_ADDR(DF_ADDR1, 0x0214), ++ MFP_ADDR(DF_ADDR2, 0x0218), ++ MFP_ADDR(DF_ADDR3, 0x021C), ++ ++ MFP_ADDR(DF_IO0, 0x0220), ++ MFP_ADDR(DF_IO1, 0x0228), ++ MFP_ADDR(DF_IO2, 0x0230), ++ MFP_ADDR(DF_IO3, 0x0238), ++ MFP_ADDR(DF_IO4, 0x0258), ++ MFP_ADDR(DF_IO5, 0x0260), ++ MFP_ADDR(DF_IO6, 0x0268), ++ MFP_ADDR(DF_IO7, 0x0270), ++ MFP_ADDR(DF_IO8, 0x0224), ++ MFP_ADDR(DF_IO9, 0x022C), ++ MFP_ADDR(DF_IO10, 0x0234), ++ MFP_ADDR(DF_IO11, 0x023C), ++ MFP_ADDR(DF_IO12, 0x025C), ++ MFP_ADDR(DF_IO13, 0x0264), ++ MFP_ADDR(DF_IO14, 0x026C), ++ MFP_ADDR(DF_IO15, 0x0274), ++ ++ MFP_ADDR_END, ++}; ++ ++/* override pxa300 MFP register addresses */ ++static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { ++ MFP_ADDR_X(GPIO30, GPIO98, 0x0418), ++ MFP_ADDR_X(GPIO7_2, GPIO12_2, 0x052C), ++ ++ MFP_ADDR(ULPI_STP, 0x040C), ++ MFP_ADDR(ULPI_NXT, 0x0410), ++ MFP_ADDR(ULPI_DIR, 0x0414), ++ ++ MFP_ADDR_END, ++}; ++ ++static int __init pxa300_init(void) ++{ ++ if (cpu_is_pxa300() || cpu_is_pxa310()) { ++ pxa3xx_init_mfp(); ++ pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); ++ } ++ ++ if (cpu_is_pxa310()) ++ pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); ++ ++ return 0; ++} ++ ++core_initcall(pxa300_init); +--- /dev/null ++++ linux-2.6.23/arch/arm/mach-pxa/pxa320.c +@@ -0,0 +1,88 @@ ++/* ++ * linux/arch/arm/mach-pxa/pxa320.c ++ * ++ * Code specific to PXA320 ++ * ++ * Copyright (C) 2007 Marvell Internation Ltd. ++ * ++ * 2007-08-21: eric miao ++ * initial version ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++#include ++ ++static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { ++ ++ MFP_ADDR_X(GPIO0, GPIO4, 0x0124), ++ MFP_ADDR_X(GPIO5, GPIO26, 0x028C), ++ MFP_ADDR_X(GPIO27, GPIO62, 0x0400), ++ MFP_ADDR_X(GPIO63, GPIO73, 0x04B4), ++ MFP_ADDR_X(GPIO74, GPIO98, 0x04F0), ++ MFP_ADDR_X(GPIO99, GPIO127, 0x0600), ++ MFP_ADDR_X(GPIO0_2, GPIO5_2, 0x0674), ++ MFP_ADDR_X(GPIO6_2, GPIO13_2, 0x0494), ++ MFP_ADDR_X(GPIO14_2, GPIO17_2, 0x04E0), ++ ++ MFP_ADDR(nXCVREN, 0x0138), ++ MFP_ADDR(DF_CLE_nOE, 0x0204), ++ MFP_ADDR(DF_nADV1_ALE, 0x0208), ++ MFP_ADDR(DF_SCLK_S, 0x020C), ++ MFP_ADDR(DF_SCLK_E, 0x0210), ++ MFP_ADDR(nBE0, 0x0214), ++ MFP_ADDR(nBE1, 0x0218), ++ MFP_ADDR(DF_nADV2_ALE, 0x021C), ++ MFP_ADDR(DF_INT_RnB, 0x0220), ++ MFP_ADDR(DF_nCS0, 0x0224), ++ MFP_ADDR(DF_nCS1, 0x0228), ++ MFP_ADDR(DF_nWE, 0x022C), ++ MFP_ADDR(DF_nRE_nOE, 0x0230), ++ MFP_ADDR(nLUA, 0x0234), ++ MFP_ADDR(nLLA, 0x0238), ++ MFP_ADDR(DF_ADDR0, 0x023C), ++ MFP_ADDR(DF_ADDR1, 0x0240), ++ MFP_ADDR(DF_ADDR2, 0x0244), ++ MFP_ADDR(DF_ADDR3, 0x0248), ++ MFP_ADDR(DF_IO0, 0x024C), ++ MFP_ADDR(DF_IO8, 0x0250), ++ MFP_ADDR(DF_IO1, 0x0254), ++ MFP_ADDR(DF_IO9, 0x0258), ++ MFP_ADDR(DF_IO2, 0x025C), ++ MFP_ADDR(DF_IO10, 0x0260), ++ MFP_ADDR(DF_IO3, 0x0264), ++ MFP_ADDR(DF_IO11, 0x0268), ++ MFP_ADDR(DF_IO4, 0x026C), ++ MFP_ADDR(DF_IO12, 0x0270), ++ MFP_ADDR(DF_IO5, 0x0274), ++ MFP_ADDR(DF_IO13, 0x0278), ++ MFP_ADDR(DF_IO6, 0x027C), ++ MFP_ADDR(DF_IO14, 0x0280), ++ MFP_ADDR(DF_IO7, 0x0284), ++ MFP_ADDR(DF_IO15, 0x0288), ++ ++ MFP_ADDR_END, ++}; ++ ++static void __init pxa320_init_mfp(void) ++{ ++ pxa3xx_init_mfp(); ++ pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); ++} ++ ++static int __init pxa320_init(void) ++{ ++ if (cpu_is_pxa320()) ++ pxa320_init_mfp(); ++ ++ return 0; ++} ++ ++core_initcall(pxa320_init); +--- /dev/null ++++ linux-2.6.23/arch/arm/mach-pxa/pxa3xx.c +@@ -0,0 +1,216 @@ ++/* ++ * linux/arch/arm/mach-pxa/pxa3xx.c ++ * ++ * code specific to pxa3xx aka Monahans ++ * ++ * Copyright (C) 2006 Marvell International Ltd. ++ * ++ * 2007-09-02: eric miao ++ * initial version ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "generic.h" ++#include "devices.h" ++#include "clock.h" ++ ++/* Crystal clock: 13MHz */ ++#define BASE_CLK 13000000 ++ ++/* Ring Oscillator Clock: 60MHz */ ++#define RO_CLK 60000000 ++ ++#define ACCR_D0CS (1 << 26) ++ ++/* crystal frequency to static memory controller multiplier (SMCFS) */ ++static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; ++ ++/* crystal frequency to HSIO bus frequency multiplier (HSS) */ ++static unsigned char hss_mult[4] = { 8, 12, 16, 0 }; ++ ++/* ++ * Get the clock frequency as reflected by CCSR and the turbo flag. ++ * We assume these values have been applied via a fcs. ++ * If info is not 0 we also display the current settings. ++ */ ++unsigned int pxa3xx_get_clk_frequency_khz(int info) ++{ ++ unsigned long acsr, xclkcfg; ++ unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS; ++ ++ /* Read XCLKCFG register turbo bit */ ++ __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); ++ t = xclkcfg & 0x1; ++ ++ acsr = ACSR; ++ ++ xl = acsr & 0x1f; ++ xn = (acsr >> 8) & 0x7; ++ hss = (acsr >> 14) & 0x3; ++ ++ XL = xl * BASE_CLK; ++ XN = xn * XL; ++ ++ ro = acsr & ACCR_D0CS; ++ ++ CLK = (ro) ? RO_CLK : ((t) ? XN : XL); ++ HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK; ++ ++ if (info) { ++ pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n", ++ RO_CLK / 1000000, (RO_CLK % 1000000) / 10000, ++ (ro) ? "" : "in"); ++ pr_info("Run Mode clock: %d.%02dMHz (*%d)\n", ++ XL / 1000000, (XL % 1000000) / 10000, xl); ++ pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n", ++ XN / 1000000, (XN % 1000000) / 10000, xn, ++ (t) ? "" : "in"); ++ pr_info("HSIO bus clock: %d.%02dMHz\n", ++ HSS / 1000000, (HSS % 1000000) / 10000); ++ } ++ ++ return CLK; ++} ++ ++/* ++ * Return the current static memory controller clock frequency ++ * in units of 10kHz ++ */ ++unsigned int pxa3xx_get_memclk_frequency_10khz(void) ++{ ++ unsigned long acsr; ++ unsigned int smcfs, clk = 0; ++ ++ acsr = ACSR; ++ ++ smcfs = (acsr >> 23) & 0x7; ++ clk = (acsr & ACCR_D0CS) ? RO_CLK : smcfs_mult[smcfs] * BASE_CLK; ++ ++ return (clk / 10000); ++} ++ ++/* ++ * Return the current HSIO bus clock frequency ++ */ ++static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk) ++{ ++ unsigned long acsr; ++ unsigned int hss, hsio_clk; ++ ++ acsr = ACSR; ++ ++ hss = (acsr >> 14) & 0x3; ++ hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK; ++ ++ return hsio_clk; ++} ++ ++static void clk_pxa3xx_cken_enable(struct clk *clk) ++{ ++ unsigned long mask = 1ul << (clk->cken & 0x1f); ++ ++ local_irq_disable(); ++ ++ if (clk->cken < 32) ++ CKENA |= mask; ++ else ++ CKENB |= mask; ++ ++ local_irq_enable(); ++} ++ ++static void clk_pxa3xx_cken_disable(struct clk *clk) ++{ ++ unsigned long mask = 1ul << (clk->cken & 0x1f); ++ ++ local_irq_disable(); ++ ++ if (clk->cken < 32) ++ CKENA &= ~mask; ++ else ++ CKENB &= ~mask; ++ ++ local_irq_enable(); ++} ++ ++static const struct clkops clk_pxa3xx_hsio_ops = { ++ .enable = clk_pxa3xx_cken_enable, ++ .disable = clk_pxa3xx_cken_disable, ++ .getrate = clk_pxa3xx_hsio_getrate, ++}; ++ ++static struct clk pxa3xx_clks[] = { ++ INIT_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), ++ INIT_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), ++ ++ INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev), ++ INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev), ++ INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL), ++ ++ INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), ++ INIT_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev), ++}; ++ ++void __init pxa3xx_init_irq(void) ++{ ++ /* enable CP6 access */ ++ u32 value; ++ __asm__ __volatile__("mrc p15, 0, %0, c15, c1, 0\n": "=r"(value)); ++ value |= (1 << 6); ++ __asm__ __volatile__("mcr p15,