From 9ba01e077d79b24e0fcde66875e497dca422b2ee Mon Sep 17 00:00:00 2001 From: Michael Lauer Date: Tue, 22 Jun 2004 09:19:47 +0000 Subject: upgrade openzaurus-pxa to latest version of piro's patch this also incorporates the TOSA (SL-6000) extensions, so openzaurus-pxa now is also the preferred kernel for this. BKrev: 40d7f9b3S6T1GjcTJOIMQY-vbxwkdA --- .../defconfig-tosa | 0 .../piro.patch | 75444 +++++++++++++++++++ ...nzaurus-pxa_2.4.18-rmk7-pxa3-embedix20031107.oe | 2 +- 3 files changed, 75445 insertions(+), 1 deletion(-) create mode 100644 linux/openzaurus-pxa-2.4.18-rmk7-pxa3-embedix20031107/defconfig-tosa (limited to 'linux') diff --git a/linux/openzaurus-pxa-2.4.18-rmk7-pxa3-embedix20031107/defconfig-tosa b/linux/openzaurus-pxa-2.4.18-rmk7-pxa3-embedix20031107/defconfig-tosa new file mode 100644 index 0000000000..e69de29bb2 diff --git a/linux/openzaurus-pxa-2.4.18-rmk7-pxa3-embedix20031107/piro.patch b/linux/openzaurus-pxa-2.4.18-rmk7-pxa3-embedix20031107/piro.patch index e69de29bb2..3f1618971f 100644 --- a/linux/openzaurus-pxa-2.4.18-rmk7-pxa3-embedix20031107/piro.patch +++ b/linux/openzaurus-pxa-2.4.18-rmk7-pxa3-embedix20031107/piro.patch @@ -0,0 +1,75444 @@ +diff -Nur linux_c860_org/CREDITS linux/CREDITS +--- linux_c860_org/CREDITS 2002-08-26 14:43:17.000000000 +0900 ++++ linux/CREDITS 2004-06-10 21:09:10.000000000 +0900 +@@ -981,8 +981,8 @@ + + N: Nigel Gamble + E: nigel@nrg.org +-E: nigel@sgi.com + D: Interrupt-driven printer driver ++D: Preemptible kernel + S: 120 Alley Way + S: Mountain View, California 94040 + S: USA +diff -Nur linux_c860_org/Documentation/Configure.help linux/Documentation/Configure.help +--- linux_c860_org/Documentation/Configure.help 2002-10-09 10:20:29.000000000 +0900 ++++ linux/Documentation/Configure.help 2004-06-10 21:09:10.000000000 +0900 +@@ -266,6 +266,29 @@ + If you have a system with several CPUs, you do not need to say Y + here: the local APIC will be used automatically. + ++Preemptible Kernel ++CONFIG_PREEMPT ++ This option reduces the latency of the kernel when reacting to ++ real-time or interactive events by allowing a low priority process to ++ be preempted even if it is in kernel mode executing a system call. ++ This allows applications to run more reliably even when the system is ++ under load. ++ ++ Say Y here if you are building a kernel for a desktop, embedded or ++ real-time system. Say N if you are unsure. ++ ++Break Selected Locks ++CONFIG_LOCK_BREAK ++ This option will break certain locks in high-latency regions ++ throughout the kernel. It is intended for use in conjunction with ++ the preemptible kernel (CONFIG_PREEMPT). Since in-kernel preemption ++ can not occur while locks are held, temporarily releasing and then ++ reacquiring long-held locks will further improve system response. ++ ++ Say Y if you are compiling for a system with strict latency ++ requirements such as an embedded, real-time, or audio processing ++ system. Say N otherwise. ++ + Kernel math emulation + CONFIG_MATH_EMULATION + Linux can emulate a math coprocessor (used for floating point +diff -Nur linux_c860_org/Documentation/preempt-locking.txt linux/Documentation/preempt-locking.txt +--- linux_c860_org/Documentation/preempt-locking.txt 1970-01-01 09:00:00.000000000 +0900 ++++ linux/Documentation/preempt-locking.txt 2004-06-10 21:09:10.000000000 +0900 +@@ -0,0 +1,104 @@ ++ Proper Locking Under a Preemptible Kernel: ++ Keeping Kernel Code Preempt-Safe ++ Robert Love ++ Last Updated: 22 Jan 2002 ++ ++ ++INTRODUCTION ++ ++ ++A preemptible kernel creates new locking issues. The issues are the same as ++those under SMP: concurrency and reentrancy. Thankfully, the Linux preemptible ++kernel model leverages existing SMP locking mechanisms. Thus, the kernel ++requires explicit additional locking for very few additional situations. ++ ++This document is for all kernel hackers. Developing code in the kernel ++requires protecting these situations. ++ ++ ++RULE #1: Per-CPU data structures need explicit protection ++ ++ ++Two similar problems arise. An example code snippet: ++ ++ struct this_needs_locking tux[NR_CPUS]; ++ tux[smp_processor_id()] = some_value; ++ /* task is preempted here... */ ++ something = tux[smp_processor_id()]; ++ ++First, since the data is per-CPU, it may not have explicit SMP locking, but ++require it otherwise. Second, when a preempted task is finally rescheduled, ++the previous value of smp_processor_id may not equal the current. You must ++protect these situations by disabling preemption around them. ++ ++ ++RULE #2: CPU state must be protected. ++ ++ ++Under preemption, the state of the CPU must be protected. This is arch- ++dependent, but includes CPU structures and state not preserved over a context ++switch. For example, on x86, entering and exiting FPU mode is now a critical ++section that must occur while preemption is disabled. Think what would happen ++if the kernel is executing a floating-point instruction and is then preempted. ++Remember, the kernel does not save FPU state except for user tasks. Therefore, ++upon preemption, the FPU registers will be sold to the lowest bidder. Thus, ++preemption must be disabled around such regions. ++ ++Note, some FPU functions are already explicitly preempt safe. For example, ++kernel_fpu_begin and kernel_fpu_end will disable and enable preemption. ++However, math_state_restore must be called with preemption disabled. ++ ++ ++RULE #3: Lock acquire and release must be performed by same task ++ ++ ++A lock acquired in one task must be released by the same task. This ++means you can't do oddball things like acquire a lock and go off to ++play while another task releases it. If you want to do something ++like this, acquire and release the task in the same code path and ++have the caller wait on an event by the other task. ++ ++ ++SOLUTION ++ ++ ++Data protection under preemption is achieved by disabling preemption for the ++duration of the critical region. ++ ++preempt_enable() decrement the preempt counter ++preempt_disable() increment the preempt counter ++preempt_enable_no_resched() decrement, but do not immediately preempt ++preempt_get_count() return the preempt counter ++ ++The functions are nestable. In other words, you can call preempt_disable ++n-times in a code path, and preemption will not be reenabled until the n-th ++call to preempt_enable. The preempt statements define to nothing if ++preemption is not enabled. ++ ++Note that you do not need to explicitly prevent preemption if you are holding ++any locks or interrupts are disabled, since preemption is implicitly disabled ++in those cases. ++ ++Example: ++ ++ cpucache_t *cc; /* this is per-CPU */ ++ preempt_disable(); ++ cc = cc_data(searchp); ++ if (cc && cc->avail) { ++ __free_block(searchp, cc_entry(cc), cc->avail); ++ cc->avail = 0; ++ } ++ preempt_enable(); ++ return 0; ++ ++Notice how the preemption statements must encompass every reference of the ++critical variables. Another example: ++ ++ int buf[NR_CPUS]; ++ set_cpu_val(buf); ++ if (buf[smp_processor_id()] == -1) printf(KERN_INFO "wee!\n"); ++ spin_lock(&buf_lock); ++ /* ... */ ++ ++This code is not preempt-safe, but see how easily we can fix it by simply ++moving the spin_lock up two lines. +diff -Nur linux_c860_org/MAINTAINERS linux/MAINTAINERS +--- linux_c860_org/MAINTAINERS 2002-08-26 14:43:17.000000000 +0900 ++++ linux/MAINTAINERS 2004-06-10 21:09:10.000000000 +0900 +@@ -1255,6 +1255,14 @@ + M: mostrows@styx.uwaterloo.ca + S: Maintained + ++PREEMPTIBLE KERNEL ++P: Robert M. Love ++M: rml@tech9.net ++L: linux-kernel@vger.kernel.org ++L: kpreempt-tech@lists.sourceforge.net ++W: http://tech9.net/rml/linux ++S: Supported ++ + PROMISE DC4030 CACHING DISK CONTROLLER DRIVER + P: Peter Denison + M: promise@pnd-pc.demon.co.uk +diff -Nur linux_c860_org/arch/alpha/kernel/entry.S linux/arch/alpha/kernel/entry.S +--- linux_c860_org/arch/alpha/kernel/entry.S 2002-08-26 14:39:34.000000000 +0900 ++++ linux/arch/alpha/kernel/entry.S 2004-06-10 21:09:10.000000000 +0900 +@@ -231,12 +231,12 @@ + .end kernel_clone + + /* +- * kernel_thread(fn, arg, clone_flags) ++ * arch_kernel_thread(fn, arg, clone_flags) + */ + .align 3 + .globl kernel_thread + .ent kernel_thread +-kernel_thread: ++arch_kernel_thread: + ldgp $29,0($27) /* we can be called from a module */ + .frame $30, 4*8, $26 + subq $30,4*8,$30 +diff -Nur linux_c860_org/arch/arm/boot/compressed/head-xscale.S linux/arch/arm/boot/compressed/head-xscale.S +--- linux_c860_org/arch/arm/boot/compressed/head-xscale.S 2002-12-18 19:27:19.000000000 +0900 ++++ linux/arch/arm/boot/compressed/head-xscale.S 2004-06-10 21:09:10.000000000 +0900 +@@ -5,6 +5,7 @@ + * + * ChangLog: + * 12-Dec-2002 Lineo Japan, Inc. ++ * 26-Feb-2004 Lineo Solutions, Inc. for Tosa + */ + + #include +@@ -51,3 +52,7 @@ + #ifdef CONFIG_ARCH_PXA_CORGI + mov r7, #MACH_TYPE_CORGI + #endif ++ ++#ifdef CONFIG_ARCH_PXA_TOSA ++ mov r7, #MACH_TYPE_TOSA ++#endif +diff -Nur linux_c860_org/arch/arm/config.in linux/arch/arm/config.in +--- linux_c860_org/arch/arm/config.in 2003-10-09 14:41:35.000000000 +0900 ++++ linux/arch/arm/config.in 2004-06-10 21:10:22.000000000 +0900 +@@ -196,16 +196,33 @@ + dep_bool ' Using Trial 0' CONFIG_POODLE_TR0 $CONFIG_ARCH_PXA_POODLE + dep_bool ' SHARP Corgi' CONFIG_ARCH_PXA_CORGI $CONFIG_ARCH_PXA + dep_bool ' Using Trial 0' CONFIG_CORGI_TR0 $CONFIG_ARCH_PXA_CORGI ++dep_bool ' LCD Bufferable (EXPERIMENTAL)' CONFIG_CORGI_LCD_BUFF $CONFIG_ARCH_PXA_CORGI + dep_bool ' SHARP Shepherd' CONFIG_ARCH_PXA_SHEPHERD $CONFIG_ARCH_PXA_CORGI + dep_bool ' SHARP Husky' CONFIG_ARCH_PXA_HUSKY $CONFIG_ARCH_PXA_SHEPHERD + dep_bool ' SHARP Boxer' CONFIG_ARCH_PXA_BOXER $CONFIG_ARCH_PXA_HUSKY ++dep_bool ' SHARP Tosa' CONFIG_ARCH_PXA_TOSA $CONFIG_ARCH_PXA ++dep_bool ' SHARP Tosa skipping' CONFIG_ARCH_PXA_TOSA_SKIP $CONFIG_ARCH_PXA_TOSA + + if [ "$CONFIG_SA1100_COLLIE" = "y" -o "$CONFIG_SABINAL_DISCOVERY" = "y" -o \ +- "$CONFIG_ARCH_PXA_POODLE" = "y" -o "$CONFIG_ARCH_PXA_CORGI" = "y" ]; then ++ "$CONFIG_ARCH_PXA_POODLE" = "y" -o "$CONFIG_ARCH_PXA_CORGI" = "y" -o \ ++ "$CONFIG_ARCH_PXA_TOSA" = "y" ]; then + define_bool CONFIG_ARCH_SHARP_SL y + fi + +-if [ "$CONFIG_ARCH_PXA_POODLE" = "y" -o "$CONFIG_ARCH_PXA_CORGI" = "y" ]; then ++ ++if [ "$CONFIG_ARCH_PXA_POODLE" = "y" -o "$CONFIG_ARCH_PXA_CORGI" = "y" -o \ ++ "$CONFIG_ARCH_PXA_TOSA" = "y" ]; then ++ bool 'Use clock change(cccr_change) enable (EXPERIMENTAL)' CONFIG_SL_CCCR_CHANGE ++ if [ "$CONFIG_SL_CCCR162" != "y" -a "$CONFIG_SL_CCCR_CHANGE" = "y" ]; then ++ bool 'Boot CCCR=0x242 (EXPERIMENTAL)' CONFIG_SL_CCCR242 ++ fi ++ if [ "$CONFIG_SL_CCCR242" != "y" -a "$CONFIG_SL_CCCR_CHANGE" = "y" ]; then ++ bool 'Boot CCCR=0x162 (DANGEROUS ESPECIALLY FOR SL-C700)' CONFIG_SL_CCCR162 ++ fi ++fi ++ ++if [ "$CONFIG_ARCH_PXA_POODLE" = "y" -o "$CONFIG_ARCH_PXA_CORGI" = "y" -o \ ++ "$CONFIG_ARCH_PXA_TOSA" = "y" ]; then + comment 'Language type' + choice 'Language type' \ + "English CONFIG_ARCH_SHARP_SL_E \ +@@ -472,7 +489,10 @@ + else + define_bool CONFIG_DISCONTIGMEM n + fi +- ++dep_bool 'Preemptible Kernel' CONFIG_PREEMPT $CONFIG_CPU_32 ++if [ "$CONFIG_PREEMPT" = "y" ]; then ++ bool 'Break selected locks' CONFIG_LOCK_BREAK ++fi + endmenu + + mainmenu_option next_comment +@@ -628,6 +648,9 @@ + if [ "$CONFIG_DEVICEINFO" = "m" -a "$CONFIG_ARCH_PXA_CORGI" = "y" ]; then + define_tristate CONFIG_CORGI_DEVICEINFO m + fi ++if [ "$CONFIG_DEVICEINFO" = "m" -a "$CONFIG_ARCH_PXA_TOSA" = "y" ]; then ++ define_tristate CONFIG_TOSA_DEVICEINFO m ++fi + endmenu + + source drivers/parport/Config.in +diff -Nur linux_c860_org/arch/arm/def-configs/boxer-j linux/arch/arm/def-configs/boxer-j +--- linux_c860_org/arch/arm/def-configs/boxer-j 2003-11-07 11:37:08.000000000 +0900 ++++ linux/arch/arm/def-configs/boxer-j 2004-06-10 21:09:10.000000000 +0900 +@@ -299,6 +299,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/corgi linux/arch/arm/def-configs/corgi +--- linux_c860_org/arch/arm/def-configs/corgi 2002-11-26 15:25:56.000000000 +0900 ++++ linux/arch/arm/def-configs/corgi 2004-06-10 21:09:10.000000000 +0900 +@@ -295,6 +295,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/corgi_cramfs linux/arch/arm/def-configs/corgi_cramfs +--- linux_c860_org/arch/arm/def-configs/corgi_cramfs 2002-10-21 10:17:42.000000000 +0900 ++++ linux/arch/arm/def-configs/corgi_cramfs 2004-06-10 21:09:10.000000000 +0900 +@@ -297,6 +297,7 @@ + CONFIG_MTD_NAND_POST_BADBLOCK=y + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + # CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS is not set ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/corgi_initrd linux/arch/arm/def-configs/corgi_initrd +--- linux_c860_org/arch/arm/def-configs/corgi_initrd 2002-10-21 10:17:42.000000000 +0900 ++++ linux/arch/arm/def-configs/corgi_initrd 2004-06-10 21:09:10.000000000 +0900 +@@ -297,6 +297,7 @@ + CONFIG_MTD_NAND_POST_BADBLOCK=y + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + # CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS is not set ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/husky linux/arch/arm/def-configs/husky +--- linux_c860_org/arch/arm/def-configs/husky 2003-05-20 09:48:12.000000000 +0900 ++++ linux/arch/arm/def-configs/husky 2004-06-10 21:09:10.000000000 +0900 +@@ -298,6 +298,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/husky-j linux/arch/arm/def-configs/husky-j +--- linux_c860_org/arch/arm/def-configs/husky-j 2003-05-20 09:48:12.000000000 +0900 ++++ linux/arch/arm/def-configs/husky-j 2004-06-10 21:09:10.000000000 +0900 +@@ -298,6 +298,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/poodle linux/arch/arm/def-configs/poodle +--- linux_c860_org/arch/arm/def-configs/poodle 2002-11-26 15:25:56.000000000 +0900 ++++ linux/arch/arm/def-configs/poodle 2004-06-10 21:09:10.000000000 +0900 +@@ -295,6 +295,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_POODLE=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/poodle-j linux/arch/arm/def-configs/poodle-j +--- linux_c860_org/arch/arm/def-configs/poodle-j 2002-11-26 15:25:56.000000000 +0900 ++++ linux/arch/arm/def-configs/poodle-j 2004-06-10 21:09:10.000000000 +0900 +@@ -295,6 +295,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_POODLE=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/poodle_cramfs linux/arch/arm/def-configs/poodle_cramfs +--- linux_c860_org/arch/arm/def-configs/poodle_cramfs 2002-10-21 10:16:27.000000000 +0900 ++++ linux/arch/arm/def-configs/poodle_cramfs 2004-06-10 21:09:10.000000000 +0900 +@@ -298,6 +298,7 @@ + CONFIG_MTD_NAND_POST_BADBLOCK=y + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + # CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS is not set ++CONFIG_MTD_NAND_SHARP_SL_POODLE=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/shepherd linux/arch/arm/def-configs/shepherd +--- linux_c860_org/arch/arm/def-configs/shepherd 2003-04-04 08:55:58.000000000 +0900 ++++ linux/arch/arm/def-configs/shepherd 2004-06-10 21:09:10.000000000 +0900 +@@ -297,6 +297,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/shepherd-j linux/arch/arm/def-configs/shepherd-j +--- linux_c860_org/arch/arm/def-configs/shepherd-j 2003-04-04 08:56:28.000000000 +0900 ++++ linux/arch/arm/def-configs/shepherd-j 2004-06-10 21:09:10.000000000 +0900 +@@ -297,6 +297,7 @@ + # CONFIG_MTD_NAND_ERASE_BY_FORCE is not set + CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y + CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_CORGI=y + CONFIG_MTD_NAND_SHARP_SL=y + + # +diff -Nur linux_c860_org/arch/arm/def-configs/tosa-j linux/arch/arm/def-configs/tosa-j +--- linux_c860_org/arch/arm/def-configs/tosa-j 1970-01-01 09:00:00.000000000 +0900 ++++ linux/arch/arm/def-configs/tosa-j 2004-06-10 21:09:10.000000000 +0900 +@@ -0,0 +1,1156 @@ ++# ++# Automatically generated by make menuconfig: don't edit ++# ++CONFIG_ARM=y ++# CONFIG_EISA is not set ++# CONFIG_SBUS is not set ++# CONFIG_MCA is not set ++CONFIG_UID16=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set ++# CONFIG_GENERIC_BUST_SPINLOCK is not set ++# CONFIG_GENERIC_ISA_DMA is not set ++ ++# ++# Code maturity level options ++# ++CONFIG_EXPERIMENTAL=y ++# CONFIG_OBSOLETE is not set ++ ++# ++# Loadable module support ++# ++CONFIG_MODULES=y ++# CONFIG_MODVERSIONS is not set ++CONFIG_KMOD=y ++ ++# ++# System Type ++# ++# CONFIG_ARCH_ANAKIN is not set ++# CONFIG_ARCH_ARCA5K is not set ++# CONFIG_ARCH_CLPS7500 is not set ++# CONFIG_ARCH_CLPS711X is not set ++# CONFIG_ARCH_CO285 is not set ++CONFIG_ARCH_PXA=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_CAMELOT is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_INTEGRATOR is not set ++# CONFIG_ARCH_L7200 is not set ++# CONFIG_ARCH_MX1ADS is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_SHARK is not set ++ ++# ++# Archimedes/A5000 Implementations ++# ++# CONFIG_ARCH_ARC is not set ++# CONFIG_ARCH_A5K is not set ++ ++# ++# Footbridge Implementations ++# ++# CONFIG_ARCH_CATS is not set ++# CONFIG_ARCH_PERSONAL_SERVER is not set ++# CONFIG_ARCH_EBSA285_ADDIN is not set ++# CONFIG_ARCH_EBSA285_HOST is not set ++# CONFIG_ARCH_NETWINDER is not set ++ ++# ++# SA11x0 Implementations ++# ++# CONFIG_SA1100_ASSABET is not set ++# CONFIG_ASSABET_NEPONSET is not set ++# CONFIG_SA1100_ADSBITSY is not set ++# CONFIG_SA1100_BRUTUS is not set ++# CONFIG_SA1100_CEP is not set ++# CONFIG_SA1100_CERF is not set ++# CONFIG_SA1100_COLLIE is not set ++# CONFIG_LOCOMO is not set ++# CONFIG_COLLIE_TS is not set ++# CONFIG_COLLIE_TR0 is not set ++# CONFIG_COLLIE_TR1 is not set ++# CONFIG_COLLIE_DEV is not set ++# CONFIG_COLLIE_G is not set ++# CONFIG_SA1100_H3100 is not set ++# CONFIG_SA1100_H3600 is not set ++# CONFIG_SA1100_H3800 is not set ++# CONFIG_SA1100_H3XXX is not set ++# CONFIG_SA1100_EXTENEX1 is not set ++# CONFIG_SA1100_FLEXANET is not set ++# CONFIG_SA1100_FREEBIRD is not set ++# CONFIG_SA1100_FRODO is not set ++# CONFIG_SA1100_GRAPHICSCLIENT is not set ++# CONFIG_SA1100_GRAPHICSMASTER is not set ++# CONFIG_SA1100_BADGE4 is not set ++# CONFIG_SA1100_JORNADA720 is not set ++# CONFIG_SA1100_HUW_WEBPANEL is not set ++# CONFIG_SA1100_ITSY is not set ++# CONFIG_SA1100_LART is not set ++# CONFIG_SA1100_NANOENGINE is not set ++# CONFIG_SA1100_OMNIMETER is not set ++# CONFIG_SA1100_PANGOLIN is not set ++# CONFIG_SA1100_PLEB is not set ++# CONFIG_SA1100_PT_SYSTEM3 is not set ++# CONFIG_SA1100_SHANNON is not set ++# CONFIG_SA1100_SHERMAN is not set ++# CONFIG_SA1100_SIMPAD is not set ++# CONFIG_SA1100_PFS168 is not set ++# CONFIG_SA1100_VICTOR is not set ++# CONFIG_SA1100_XP860 is not set ++# CONFIG_SA1100_YOPY is not set ++# CONFIG_SA1100_USB is not set ++# CONFIG_SA1100_USB_NETLINK is not set ++# CONFIG_SA1100_USB_CHAR is not set ++# CONFIG_H3600_SLEEVE is not set ++ ++# ++# Intel PXA250/210 Implementations ++# ++# CONFIG_ARCH_LUBBOCK is not set ++# CONFIG_ARCH_PXA_IDP is not set ++# CONFIG_ARCH_PXA_CERF is not set ++# CONFIG_COTULLA_DMA is not set ++# CONFIG_SABINAL_DISCOVERY is not set ++# CONFIG_ARCH_SABINAL is not set ++# CONFIG_ARCH_PXA_POODLE is not set ++# CONFIG_POODLE_TR0 is not set ++# CONFIG_ARCH_PXA_CORGI is not set ++# CONFIG_CORGI_TR0 is not set ++# CONFIG_ARCH_PXA_SHEPHERD is not set ++# CONFIG_ARCH_PXA_HUSKY is not set ++CONFIG_ARCH_PXA_TOSA=y ++CONFIG_ARCH_PXA_TOSA_SKIP=y ++CONFIG_ARCH_SHARP_SL=y ++# CONFIG_ARCH_SHARP_SL_E is not set ++# CONFIG_ARCH_SHARP_SL_V is not set ++# CONFIG_ARCH_SHARP_SL_G is not set ++CONFIG_ARCH_SHARP_SL_J=y ++# CONFIG_ARCH_SHARP_SL_S is not set ++# CONFIG_ARCH_SHARP_SL_I is not set ++# CONFIG_PXA_USB is not set ++# CONFIG_PXA_USB_NETLINK is not set ++# CONFIG_PXA_USB_CHAR is not set ++ ++# ++# CLPS711X/EP721X Implementations ++# ++# CONFIG_ARCH_AUTCPU12 is not set ++# CONFIG_ARCH_CDB89712 is not set ++# CONFIG_ARCH_CLEP7312 is not set ++# CONFIG_ARCH_EDB7211 is not set ++# CONFIG_ARCH_P720T is not set ++# CONFIG_ARCH_FORTUNET is not set ++# CONFIG_ARCH_EP7211 is not set ++# CONFIG_ARCH_EP7212 is not set ++# CONFIG_ARCH_ACORN is not set ++# CONFIG_FOOTBRIDGE is not set ++# CONFIG_FOOTBRIDGE_HOST is not set ++# CONFIG_FOOTBRIDGE_ADDIN is not set ++CONFIG_CPU_32=y ++# CONFIG_CPU_26 is not set ++# CONFIG_CPU_32v3 is not set ++# CONFIG_CPU_32v4 is not set ++# CONFIG_CPU_ARM610 is not set ++# CONFIG_CPU_ARM710 is not set ++# CONFIG_CPU_ARM720T is not set ++# CONFIG_CPU_ARM920T is not set ++# CONFIG_CPU_ARM922T is not set ++# CONFIG_PLD is not set ++# CONFIG_CPU_ARM926T is not set ++# CONFIG_CPU_ARM1020 is not set ++# CONFIG_CPU_SA110 is not set ++# CONFIG_CPU_SA1100 is not set ++CONFIG_CPU_32v5=y ++CONFIG_CPU_XSCALE=y ++CONFIG_BATT=y ++# CONFIG_XSCALE_CACHE_ERRATA is not set ++CONFIG_ARM_THUMB=y ++CONFIG_ARM_FCSE=y ++# CONFIG_DISCONTIGMEM is not set ++ ++# ++# General setup ++# ++# CONFIG_PCI is not set ++# CONFIG_ISA is not set ++# CONFIG_ISA_DMA is not set ++# CONFIG_ZBOOT_ROM is not set ++CONFIG_ZBOOT_ROM_TEXT=0 ++CONFIG_ZBOOT_ROM_BSS=0 ++CONFIG_HOTPLUG=y ++ ++# ++# PCMCIA/CardBus support ++# ++CONFIG_PCMCIA=y ++# CONFIG_I82092 is not set ++# CONFIG_I82365 is not set ++# CONFIG_TCIC is not set ++# CONFIG_PCMCIA_CLPS6700 is not set ++# CONFIG_PCMCIA_SA1100 is not set ++CONFIG_PCMCIA_PXA=y ++CONFIG_NET=y ++CONFIG_SYSVIPC=y ++# CONFIG_BSD_PROCESS_ACCT is not set ++CONFIG_SYSCTL=y ++CONFIG_FPE_NWFPE=y ++# CONFIG_FPE_FASTFPE is not set ++CONFIG_KCORE_ELF=y ++# CONFIG_KCORE_AOUT is not set ++CONFIG_BINFMT_AOUT=y ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_MISC is not set ++CONFIG_PM=y ++CONFIG_APM=y ++# CONFIG_APM_IGNORE_USER_SUSPEND is not set ++CONFIG_APM_CPU_IDLE=y ++CONFIG_APM_DISPLAY_BLANK=y ++CONFIG_APM_RTC_IS_GMT=y ++# CONFIG_ARTHUR is not set ++CONFIG_CMDLINE="console=ttyS0 root=/dev/mtdblock2" ++CONFIG_SHARPSL_BOOTLDR_PARAMS=y ++CONFIG_ALIGNMENT_TRAP=y ++CONFIG_FREEPG_SIGNAL=y ++CONFIG_OOM_KILL_SURVIVAL=y ++CONFIG_DEVICEINFO=y ++ ++# ++# Parallel port support ++# ++# CONFIG_PARPORT is not set ++ ++# ++# Memory Technology Devices (MTD) ++# ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_CONCAT is not set ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++CONFIG_MTD_CHAR=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++# CONFIG_MTD_GEN_PROBE is not set ++# CONFIG_MTD_CFI_INTELEXT is not set ++# CONFIG_MTD_CFI_AMDSTD is not set ++# CONFIG_MTD_CFI_STAA is not set ++# CONFIG_MTD_RAM is not set ++CONFIG_MTD_ROM=y ++# CONFIG_MTD_ABSENT is not set ++# CONFIG_MTD_OBSOLETE_CHIPS is not set ++# CONFIG_MTD_AMDSTD is not set ++# CONFIG_MTD_SHARP is not set ++# CONFIG_MTD_JEDEC is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_PHYSMAP is not set ++# CONFIG_MTD_LUBBOCK is not set ++# CONFIG_MTD_NORA is not set ++# CONFIG_MTD_ARM_INTEGRATOR is not set ++# CONFIG_MTD_CDB89712 is not set ++# CONFIG_MTD_SA1100 is not set ++# CONFIG_MTD_DC21285 is not set ++# CONFIG_MTD_IQ80310 is not set ++# CONFIG_MTD_FORTUNET is not set ++# CONFIG_MTD_PXA_CERF is not set ++# CONFIG_MTD_EPXA10DB is not set ++# CONFIG_MTD_AUTCPU12 is not set ++# CONFIG_MTD_EDB7312 is not set ++# CONFIG_MTD_IMPA7 is not set ++# CONFIG_MTD_DISCOVERY is not set ++CONFIG_MTD_SHARP_SL=y ++# CONFIG_MTD_PCI is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_PMC551 is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_MTDROM_SA1100 is not set ++# CONFIG_MTD_MTDRAM_SA1100 is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_MTDRAM_SHARP_SL is not set ++# CONFIG_MTD_BLKMTD is not set ++# CONFIG_MTD_DOC1000 is not set ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOCPROBE is not set ++ ++# ++# NAND Flash Device Drivers ++# ++CONFIG_MTD_NAND=y ++CONFIG_MTD_NAND_ECC=y ++CONFIG_MTD_NAND_VERIFY_WRITE=y ++CONFIG_MTD_NAND_POST_BADBLOCK=y ++# CONFIG_MTD_NAND_ERASE_BY_FORCE is not set ++CONFIG_MTD_NAND_LOGICAL_ADDRESS_ACCESS=y ++CONFIG_MTD_NAND_PAGE_CACHE=y ++CONFIG_MTD_NAND_SHARP_SL_TC6393=y ++# CONFIG_MTD_NAND_SHARP_SL is not set ++ ++# ++# Plug and Play configuration ++# ++# CONFIG_PNP is not set ++# CONFIG_ISAPNP is not set ++ ++# ++# Block devices ++# ++# CONFIG_BLK_DEV_FD is not set ++# CONFIG_BLK_DEV_XD is not set ++# CONFIG_PARIDE is not set ++# CONFIG_BLK_CPQ_DA is not set ++# CONFIG_BLK_CPQ_CISS_DA is not set ++# CONFIG_BLK_DEV_DAC960 is not set ++# CONFIG_BLK_DEV_COLLIE_MMCSD is not set ++CONFIG_BLK_DEV_SL_MMCSD=m ++CONFIG_BLK_DEV_SL_MMCSD_PSAVE=y ++CONFIG_BLK_DEV_LOOP=y ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_SIZE=8192 ++CONFIG_BLK_DEV_INITRD=y ++ ++# ++# Multi-device support (RAID and LVM) ++# ++# CONFIG_MD is not set ++# CONFIG_BLK_DEV_MD is not set ++# CONFIG_MD_LINEAR is not set ++# CONFIG_MD_RAID0 is not set ++# CONFIG_MD_RAID1 is not set ++# CONFIG_MD_RAID5 is not set ++# CONFIG_MD_MULTIPATH is not set ++# CONFIG_BLK_DEV_LVM is not set ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_NETLINK_DEV=y ++CONFIG_NETFILTER=y ++# CONFIG_NETFILTER_DEBUG is not set ++# CONFIG_FILTER is not set ++CONFIG_UNIX=y ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE is not set ++# CONFIG_ARPD is not set ++# CONFIG_INET_ECN is not set ++# CONFIG_SYN_COOKIES is not set ++ ++# ++# IP: Netfilter Configuration ++# ++# CONFIG_IP_NF_CONNTRACK is not set ++# CONFIG_IP_NF_QUEUE is not set ++# CONFIG_IP_NF_IPTABLES is not set ++# CONFIG_IP_NF_COMPAT_IPCHAINS is not set ++# CONFIG_IP_NF_COMPAT_IPFWADM is not set ++# CONFIG_IPV6 is not set ++# CONFIG_KHTTPD is not set ++# CONFIG_ATM is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_DECNET is not set ++# CONFIG_BRIDGE is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_LLC is not set ++# CONFIG_NET_DIVERT is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_NET_FASTROUTE is not set ++# CONFIG_NET_HW_FLOWCONTROL is not set ++ ++# ++# QoS and/or fair queueing ++# ++# CONFIG_NET_SCHED is not set ++ ++# ++# Network device support ++# ++CONFIG_NETDEVICES=y ++ ++# ++# ARCnet devices ++# ++# CONFIG_ARCNET is not set ++# CONFIG_DUMMY is not set ++# CONFIG_BONDING is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_TUN is not set ++# CONFIG_ETHERTAP is not set ++ ++# ++# Ethernet (10 or 100Mbit) ++# ++CONFIG_NET_ETHERNET=y ++# CONFIG_ARM_AM79C961A is not set ++# CONFIG_SUNLANCE is not set ++# CONFIG_SUNBMAC is not set ++# CONFIG_SUNQE is not set ++# CONFIG_SUNGEM is not set ++# CONFIG_NET_VENDOR_3COM is not set ++# CONFIG_LANCE is not set ++# CONFIG_NET_VENDOR_SMC is not set ++# CONFIG_NET_VENDOR_RACAL is not set ++# CONFIG_NET_ISA is not set ++# CONFIG_NET_PCI is not set ++# CONFIG_NET_POCKET is not set ++ ++# ++# Ethernet (1000 Mbit) ++# ++# CONFIG_ACENIC is not set ++# CONFIG_DL2K is not set ++# CONFIG_MYRI_SBUS is not set ++# CONFIG_NS83820 is not set ++# CONFIG_HAMACHI is not set ++# CONFIG_YELLOWFIN is not set ++# CONFIG_SK98LIN is not set ++# CONFIG_FDDI is not set ++# CONFIG_HIPPI is not set ++# CONFIG_PLIP is not set ++CONFIG_PPP=y ++# CONFIG_PPP_MULTILINK is not set ++# CONFIG_PPP_FILTER is not set ++CONFIG_PPP_ASYNC=y ++# CONFIG_PPP_SYNC_TTY is not set ++# CONFIG_PPP_DEFLATE is not set ++CONFIG_PPP_BSDCOMP=y ++# CONFIG_PPPOE is not set ++# CONFIG_SLIP is not set ++ ++# ++# Wireless LAN (non-hamradio) ++# ++CONFIG_NET_RADIO=y ++# CONFIG_STRIP is not set ++# CONFIG_WAVELAN is not set ++# CONFIG_ARLAN is not set ++# CONFIG_AIRONET4500 is not set ++# CONFIG_AIRONET4500_NONCS is not set ++# CONFIG_AIRONET4500_PROC is not set ++CONFIG_HERMES=y ++CONFIG_PCMCIA_HERMES=y ++# CONFIG_AIRO_CS is not set ++CONFIG_NET_WIRELESS=y ++ ++# ++# Token Ring devices ++# ++# CONFIG_TR is not set ++# CONFIG_NET_FC is not set ++# CONFIG_RCPCI is not set ++# CONFIG_SHAPER is not set ++ ++# ++# Wan interfaces ++# ++# CONFIG_WAN is not set ++ ++# ++# PCMCIA network device support ++# ++CONFIG_NET_PCMCIA=y ++# CONFIG_PCMCIA_3C589 is not set ++# CONFIG_PCMCIA_3C574 is not set ++# CONFIG_PCMCIA_FMVJ18X is not set ++CONFIG_PCMCIA_PCNET=y ++# CONFIG_PCMCIA_AXNET is not set ++# CONFIG_PCMCIA_NMCLAN is not set ++# CONFIG_PCMCIA_SMC91C92 is not set ++# CONFIG_PCMCIA_XIRC2PS is not set ++# CONFIG_ARCNET_COM20020_CS is not set ++# CONFIG_PCMCIA_IBMTR is not set ++# CONFIG_NET_PCMCIA_RADIO is not set ++ ++# ++# Amateur Radio support ++# ++# CONFIG_HAMRADIO is not set ++ ++# ++# IrDA (infrared) support ++# ++CONFIG_IRDA=y ++# CONFIG_IRLAN is not set ++# CONFIG_IRNET is not set ++CONFIG_IRCOMM=y ++# CONFIG_IRDA_ULTRA is not set ++# CONFIG_IRDA_CACHE_LAST_LSAP is not set ++CONFIG_IRDA_FAST_RR=y ++# CONFIG_IRDA_DEBUG is not set ++ ++# ++# Infrared-port device drivers ++# ++CONFIG_IRTTY_SIR=y ++# CONFIG_IRPORT_SIR is not set ++# CONFIG_DONGLE is not set ++# CONFIG_USB_IRDA is not set ++# CONFIG_NSC_FIR is not set ++# CONFIG_WINBOND_FIR is not set ++# CONFIG_TOSHIBA_FIR is not set ++# CONFIG_SMC_IRCC_FIR is not set ++# CONFIG_ALI_FIR is not set ++# CONFIG_VLSI_FIR is not set ++ ++# ++# ATA/IDE/MFM/RLL support ++# ++CONFIG_IDE=y ++ ++# ++# IDE, ATA and ATAPI Block devices ++# ++CONFIG_BLK_DEV_IDE=y ++# CONFIG_BLK_DEV_HD_IDE is not set ++# CONFIG_BLK_DEV_HD is not set ++CONFIG_BLK_DEV_IDEDISK=y ++# CONFIG_IDEDISK_MULTI_MODE is not set ++# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set ++# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set ++# CONFIG_BLK_DEV_IDEDISK_IBM is not set ++# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set ++# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set ++# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set ++# CONFIG_BLK_DEV_IDEDISK_WD is not set ++# CONFIG_BLK_DEV_COMMERIAL is not set ++# CONFIG_BLK_DEV_TIVO is not set ++CONFIG_BLK_DEV_IDECS=y ++# CONFIG_BLK_DEV_IDECD is not set ++# CONFIG_BLK_DEV_IDETAPE is not set ++# CONFIG_BLK_DEV_IDEFLOPPY is not set ++# CONFIG_BLK_DEV_IDESCSI is not set ++# CONFIG_BLK_DEV_CMD640 is not set ++# CONFIG_BLK_DEV_CMD640_ENHANCED is not set ++# CONFIG_BLK_DEV_ISAPNP is not set ++# CONFIG_IDE_CHIPSETS is not set ++# CONFIG_IDEDMA_AUTO is not set ++# CONFIG_DMA_NONPCI is not set ++# CONFIG_BLK_DEV_IDE_MODES is not set ++# CONFIG_BLK_DEV_ATARAID is not set ++# CONFIG_BLK_DEV_ATARAID_PDC is not set ++# CONFIG_BLK_DEV_ATARAID_HPT is not set ++ ++# ++# SCSI support ++# ++CONFIG_SCSI=y ++CONFIG_BLK_DEV_SD=y ++CONFIG_SD_EXTRA_DEVS=40 ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_SCSI_DEBUG_QUEUES is not set ++# CONFIG_SCSI_MULTI_LUN is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++ ++# ++# SCSI low-level drivers ++# ++# CONFIG_SCSI_7000FASST is not set ++# CONFIG_SCSI_ACARD is not set ++# CONFIG_SCSI_AHA152X is not set ++# CONFIG_SCSI_AHA1542 is not set ++# CONFIG_SCSI_AHA1740 is not set ++# CONFIG_SCSI_AACRAID is not set ++# CONFIG_SCSI_AIC7XXX is not set ++# CONFIG_SCSI_AIC7XXX_OLD is not set ++# CONFIG_SCSI_DPT_I2O is not set ++# CONFIG_SCSI_ADVANSYS is not set ++# CONFIG_SCSI_IN2000 is not set ++# CONFIG_SCSI_AM53C974 is not set ++# CONFIG_SCSI_MEGARAID is not set ++# CONFIG_SCSI_BUSLOGIC is not set ++# CONFIG_SCSI_DMX3191D is not set ++# CONFIG_SCSI_DTC3280 is not set ++# CONFIG_SCSI_EATA is not set ++# CONFIG_SCSI_EATA_DMA is not set ++# CONFIG_SCSI_EATA_PIO is not set ++# CONFIG_SCSI_FUTURE_DOMAIN is not set ++# CONFIG_SCSI_GDTH is not set ++# CONFIG_SCSI_GENERIC_NCR5380 is not set ++# CONFIG_SCSI_INITIO is not set ++# CONFIG_SCSI_INIA100 is not set ++# CONFIG_SCSI_NCR53C406A is not set ++# CONFIG_SCSI_NCR53C7xx is not set ++# CONFIG_SCSI_PAS16 is not set ++# CONFIG_SCSI_PCI2000 is not set ++# CONFIG_SCSI_PCI2220I is not set ++# CONFIG_SCSI_PSI240I is not set ++# CONFIG_SCSI_QLOGIC_FAS is not set ++# CONFIG_SCSI_SIM710 is not set ++# CONFIG_SCSI_SYM53C416 is not set ++# CONFIG_SCSI_T128 is not set ++# CONFIG_SCSI_U14_34F is not set ++# CONFIG_SCSI_DEBUG is not set ++ ++# ++# PCMCIA SCSI adapter support ++# ++# CONFIG_SCSI_PCMCIA is not set ++ ++# ++# I2O device support ++# ++# CONFIG_I2O is not set ++# CONFIG_I2O_BLOCK is not set ++# CONFIG_I2O_LAN is not set ++# CONFIG_I2O_SCSI is not set ++# CONFIG_I2O_PROC is not set ++ ++# ++# ISDN subsystem ++# ++# CONFIG_ISDN is not set ++ ++# ++# Input core support ++# ++CONFIG_INPUT=y ++CONFIG_INPUT_KEYBDEV=y ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640 ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=m ++ ++# ++# Character devices ++# ++CONFIG_VT=y ++CONFIG_VT_CONSOLE=y ++CONFIG_SERIAL=y ++# CONFIG_SERIAL_CONSOLE is not set ++CONFIG_SERIAL_SL_SERIES=y ++CONFIG_BLUETOOTH_SL=y ++# CONFIG_SERIAL_EXTENDED is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_ANAKIN is not set ++# CONFIG_SERIAL_ANAKIN_CONSOLE is not set ++# CONFIG_SERIAL_AMBA is not set ++# CONFIG_SERIAL_AMBA_CONSOLE is not set ++# CONFIG_SERIAL_CLPS711X is not set ++# CONFIG_SERIAL_CLPS711X_CONSOLE is not set ++# CONFIG_SERIAL_21285 is not set ++# CONFIG_SERIAL_21285_OLD is not set ++# CONFIG_SERIAL_21285_CONSOLE is not set ++# CONFIG_SERIAL_UART00 is not set ++# CONFIG_SERIAL_UART00_CONSOLE is not set ++# CONFIG_SERIAL_SA1100 is not set ++# CONFIG_SERIAL_SA1100_CONSOLE is not set ++# CONFIG_SERIAL_8250 is not set ++# CONFIG_SERIAL_8250_CONSOLE is not set ++# CONFIG_SERIAL_8250_EXTENDED is not set ++# CONFIG_SERIAL_8250_MANY_PORTS is not set ++# CONFIG_SERIAL_8250_SHARE_IRQ is not set ++# CONFIG_SERIAL_8250_DETECT_IRQ is not set ++# CONFIG_SERIAL_8250_MULTIPORT is not set ++# CONFIG_SERIAL_8250_HUB6 is not set ++CONFIG_UNIX98_PTYS=y ++CONFIG_UNIX98_PTY_COUNT=256 ++ ++# ++# I2C support ++# ++# CONFIG_I2C is not set ++ ++# ++# L3 serial bus support ++# ++# CONFIG_L3 is not set ++# CONFIG_L3_ALGOBIT is not set ++# CONFIG_L3_BIT_SA1100_GPIO is not set ++# CONFIG_L3_SA1111 is not set ++# CONFIG_BIT_SA1100_GPIO is not set ++ ++# ++# Mice ++# ++# CONFIG_BUSMOUSE is not set ++# CONFIG_MOUSE is not set ++ ++# ++# Joysticks ++# ++# CONFIG_INPUT_GAMEPORT is not set ++# CONFIG_INPUT_NS558 is not set ++# CONFIG_INPUT_LIGHTNING is not set ++# CONFIG_INPUT_PCIGAME is not set ++# CONFIG_INPUT_CS461X is not set ++# CONFIG_INPUT_EMU10K1 is not set ++# CONFIG_INPUT_SERIO is not set ++# CONFIG_INPUT_SERPORT is not set ++# CONFIG_INPUT_ANALOG is not set ++# CONFIG_INPUT_A3D is not set ++# CONFIG_INPUT_ADI is not set ++# CONFIG_INPUT_COBRA is not set ++# CONFIG_INPUT_GF2K is not set ++# CONFIG_INPUT_GRIP is not set ++# CONFIG_INPUT_INTERACT is not set ++# CONFIG_INPUT_TMDC is not set ++# CONFIG_INPUT_SIDEWINDER is not set ++# CONFIG_INPUT_IFORCE_USB is not set ++# CONFIG_INPUT_IFORCE_232 is not set ++# CONFIG_INPUT_WARRIOR is not set ++# CONFIG_INPUT_MAGELLAN is not set ++# CONFIG_INPUT_SPACEORB is not set ++# CONFIG_INPUT_SPACEBALL is not set ++# CONFIG_INPUT_STINGER is not set ++# CONFIG_INPUT_DB9 is not set ++# CONFIG_INPUT_GAMECON is not set ++# CONFIG_INPUT_TURBOGRAFX is not set ++# CONFIG_QIC02_TAPE is not set ++ ++# ++# Watchdog Cards ++# ++# CONFIG_WATCHDOG is not set ++# CONFIG_INTEL_RNG is not set ++# CONFIG_NVRAM is not set ++# CONFIG_RTC is not set ++CONFIG_COTULLA_RTC=y ++# CONFIG_ADS7846_TS is not set ++CONFIG_TOSA_TS=y ++# CONFIG_DTLK is not set ++# CONFIG_R3964 is not set ++# CONFIG_APPLICOM is not set ++ ++# ++# Ftape, the floppy tape device driver ++# ++# CONFIG_FTAPE is not set ++# CONFIG_AGP is not set ++# CONFIG_DRM is not set ++ ++# ++# PCMCIA character devices ++# ++CONFIG_PCMCIA_SERIAL_CS=y ++CONFIG_PCMCIA_CHRDEV=y ++ ++# ++# Multimedia devices ++# ++# CONFIG_VIDEO_DEV is not set ++ ++# ++# File systems ++# ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++CONFIG_FS_SYNC=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_REISERFS_CHECK is not set ++# CONFIG_REISERFS_PROC_INFO is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_ADFS_FS_RW is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EXT3_FS is not set ++# CONFIG_JBD is not set ++# CONFIG_JBD_DEBUG is not set ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++# CONFIG_UMSDOS_FS is not set ++CONFIG_VFAT_FS=y ++# CONFIG_EFS_FS is not set ++# CONFIG_JFFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_NAND=y ++CONFIG_JFFS2_PROC_FS=y ++CONFIG_JFFS2_NODEMERGE=y ++CONFIG_JFFS2_DYNFRAGTREE=y ++CONFIG_CRAMFS=y ++CONFIG_TMPFS=y ++# CONFIG_RAMFS is not set ++# CONFIG_ISO9660_FS is not set ++# CONFIG_JOLIET is not set ++# CONFIG_ZISOFS is not set ++CONFIG_MINIX_FS=y ++# CONFIG_VXFS_FS is not set ++# CONFIG_NTFS_FS is not set ++# CONFIG_NTFS_RW is not set ++# CONFIG_HPFS_FS is not set ++CONFIG_PROC_FS=y ++# CONFIG_DEVFS_FS is not set ++# CONFIG_DEVFS_MOUNT is not set ++# CONFIG_DEVFS_DEBUG is not set ++CONFIG_DEVPTS_FS=y ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX4FS_RW is not set ++# CONFIG_ROMFS_FS is not set ++CONFIG_EXT2_FS=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UDF_FS is not set ++# CONFIG_UDF_RW is not set ++# CONFIG_UFS_FS is not set ++# CONFIG_UFS_FS_WRITE is not set ++ ++# ++# Network File Systems ++# ++# CONFIG_CODA_FS is not set ++# CONFIG_INTERMEZZO_FS is not set ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3=y ++# CONFIG_ROOT_NFS is not set ++# CONFIG_NFSD is not set ++# CONFIG_NFSD_V3 is not set ++CONFIG_SUNRPC=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_SMB_FS=y ++# CONFIG_SMB_NLS_DEFAULT is not set ++# CONFIG_NCP_FS is not set ++# CONFIG_NCPFS_PACKET_SIGNING is not set ++# CONFIG_NCPFS_IOCTL_LOCKING is not set ++# CONFIG_NCPFS_STRONG is not set ++# CONFIG_NCPFS_NFS_NS is not set ++# CONFIG_NCPFS_OS2_NS is not set ++# CONFIG_NCPFS_SMALLDOS is not set ++# CONFIG_NCPFS_NLS is not set ++# CONFIG_NCPFS_EXTRAS is not set ++# CONFIG_ZISOFS_FS is not set ++CONFIG_ZLIB_FS_INFLATE=y ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++CONFIG_SMB_NLS=y ++CONFIG_NLS=y ++ ++# ++# Native Language Support ++# ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++CONFIG_NLS_CODEPAGE_850=y ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++CONFIG_NLS_CODEPAGE_932=y ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++CONFIG_NLS_UTF8=y ++ ++# ++# Console drivers ++# ++CONFIG_PC_KEYMAP=y ++# CONFIG_VGA_CONSOLE is not set ++ ++# ++# Frame-buffer support ++# ++CONFIG_FB=y ++CONFIG_DUMMY_CONSOLE=y ++# CONFIG_FB_COLLIE is not set ++# CONFIG_FB_ACORN is not set ++# CONFIG_FB_ANAKIN is not set ++# CONFIG_FB_CLPS711X is not set ++# CONFIG_FB_SA1100 is not set ++# CONFIG_FB_PXA is not set ++# CONFIG_FB_COTULLA is not set ++# CONFIG_FB_POODLE is not set ++# CONFIG_FB_CORGI is not set ++CONFIG_FB_TOSA=y ++CONFIG_SHARP_LOGO_SCREEN=y ++# CONFIG_FB_CYBER2000 is not set ++# CONFIG_FB_VIRTUAL is not set ++CONFIG_FBCON_ADVANCED=y ++# CONFIG_FBCON_MFB is not set ++# CONFIG_FBCON_CFB2 is not set ++# CONFIG_FBCON_CFB4 is not set ++# CONFIG_FBCON_CFB8 is not set ++CONFIG_FBCON_CFB16=y ++# CONFIG_FBCON_CFB24 is not set ++# CONFIG_FBCON_CFB32 is not set ++# CONFIG_FBCON_AFB is not set ++# CONFIG_FBCON_ILBM is not set ++# CONFIG_FBCON_IPLAN2P2 is not set ++# CONFIG_FBCON_IPLAN2P4 is not set ++# CONFIG_FBCON_IPLAN2P8 is not set ++# CONFIG_FBCON_MAC is not set ++# CONFIG_FBCON_VGA_PLANES is not set ++# CONFIG_FBCON_VGA is not set ++# CONFIG_FBCON_HGA is not set ++# CONFIG_FBCON_ROTATE_R is not set ++# CONFIG_FBCON_ROTATE_L is not set ++# CONFIG_FBCON_FONTWIDTH8_ONLY is not set ++CONFIG_FBCON_FONTS=y ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y ++# CONFIG_FONT_SUN8x16 is not set ++# CONFIG_FONT_SUN12x22 is not set ++# CONFIG_FONT_6x11 is not set ++# CONFIG_FONT_PEARL_8x8 is not set ++# CONFIG_FONT_ACORN_8x8 is not set ++ ++# ++# Sound ++# ++CONFIG_SOUND=y ++# CONFIG_SOUND_BT878 is not set ++# CONFIG_SOUND_COLLIE_SSP is not set ++# CONFIG_SOUND_COLLIE_TC35143 is not set ++# CONFIG_SOUND_CMPCI is not set ++# CONFIG_SOUND_EMU10K1 is not set ++# CONFIG_MIDI_EMU10K1 is not set ++# CONFIG_SOUND_FUSION is not set ++# CONFIG_SOUND_CS4281 is not set ++# CONFIG_SOUND_ES1370 is not set ++# CONFIG_SOUND_ES1371 is not set ++# CONFIG_SOUND_ESSSOLO1 is not set ++# CONFIG_SOUND_MAESTRO is not set ++# CONFIG_SOUND_MAESTRO3 is not set ++# CONFIG_SOUND_ICH is not set ++# CONFIG_SOUND_RME96XX is not set ++# CONFIG_SOUND_SONICVIBES is not set ++# CONFIG_SOUND_TRIDENT is not set ++# CONFIG_SOUND_MSNDCLAS is not set ++# CONFIG_SOUND_MSNDPIN is not set ++# CONFIG_SOUND_VIA82CXXX is not set ++# CONFIG_MIDI_VIA82CXXX is not set ++# CONFIG_SOUND_OSS is not set ++# CONFIG_SOUND_WAVEARTIST is not set ++# CONFIG_SOUND_PXA_AC97 is not set ++# CONFIG_SOUND_POODLE is not set ++# CONFIG_SOUND_CORGI is not set ++CONFIG_SOUND_TOSA=y ++CONFIG_BUZZER_TOSA=y ++# CONFIG_SOUND_TVMIXER is not set ++ ++# ++# Multimedia Capabilities Port drivers ++# ++# CONFIG_MCP is not set ++# CONFIG_MCP_SA1100 is not set ++# CONFIG_MCP_UCB1200 is not set ++# CONFIG_MCP_UCB1200_AUDIO is not set ++# CONFIG_MCP_UCB1200_TS is not set ++# CONFIG_MCP_UCB1400_TS is not set ++ ++# ++# USB support ++# ++CONFIG_USB=y ++# CONFIG_USB_DEBUG is not set ++CONFIG_USB_DEVICEFS=y ++# CONFIG_USB_BANDWIDTH is not set ++# CONFIG_USB_LONG_TIMEOUT is not set ++# CONFIG_USB_UHCI is not set ++# CONFIG_USB_UHCI_ALT is not set ++# CONFIG_USB_OHCI is not set ++# CONFIG_USB_OHCI_SA1111 is not set ++CONFIG_USB_OHCI_TC6393=m ++CONFIG_USB_USE_INTERNAL_MEMORY=y ++# CONFIG_USB_AUDIO is not set ++# CONFIG_USB_BLUETOOTH is not set ++CONFIG_USB_STORAGE=m ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++CONFIG_USB_STORAGE_ISD200=y ++# CONFIG_USB_STORAGE_DPCM is not set ++# CONFIG_USB_STORAGE_HP8200e is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++CONFIG_USB_ACM=m ++# CONFIG_USB_PRINTER is not set ++CONFIG_USB_HID=m ++# CONFIG_USB_HIDDEV is not set ++CONFIG_USB_KBD=m ++CONFIG_USB_MOUSE=m ++# CONFIG_USB_WACOM is not set ++# CONFIG_USB_DC2XX is not set ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_SCANNER is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USB_HPUSBSCSI is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_CDCETHER is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_USS720 is not set ++ ++# ++# USB Serial Converter support ++# ++# CONFIG_USB_SERIAL is not set ++# CONFIG_USB_SERIAL_GENERIC is not set ++# CONFIG_USB_SERIAL_BELKIN is not set ++# CONFIG_USB_SERIAL_WHITEHEAT is not set ++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set ++# CONFIG_USB_SERIAL_EMPEG is not set ++# CONFIG_USB_SERIAL_FTDI_SIO is not set ++# CONFIG_USB_SERIAL_VISOR is not set ++# CONFIG_USB_SERIAL_IPAQ is not set ++# CONFIG_USB_SERIAL_IR is not set ++# CONFIG_USB_SERIAL_EDGEPORT is not set ++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set ++# CONFIG_USB_SERIAL_KEYSPAN is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set ++# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set ++# CONFIG_USB_SERIAL_MCT_U232 is not set ++# CONFIG_USB_SERIAL_KLSI is not set ++# CONFIG_USB_SERIAL_PL2303 is not set ++# CONFIG_USB_SERIAL_CYBERJACK is not set ++# CONFIG_USB_SERIAL_XIRCOM is not set ++# CONFIG_USB_SERIAL_OMNINET is not set ++# CONFIG_USB_RIO500 is not set ++ ++# ++# USB Device Support ++# ++CONFIG_USBD=m ++CONFIG_USBD_VENDORID=04DD ++CONFIG_USBD_PRODUCTID=9032 ++CONFIG_USBD_PRODUCT_NAME="SL-6000" ++CONFIG_USBD_MANUFACTURER="Sharp" ++# CONFIG_USBD_USE_SERIAL_NUMBER is not set ++CONFIG_USBD_SELFPOWERED=y ++CONFIG_USBD_MONITOR=m ++CONFIG_USBD_PROCFS=y ++ ++# ++# Network Function ++# ++CONFIG_USBD_NET=m ++CONFIG_USBD_NET_VENDORID=04DD ++CONFIG_USBD_NET_PRODUCTID=9032 ++CONFIG_USBD_NET_IFNAME="usbd" ++CONFIG_USBD_NET_OUT_ENDPOINT=1 ++CONFIG_USBD_NET_OUT_PKTSIZE=64 ++CONFIG_USBD_NET_IN_ENDPOINT=2 ++CONFIG_USBD_NET_IN_PKTSIZE=64 ++CONFIG_USBD_NET_INT_ENDPOINT=3 ++CONFIG_USBD_NET_INT_PKTSIZE=16 ++# CONFIG_USBD_NET_ALWAYSUP is not set ++# CONFIG_USBD_NET_SAFE is not set ++CONFIG_USBD_NET_MDLM=y ++# CONFIG_USBD_NET_CDC is not set ++CONFIG_USBD_NET_REMOTE_MACADDR="" ++CONFIG_USBD_NET_REMOTE_OUI=400002 ++CONFIG_USBD_MAC_AS_SERIAL_NUMBER=y ++CONFIG_USBD_NET_LOCAL_MACADDR="400001000001" ++CONFIG_USBD_NET_LOCAL_OUI=400001 ++ ++# ++# Serial Function ++# ++# CONFIG_USBD_SERIAL is not set ++ ++# ++# USB Device Bus Interface Support ++# ++CONFIG_USBD_PXA_BUS=m ++# CONFIG_USBD_GENERIC_BUS is not set ++ ++# ++# Bluetooth support ++# ++# CONFIG_BLUEZ is not set ++ ++# ++# Kernel hacking ++# ++CONFIG_FRAME_POINTER=y ++# CONFIG_DEBUG_USER is not set ++# CONFIG_DEBUG_COREDUMP_SIGNAL is not set ++# CONFIG_DEBUG_INFO is not set ++# CONFIG_NO_PGT_CACHE is not set ++# CONFIG_DEBUG_KERNEL is not set ++# CONFIG_DEBUG_SLAB is not set ++# CONFIG_MAGIC_SYSRQ is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_WAITQ is not set ++# CONFIG_DEBUG_BUGVERBOSE is not set ++# CONFIG_DEBUG_ERRORS is not set ++# CONFIG_DEBUG_LL is not set ++# CONFIG_DEBUG_DC21285_PORT is not set ++# CONFIG_DEBUG_CLPS711X_UART2 is not set +diff -Nur linux_c860_org/arch/arm/kernel/entry-armv.S linux/arch/arm/kernel/entry-armv.S +--- linux_c860_org/arch/arm/kernel/entry-armv.S 2002-12-18 19:27:21.000000000 +0900 ++++ linux/arch/arm/kernel/entry-armv.S 2004-06-10 21:09:10.000000000 +0900 +@@ -769,6 +769,12 @@ + add r4, sp, #S_SP + mov r6, lr + stmia r4, {r5, r6, r7, r8, r9} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro ++#ifdef CONFIG_PREEMPT ++ get_current_task r9 ++ ldr r8, [r9, #TSK_PREEMPT] ++ add r8, r8, #1 ++ str r8, [r9, #TSK_PREEMPT] ++#endif + 1: get_irqnr_and_base r0, r6, r5, lr + movne r1, sp + @ +@@ -776,6 +782,25 @@ + @ + adrsvc ne, lr, 1b + bne do_IRQ ++#ifdef CONFIG_PREEMPT ++2: ldr r8, [r9, #TSK_PREEMPT] ++ subs r8, r8, #1 ++ bne 3f ++ ldr r7, [r9, #TSK_NEED_RESCHED] ++ teq r7, #0 ++ beq 3f ++ ldr r6, .LCirqstat ++ ldr r0, [r6, #IRQSTAT_BH_COUNT] ++ teq r0, #0 ++ bne 3f ++ mov r0, #MODE_SVC ++ msr cpsr_c, r0 @ enable interrupts ++ bl SYMBOL_NAME(preempt_schedule) ++ mov r0, #I_BIT | MODE_SVC ++ msr cpsr_c, r0 @ disable interrupts ++ b 2b ++3: str r8, [r9, #TSK_PREEMPT] ++#endif + ldr r0, [sp, #S_PSR] @ irqs are already disabled + msr spsr, r0 + ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr +@@ -833,6 +858,9 @@ + .LCprocfns: .word SYMBOL_NAME(processor) + #endif + .LCfp: .word SYMBOL_NAME(fp_enter) ++#ifdef CONFIG_PREEMPT ++.LCirqstat: .word SYMBOL_NAME(irq_stat) ++#endif + + irq_prio_table + +@@ -873,6 +901,12 @@ + stmdb r8, {sp, lr}^ + alignment_trap r4, r7, __temp_irq + zero_fp ++ get_current_task tsk ++#ifdef CONFIG_PREEMPT ++ ldr r0, [tsk, #TSK_PREEMPT] ++ add r0, r0, #1 ++ str r0, [tsk, #TSK_PREEMPT] ++#endif + 1: get_irqnr_and_base r0, r6, r5, lr + movne r1, sp + adrsvc ne, lr, 1b +@@ -880,8 +914,12 @@ + @ routine called with r0 = irq number, r1 = struct pt_regs * + @ + bne do_IRQ ++#ifdef CONFIG_PREEMPT ++ ldr r0, [tsk, #TSK_PREEMPT] ++ sub r0, r0, #1 ++ str r0, [tsk, #TSK_PREEMPT] ++#endif + mov why, #0 +- get_current_task tsk + b ret_to_user + + .align 5 +diff -Nur linux_c860_org/arch/arm/kernel/process.c linux/arch/arm/kernel/process.c +--- linux_c860_org/arch/arm/kernel/process.c 2003-06-18 16:12:25.000000000 +0900 ++++ linux/arch/arm/kernel/process.c 2004-06-10 21:09:10.000000000 +0900 +@@ -382,7 +382,7 @@ + * a system call from a "real" process, but the process memory space will + * not be free'd until both the parent and the child have exited. + */ +-pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) ++pid_t arch_kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) + { + pid_t __ret; + +diff -Nur linux_c860_org/arch/arm/kernel/time.c linux/arch/arm/kernel/time.c +--- linux_c860_org/arch/arm/kernel/time.c 2002-08-26 14:39:49.000000000 +0900 ++++ linux/arch/arm/kernel/time.c 2004-06-10 21:09:10.000000000 +0900 +@@ -15,6 +15,7 @@ + * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime + * 1998-12-20 Updated NTP code according to technical memorandum Jan '96 + * "A Kernel Model for Precision Timekeeping" by Dave Mills ++ * 1-Nov-2003 Sharp Corporation for Tosa + */ + #include + #include +@@ -149,6 +150,15 @@ + #define do_leds() + #endif + ++#ifdef CONFIG_ARCH_PXA_TOSA ++#define AVOID_ROLLBACK ++#ifdef AVOID_ROLLBACK ++int rollback_cancel = 0; ++static unsigned long last_sec = 0; ++static unsigned long last_usec = 0; ++#endif ++#endif ++ + void do_gettimeofday(struct timeval *tv) + { + unsigned long flags; +@@ -172,6 +182,25 @@ + sec++; + } + ++#ifdef CONFIG_ARCH_PXA_TOSA ++#ifdef AVOID_ROLLBACK ++ if (rollback_cancel && last_sec) { ++ if (last_sec>sec && last_sec-sec<4 ) { ++ //X printk("ERROR: time was fixed!(-%d sec)\n",last_sec-sec); ++ sec = last_sec; ++ usec = last_usec+1; ++ } else if (last_sec==sec) { ++ if (last_usec>usec) { // usec is always fixed. ++ //X printk("ERROR: time was fixed!!(-%d usec)\n",last_usec-usec); ++ usec = last_usec+1; ++ } ++ } ++ } ++ last_sec = sec; ++ last_usec = usec; ++#endif ++#endif ++ + tv->tv_sec = sec; + tv->tv_usec = usec; + } +@@ -199,6 +228,13 @@ + time_maxerror = NTP_PHASE_LIMIT; + time_esterror = NTP_PHASE_LIMIT; + write_unlock_irq(&xtime_lock); ++ ++#ifdef CONFIG_ARCH_PXA_TOSA ++#ifdef AVOID_ROLLBACK ++ last_sec = 0; ++ last_usec = 0; ++#endif ++#endif + } + + static struct irqaction timer_irq = { +diff -Nur linux_c860_org/arch/arm/kernel/traps.c linux/arch/arm/kernel/traps.c +--- linux_c860_org/arch/arm/kernel/traps.c 2003-01-14 12:07:55.000000000 +0900 ++++ linux/arch/arm/kernel/traps.c 2004-06-10 21:09:10.000000000 +0900 +@@ -14,6 +14,7 @@ + * + * Change Log + * 12-Dec-2002 Sharp Corporation for Poodle and Corgi ++ * 26-Feb-2004 Lineo Solutions, Inc. for Tosa + * + */ + #include +@@ -35,7 +36,7 @@ + #include + + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + #include + #include + #include +@@ -292,10 +293,12 @@ + mm_segment_t fs; + + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) ++#if CONFIG_PM + extern sharpsl_fataloff(void); + sharpsl_fataloff(); + #endif ++#endif + + console_verbose(); + +diff -Nur linux_c860_org/arch/arm/mach-pxa/Makefile linux/arch/arm/mach-pxa/Makefile +--- linux_c860_org/arch/arm/mach-pxa/Makefile 2002-11-14 10:33:31.000000000 +0900 ++++ linux/arch/arm/mach-pxa/Makefile 2004-06-10 21:09:10.000000000 +0900 +@@ -16,7 +16,8 @@ + + export-objs := generic.o irq.o dma.o sa1111.o \ + usb_ctl.o usb_recv.o usb_send.o \ +- discovery.o cotulla_dma.o pxa_ssp.o ++ discovery.o cotulla_dma.o pxa_ssp.o tosa.o \ ++ tosa_ac97.o + + # Common support (must be linked before board specific support) + obj-y += generic.o irq.o +@@ -33,6 +34,8 @@ + obj-$(CONFIG_SABINAL_DISCOVERY) += discovery.o discovery_arch.o pxa_ssp.o + obj-$(CONFIG_ARCH_PXA_POODLE) += poodle.o m62332.o pxa_ssp.o poodle_buzzer.o + obj-$(CONFIG_ARCH_PXA_CORGI) += corgi.o pxa_ssp.o poodle_buzzer.o ++obj-$(CONFIG_ARCH_PXA_TOSA) += tosa.o pxa_nssp.o tosa_ac97.o ++obj-$(CONFIG_BUZZER_TOSA) += tosa_buzzer.o + + # Support for blinky lights + leds-y := leds.o +@@ -66,6 +69,10 @@ + obj-$(CONFIG_BATT) += sharpsl_battery.o sharpsl_param.o + export-objs += sharpsl_battery.o + endif ++ ifeq ($(CONFIG_ARCH_PXA_TOSA),y) ++ obj-$(CONFIG_BATT) += tosa_battery.o sharpsl_param.o ++ export-objs += tosa_battery.o ++ endif + else + obj-$(CONFIG_PM) += pm.o sleep.o + endif +@@ -82,6 +89,9 @@ + ifeq ($(CONFIG_ARCH_PXA_CORGI),y) + devinfo-objs-m += sharpsl_deviceinfo.o + endif ++ ifeq ($(CONFIG_ARCH_PXA_TOSA),y) ++ devinfo-objs-m += sharpsl_deviceinfo.o ++ endif + endif + + obj-m += registers.o +diff -Nur linux_c860_org/arch/arm/mach-pxa/corgi.c linux/arch/arm/mach-pxa/corgi.c +--- linux_c860_org/arch/arm/mach-pxa/corgi.c 2003-06-18 16:12:25.000000000 +0900 ++++ linux/arch/arm/mach-pxa/corgi.c 2004-06-10 21:09:10.000000000 +0900 +@@ -298,7 +298,11 @@ + + static struct map_desc corgi_io_desc[] __initdata = { + /* virtual physical length domain r w c b */ ++#if defined(CONFIG_CORGI_LCD_BUFF) ++ { 0xf1000000, 0x08000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 1 }, /* LCDC (readable for Qt driver) */ ++#else + { 0xf1000000, 0x08000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* LCDC (readable for Qt driver) */ ++#endif + { 0xf2000000, 0x10800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* SCOOP */ + { 0xf2100000, 0x0C000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Nand Flash */ + { 0xef000000, 0x00000000, 0x00800000, DOMAIN_IO, 1, 1, 1, 0 }, /* Boot Flash */ +diff -Nur linux_c860_org/arch/arm/mach-pxa/pxa_nssp.c linux/arch/arm/mach-pxa/pxa_nssp.c +--- linux_c860_org/arch/arm/mach-pxa/pxa_nssp.c 1970-01-01 09:00:00.000000000 +0900 ++++ linux/arch/arm/mach-pxa/pxa_nssp.c 2004-06-10 21:09:10.000000000 +0900 +@@ -0,0 +1,57 @@ ++/* ++ * linux/arch/arm/mach-pxa/pxa_nssp.c ++ * ++ * NSSP read routines for tosa (SHARP) ++ * ++ * (C) Copyright 2004 Lineo Solutions, Inc. ++ * ++ * May be copied or modified under the terms of the GNU General Public ++ * License. See linux/COPYING for more information. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static spinlock_t pxa_nssp_lock = SPIN_LOCK_UNLOCKED; ++static unsigned long flag; ++static unsigned char initialized = 0; ++ ++void pxa_nssp_output(unsigned char reg, unsigned char data) ++{ ++ int i; ++ unsigned char dat = ( ((reg << 5) & 0xe0) | (data & 0x1f) ); ++ ++ spin_lock_irqsave(&pxa_nssp_lock, flag); ++ ++ GPCR(GPIO_TG_SPI_SCLK) |= GPIO_bit(GPIO_TG_SPI_SCLK); ++ GPCR(GPIO_TG_SPI_CS) |= GPIO_bit(GPIO_TG_SPI_CS); ++ for(i = 0; i < 8; i++) { ++ if( !(dat & (1<<(7-i))) ) ++ GPCR(GPIO_TG_SPI_MOSI) |= GPIO_bit(GPIO_TG_SPI_MOSI); ++ else ++ GPSR(GPIO_TG_SPI_MOSI) |= GPIO_bit(GPIO_TG_SPI_MOSI); ++ GPSR(GPIO_TG_SPI_SCLK) |= GPIO_bit(GPIO_TG_SPI_SCLK); ++ GPCR(GPIO_TG_SPI_SCLK) |= GPIO_bit(GPIO_TG_SPI_SCLK); ++ } ++ GPSR(GPIO_TG_SPI_CS) |= GPIO_bit(GPIO_TG_SPI_CS); ++ spin_unlock_irqrestore(&pxa_nssp_lock, flag); ++} ++ ++void pxa_nssp_init(void) ++{ ++ /* initialize SSP */ ++ set_GPIO_mode(GPIO_TG_SPI_SCLK | GPIO_OUT); ++ set_GPIO_mode(GPIO_TG_SPI_CS | GPIO_OUT); ++ set_GPIO_mode(GPIO_TG_SPI_MOSI | GPIO_OUT); ++ GPSR(GPIO_TG_SPI_CS) |= GPIO_bit(GPIO_TG_SPI_CS); ++ GPCR(GPIO_TG_SPI_SCLK) |= GPIO_bit(GPIO_TG_SPI_SCLK); ++} +diff -Nur linux_c860_org/arch/arm/mach-pxa/registers.c linux/arch/arm/mach-pxa/registers.c +--- linux_c860_org/arch/arm/mach-pxa/registers.c 2002-09-18 18:42:27.000000000 +0900 ++++ linux/arch/arm/mach-pxa/registers.c 2004-06-10 21:09:10.000000000 +0900 +@@ -5,7 +5,10 @@ + This code is based on SA1110's register moniter + + ****************************************************************************/ +- ++/* ++ * ChangeLog: ++ * 1-Nov-2003 Sharp Corporation for Tosa ++ */ + /**************************************************************************** + + registers.c: Register monitor of SA-1110 +@@ -66,6 +69,7 @@ + #include + #include /* to copy to/from userspace */ + #include ++#include + + //typedef unsigned long Word; + +@@ -74,6 +78,10 @@ + #define USE_LOCOMO + #elif defined(CONFIG_ARCH_PXA_CORGI) + #define USE_SCOOP ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++#define USE_SCOOP ++#define USE_SCOOP2 ++#define USE_KUROHYO + #endif + + #define MODULE_NAME "regmon" +@@ -83,6 +91,12 @@ + #ifdef USE_SCOOP + #define SCOOP_DIRNAME "scoop" + #endif ++#ifdef USE_SCOOP2 ++#define SCOOP2_DIRNAME "scoop2" ++#endif ++#ifdef USE_KUROHYO ++#define KUROHYO_DIRNAME "kurohyo" ++#endif + #ifdef USE_LOCOMO + #define LOCOMO_DIRNAME "locomo" + #endif +@@ -183,6 +197,223 @@ + SCP_REG(current_reg->phyaddr)=newRegValue; + return (count+endp-buffer); + } ++#endif ++#ifdef USE_SCOOP2 ++static ssize_t proc_scoop2_read_reg(struct file * file, char * buf, ++ size_t nbytes, loff_t *ppos); ++static ssize_t proc_scoop2_write_reg(struct file * file, const char * buffer, ++ size_t count, loff_t *ppos); ++ ++ ++static struct file_operations proc_scoop2_reg_operations = { ++ read: proc_scoop2_read_reg, ++ write: proc_scoop2_write_reg ++}; ++ ++typedef struct scoop2_reg_entry { ++ u32 phyaddr; ++ char* name; ++ char* description; ++ unsigned short low_ino; ++} scoop2_reg_entry_t; ++ ++ ++static scoop2_reg_entry_t scoop2_regs[] = ++{ ++/* { phyaddr, name, description } */ ++ { 0x00, "MCR", " " }, ++ { 0x04, "CDR", " " }, ++ { 0x08, "CSR", " " }, ++ { 0x0C, "CPR", " " }, ++ { 0x10, "CCR", " " }, ++ { 0x14, "IRR", " " }, ++ { 0x18, "IMR", " " }, ++ { 0x1C, "ISR", " " }, ++ { 0x20, "GPCR", " " }, ++ { 0x24, "GPWR", " " }, ++ { 0x28, "GPRR", " " } ++}; ++ ++ ++#define NUM_OF_SCOOP2_REG_ENTRY (sizeof(scoop2_regs)/sizeof(scoop2_reg_entry_t)) ++ ++ ++static int proc_scoop2_read_reg(struct file * file, char * buf, ++ size_t nbytes, loff_t *ppos) ++{ ++ int i_ino = (file->f_dentry->d_inode)->i_ino; ++ char outputbuf[15]; ++ int count; ++ int i; ++ scoop2_reg_entry_t* current_reg=NULL; ++ if (*ppos>0) /* Assume reading completed in previous read*/ ++ return 0; ++ for (i=0;iphyaddr)); ++ *ppos+=count; ++ if (count>nbytes) /* Assume output can be read at one time */ ++ return -EINVAL; ++ if (copy_to_user(buf, outputbuf, count)) ++ return -EFAULT; ++ return count; ++} ++ ++static ssize_t proc_scoop2_write_reg(struct file * file, const char * buffer, ++ size_t count, loff_t *ppos) ++{ ++ int i_ino = (file->f_dentry->d_inode)->i_ino; ++ scoop2_reg_entry_t* current_reg=NULL; ++ int i; ++ unsigned long newRegValue; ++ char *endp; ++ ++ for (i=0;iphyaddr)=newRegValue; ++ return (count+endp-buffer); ++} ++ ++#endif ++#ifdef USE_KUROHYO ++static ssize_t proc_kurohyo_read_reg(struct file * file, char * buf, ++ size_t nbytes, loff_t *ppos); ++static ssize_t proc_kurohyo_write_reg(struct file * file, const char * buffer, ++ size_t count, loff_t *ppos); ++ ++ ++static struct file_operations proc_kurohyo_reg_operations = { ++ read: proc_kurohyo_read_reg, ++ write: proc_kurohyo_write_reg ++}; ++ ++typedef struct kurohyo_reg_entry { ++ u32 phyaddr; ++ char* name; ++ char* description; ++ unsigned short low_ino; ++} kurohyo_reg_entry_t; ++ ++ ++static kurohyo_reg_entry_t kurohyo_regs[] = ++{ ++/* { phyaddr, name, description } */ ++ { 0x000, "PINTST", " " }, ++ { 0x008, "VHLIN", " " }, ++ { 0x00A, "CMDADR_L", " " }, ++ { 0x00C, "CMDADR_H", " " }, ++ { 0x00E, "CMDFIF", " " }, ++ { 0x010, "CMDFINT", " " }, ++ { 0x012, "BINTMSK", " " }, ++ { 0x014, "BINTST", " " }, ++ { 0x016, "FIPT", " " }, ++ { 0x018, "DMAST", " " }, ++ { 0x01C, "COMD_L", " "}, ++ { 0x01E, "COMD_H", " "}, ++ { 0x022, "FIFOR", " "}, ++ { 0x024, "COMSMD", " "}, ++ ++ { 0x100, "PLCNT", " " }, ++ { 0x102, "PLCST", " " }, ++ { 0x108, "PLIST", " " }, ++ { 0x10A, "PLIEN", " " }, ++ { 0x10C, "PLSEN", " " }, ++ { 0x122, "PLDSA_L", " " }, ++ { 0x124, "PLDSA_H", " " }, ++ { 0x12A, "PLPIT_L", " " }, ++ { 0x12C, "PLPIT_H", " " }, ++ { 0x12E, "PLGMD", " " }, ++ { 0x140, "PLHT", " " }, ++ { 0x142, "PLHDS", " " }, ++ { 0x144, "PLHSS", " " }, ++ { 0x146, "PLHSE", " " }, ++ { 0x14C, "PLHPX", " " }, ++ { 0x150, "PLVT", " " }, ++ { 0x152, "PLVDS", " " }, ++ { 0x154, "PLVSS", " " }, ++ { 0x156, "PLVSE", " " }, ++ { 0x160, "PLCLN", " " }, ++ { 0x162, "PLILN", " " }, ++ { 0x164, "PLMOD", " " }, ++ { 0x166, "MISC", " " }, ++ { 0x16A, "PWHSP", " " }, ++ { 0x16C, "PWVDS", " " }, ++ { 0x16E, "PWVDE", " " }, ++ { 0x170, "PWVSP", " " }, ++ { 0x180, "VWADR_L", " " }, ++ { 0x182, "VWADR_H", " " }, ++}; ++ ++ ++#define NUM_OF_KUROHYO_REG_ENTRY (sizeof(kurohyo_regs)/sizeof(kurohyo_reg_entry_t)) ++ ++#define KUROHYO_LCD_INNER_ADDRESS (TC6393_SYS_BASE+TC6393_GC_INTERNAL_REG_BASE) ++ ++static int proc_kurohyo_read_reg(struct file * file, char * buf, ++ size_t nbytes, loff_t *ppos) ++{ ++ int i_ino = (file->f_dentry->d_inode)->i_ino; ++ char outputbuf[15]; ++ int count; ++ int i; ++ kurohyo_reg_entry_t* current_reg=NULL; ++ if (*ppos>0) /* Assume reading completed in previous read*/ ++ return 0; ++ for (i=0;iphyaddr)); ++ *ppos+=count; ++ if (count>nbytes) /* Assume output can be read at one time */ ++ return -EINVAL; ++ if (copy_to_user(buf, outputbuf, count)) ++ return -EFAULT; ++ return count; ++} ++ ++static ssize_t proc_kurohyo_write_reg(struct file * file, const char * buffer, ++ size_t count, loff_t *ppos) ++{ ++ int i_ino = (file->f_dentry->d_inode)->i_ino; ++ kurohyo_reg_entry_t* current_reg=NULL; ++ int i; ++ unsigned long newRegValue; ++ char *endp; ++ ++ for (i=0;iphyaddr); ++ return (count+endp-buffer); ++} + + #endif + +@@ -814,6 +1045,14 @@ + static struct proc_dir_entry *scoop_regdir; + static struct proc_dir_entry *scoopdir; + #endif ++#ifdef USE_SCOOP2 ++static struct proc_dir_entry *scoop2_regdir; ++static struct proc_dir_entry *scoop2dir; ++#endif ++#ifdef USE_KUROHYO ++static struct proc_dir_entry *kurohyo_regdir; ++static struct proc_dir_entry *kurohyodir; ++#endif + + #ifdef USE_LOCOMO + static struct proc_dir_entry *locomo_regdir; +@@ -879,6 +1118,62 @@ + } + } + #endif ++#ifdef USE_SCOOP2 ++ scoop2dir = proc_mkdir(SCOOP2_DIRNAME, &proc_root); ++ if (scoop2dir == NULL) { ++ printk(KERN_ERR MODULE_NAME": can't create /proc/" SCOOP2_DIRNAME "\n"); ++ return(-ENOMEM); ++ } ++ ++ scoop2_regdir = proc_mkdir(REG_DIRNAME, scoop2dir); ++ if (scoop2_regdir == NULL) { ++ printk(KERN_ERR MODULE_NAME": can't create /proc/" SCOOP2_DIRNAME "/" REG_DIRNAME "\n"); ++ return(-ENOMEM); ++ } ++ ++ for(i=0;ilow_ino; ++ entry->proc_fops = &proc_scoop2_reg_operations; ++ } else { ++ printk( KERN_ERR MODULE_NAME ++ ": can't create /proc/" REG_DIRNAME ++ "/%s\n", scoop2_regs[i].name); ++ return(-ENOMEM); ++ } ++ } ++#endif ++#ifdef USE_KUROHYO ++ kurohyodir = proc_mkdir(KUROHYO_DIRNAME, &proc_root); ++ if (kurohyodir == NULL) { ++ printk(KERN_ERR MODULE_NAME": can't create /proc/" KUROHYO_DIRNAME "\n"); ++ return(-ENOMEM); ++ } ++ ++ kurohyo_regdir = proc_mkdir(REG_DIRNAME, kurohyodir); ++ if (kurohyo_regdir == NULL) { ++ printk(KERN_ERR MODULE_NAME": can't create /proc/" KUROHYO_DIRNAME "/" REG_DIRNAME "\n"); ++ return(-ENOMEM); ++ } ++ ++ for(i=0;ilow_ino; ++ entry->proc_fops = &proc_kurohyo_reg_operations; ++ } else { ++ printk( KERN_ERR MODULE_NAME ++ ": can't create /proc/" REG_DIRNAME ++ "/%s\n", kurohyo_regs[i].name); ++ return(-ENOMEM); ++ } ++ } ++#endif + + #ifdef USE_LOCOMO + locomodir = proc_mkdir(LOCOMO_DIRNAME, &proc_root); +@@ -925,6 +1220,18 @@ + remove_proc_entry(REG_DIRNAME, scoopdir); + remove_proc_entry(SCOOP_DIRNAME, &proc_root); + #endif ++#ifdef USE_SCOOP2 ++ for(i=0;i interruptible_sleep_on + * 13-Mar-2003 SHARP for PXA255 ++ * 29-Jan-2004 Sharp Corporation for Tosa ++ * 26-Feb-2004 Lineo Solutions, Inc. for Tosa + */ + + #include +@@ -72,6 +74,12 @@ + #include + #include + ++extern int errno; ++ ++// unistd.h is included for the configuration ioctl stuff ++#define __KERNEL_SYSCALLS__ 1 ++#include ++ + #ifdef CONFIG_ARCH_SHARP_SL + #include + #include +@@ -91,7 +99,7 @@ + #define KBDOWN (0) + + #ifdef CONFIG_APM_CPU_IDLE +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + #define SHARPSL_NEW_IDLE + #endif + #endif +@@ -99,9 +107,17 @@ + #if defined(CONFIG_SABINAL_DISCOVERY) + extern int discovery_get_main_battery(void); + #define get_main_battery discovery_get_main_battery +-#elif defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#elif defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) ++ + extern int sharpsl_get_main_battery(void); + #define get_main_battery sharpsl_get_main_battery ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++extern int sharpsl_jacket_battery; ++extern int sharpsl_jacket_exist; ++extern int sharpsl_get_cardslot_error(void); ++#endif ++ + #ifdef SHARPSL_NEW_IDLE + static int chg_freq_mode = 0; + #endif +@@ -119,17 +135,25 @@ + extern int HWR_flag; + #endif + ++#if defined(CONFIG_SL_CCCR_CHANGE) ++extern unsigned int cccr_clkparam; ++#endif ++ + #if defined(CONFIG_SABINAL_DISCOVERY) + #define SHARPSL_AC_LINE_STATUS (( ASIC3_GPIO_PSTS_D & AC_IN )? APM_AC_OFFLINE : APM_AC_ONLINE) + #define BACKPACK_IN_DETECT() ( ASIC3_GPIO_PSTS_D & BACKPACK_DETECT ) /* 0: exist , 1: not in */ + #else + #define SHARPSL_BATTERY_OK (( GPLR(GPIO_MAIN_BAT_LOW) & GPIO_bit(GPIO_MAIN_BAT_LOW) ) ? 1 : 0) /* 1: OK / 0: FATAL */ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++#define SHARPSL_AC_LINE_STATUS ((GPLR(GPIO_AC_IN) & GPIO_bit(GPIO_AC_IN)) ? APM_AC_OFFLINE : APM_AC_ONLINE) ++#else + #define SHARPSL_AC_LINE_STATUS ((GPLR(GPIO_AC_IN) & GPIO_bit(GPIO_AC_IN)) ? APM_AC_ONLINE : APM_AC_OFFLINE) + #endif ++#endif + + + /// ioctl +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + static u32 apm_event_mask = (APM_EVT_POWER_BUTTON); + #else + static u32 apm_event_mask = (APM_EVT_POWER_BUTTON | APM_EVT_BATTERY_STATUS); +@@ -151,6 +175,7 @@ + + #endif + ++#define DEBUG + #ifdef DEBUG + #define DPRINTK(x, args...) printk(__FUNCTION__ ": " x,##args) + #else +@@ -339,6 +364,7 @@ + }; + #define ERROR_COUNT (sizeof(error_table)/sizeof(lookup_t)) + ++#define APP_NAME_LIST "/etc/suspend.lst" + /* + * Function + */ +@@ -347,6 +373,8 @@ + static int set_power_state(u_short what, u_short state); + #ifndef CONFIG_SABINAL_DISCOVERY + extern int sharpsl_main_battery; ++extern int sharpsl_backup_battery; ++extern int sharpsl_bu_battery; + #endif + static int apm_get_power_status(u_char *ac_line_status, + u_char *battery_status, +@@ -440,7 +468,8 @@ + + #if defined(CONFIG_ARCH_PXA_POODLE) + if (irq == IRQ_GPIO_ON_KEY) { /* suspend */ +- //DPRINTK("irq=%d count=%d sharpsl_suspend_request%d\n",irq, count, sharpsl_suspend_request); ++ ++ DPRINTK("irq=%d count=%d sharpsl_suspend_request%d\n",irq, count, sharpsl_suspend_request); + if ( GPLR(GPIO_ON_KEY) & GPIO_bit(GPIO_ON_KEY) ) { + /* release */ + count = 0; +@@ -623,24 +652,75 @@ + struct task_struct* p = NULL; + struct task_struct* tsk = current; + ++ int fd,x; ++ mm_segment_t old_fs = get_fs (); ++ char line_buffer[256]; ++ + if (! spin_trylock(&lock)) + return; ++ ++ // Try opening the send sig application name list ++ set_fs(KERNEL_DS); ++// printk("open sig file\n"); ++ fd = open(APP_NAME_LIST, O_RDONLY, 0); ++ set_fs(old_fs); + + /* send signal to all procs except for kernel-threads */ + read_lock(&tasklist_lock); +- for_each_task(p) { +- struct siginfo si; + +- if (p->pid == 1 || p->pid == tsk->pid || is_kernel_thread(p)) +- continue; ++ if(fd < 0){ ++ for_each_task(p) { ++ struct siginfo si; ++ ++ if (p->pid == 1 || p->pid == tsk->pid || is_kernel_thread(p)) ++ continue; ++ if (!strcmp(p->comm,"cardmgr")) { //Send sig to cardmgr ++// printk ("Send SIG to application\n"); ++ si.si_signo = signo; ++ si.si_errno = 0; ++ si.si_code = SI_KERNEL; ++ si.si_pid = tsk->pid; ++ si.si_uid = tsk->uid; ++ send_sig_info(signo, &si, p); ++ } ++ } ++ ++ }else { ++ for(;;){ ++ memset(line_buffer, '\0', 256); ++ set_fs(KERNEL_DS); ++ for (x = 0; x < 256; x++) { ++ if (!read(fd, &line_buffer[x], 1)) ++ goto sig_send_done; ++ if (line_buffer[x] == '\n' || line_buffer[x] == '\r') ++ break; ++ } ++ set_fs(old_fs); ++ ++ for_each_task(p) { ++ struct siginfo si; ++ ++ if (p->pid == 1 || p->pid == tsk->pid || is_kernel_thread(p)) ++ continue; ++ if (!strncmp(p->comm,line_buffer,strlen(p->comm))) { //Send sig to cardmgr ++// printk ("Send SIG to application\n"); ++ si.si_signo = signo; ++ si.si_errno = 0; ++ si.si_code = SI_KERNEL; ++ si.si_pid = tsk->pid; ++ si.si_uid = tsk->uid; ++ send_sig_info(signo, &si, p); ++ } ++ } ++ } + +- si.si_signo = signo; +- si.si_errno = 0; +- si.si_code = SI_KERNEL; +- si.si_pid = tsk->pid; +- si.si_uid = tsk->uid; +- send_sig_info(signo, &si, p); ++ sig_send_done: ++// printk("close sig\n"); ++ close(fd); + } ++ ++ ++ + read_unlock(&tasklist_lock); + + if (signo == SIGSTOP) { +@@ -652,16 +732,58 @@ + schedule(); + set_current_state(state); + ++ set_fs(KERNEL_DS); ++ fd = open(APP_NAME_LIST, O_RDONLY, 0); ++// printk("open sigstop\n"); ++ set_fs(old_fs); ++ + read_lock(&tasklist_lock); +- for_each_task(p) { +- if (p->pid == 1 || p->pid == tsk->pid || is_kernel_thread(p)) +- continue; + +- if (p->state != TASK_STOPPED) { +- read_unlock(&tasklist_lock); +- goto retry; ++ if(fd < 0){ ++ for_each_task(p) { ++ if (p->pid == 1 || p->pid == tsk->pid || is_kernel_thread(p)) ++ continue; ++ if (!strcmp(p->comm,"cardmgr")) { ++// printk ("Check application stopped\n"); ++ ++ if (p->state != TASK_STOPPED) { ++ read_unlock(&tasklist_lock); ++ goto retry; ++ } ++ } + } ++ }else { ++ ++ for(;;){ ++ memset(line_buffer, '\0', 256); ++ old_fs = get_fs(); ++ set_fs(KERNEL_DS); ++ for (x = 0; x < 256; x++) { ++ if (!read(fd, &line_buffer[x], 1)) ++ goto sig_stop_done; ++ if (line_buffer[x] == '\n' || line_buffer[x] == '\r') ++ break; ++ } ++ set_fs(old_fs); ++ ++ for_each_task(p) { ++ if (p->pid == 1 || p->pid == tsk->pid || is_kernel_thread(p)) ++ continue; ++ if (!strncmp(p->comm,line_buffer,strlen(p->comm))) { ++// printk ("Check application stopped\n"); ++ ++ if (p->state != TASK_STOPPED) { ++ read_unlock(&tasklist_lock); ++ goto retry; ++ } ++ } ++ } ++ } ++ sig_stop_done: ++// printk("close sigstop\n"); ++ close(fd); + } ++ + read_unlock(&tasklist_lock); + } + +@@ -711,7 +833,11 @@ + } + + static spinlock_t locklockFCS = SPIN_LOCK_UNLOCKED; ++#if 0 // for debug ++static unsigned long lockFCS = 0x80000000; ++#else + static unsigned long lockFCS = 0; ++#endif + static int change_lockFCS = 0; + static spinlock_t lock_power_mode = SPIN_LOCK_UNLOCKED; + static unsigned long power_mode = 0; +@@ -986,6 +1112,49 @@ + + EXPORT_SYMBOL(lock_FCS); + ++#if defined(CONFIG_SL_CCCR_CHANGE) ++static ssize_t cccr_change_read_params(struct file *file, char *buf, ++ size_t nbytes, loff_t *ppos) ++{ ++ char outputbuf[32]; ++ int count; ++ ++ if (*ppos>0) /* Assume reading completed in previous read*/ ++ return 0; ++ count = sprintf(outputbuf, "0x%08X\n", (unsigned int)cccr_clkparam); ++ count++; ++ *ppos += count; ++ if (count>nbytes) /* Assume output can be read at one time */ ++ return -EINVAL; ++ if (copy_to_user(buf, outputbuf, count+1)) ++ return -EFAULT; ++ return count; ++} ++ ++static ssize_t cccr_change_write_params(struct file *file, const char *buf, ++ size_t nbytes, loff_t *ppos) ++{ ++ unsigned int param=0; ++ ++ sscanf(buf,"%x",¶m); ++ if (param) { ++ printk("Change CCCR = %x.\n",param); ++ cccr_clkparam = param; ++ sharpsl_chg_freq = param; ++ cpu_xscale_sl_change_speed_num(); ++ cccr_reg = CCCR; ++ printk("Changed CCCR = %x.\n",cccr_reg); ++ ++ } ++ return nbytes; ++} ++ ++static struct file_operations proc_cccr_change_params_operations = { ++ read: cccr_change_read_params, ++ write: cccr_change_write_params, ++}; ++#endif ++ + #ifdef CONFIG_APM_CPU_IDLE + #ifdef SHARPSL_NEW_IDLE + static int save_icmr; +@@ -1021,21 +1190,35 @@ + if ( !chg_freq_mode ) { + //LCM_LPT1 = 0x0080; + // if (!lockFCS || ((lockFCS == LOCK_FCS_FFUART) && (!(FFMSR & MSR_DSR)))) { ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if (!lockFCS) { ++#else + #if defined(CONFIG_ARCH_SHARP_SL_J) + if (!(lockFCS & ~LOCK_FCS_FFUART)) { + #else + if (!lockFCS) { + #endif ++#endif + #if defined(CONFIG_ARCH_PXA_POODLE) + while(1) { + if ( !( LCCR0 & 0x1 ) || ( GPLR(74) & GPIO_bit(74)) ) break; + } + #endif ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ CKEN &= ~CKEN2_AC97; ++#endif ++ + if ( cccr_reg == 0x145 ) { + cpu_xscale_sl_change_speed_121(); + } else { + cpu_xscale_change_speed_121(); + } ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ CKEN |= CKEN2_AC97; ++#endif ++ + } + } + chg_freq_mode = 1; +@@ -1100,22 +1283,46 @@ + } + #endif + MDREFR &= ~MDREFR_APD; +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ CKEN &= ~CKEN2_AC97; ++#endif ++ ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + if ( cccr_reg == 0x161 ) { + cpu_xscale_sl_change_speed_161(); + } + else if ( cccr_reg == 0x145 ) { + cpu_xscale_sl_change_speed_145(); ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ } else { ++ cccr_clkparam = (unsigned int)cccr_reg; ++ cpu_xscale_sl_change_speed_num(); ++ } ++#else + } else { + cpu_xscale_change_speed_241(); + } ++#endif + #else + if ( cccr_reg == 0x145 ) { + cpu_xscale_sl_change_speed_145(); ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ } else { ++ cccr_clkparam = (unsigned int)cccr_reg; ++ cpu_xscale_sl_change_speed_num(); ++ } ++#else + } else { + cpu_xscale_change_speed_241(); + } + #endif ++#endif ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ CKEN |= CKEN2_AC97; ++#endif ++ + } else { + MDREFR &= ~MDREFR_APD; + } +@@ -1281,6 +1488,11 @@ + u_short *battery_life) + { + ++#if defined(CONFIG_ARCH_PXA_TOSA) ++u_char dumm_status; ++u_short dumm_life; ++#endif ++ + #ifdef CONFIG_SABINAL_DISCOVERY + discovery_apm_get_power_status(ac_line_status, + battery_status, battery_flag, battery_percentage, battery_life); +@@ -1290,7 +1502,11 @@ + #if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) + sharpsl_apm_get_power_status(ac_line_status, + battery_status, battery_flag, battery_percentage, battery_life); +- ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++ sharpsl_apm_get_power_status(ac_line_status, ++ battery_status,&dumm_status,&dumm_status,battery_flag, ++ battery_percentage,&dumm_status,&dumm_status, ++ battery_life,&dumm_life,&dumm_life); + #endif + return APM_SUCCESS; + } +@@ -1302,12 +1518,15 @@ + u_short *battery_life) + { + +-#ifdef CONFIG_SABINAL_DISCOVERY +- ++#if defined(CONFIG_SABINAL_DISCOVERY) || defined(CONFIG_ARCH_PXA_TOSA) ++#if defined(CONFIG_SABINAL_DISCOVERY) + discovery_apm_get_bp_status(ac_line_status, + battery_status, battery_flag, battery_percentage, battery_life); +- ++#else ++ sharpsl_apm_get_bp_status(ac_line_status, ++ battery_status, battery_flag, battery_percentage, battery_life); + #endif // CONFIG_SABINAL_DISCOVERY ++#endif + return APM_SUCCESS; + } + +@@ -1475,6 +1694,9 @@ + is_goto_suspend = 1; + #ifdef CONFIG_PCMCIA + pcmcia_set_detect_interrupt(0, 0, 1); ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ pcmcia_set_detect_interrupt(1, 0, 1); ++#endif + #endif + send_sig_to_all_procs(SIGSTOP); + /* map all suspends to ACPI D3 */ +@@ -1498,6 +1720,9 @@ + resume_handling = 1; + #ifdef CONFIG_PCMCIA + pcmcia_set_detect_interrupt(0, 1, 0); ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ pcmcia_set_detect_interrupt(1, 1, 0); ++#endif + #endif + + #ifdef CONFIG_SABINAL_DISCOVERY +@@ -1533,6 +1758,9 @@ + send_sig_to_all_procs(SIGCONT); + #ifdef CONFIG_PCMCIA + pcmcia_set_detect_interrupt(0, 1, 1); ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ pcmcia_set_detect_interrupt(1, 1, 1); ++#endif + #endif + resume_handling = 0; + +@@ -1681,8 +1909,9 @@ + if (send_event(event)) { + queue_event(event, NULL); + waiting_for_resume = 1; +- if (suspends_pending <= 0) ++ if (suspends_pending <= 0){ + (void) suspend(); ++ } + } + break; + +@@ -1833,7 +2062,7 @@ + + for (;;) { + /* Nothing to do, just sleep for the timeout */ +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + timeout = 2*timeout; + if (timeout > APM_CHECK_TIMEOUT) + #endif +@@ -1863,7 +2092,7 @@ + + for (;;) { + /* Nothing to do, just sleep for the timeout */ +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + timeout = 2*timeout; + if (timeout > APM_CHECK_TIMEOUT) + #endif +@@ -2012,6 +2241,7 @@ + else + queue_event(APM_USER_SUSPEND, as); + if (suspends_pending <= 0) { ++ + if (suspend() != APM_SUCCESS) + return -EIO; + } else { +@@ -2040,7 +2270,7 @@ + case APM_IOC_GET_REGISTER: { + } break; + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + case APM_IOC_RESET_PM: { + extern int sharpsl_main_bk_flag; + sharpsl_main_bk_flag = 1; +@@ -2114,11 +2344,14 @@ + + case APM_IOC_BATTERY_BACK_CHK: { + //return collie_backup_battery; ++#ifdef CONFIG_ARCH_PXA_TOSA ++ return sharpsl_bu_battery; ++#endif + } break; + + case APM_IOC_BATTERY_MAIN_CHK: { + #ifndef CONFIG_SABINAL_DISCOVERY +- return sharpsl_main_battery; ++ return sharpsl_main_battery; + #endif + } break; + +@@ -2132,7 +2365,7 @@ + return 1; + } break; + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + case APM_IOC_SFREQ: { + int freq; + get_user(freq, (unsigned int *)(arg)); +@@ -2179,11 +2412,11 @@ + unsigned long flags; + + sleeping = 1; +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + sharpsl_off_mode = 1; + #endif + save_flags_cli(flags); +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + sharpsl_restart_nonstop(); + #else + sharpsl_restart(); +@@ -2213,7 +2446,25 @@ + apm_event_mask = arg; + return tmp; + } ++ ++ case APM_IOC_GET_CARDSLOT_ERROR: { ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ return sharpsl_get_cardslot_error(); ++#endif ++ } ++ ++ case APM_IOC_BATTERY_JACKET_CHK: { ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ return sharpsl_jacket_battery; ++#endif ++ } break; ++ ++ case APM_IOC_GET_JACKET_STATE: ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ return sharpsl_jacket_exist; ++#endif + #endif ++ + default: + return -EINVAL; + } +@@ -2236,8 +2487,9 @@ + } + if (as->suspends_pending > 0) { + suspends_pending -= as->suspends_pending; +- if (suspends_pending <= 0) ++ if (suspends_pending <= 0){ + (void) suspend(); ++ } + } + if (user_list == as) + user_list = as->next; +@@ -2367,7 +2619,7 @@ + } + + +-#ifdef CONFIG_SABINAL_DISCOVERY ++#if defined(CONFIG_SABINAL_DISCOVERY) || defined(CONFIG_ARCH_PXA_TOSA) + static int apm_bp_get_info(char *buf, char **start, off_t fpos, int length) + { + char * p; +@@ -2446,8 +2698,7 @@ + } + #endif + +- +-#ifdef CONFIG_SABINAL_DISCOVERY ++#if defined(CONFIG_SABINAL_DISCOVERY) + static int discovery_key_check(void *unused) + { + +@@ -2457,18 +2708,28 @@ + + while(1) { + +- interruptiblee_sleep_on(&fl_key); ++ interruptible_sleep_on(&fl_key); + + while(1) { + interruptible_sleep_on_timeout((wait_queue_head_t*)&queue, KEY_TICK ); +- if ( (ASIC3_GPIO_PSTS_A & PWR_ON_KEY) != 0 ) { //key up +- break; +- } ++#ifdef CONFIG_SABINAL_DISCOVERY ++ if ( (ASIC3_GPIO_PSTS_A & PWR_ON_KEY) != 0 ) { //key up ++ break; ++ } ++#else ++ if ( GPLR(GPIO_ON_KEY) & GPIO_bit(GPIO_ON_KEY) ) { ++ break; ++ } ++#endif + if ( ( jiffies - on_press_time ) < 0 ) { + + if ( ( jiffies + (0xffffffff - on_press_time) ) > FLONT_LIGHT_TOGGLE_TIME ) { + if ( apm_event_mask & APM_EVT_POWER_BUTTON ) { ++#ifdef CONFIG_SABINAL_DISCOVERY + discoveryfl_blank_power_button(); ++#else ++ sharpslfl_blank_power_button(); ++#endif + } else { + handle_scancode(SLKEY_FRONTLIGHT|KBDOWN , 1); + handle_scancode(SLKEY_FRONTLIGHT|KBUP , 0); +@@ -2480,7 +2741,11 @@ + if ( ( jiffies - on_press_time ) > FLONT_LIGHT_TOGGLE_TIME ) { + + if ( apm_event_mask & APM_EVT_POWER_BUTTON ) { ++#ifdef CONFIG_SABINAL_DISCOVERY + discoveryfl_blank_power_button(); ++#else ++ tosa_l_blank_power_button(); ++#endif + } else { + handle_scancode(SLKEY_FRONTLIGHT|KBDOWN , 1); + handle_scancode(SLKEY_FRONTLIGHT|KBUP , 0); +@@ -2623,6 +2888,7 @@ + struct proc_dir_entry *apm_proc; + struct proc_dir_entry *lock_fcs_proc; + struct proc_dir_entry *power_mode_proc; ++ struct proc_dir_entry *cccr_change_proc; + + apm_info.bios = apm_bios_info; + if (apm_info.bios.version == 0) { +@@ -2640,19 +2906,35 @@ + } + + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) ++#if defined(CONFIG_SL_CCCR242) ++ sharpsl_chg_freq = (unsigned int)0x00000242; ++ cccr_clkparam = (unsigned int)sharpsl_chg_freq; ++ cpu_xscale_sl_change_speed_num(); ++#elif defined(CONFIG_SL_CCCR162) ++ sharpsl_chg_freq = (unsigned int)0x00000162; ++ cccr_clkparam = (unsigned int)sharpsl_chg_freq; ++ cpu_xscale_sl_change_speed_num(); ++#else ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + sharpsl_chg_freq = (unsigned int)0x00000161; ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ cccr_clkparam = (unsigned int)sharpsl_chg_freq; ++#endif + cpu_xscale_sl_change_speed_161(); + #else + #if 1 // default 400MHz + sharpsl_chg_freq = (unsigned int)0x00000241; ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ cccr_clkparam = (unsigned int)sharpsl_chg_freq; ++#endif + #else + cpu_xscale_sl_change_speed_145_without_lcd(); + #endif + #endif ++#endif + cccr_reg = CCCR; +- printk("FCS : CCCR = %x\n",cccr_reg); ++// printk("FCS : CCCR = %x\n",cccr_reg); + #endif + + /* +@@ -2732,11 +3014,19 @@ + power_mode_proc->proc_fops = &proc_power_mode_params_operations; + } + ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ cccr_change_proc = create_proc_entry("cccr_change", 0, NULL); ++ if (cccr_change_proc) { ++ cccr_change_proc->proc_fops = &proc_cccr_change_params_operations; ++ } ++#endif ++ + kernel_thread(apm_thread, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGHAND | SIGCHLD); + +-#ifdef CONFIG_SABINAL_DISCOVERY ++#if defined(CONFIG_SABINAL_DISCOVERY) || defined(CONFIG_ARCH_PXA_TOSA) ++#if defined(CONFIG_SABINAL_DISCOVERY) + kernel_thread( discovery_key_check, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGHAND | SIGCHLD); +- ++#endif + { + struct proc_dir_entry *apm_proc_backpack; + +diff -Nur linux_c860_org/arch/arm/mach-pxa/sharpsl_deviceinfo.c linux/arch/arm/mach-pxa/sharpsl_deviceinfo.c +--- linux_c860_org/arch/arm/mach-pxa/sharpsl_deviceinfo.c 2002-11-14 19:27:18.000000000 +0900 ++++ linux/arch/arm/mach-pxa/sharpsl_deviceinfo.c 2004-06-10 21:09:10.000000000 +0900 +@@ -14,6 +14,10 @@ + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ * ChangeLog: ++ * 1-Nov-2003 Sharp Corporation for Tosa ++ * + */ + + #include +@@ -63,7 +67,10 @@ + {"serial", "device individual id"}, + {"checksum", "ROM checksum"}, + {"bootstr", "boot string"}, +- {"hardno", "hardware number"} ++ {"hardno", "hardware number"}, ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ {"equipment", "built-in equipment"}, ++#endif + }; + + #define NUM_OF_DEVICEINFO_ENTRY (sizeof(deviceinfo)/sizeof(deviceinfo_entry_t)) +diff -Nur linux_c860_org/arch/arm/mach-pxa/sharpsl_param.c linux/arch/arm/mach-pxa/sharpsl_param.c +--- linux_c860_org/arch/arm/mach-pxa/sharpsl_param.c 2002-10-23 14:09:20.000000000 +0900 ++++ linux/arch/arm/mach-pxa/sharpsl_param.c 2004-06-10 21:09:10.000000000 +0900 +@@ -16,11 +16,12 @@ + * GNU General Public License for more details. + * + * ChangeLog: ++ * 26-Feb-2004 Lineo Solutions, Inc. for Tosa + * + */ + #include + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + #include + #endif + +@@ -28,7 +29,7 @@ + sharpsl_flash_param_info sharpsl_flash_param; + + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + int sharpsl_get_comadj() + { + if ( sharpsl_flash_param.comadj_keyword == FLASH_COMADJ_MAJIC ) { +@@ -39,7 +40,7 @@ + } + #endif + +-#if defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + int sharpsl_get_phadadj() + { + if ( sharpsl_flash_param.phad_keyword == FLASH_PHAD_MAJIC ) { +@@ -51,7 +52,7 @@ + #endif + + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + void sharpsl_get_param(void) + { + // get comadj +diff -Nur linux_c860_org/arch/arm/mach-pxa/sharpsl_power.c linux/arch/arm/mach-pxa/sharpsl_power.c +--- linux_c860_org/arch/arm/mach-pxa/sharpsl_power.c 2003-10-09 14:47:25.000000000 +0900 ++++ linux/arch/arm/mach-pxa/sharpsl_power.c 2004-06-10 21:09:10.000000000 +0900 +@@ -35,6 +35,8 @@ + * 16-Jan-2003 SHARP sleep_on -> interruptible_sleep_on + * 09-Apr-2003 SHARP for Shaphard (software reset) + * October-2003 SHARP for boxer ++ * 28-Nov-2003 Sharp Corporation for Tosa ++ * 26-Feb-2004 Lineo Solutions, Inc. for Tosa + * + */ + +@@ -42,12 +44,17 @@ + /* + * Debug macros + */ ++//#define DEBUG 1 + #ifdef DEBUG + # define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args) + #else + # define DPRINTK(fmt, args...) + #endif + ++//#define WUPSRC_DEBUG ++#ifdef WUPSRC_DEBUG ++unsigned int debug1,debug2,debug3,debug4; ++#endif + + #include + #include +@@ -82,8 +89,15 @@ + #include + #elif defined(CONFIG_ARCH_PXA_CORGI) + #include ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++#include ++#include + #endif + ++#ifdef LOGICAL_WAKEUP_SRC ++#include ++unsigned long logical_wakeup_src_mask = IDPM_WAKEUP_REC|IDPM_WAKEUP_SYNC; ++#endif + #include "sharpsl_param.h" + + +@@ -116,9 +130,16 @@ + extern int cpu_pxa_do_suspend(void); + extern unsigned short chkFatalBatt(void); + extern int sharpsl_off_charge_battery(void); +-void pxa_ssp_init(void); ++extern int charge_status; + + #if defined(CONFIG_ARCH_PXA_POODLE) ++void pxa_ssp_init(void); ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++void tosa_ac97_init(void); ++int pxa_ac97_get(struct ac97_codec **codec, unsigned char *ac97_on); ++static unsigned char ac97_on = 0; ++#endif ++#if defined(CONFIG_ARCH_PXA_POODLE) + #define PWER_RTC 0x80000000 + #define R_WAKEUP_SRC (GPIO_bit(GPIO_AC_IN) | GPIO_bit(GPIO_CF_STSCHG) /*| + GPIO_bit(GPIO_CHRG_FULL) */ ) +@@ -139,6 +160,32 @@ + GPIO_bit(GPIO_AC_IN) | GPIO_bit(GPIO_MAIN_BAT_LOW)) + #define WAKEUP_SRC ( R_WAKEUP_SRC | F_WAKEUP_SRC | PWER_RTC ) + #define WAKEUP_DEF_SRC ( WAKEUP_SRC ); ++ ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++/* ++ ++GPIO_POWERON (0) ++GPIO_AC_IN (2) ++GPIO_RECORD_BTN (3) ++GPIO_SYNC (4) ++GPIO_USB_IN (5) ++GPIO_JACKET_DETECT (7) ++GPIO_nSD_DETECT (9) ++GPIO_nSD_INT (10) ++GPIO_BAT1_CRG (12) ++GPIO_CF_CD (13) ++GPIO_BAT0_CRG (14) ++*/ ++#define PWER_RTC 0x80000000 ++#define R_WAKEUP_SRC (GPIO_bit(GPIO_AC_IN) | GPIO_bit(GPIO_JACKET_DETECT)) ++#define F_WAKEUP_SRC (GPIO_bit(GPIO_POWERON) | GPIO_bit(GPIO_RESET) | \ ++ GPIO_bit(GPIO_AC_IN) | GPIO_bit(GPIO_RECORD_BTN) | \ ++ GPIO_bit(GPIO_SYNC) | GPIO_bit(GPIO_USB_IN) | \ ++ GPIO_bit(GPIO_JACKET_DETECT) ) ++#define WAKEUP_SRC ( R_WAKEUP_SRC | F_WAKEUP_SRC | PWER_RTC ) ++#define WAKEUP_DEF_SRC ( GPIO_bit(GPIO_POWERON) | GPIO_bit(GPIO_RESET) | \ ++ GPIO_bit(GPIO_AC_IN) | GPIO_bit(GPIO_JACKET_DETECT) | \ ++ GPIO_bit(GPIO_RECORD_BTN) | GPIO_bit(GPIO_SYNC) ) + #endif + + #if defined(CONFIG_SABINAL_DISCOVERY) +@@ -148,6 +195,7 @@ + u32 sharpsl_emergency_off = 0; + unsigned int sharpsl_chg_freq = 0x0145; + static DECLARE_WAIT_QUEUE_HEAD(wq_off); ++static DECLARE_WAIT_QUEUE_HEAD(key_off); + int sharpsl_off_mode = 0; + int sharpsl_off_state = 0; + int pass_charge_flag = 0; +@@ -158,18 +206,26 @@ + extern int corgi_wakeup_remocon_hook(void); + #endif + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + extern unsigned long cccr_reg; + static int sharpsl_alarm_flag; + #endif + ++//@@#if defined(CONFIG_ARCH_PXA_TOSA) ++//@@extern int sharpsl_get_jacket_status(void); ++//@@#endif ++ ++#if defined(CONFIG_SL_CCCR_CHANGE) ++extern unsigned int cccr_clkparam; ++#endif ++ + void PrintParamTable(void); + + #ifdef CONFIG_SABINAL_DISCOVERY + static u32 alarm_enable=0; + #endif + +-#ifdef CONFIG_ARCH_PXA_SHEPHERD ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + int sharpsl_restart(void) + { + return sharpsl_restart_core(0); +@@ -183,16 +239,23 @@ + int sharpsl_restart_core(int nonstop_flag) + { + int flag = 1; +- ++#if !defined(CONFIG_ARCH_PXA_TOSA) + if (nonstop_flag) { + SCP_REG_GPWR |= SCP_LED_GREEN; + } + else { + SCP_REG_GPWR &= ~SCP_LED_GREEN; + } +- ++#endif + RCSR = 0xf; + ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if( nonstop_flag && ((MSC0 & 0xffff0000) == 0x7ff00000) ) ++ MSC0 = (MSC0 & 0xffff)|0x7ee00000; ++ // GPIO reset ++ set_GPIO_mode(GPIO_ON_RESET | GPIO_OUT); ++ GPCR(GPIO_ON_RESET) |= GPIO_bit(GPIO_ON_RESET); ++#else + OSMR3 = OSCR+0x100; + OWER = 0x01; + OIER |= 0x08; +@@ -200,7 +263,7 @@ + while(1) { + if ( flag++ > 0x20000000 ) break; + } +- ++#endif + return 0; + } + #else +@@ -258,17 +321,47 @@ + + #if !defined(CONFIG_SABINAL_DISCOVERY) + +-#if defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + int sharpsl_wakeup_check_charge(void) + { ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ unsigned int pfer; ++ unsigned int prer; ++ ++ pfer = F_WAKEUP_SRC & apm_wakeup_src_mask & WAKEUP_SRC; ++ prer = R_WAKEUP_SRC & apm_wakeup_src_mask & WAKEUP_SRC; ++ //printk("pfer = %08x",pfer); ++ //printk("prer = %08x",prer); ++ ++ pfer &= ~(F_WAKEUP_SRC & R_WAKEUP_SRC); ++ prer &= ~(F_WAKEUP_SRC & R_WAKEUP_SRC); ++ //printk("pfer = %08x",pfer); ++ //printk("prer = %08x",prer); ++ ++ pfer = ~GPLR0 & pfer; ++ prer = GPLR0 & prer; ++ //printk("pfer = %08x",pfer); ++ //printk("prer = %08x",prer); ++ ++ if(pfer != 0 || prer != 0){ ++ apm_wakeup_factor = pfer | prer; ++ return 0; // wakeup ++ } ++ ++ if ( ( ( RTAR - RCNR ) < 20 ) && ( RTSR & RTSR_ALE ) ) { ++ return -1; // go off. ++ } ++ ++ return 1; // continue. ++#else + unsigned int temp; + + temp = ~GPLR0 & ( GPIO_bit(GPIO_AC_IN) | GPIO_bit(GPIO_KEY_INT) | GPIO_bit(GPIO_WAKEUP) ); + if ( temp != 0 ) { + apm_wakeup_factor = temp; + } +- + return temp; ++#endif + } + #endif + +@@ -276,31 +369,71 @@ + { + int i; + u32 gplr; ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ int batt_fault = ((PSSR & 0x02) != 0); ++#endif + + /* setting GPIO */ + GPDR0 = sys_ctx.gpdr0; + GAFR0_L = sys_ctx.gafr0_l; + GPDR0 &= ~WAKEUP_SRC; +- GAFR0_L &= ~WAKEUP_SRC; ++// GAFR0_L &= ~WAKEUP_SRC; + gplr = GPLR0; + ++#ifdef WUPSRC_DEBUG ++ debug1 = PEDR; ++ debug2 = WAKEUP_SRC; ++ debug3 = apm_wakeup_src_mask; ++ debug4 = PSSR; ++#endif + apm_wakeup_factor = PEDR & WAKEUP_SRC & apm_wakeup_src_mask; +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + apm_wakeup_factor &= ~0x80000000; /* clear ALARM */ + if ( ( RTSR & 0x1 ) && ( RTSR & RTSR_ALE ) ) + #else + if ( RTSR & 0x1 ) + #endif + apm_wakeup_factor |= 0x80000000; /* ALARM */ ++ ++ + PEDR = WAKEUP_SRC; + +- if ( !apm_wakeup_factor ) ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if(batt_fault) PSSR = 0x02; /* clear BFS bit */ ++#endif ++ ++ if ( !apm_wakeup_factor ){ + return 0; /* no wakeup factor */ ++ } + + #if defined(CONFIG_ARCH_PXA_CORGI) + gplr &= ~GPIO_bit(GPIO_KEY_INT); + #endif + ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ //if(PSSR & 0x02){ ++ if(batt_fault){ ++ // Asserted battery fault. ++ // It must have changed the main battery. ++ if(GPIO_bit(GPIO_POWERON) & apm_wakeup_factor){ ++ int change_ac_status = 0; ++ if ( apm_wakeup_src_mask & GPIO_bit(GPIO_AC_IN)){ ++ if ( !charge_status && ( gplr & GPIO_bit(GPIO_AC_IN) ) == 0) ++ change_ac_status = 1; ++ ++ if ( charge_status && ( gplr & GPIO_bit(GPIO_AC_IN) ) != 0) ++ change_ac_status = 1; ++ } ++ if(change_ac_status) ++ apm_wakeup_factor |= GPIO_bit(GPIO_AC_IN); ++ ++ return apm_wakeup_factor; ++ } ++ if(GPIO_bit(GPIO_RESET) & apm_wakeup_factor){ ++ return apm_wakeup_factor; ++ } ++ } ++#endif + /* Faulty operation check */ + for (i = 0; i <= 15; i++) { + #if defined(CONFIG_ARCH_PXA_CORGI) +@@ -329,27 +462,56 @@ + u32 gplr = GPLR0; + int is_resume = 0; + ++ DPRINTK("GPLR0 = %x\n",gplr); ++#ifdef WUPSRC_DEBUG ++ printk("PEDR=%08x\n",debug1); ++ printk("src=%08x\n",debug2); ++ printk("src_mask=%08x\n",debug3); ++ printk("PSSR=%08x->%08x\n",debug4,PSSR); ++#endif + if ( (apm_wakeup_factor & GPIO_bit(GPIO_AC_IN)) && + sharpsl_battery_charge_hook ) { ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if ( !(gplr & GPIO_bit(GPIO_AC_IN)) ) { ++#else + if ( gplr & GPIO_bit(GPIO_AC_IN) ) { ++#endif + sharpsl_battery_charge_hook(2); /* charge on */ + } else ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if ( gplr & GPIO_bit(GPIO_AC_IN) ) { ++#else + if ( !( gplr & GPIO_bit(GPIO_AC_IN) ) ) { ++#endif + sharpsl_battery_charge_hook(1); /* charge off */ + } + } ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if ( (apm_wakeup_factor & GPIO_bit(GPIO_BAT0_CRG)) && ++ sharpsl_battery_charge_hook ) { ++ sharpsl_battery_charge_hook(0); /* tosa: main battery full */ ++ } ++ if ( (apm_wakeup_factor & GPIO_bit(GPIO_BAT1_CRG)) && ++ sharpsl_battery_charge_hook ) { ++ sharpsl_battery_charge_hook(3); /* tosa: jacket battery full */ ++ } ++#else + if ( (apm_wakeup_factor & GPIO_bit(GPIO_CHRG_FULL)) && + sharpsl_battery_charge_hook ) { + sharpsl_battery_charge_hook(0); /* charge off */ + } ++#endif ++ + #if defined(CONFIG_ARCH_PXA_POODLE) + if ( apm_wakeup_factor & GPIO_bit(GPIO_ON_KEY) ) + is_resume |= GPIO_bit(GPIO_ON_KEY); + #endif + #if defined(CONFIG_ARCH_PXA_CORGI) + if ( apm_wakeup_factor & GPIO_bit(GPIO_KEY_INT) ) { +- if (sharppda_kbd_is_wakeup()) ++ if (sharppda_kbd_is_wakeup()){ + is_resume |= GPIO_bit(GPIO_KEY_INT); ++ } + } + #if defined(CONFIG_ARCH_PXA_SHEPHERD) + if ((apm_wakeup_factor & GPIO_bit(GPIO_MAIN_BAT_LOW)) && +@@ -373,14 +535,15 @@ + ( sharpsl_battery_charge_hook )) { + sharpsl_battery_charge_hook(1); /* charge off */ + } +- + #else + if ( apm_wakeup_factor & GPIO_bit(GPIO_MAIN_BAT_LOW) ) + apm_wakeup_src_mask = 0; + #endif + #endif ++#if !defined(CONFIG_ARCH_PXA_TOSA) + if ( apm_wakeup_factor & GPIO_bit(GPIO_WAKEUP) ) + is_resume |= GPIO_bit(GPIO_WAKEUP); ++#endif + #if defined(CONFIG_ARCH_PXA_POODLE) + if ( (apm_wakeup_factor & GPIO_bit(GPIO_GA_INT)) && (LCM_KIC & 1) ) { + LCM_KIC &= ~0x100; +@@ -397,28 +560,116 @@ + #endif + #if defined(CONFIG_ARCH_PXA_CORGI) + if ( apm_wakeup_factor & GPIO_bit(GPIO_AK_INT) ) { +- if ( corgi_wakeup_remocon_hook() ) ++ if ( corgi_wakeup_remocon_hook() ){ + is_resume |= GPIO_bit(GPIO_AK_INT); ++ } ++ } ++#endif ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if ( (apm_wakeup_factor & GPIO_bit(GPIO_AC_IN)) ) { ++#ifdef LOGICAL_WAKEUP_SRC ++ if (logical_wakeup_src_mask&IDPM_WAKEUP_AC) { ++ is_resume |= GPIO_bit(GPIO_AC_IN); ++ } ++#endif ++ } ++ if (apm_wakeup_factor & GPIO_bit(GPIO_POWERON)) { // function key ++ if (sharppda_kbd_is_wakeup()){ ++ is_resume |= GPIO_bit(GPIO_POWERON); ++ } ++ } ++ if (apm_wakeup_factor & GPIO_bit(GPIO_RECORD_BTN)) { // rec key ++ if (sharppda_kbd_is_wakeup()){ ++ is_resume |= GPIO_bit(GPIO_RECORD_BTN); ++ } ++ } ++ if (apm_wakeup_factor & GPIO_bit(GPIO_SYNC)) { // sync key ++ if (sharppda_kbd_is_wakeup()){ ++ is_resume |= GPIO_bit(GPIO_SYNC); ++ } ++ } ++ if (apm_wakeup_factor & GPIO_bit(GPIO_USB_IN)) { ++#ifdef LOGICAL_WAKEUP_SRC ++ if (logical_wakeup_src_mask&IDPM_WAKEUP_USBD) { ++ is_resume |= GPIO_bit(GPIO_USB_IN); ++ } ++#endif ++ } ++ if (apm_wakeup_factor & GPIO_bit(GPIO_JACKET_DETECT)){ ++ sharpsl_battery_charge_hook(4); ++#ifdef LOGICAL_WAKEUP_SRC ++ if (logical_wakeup_src_mask&IDPM_WAKEUP_JACKET) { ++ is_resume |= GPIO_bit(GPIO_JACKET_DETECT); ++ } ++#endif + } + #endif + +- DPRINTK("alarm flag = %8x\n",sharpsl_alarm_flag); +- if ( ( apm_wakeup_factor & PWER_RTC ) && !sharpsl_alarm_flag) ++ if ( ( apm_wakeup_factor & PWER_RTC ) && !sharpsl_alarm_flag){ + is_resume |= PWER_RTC; ++ } + + return is_resume; + } + #endif + +- ++#if defined(CONFIG_ARCH_PXA_TOSA) ++#define BATTERY_CHECK_TIME (60*5) // 5 min ++#else + #define BATTERY_CHECK_TIME 60*10 // 10 min +-extern int charge_status; ++#endif ++ ++//extern int charge_status; + extern int sharpsl_off_charge; + + ++#if defined(CONFIG_ARCH_PXA_TOSA) ++#if 0 ///////////////////////////////////////////////////////// ++static void tc6393_susx(void) ++{ ++#if 1 ++ reset_scoop_jc_gpio(SCP_JC_TC3693_L3V_ON); ++// reset_scoop_jc_gpio(SCP_JC_TC6393_SUSPEND); ++// reset_scoop_gpio(SCP_TC6393_REST_IN); ++#endif ++ ++// TC6393_SYS_REG(TC6393_SYS_GPOOECR1) = TC6393_CARD_VCC_ON; ++// TC6393_SYS_REG(TC6393_SYS_GPODSR1) = 0; /* CARD_VCC_OFF */ ++#if 1 ++// TC6393_SYS_REG(TC6393_SYS_GPOOECR1) = TC6393_GPO_OE; ++// TC6393_SYS_REG(TC6393_SYS_GPOOECR1) = TC6393_CARD_VCC_ON; ++ TC6393_SYS_REG(TC6393_SYS_GPODSR1) |= TC6393_CARD_VCC_ON; ++ TC6393_SYS_REG(TC6393_SYS_GPOOECR1) = TC6393_GPO_OE; ++#endif ++} ++ ++static void tc6393_resx(void) ++{ ++ set_GPIO_mode(GPIO11_3_6MHz_MD); ++ set_GPIO_mode(GPIO18_RDY_MD); ++ mdelay(1); ++ set_scoop_jc_gpio(SCP_JC_TC6393_SUSPEND); ++ mdelay(10); ++ set_scoop_gpio(SCP_TC6393_REST_IN); ++ //set_scoop_jc_gpio(SCP_JC_TC3693_L3V_ON); ++ TC6393_SYS_REG(TC6393_SYS_FER) = 0; ++ /* clock setting */ ++ TC6393_SYS_REG(TC6393_SYS_PLL2CR) = 0x0cc1; ++ TC6393_SYS_REG(TC6393_SYS_CCR) = 0x1310; ++ TC6393_SYS_REG(TC6393_SYS_MCR) = 0x80AA; ++ /* GPIO */ ++ TC6393_SYS_REG(TC6393_SYS_GPER) = 0x0030; /* 15-0 GPO */ ++ TC6393_SYS_REG(TC6393_SYS_GPOOECR1) = TC6393_GPO_OE; ++ /* 15-0 GPO set H */ ++ TC6393_SYS_REG(TC6393_SYS_GPODSR1) = TC6393_CARD_VCC_ON; ++} ++#endif /////////////////////////////////////////////// ++#endif + + int pxa_suspend(void) + { ++ + unsigned long flags; + #if defined (CONFIG_SABINAL_DISCOVERY) + unsigned long RTAR_buffer; +@@ -426,10 +677,11 @@ + #else + unsigned long RTAR_buffer; + unsigned long RTAR_buffer2; ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ unsigned long RCNR_buffer; ++#endif + #endif + +- +- + #ifndef CONFIG_SABINAL_DISCOVERY + sharpsl_off_state = 1; + +@@ -459,13 +711,22 @@ + cpu_xscale_sl_change_speed_145_without_lcd(); + cccr_reg = CCCR; + break; +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + case 0x161: + if ( CCCR == 0x0161 ) break; + cpu_xscale_sl_change_speed_161(); + cccr_reg = CCCR; + break; + #endif ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ default: ++ if ( (sharpsl_chg_freq & 0xffff) !=0 ){ ++ cccr_clkparam = (unsigned int)(sharpsl_chg_freq & 0xffff); ++ cpu_xscale_sl_change_speed_num(); ++ cccr_reg = CCCR; ++ } ++ break; ++#endif + } + sharpsl_chg_freq &= 0x0000ffff; + mdelay(500); +@@ -473,7 +734,7 @@ + } + #endif + +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + if (sharpsl_off_mode == 2) sharpsl_restart(); /* off in maintenance */ + #endif + +@@ -553,7 +814,7 @@ + ASIC3_GPIO_INTSTAT_D = 0; + #endif + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + if ( CCCR != 0x241 ) { + cpu_xscale_sl_change_speed_241_without_lcd(); + } +@@ -561,20 +822,39 @@ + DPRINTK("FCS : CCCR = %x\n",cccr_reg); + #endif + +- +-DO_SUSPEND: +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ // check jacket status. ++ sharpsl_request_dac_init(); // in sharpsl_battery.c ++ if(sharpsl_battery_charge_hook) ++ sharpsl_battery_charge_hook(4); // check jacket. ++#endif + ++DO_SUSPEND: + ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) ++ DPRINTK("pass_charge_flag = %d\n",pass_charge_flag); + if ( !pass_charge_flag ) { + // not charging and AC-IN ! +- if ( !charge_status && ( GPLR(GPIO_AC_IN) & GPIO_bit(GPIO_AC_IN)) != 0 ) { ++ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ DPRINTK("check AC-adaptor\n"); ++ if ( !charge_status && ( GPLR(GPIO_AC_IN) & GPIO_bit(GPIO_AC_IN) ) == 0){ ++#else ++ if ( !charge_status && ( GPLR(GPIO_AC_IN) & GPIO_bit(GPIO_AC_IN)) != 0){ ++#endif + DPRINTK("kick charging\n"); + charge_status = 1; + sharpsl_off_charge_battery(); + } + } + ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ tosa_check_ac_and_jacket_state(); ++ DPRINTK("ac97&tc6393 down\n"); ++ tc6393_suspend(); ++ tosa_ac97_exit(); ++#endif ++ + if ( charge_status ) { + if ( ( ( RTAR - RCNR ) < ( BATTERY_CHECK_TIME + 30 ) ) && ( RTSR & RTSR_ALE ) ) { + // maybe alarm will occur +@@ -611,6 +891,8 @@ + } else { + PGSR1 &= ~GPIO_bit(GPIO43_BTTXD); + } ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++// non + #endif + + #endif +@@ -657,12 +939,12 @@ + LCM_ICR &= ~0x100; + #endif + +-#if !defined(CONFIG_SABINAL_DISCOVERY) ++#if !defined(CONFIG_SABINAL_DISCOVERY) + /* Scoop suspend */ + sys_ctx.scp_gpwr = SCP_REG_GPWR; + SCP_REG_GPWR = 0; +-#endif + ++#endif + sys_ctx.gpdr0 = GPDR0; + sys_ctx.gpdr1 = GPDR1; + sys_ctx.gpdr2 = GPDR2; +@@ -718,7 +1000,9 @@ + PWER = WAKEUP_SRC & apm_wakeup_src_mask; + PRER = R_WAKEUP_SRC & apm_wakeup_src_mask; + PFER = F_WAKEUP_SRC & apm_wakeup_src_mask; ++ + PEDR = WAKEUP_SRC & apm_wakeup_src_mask; ++ + for (i = 0; i <=15; i++) { + if ( PRER & PFER & GPIO_bit(i) ) { + if ( GPLR0 & GPIO_bit(i) ) +@@ -728,14 +1012,13 @@ + } + } + +- + /* Clear reset status */ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ + PCFR = PCFR_OPDE; + +-#ifdef CONFIG_ARCH_PXA_CORGI ++#if defined(CONFIG_ARCH_PXA_CORGI) + /* GPIO Sleep Register */ + PGSR2 = (PGSR2 & ~GPIO_ALL_STROBE_BIT) | GPIO_STROBE_BIT(0); + +@@ -747,6 +1030,19 @@ + #endif + GPDR1 = 0x00FFAFC3; + GPDR2 = 0x0001C004; ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++ /* GPIO Sleep Register */ ++ PGSR1 = (PGSR1 & ~GPIO_LOW_STROBE_BIT); ++ PGSR2 = (PGSR2 & ~GPIO_HIGH_STROBE_BIT); ++#ifdef LOGICAL_WAKEUP_SRC ++ if (logical_wakeup_src_mask & ++ (IDPM_WAKEUP_ADDRESSBOOK|IDPM_WAKEUP_CALENDAR|IDPM_WAKEUP_MENU|IDPM_WAKEUP_MAIL)) { ++ PGSR1 |= GPIO_STROBE_BIT(4); ++ } ++#endif ++ GPDR0 = 0xC3810940; ++ GPDR1 = 0xFCFFAB82; ++ GPDR2 = 0x000F501f; + #endif + } + #endif +@@ -764,7 +1060,6 @@ + + #if !defined(CONFIG_SABINAL_DISCOVERY) + sharpsl_wakeup_check(); +- + FFMCR = sys_ctx.ffmcr; + FFSPR = sys_ctx.ffspr; + FFLCR = sys_ctx.fflcr; +@@ -847,15 +1142,42 @@ + #endif + + #if !defined(CONFIG_SABINAL_DISCOVERY) ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if ( sharpsl_alarm_flag ) { ++ RCNR_buffer = RCNR; ++ } ++ DPRINTK("ac97&tc6393 up\n"); ++ tosa_ac97_init(); ++ pxa_ac97_get(&codec,&ac97_on); // initialize 'codec' pointer ++ i2c_init(1); ++ tc6393_resume(); ++ ++ sharpsl_request_dac_init(); // in sharpsl_battery.c ++#else + pxa_ssp_init(); ++#endif + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + if ( sharpsl_alarm_flag ) { + RTAR_buffer2 = RTAR; + RTAR = RTAR_buffer; + DPRINTK("back the ALARM Time\n"); + } + ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if ( sharpsl_alarm_flag && ( RCNR_buffer == RTAR_buffer2 ) ) { ++ //printk("RCNR_buffer=%d\n",RCNR_buffer); ++ if(sharpsl_battery_charge_hook) ++ sharpsl_battery_charge_hook(5); ++#if 1 ++ if(tosa_check_charge_full(BATTERY_CHECK_TIME) < 0) { ++ goto DO_SUSPEND; ++ } ++#else ++ goto DO_SUSPEND; ++#endif ++ } ++#else + if ( sharpsl_alarm_flag && ( RCNR == RTAR_buffer2 ) ) { + if ( sharpsl_off_charge_battery() ) { + DPRINTK("charge timer \n"); +@@ -863,6 +1185,7 @@ + } + } + #endif ++#endif + + /* ----- hardware resume ----- */ + if ( !sharpsl_wakeup_hook() ) { +@@ -877,6 +1200,19 @@ + printk("return to suspend (fatal) ....\n"); + goto DO_SUSPEND; + } ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++ if ( (GPLR(GPIO_AC_IN) & GPIO_bit(GPIO_AC_IN)) == 0){ ++ if(sharpsl_off_charge_battery() < 0){ ++ printk("return to suspend (no main batt) ....\n"); ++ goto DO_SUSPEND; ++ } ++ } ++ ++ if ( ( (GPLR(GPIO_BAT_LOCKED) & GPIO_bit(GPIO_BAT_LOCKED)) == 0 ) ++ || ( !sharpsl_off_mode && chkFatalBatt() == 0 ) ) { ++ printk("return to suspend (fatal) ....\n"); ++ goto DO_SUSPEND; ++ } + #else + if ( ( (GPLR(GPIO_MAIN_BAT_LOW) & GPIO_bit(GPIO_MAIN_BAT_LOW)) == 0 ) + || ( chkFatalBatt() == 0 ) ) { +@@ -888,7 +1224,7 @@ + #endif + + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + PMCR = 0x01; + + if ( sharpsl_off_mode ) +@@ -896,24 +1232,33 @@ + #endif + + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + if ( sharpsl_chg_freq == 0x0145 ) { + cpu_xscale_sl_change_speed_145_without_lcd(); ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + } +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) + else if ( sharpsl_chg_freq == 0x0161 ) { + cpu_xscale_sl_change_speed_161(); ++#endif ++#if defined(CONFIG_SL_CCCR_CHANGE) + } ++ else if ( sharpsl_chg_freq != 0x0 ){ ++ cccr_clkparam = (unsigned int)sharpsl_chg_freq; ++ cpu_xscale_sl_change_speed_num(); + #endif ++ } ++ + cccr_reg = CCCR; + printk("FCS : CCCR = %x\n",cccr_reg); + #if defined(CONFIG_ARCH_PXA_SHEPHERD) && !defined(CONFIG_ARCH_SHARP_SL_J) + sharpsl_off_charge = 1; + #else ++ + sharpsl_off_charge = 0; + #endif + #endif + ++ + #if 1 // ensure that OS Timer irq occurs + OSMR0 = sys_ctx.oscr + LATCH; + #else +@@ -1004,16 +1349,14 @@ + int pm_do_suspend(void) + { + int retval; +- +- DPRINTK("yea\n"); +- + retval = pm_send_all(PM_SUSPEND, (void *)2); +- if (retval) ++ if (retval) + return retval; + + retval = pxa_suspend(); + + retval = pm_send_all(PM_RESUME, (void *)0); ++ + if (retval) + return retval; + +@@ -1040,7 +1383,7 @@ + + + +-int pxa_fatal_suspend(void) ++static int pxa_fatal_suspend(void) + { + unsigned long flags; + unsigned long RTAR_buffer; +@@ -1056,7 +1399,7 @@ + save_flags_cli(flags); + clf(); + +-#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_POODLE) || defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + if ( CCCR != 0x241 ) { + cpu_xscale_sl_change_speed_241_without_lcd(); + } +@@ -1092,6 +1435,8 @@ + PGSR1 &= ~GPIO_bit(GPIO43_BTTXD); + } + #endif ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++// non + #endif + + #if defined(CONFIG_ARCH_PXA_POODLE) +@@ -1145,6 +1490,7 @@ + PRER = R_WAKEUP_SRC & apm_wakeup_src_mask; + PFER = F_WAKEUP_SRC & apm_wakeup_src_mask; + PEDR = WAKEUP_SRC & apm_wakeup_src_mask; ++ + for (i = 0; i <=15; i++) { + if ( PRER & PFER & GPIO_bit(i) ) { + if ( GPLR0 & GPIO_bit(i) ) +@@ -1154,14 +1500,14 @@ + } + } + +- + /* Clear reset status */ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + + /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ + PCFR = PCFR_OPDE; + +-#ifdef CONFIG_ARCH_PXA_CORGI ++ ++#if defined(CONFIG_ARCH_PXA_CORGI) + /* GPIO Sleep Register */ + PGSR2 = (PGSR2 & ~GPIO_ALL_STROBE_BIT) | GPIO_STROBE_BIT(0); + +@@ -1172,6 +1518,19 @@ + #endif + GPDR1 = 0x00FFAFC3; + GPDR2 = 0x0001C004; ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++ /* GPIO Sleep Register */ ++ PGSR1 = (PGSR1 & ~GPIO_LOW_STROBE_BIT); ++ PGSR2 = (PGSR2 & ~GPIO_HIGH_STROBE_BIT); ++#ifdef LOGICAL_WAKEUP_SRC ++ if (logical_wakeup_src_mask & ++ (IDPM_WAKEUP_ADDRESSBOOK|IDPM_WAKEUP_CALENDAR|IDPM_WAKEUP_MENU|IDPM_WAKEUP_MAIL)) { ++ PGSR1 |= GPIO_STROBE_BIT(4); ++ } ++#endif ++ GPDR0 = 0xC3810940; ++ GPDR1 = 0xFCFFAB82; ++ GPDR2 = 0x000F501f; + #endif + } + #endif +@@ -1228,14 +1587,20 @@ + } + #endif + +-#if defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + #define SCP_INIT_DATA(adr,dat) (((adr)<<16)|(dat)) + #define SCP_INIT_DATA_END ((unsigned long)-1) + void sharpsl_corgi_fataloff(void) + { + #ifdef CONFIG_PM ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ tc6393_fatal_off(); ++ tc6393_suspend(); ++ tosa_ac97_exit(); ++#else + w100_fatal_off(); + #endif ++#endif + + { + static const unsigned long scp_init[] = +@@ -1253,12 +1618,37 @@ + SCP_INIT_DATA(SCP_GPWR,SCP_IO_OUT), // 24 + SCP_INIT_DATA_END + }; ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ static const unsigned long scp_jc_init[] = ++ { ++ SCP_INIT_DATA(SCP_MCR,0x0140), // 00 ++ SCP_INIT_DATA(SCP_MCR,0x0100), ++ SCP_INIT_DATA(SCP_CDR,0x0000), // 04 ++ SCP_INIT_DATA(SCP_CPR,0x0000), // 0C ++ SCP_INIT_DATA(SCP_CCR,0x0000), // 10 ++ SCP_INIT_DATA(SCP_IMR,0x0000), // 18 ++ SCP_INIT_DATA(SCP_IRM,0x00FF), // 14 ++ SCP_INIT_DATA(SCP_ISR,0x0000), // 1C ++ SCP_INIT_DATA(SCP_IRM,0x0000), ++ SCP_INIT_DATA(SCP_GPCR,SCP_JC_IO_DIR), // 20 ++ SCP_INIT_DATA(SCP_GPWR,SCP_JC_IO_OUT), // 24 ++ SCP_INIT_DATA_END ++ }; ++#endif + int i; + for(i=0; scp_init[i] != SCP_INIT_DATA_END; i++) + { + int adr = scp_init[i] >> 16; + SCP_REG(adr) = scp_init[i] & 0xFFFF; + } ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ for(i=0; scp_jc_init[i] != SCP_INIT_DATA_END; i++) ++ { ++ int adr = scp_jc_init[i] >> 16; ++ SCP_JC_REG(adr) = scp_jc_init[i] & 0xFFFF; ++ } ++#endif ++ + } + + } +@@ -1267,6 +1657,10 @@ + + void sharpsl_fataloff(void) + { ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ return; ++#endif ++ + if ( PSSR & 0x02 ) { + + printk("PSSR = %8x\n",PSSR); +@@ -1278,19 +1672,18 @@ + PSPR = 0x00; + RCSR = 0xf; + +- printk("off\n"); + pxa_fatal_suspend(); +- printk("off 2\n"); + #endif +-#if defined(CONFIG_ARCH_PXA_CORGI) ++#if defined(CONFIG_ARCH_PXA_CORGI) || defined(CONFIG_ARCH_PXA_TOSA) + sharpsl_corgi_fataloff(); + + PSPR = 0x00; + RCSR = 0xf; + +- printk("off\n"); + pxa_fatal_suspend(); +- printk("off 2\n"); ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ sharpsl_restart(); ++#endif + #endif + } + } +@@ -1308,15 +1701,14 @@ + interruptible_sleep_on(&wq_off); + DPRINTK("start off sequence ! \n"); + +-#if !defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if !defined(CONFIG_ARCH_PXA_SHEPHERD) && !defined(CONFIG_ARCH_PXA_TOSA) + sharpsl_off_mode = 1; + #endif +- + handle_scancode(SLKEY_OFF|KBDOWN , 1); + mdelay(10); + handle_scancode(SLKEY_OFF|KBUP , 0); + +-#if !defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if !defined(CONFIG_ARCH_PXA_SHEPHERD) && !defined(CONFIG_ARCH_PXA_TOSA) + // wait off signal + // if can not recieve off siganl , so force off. + time_cnt = jiffies; +@@ -1333,7 +1725,50 @@ + return 0; + } + +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if defined(CONFIG_SL7X0_POWER_KEY_OFF) ++static int key_suspend_thread(void* unused) ++{ ++ int time_cnt = 0; ++ ++ // daemonize(); ++ strcpy(current->comm, "off_thread"); ++ sigfillset(¤t->blocked); ++ ++ while(1) { ++ sleep_on(&key_off); ++ printk("start off sequence ! \n"); ++ ++ handle_scancode(SLKEY_OFF|KBDOWN , 1); ++ mdelay(10); ++ handle_scancode(SLKEY_OFF|KBUP , 0); ++ ++ // wait off signal ++ // if can not recieve off siganl , so force off. ++// time_cnt = jiffies; ++// while(1) { ++// if ( ( jiffies - time_cnt ) > 500 ) break; ++// schedule(); ++// } ++ ++ // maybe apps is dead, so we have to restart. ++ pm_do_suspend(); ++ } ++ return 0; ++} ++ ++void slc7x0_key_suspend(void) ++{ ++ apm_wakeup_src_mask = 0; ++ wake_up(&key_off); ++} ++ ++EXPORT_SYMBOL(slc7x0_key_suspend); ++ ++#endif ++ ++ ++ ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + static struct timer_list bat_switch_timer; + + void sharpsl_emerge_restart(void) +@@ -1347,10 +1782,16 @@ + void sharpsl_emerge_off(int irq, void *dev_id, struct pt_regs *regs) + { + ++ DPRINTK("DBG:sharpsl_emerge_off [non-battery]\n"); ++ + /* noise ? */ + mdelay(10); +- if ( 0x1234ABCD != regs && +- GPLR(GPIO_MAIN_BAT_LOW) & GPIO_bit(GPIO_MAIN_BAT_LOW) ) { ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ if ( 0x1234ABCD != regs && GPLR(GPIO_BAT_LOCKED) & GPIO_bit(GPIO_BAT_LOCKED) ) ++#else ++ if ( 0x1234ABCD != regs && GPLR(GPIO_MAIN_BAT_LOW) & GPIO_bit(GPIO_MAIN_BAT_LOW) ) ++#endif ++ { + #if defined(CONFIG_ARCH_PXA_SHEPHERD) + sharpsl_battery_charge_hook(1); /* charge off */ + if (sharppda_kbd_resetcheck()) { +@@ -1364,11 +1805,10 @@ + return; + } + +-#if defined(CONFIG_ARCH_PXA_CORGI) && !defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if (defined(CONFIG_ARCH_PXA_CORGI)) && !defined(CONFIG_ARCH_PXA_SHEPHERD) && !defined(CONFIG_ARCH_PXA_TOSA) + if (!(GPLR(GPIO_MAIN_BAT_LOW) & GPIO_bit(GPIO_MAIN_BAT_LOW))) + apm_wakeup_src_mask = 0; + #endif +- + wake_up(&wq_off); + + } +@@ -1386,6 +1826,8 @@ + /* Set transition detect */ + #ifdef CONFIG_ARCH_PXA_SHEPHERD + set_GPIO_IRQ_edge( GPIO_MAIN_BAT_LOW , GPIO_BOTH_EDGES ); ++#elif defined(CONFIG_ARCH_PXA_TOSA) ++ set_GPIO_IRQ_edge( GPIO_BAT_LOCKED , GPIO_BOTH_EDGES ); + #else + set_GPIO_IRQ_edge( GPIO_MAIN_BAT_LOW , GPIO_FALLING_EDGE ); + #endif +@@ -1394,17 +1836,29 @@ + /* this registration can be done in init/main.c. */ + if(1){ + int err; ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ err = request_irq(IRQ_GPIO_BAT_LOCKED,sharpsl_emerge_off , SA_INTERRUPT, "batok", NULL); ++#else + err = request_irq(IRQ_GPIO_MAIN_BAT_LOW,sharpsl_emerge_off , SA_INTERRUPT, "batok", NULL); ++#endif + if( err ){ + printk("batok install error %d\n",err); + }else{ ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ enable_irq(IRQ_GPIO_BAT_LOCKED); ++#else + enable_irq(IRQ_GPIO_MAIN_BAT_LOW); ++#endif + printk("batok installed\n"); + } + } + + kernel_thread(sharpsl_off_thread, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGHAND | SIGCHLD); +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if defined(CONFIG_SL7X0_POWER_KEY_OFF) ++ kernel_thread(key_suspend_thread, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGHAND | SIGCHLD); ++#endif ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) ++//#if defined(CONFIG_ARCH_PXA_SHEPHERD) + init_timer(&bat_switch_timer); + bat_switch_timer.function = sharpsl_emerge_restart; + #endif +@@ -1464,12 +1918,55 @@ + + void set_apm_wakeup_src_mask(u32 SetValue) + { ++#ifdef LOGICAL_WAKEUP_SRC ++ logical_wakeup_src_mask = 0; ++ // RTC ++ if (SetValue&IDPM_WAKEUP_RTC) { ++ apm_wakeup_src_mask |= GPIO_bit(31); ++ logical_wakeup_src_mask |= IDPM_WAKEUP_RTC; ++ } else apm_wakeup_src_mask &= ~GPIO_bit(31); ++#if defined(CONFIG_ARCH_PXA_TOSA) ++ // Sync key ++ if (SetValue&IDPM_WAKEUP_SYNC) { ++ apm_wakeup_src_mask |= GPIO_bit(GPIO_SYNC); ++ logical_wakeup_src_mask |= IDPM_WAKEUP_SYNC; ++ } else apm_wakeup_src_mask &= ~GPIO_bit(GPIO_SYNC); ++ // Record key ++ if (SetValue&IDPM_WAKEUP_REC) { ++ apm_wakeup_src_mask |= GPIO_bit(GPIO_RECORD_BTN); ++ logical_wakeup_src_mask |= IDPM_WAKEUP_REC; ++ } else apm_wakeup_src_mask &= ~GPIO_bit(GPIO_RECORD_BTN); ++ // USBD ++ if (SetValue&IDPM_WAKEUP_USBD) { ++ apm_wakeup_src_mask |= GPIO_bit(GPIO_USB_IN); ++ logical_wakeup_src_mask |= IDPM_WAKEUP_USBD; ++ } else apm_wakeup_src_mask &= ~GPIO_bit(GPIO_USB_IN); ++ // only Logical ++ if (SetValue&IDPM_WAKEUP_AC) logical_wakeup_src_mask |= IDPM_WAKEUP_AC; ++ if (SetValue&IDPM_WAKEUP_JACKET) logical_wakeup_src_mask |= IDPM_WAKEUP_JACKET; ++ if (SetValue&IDPM_WAKEUP_CALENDAR) logical_wakeup_src_mask |= IDPM_WAKEUP_CALENDAR; ++ if (SetValue&IDPM_WAKEUP_ADDRESSBOOK) logical_wakeup_src_mask |= IDPM_WAKEUP_ADDRESSBOOK; ++ if (SetValue&IDPM_WAKEUP_MAIL) logical_wakeup_src_mask |= IDPM_WAKEUP_MAIL; ++ if (SetValue&IDPM_WAKEUP_MENU) logical_wakeup_src_mask |= IDPM_WAKEUP_MENU; ++#ifdef WUPSRC_DEBUG ++ printk("set_wakeup_src=%08x->%08x[%08x]\n",SetValue,logical_wakeup_src_mask,apm_wakeup_src_mask); ++#endif ++#endif ++#else + apm_wakeup_src_mask = SetValue; ++#endif + } + + u32 get_apm_wakeup_src_mask(void) + { ++#ifdef LOGICAL_WAKEUP_SRC ++#ifdef WUPSRC_DEBUG ++ printk("get_wakeup_src=%08x\n",logical_wakeup_src_mask); ++#endif ++ return (u32)logical_wakeup_src_mask; ++#else + return (u32)apm_wakeup_src_mask; ++#endif + } + + u32 get_apm_wakeup_factor(void) +diff -Nur linux_c860_org/arch/arm/mach-pxa/sharpsl_suspend.S linux/arch/arm/mach-pxa/sharpsl_suspend.S +--- linux_c860_org/arch/arm/mach-pxa/sharpsl_suspend.S 2003-06-18 16:12:25.000000000 +0900 ++++ linux/arch/arm/mach-pxa/sharpsl_suspend.S 2004-06-10 21:09:10.000000000 +0900 +@@ -34,6 +34,7 @@ + * 12-Dec-2002 Lineo Japan, Inc. + * 12-Dec-2002 Sharp Corporation for Poodle and Corgi + * 14-Mar-2003 Sharp for PXA255 ++ * 26-Feb-2004 Lineo Solutions, Inc. for Tosa + */ + + #include +@@ -59,10 +60,17 @@ + + .global sleep_param + .global sleep_param_p ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ .global cccr_clkparam ++#endif + + sleep_param: .word 0 @ virtual address of parameter array + sleep_param_p: .word 0 @ physical address of parameter array + ++#if defined(CONFIG_SL_CCCR_CHANGE) ++cccr_clkparam: .word 0 ++#endif ++ + IC_BASE: .word io_p2v(0x40D00000) + + +@@ -228,7 +236,7 @@ + str r1, [r0] @ turn off all GPIOs + #endif + +- ldr r3, sleep_param ++ ldr r3, sleep_param + ldr r2, =Awake_address @ store Virtual return address + str r2, [r3], #4 + +@@ -1053,7 +1061,7 @@ + .align 5 + .text + +-#if defined(CONFIG_ARCH_PXA_SHEPHERD) ++#if defined(CONFIG_ARCH_PXA_SHEPHERD) || defined(CONFIG_ARCH_PXA_TOSA) + + ENTRY(cpu_xscale_sl_change_speed_161) + stmfd sp!, {r0, r1, r2, r3, r4, lr} +@@ -1081,3 +1089,30 @@ + .text + + #endif ++ ++#if defined(CONFIG_SL_CCCR_CHANGE) ++ENTRY(cpu_xscale_sl_change_speed_num) ++ stmfd sp!, {r0, r1, r2, r3, r4, lr} ++ ++ ldr r0, CMR_BASE ++ ldr r1, cccr_clkparam ++ str r1, [r0, #CMR_CCCR] ++ ++ ldr r0, MD_BASE ++ ldr r2, [r0, #MD_MDREFR] ++ ++ bl CodeOnCache_num ++ ++ .align 5 ++ .text ++CodeOnCache_num: ++ mov r1, #0x2 ++ mcr p14, 0, r1, c6, c0, 0 ++ str r2, [r0, #MD_MDREFR] ++ ldr r2, [r0, #MD_MDREFR] ++ ++ ldmfd sp!, {r0, r1, r2, r3, r4, pc} ++ ++ .align 5 ++ .text ++#endif +diff -Nur linux_c860_org/arch/arm/mach-pxa/tosa.c linux/arch/arm/mach-pxa/tosa.c +--- linux_c860_org/arch/arm/mach-pxa/tosa.c 1970-01-01 09:00:00.000000000 +0900 ++++ linux/arch/arm/mach-pxa/tosa.c 2004-06-10 21:09:10.000000000 +0900 +@@ -0,0 +1,483 @@ ++/* ++ * arch/arm/mach-pxa/tosa.c ++ * ++ * Support for the SHARP Tosa Board. ++ * ++ * (C) Copyright 2004 Lineo Solutions, Inc. ++ * ++ * Based on: ++ * linux/arch/arm/mach-pxa/lubbock.c ++ * ++ * Support for the Intel DBPXA250 Development Platform. ++ * ++ * Author: Nicolas Pitre ++ * Created: Jun 15, 2001 ++ * Copyright: MontaVista Software Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Change Log ++ * 26-Dec-2003 Sharp Corporation for Tosa ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "generic.h" ++#include ++#include ++#ifdef CONFIG_PM ++static struct pm_dev *ga_pm_dev; ++extern int pxa_suspend(void); ++#endif ++ ++extern void sharpsl_get_param(void); ++extern void sharpsl_charge_start(void); ++//extern unsigned short chkFatalBatt(void); ++extern void pxa_nssp_init(void); ++extern void tosa_ac97_init(void); ++extern void i2c_init(int reset); ++ ++unsigned short reset_scoop_gpio(unsigned short); ++ ++static void tc6393_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs ) ++{ ++ int req, i; ++ ++ while ( (req = (TC6393_SYS_REG(TC6393_SYS_ISR) ++ & ~(TC6393_SYS_REG(TC6393_SYS_IMR)))) ) { ++ for (i = 0; i <= 7; i++) { ++ if ((req & (0x0001<> 16; ++ SCP_REG(adr) = scp_init[i] & 0xFFFF; ++ } ++} ++ ++static spinlock_t scoop_lock = SPIN_LOCK_UNLOCKED; ++ ++unsigned short set_scoop_gpio(unsigned short bit) ++{ ++ unsigned short gpio_bit; ++ unsigned long flag; ++ ++ spin_lock_irqsave(&scoop_lock, flag); ++ gpio_bit = SCP_REG_GPWR | bit; ++ SCP_REG_GPWR = gpio_bit; ++ spin_unlock_irqrestore(&scoop_lock, flag); ++ ++ return gpio_bit; ++} ++EXPORT_SYMBOL(set_scoop_gpio); ++ ++unsigned short reset_scoop_gpio(unsigned short bit) ++{ ++ unsigned short gpio_bit; ++ unsigned long flag; ++ ++ spin_lock_irqsave(&scoop_lock, flag); ++ gpio_bit = SCP_REG_GPWR & ~bit; ++ SCP_REG_GPWR = gpio_bit; ++ spin_unlock_irqrestore(&scoop_lock, flag); ++ ++ return gpio_bit; ++} ++EXPORT_SYMBOL(reset_scoop_gpio); ++ ++ ++static void __init scoop_jc_init(void) ++{ ++ static const unsigned long scp_jc_init[] = ++ { ++ SCP_INIT_DATA(SCP_MCR,0x0140), // 00 ++ SCP_INIT_DATA(SCP_MCR,0x0100), ++ SCP_INIT_DATA(SCP_CDR,0x0000), // 04 ++ SCP_INIT_DATA(SCP_CPR,0x0000), // 0C ++ SCP_INIT_DATA(SCP_CCR,0x0000), // 10 ++ SCP_INIT_DATA(SCP_IMR,0x0000), // 18 ++ SCP_INIT_DATA(SCP_IRM,0x00FF), // 14 ++ SCP_INIT_DATA(SCP_ISR,0x0000), // 1C ++ SCP_INIT_DATA(SCP_IRM,0x0000), ++ SCP_INIT_DATA(SCP_GPCR,SCP_JC_IO_DIR), // 20 ++ SCP_INIT_DATA(SCP_GPWR,SCP_JC_IO_OUT), // 24 ++ SCP_INIT_DATA_END ++ }; ++ int i; ++ for(i=0; scp_jc_init[i] != SCP_INIT_DATA_END; i++) { ++ int adr = scp_jc_init[i] >> 16; ++ SCP_JC_REG(adr) = scp_jc_init[i] & 0xFFFF; ++ } ++ ++ reset_scoop_gpio(SCP_IR_POWERDWN); ++} ++ ++static spinlock_t scoop_jc_lock = SPIN_LOCK_UNLOCKED; ++ ++unsigned short set_scoop_jc_gpio(unsigned short bit) ++{ ++ unsigned short gpio_bit; ++ unsigned long flag; ++ ++ spin_lock_irqsave(&scoop_jc_lock, flag); ++ gpio_bit = SCP_JC_REG_GPWR | bit; ++ SCP_JC_REG_GPWR = gpio_bit; ++ spin_unlock_irqrestore(&scoop_jc_lock, flag); ++ ++ return gpio_bit; ++} ++EXPORT_SYMBOL(set_scoop_jc_gpio); ++ ++unsigned short reset_scoop_jc_gpio(unsigned short bit) ++{ ++ unsigned short gpio_bit; ++ unsigned long flag; ++ ++ spin_lock_irqsave(&scoop_jc_lock, flag); ++ gpio_bit = SCP_JC_REG_GPWR & ~bit; ++ SCP_JC_REG_GPWR = gpio_bit; ++ spin_unlock_irqrestore(&scoop_jc_lock, flag); ++ ++ return gpio_bit; ++} ++EXPORT_SYMBOL(reset_scoop_jc_gpio); ++ ++static void tc6393_init(void) ++{ ++ reset_scoop_jc_gpio(SCP_JC_TC3693_L3V_ON); ++ reset_scoop_jc_gpio(SCP_JC_TC6393_SUSPEND); ++ reset_scoop_gpio(SCP_TC6393_REST_IN); ++ set_GPIO_mode(GPIO11_3_6MHz_MD); ++ set_GPIO_mode(GPIO18_RDY_MD); ++ mdelay(1); ++ set_scoop_jc_gpio(SCP_JC_TC6393_SUSPEND); ++ mdelay(10); ++ set_scoop_gpio(SCP_TC6393_REST_IN); ++ set_scoop_jc_gpio(SCP_JC_TC3693_L3V_ON); ++ ++ printk("init TC6369 Revision %d\n", TC6393_SYS_REG(TC6393_SYS_RIDR)); ++ TC6393_SYS_REG(TC6393_SYS_FER) = 0; ++ ++ /* clock setting */ ++ TC6393_SYS_REG(TC6393_SYS_PLL2CR) = 0x0cc1; ++ //TC6393_SYS_REG(TC6393_SYS_ConfigCR) = 0x1; ++ //TC6393_SYS_REG(TC6393_SYS_PLL1CR1) = 0xdf00; ++ //TC6393_SYS_REG(TC6393_SYS_PLL1CR2) = 0x002c; ++ //TC6393_SYS_REG(TC6393_SYS_ConfigCR) = 0x0; ++ TC6393_SYS_REG(TC6393_SYS_CCR) = 0x1310; ++ ++ TC6393_SYS_REG(TC6393_SYS_MCR) = 0x80AA; ++ ++ /* GPIO */ ++ TC6393_SYS_REG(TC6393_SYS_GPER) = 0x3300; /* 15-0 GPO */ ++// TC6393_SYS_REG(TC6393_SYS_GPOOECR1) = TC6393_GPO_OE; ++// TC6393_SYS_REG(TC6393_SYS_GPODSR1) = TC6393_CARD_VCC_ON;/* 15-0 GPO set */ ++ TC6393_SYS_REG(TC6393_SYS_GPODSR1) = TC6393_CARD_VCC_ON | TC6393_CHARGE_OFF_JC;/* 15-0 GPO set */ ++ TC6393_SYS_REG(TC6393_SYS_GPOOECR1) = TC6393_GPO_OE; ++ ++} ++ ++void tc6393_resume(void) ++{ ++ tc6393_init(); ++} ++EXPORT_SYMBOL(tc6393_resume); ++ ++void tc6393_suspend(void) ++{ ++ reset_scoop_jc_gpio(SCP_JC_TC3693_L3V_ON); ++ reset_scoop_gpio(SCP_TC6393_REST_IN); ++ reset_scoop_jc_gpio(SCP_JC_TC6393_SUSPEND); ++ set_GPIO_mode(GPIO11_3_6MHz|GPIO_OUT); ++ GPSR0 = GPIO_bit(GPIO11_3_6MHz); ++} ++EXPORT_SYMBOL(tc6393_suspend); ++ ++#ifdef CONFIG_PM ++static int ga_pm_callback(struct pm_dev* pm_dev, pm_request_t req, void *data) ++{ ++ switch (req) { ++ case PM_SUSPEND: ++ break; ++ case PM_RESUME: ++ break; ++ } ++ return 0; ++} ++#endif ++ ++void resume_init(void) ++{ ++// MSC0 = 0x02da02da; //msc0 ++// MSC1 = 0x7FFC7FFC; //msc1 ++// MSC2 = 0x7FF47FFC; //msc2 ++ ++// GPDR0=0xDB828000; ++// GPDR1=0xFFB6A887; ++// GPDR2=0x0001FFFF; ++ ++// PGSR0 = 0x01008000; //Sleep State ++// PGSR1 = 0x00160802; //Sleep State ++// PGSR2 = 0x0001C000; //Sleep State ++ ++#if 0 ++ GRER0 = (GRER0 | 1); //raising ++ GFER0 = (GFER0 | 1); //failing ++ ++ ICLR = 0; ++ ++ ICMR |= (1 << 10); //bit10, gpio02_80 enable ++ ICMR |= (1 << 8); //bit8, gpio00 enable ++ ++ ICCR = 1; //Only enabled and unmasked will bring the Cotulla out of IDLE mode. ++#endif ++ ++ CKEN |= 0x03; ++ CKEN |= CKEN3_SSP; ++ CKEN |= CKEN1_PWM1; ++} ++ ++static int __init tosa_hw_init(void) ++{ ++ ++ /* scoop initialize */ ++ scoop_init(); ++ scoop_jc_init(); ++ ++ /* initialize I2C */ ++ i2c_init(1); ++ ++ /* TC6393 initialize */ ++ tc6393_init(); ++ ++ /* initialize SSP & CS */ ++ pxa_nssp_init(); ++ ++ /* initialize AC97 */ ++ tosa_ac97_init(); ++ ++ return 0; ++} ++ ++static void __init tosa_init_irq(void) ++{ ++ int irq; ++ ++ pxa_init_irq(); ++ ++ /* setup extra tosa irqs */ ++ TC6393_SYS_REG(TC6393_SYS_IRR) = 0; ++ TC6393_SYS_REG(TC6393_SYS_IMR) = 0xbf; ++ for (irq = TC6393_IRQ(0); irq <= TC6393_IRQ(7); irq++) { ++ irq_desc[irq].valid = 1; ++ irq_desc[irq].probe_ok = 1; ++ irq_desc[irq].mask_ack = tc6393_mask_and_ack_irq; ++ irq_desc[irq].mask = tc6393_mask_irq; ++ irq_desc[irq].unmask = tc6393_unmask_irq; ++ } ++ GPDR(GPIO_TC6393_INT) &= ~GPIO_bit(GPIO_TC6393_INT); ++ set_GPIO_IRQ_edge( GPIO_TC6393_INT, GPIO_FALLING_EDGE ); ++ setup_arm_irq( IRQ_GPIO_TC6393_INT, &tc6393_irq ); ++ ++ tosa_hw_init(); ++} ++ ++static int __init tosa_init(void) ++{ ++#ifdef CONFIG_PM ++ extern u32 sharpsl_emergency_off; ++#endif ++ ++ // enable batt_fault ++ PMCR = 0x01; ++ ++ /* charge check */ ++ if ((GPLR(GPIO_AC_IN) & GPIO_bit(GPIO_AC_IN)) == 0) { ++ sharpsl_charge_start(); ++ } ++ ++ //sharpsl_kick_jacket_check_queue(); ++ ++ printk("RCSR = %d\n",RCSR); ++ ++#ifdef CONFIG_PM ++ /* fatal check */ ++#ifndef CONFIG_ARCH_PXA_TOSA_SKIP ++ if ( !(GPLR(GPIO_MAIN_BAT_LOW) & GPIO_bit(GPIO_MAIN_BAT_LOW)) ) { ++ printk("corgi.c : main batt low\n"); ++ sharpsl_emergency_off = 1; ++ pxa_suspend(); ++ } ++#endif /* CONFIG_ARCH_PXA_TOSA_SKIP */ ++ ++ if ( RCSR == 0x01 || RCSR == 0x6) { ++ printk("full reset !\n"); ++ sharpsl_emergency_off = 1; ++ } ++ ++ ga_pm_dev = pm_register(PM_SYS_DEV, 0, ga_pm_callback); ++#endif ++ ++ return 0; ++} ++ ++__initcall(tosa_init); ++ ++static void __init fixup_tosa(struct machine_desc *desc, ++ struct param_struct *params, ++ char **cmdline, struct meminfo *mi) ++{ ++ SET_BANK (0, 0xa0000000, 64*1024*1024); ++ mi->nr_banks = 1; ++#if defined(CONFIG_BLK_DEV_INITRD) ++ setup_ramdisk (1, 0, 0, 8192); ++ setup_initrd (__phys_to_virt(0xa1000000), 4*1024*1024); ++ ROOT_DEV = MKDEV(RAMDISK_MAJOR,0); ++#elif defined(CONFIG_MTD) ++ ROOT_DEV = MKDEV(31, 0); /* /dev/mtdblock0 */ ++#endif ++ ++#ifdef CONFIG_SHARPSL_BOOTLDR_PARAMS ++ if (params->u1.s.page_size != PAGE_SIZE) { ++ params->u1.s.page_size = PAGE_SIZE; ++ params->u1.s.nr_pages = 32 * 1024 * 1024 / PAGE_SIZE; ++ params->u1.s.ramdisk_size = 0; ++ params->u1.s.flags = FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT; ++ params->u1.s.rootdev = ROOT_DEV; ++ params->u1.s.initrd_start = 0; ++ params->u1.s.initrd_size = 0; ++ params->u1.s.rd_start = 0; ++ params->u1.s.system_rev = 0; ++ params->u1.s.system_serial_low = 0; ++ params->u1.s.system_serial_high = 0; ++ strcpy(params->commandline, CONFIG_CMDLINE); ++ } ++#endif ++ ++ sharpsl_get_param(); ++} ++ ++static struct map_desc tosa_io_desc[] __initdata = { ++ /* virtual physical length domain r w c b */ ++ /* TC6393 (LCDC, USBC, NANDC) */ ++ { 0xf1000000, TOSA_LCDC_PHYS, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, ++ /* SCOOP2 for internel CF */ ++ { 0xf2000000, TOSA_CF_PHYS, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, ++ /* SCOOP2 for Jacket CF */ ++ { 0xf2200000, TOSA_SCOOP_PHYS, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, ++ /* Nor Flash */ ++ { 0xef000000, 0x00000000, 0x00800000, DOMAIN_IO, 1, 1, 1, 0 }, ++ LAST_DESC ++}; ++ ++static void __init tosa_map_io(void) ++{ ++ pxa_map_io(); ++ iotable_init(tosa_io_desc); ++ ++ set_GPIO_mode(GPIO_ON_RESET | GPIO_IN); ++ ++ /* setup sleep mode values */ ++ PWER = 0x00000002; ++ PFER = 0x00000000; ++ PRER = 0x00000002; ++ PGSR0 = 0x00000000; ++ PGSR1 = 0x00FF0002; ++ PGSR2 = 0x00014000; ++ PCFR |= PCFR_OPDE; ++} ++ ++MACHINE_START(TOSA, "SHARP Tosa") ++ MAINTAINER("Lineo uSolutions, Inc.") ++ BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000)) ++#ifdef CONFIG_SHARPSL_BOOTLDR_PARAMS ++ BOOT_PARAMS(0xa0000100) ++#endif ++ FIXUP(fixup_tosa) ++ MAPIO(tosa_map_io) ++ INITIRQ(tosa_init_irq) ++MACHINE_END ++ +diff -Nur linux_c860_org/arch/arm/mach-pxa/tosa_ac97.c linux/arch/arm/mach-pxa/tosa_ac97.c +--- linux_c860_org/arch/arm/mach-pxa/tosa_ac97.c 1970-01-01 09:00:00.000000000 +0900 ++++ linux/arch/arm/mach-pxa/tosa_ac97.c 2004-06-10 21:09:10.000000000 +0900 +@@ -0,0 +1,587 @@ ++/* ++ * linux/asm/arch/mach-pxa/tosa_ac97.c ++ * ++ * AC97 interface for the Tosa chip ++ * ++ * (C) Copyright 2004 Lineo Solutions, Inc. ++ * ++ * Based on: ++ * linux/drivers/sound/pxa-ac97.c -- AC97 interface for the Cotula chip ++ * Author: Nicolas Pitre ++ * Created: Aug 15, 2001 ++ * Copyright: MontaVista Software Inc. ++ * ++ * linux/drivers/sound/ac97_codec.c -- Generic AC97 mixer/modem module ++ * Derived from ac97 mixer in maestro and trident driver. ++ * Copyright 2000 Silicon Integrated System Corporation ++ * ++ * ChangeLong: ++ * 1-Nov-2003 Sharp Corporation for Tosa ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#ifdef CONFIG_PM ++#include ++#endif ++ ++#define CODEC_ID_BUFSZ 14 ++ ++typedef struct { ++ unsigned short ctl_val, pdown_val; ++} power_mode_t; ++ ++static power_mode_t pwr_values[] = { ++ { 0x6F00, 0x7FFF }, // Off ++ { 0x4600, 0x73FF }, // Rec with no HP ++ { 0x4100, 0x1F77 }, // Play with no HP ++ { 0x4600, 0x73FF }, // Rec with Stereo HP ++ { 0x0100, 0x1CEF }, // Play with Stereo HP ++ { 0x4600, 0x73FF }, // Rec with Mic HP ++ { 0x0100, 0x1EEF }, // Play with Mic HP ++ { 0x4700, 0x7FFF }, // Tablet (waiting for pen-down) ++ { 0x4700, 0x7FFF }, // Tablet (continuous conversion) ++ { 0x4700, 0x7BFF }, // Enable MICBIAS for detecting Mic HP ++ { 0x0000, 0x0000 }, // Full power ++}; ++static const int num_of_pwr_values = sizeof(pwr_values)/sizeof(pwr_values[0]); ++ ++static power_mode_t power_mode_status[NUM_OF_WM9712_DEV]; ++static power_mode_t cur_power_status; ++ ++struct ac97_codec *codec; ++ ++static struct completion CAR_completion; ++static DECLARE_MUTEX(CAR_mutex); ++ ++/************************************************************ ++ * Debug ++ ************************************************************/ ++#define DBG_LEVEL 0 ++#define DBG_L1 1 ++#define DBG_L2 2 ++#define DBG_L3 3 ++#define DEBUG(level, x, args...) \ ++ if ( level <= DBG_LEVEL ) printk("%s: " x,__FUNCTION__ ,##args) ++ ++/************************************************************ ++ * AC97 Sequense ++ ************************************************************/ ++typedef struct { ++ u16 val; ++ u8 seq; ++} ac97_seq_t; ++static volatile u32 *ac97_addr = NULL; ++static ac97_seq_t ac97_seq; ++ ++#define AC97_SEQ_READ1 0x01 ++#define AC97_SEQ_READ2 0x02 ++#define AC97_SEQ_READ_DONE 0x03 ++#define AC97_SEQ_WRITE_DONE 0x04 ++ ++/************************************************************ ++ * AC97 IDs ++ ************************************************************/ ++typedef struct { ++ u32 id; ++ char *name; ++ struct ac97_ops *ops; ++ int flags; ++} ac97_ids_t; ++ ++static struct ac97_ops null_ops = { NULL, NULL, NULL }; ++ ++static ac97_ids_t ac97_ids[] = { ++ { 0x574D4C12, "Wolfson WM9711/WM9712", &null_ops }, ++}; ++ ++/************************************************************ ++ * Timer interrupt for AC97 lost interrupt ++ ************************************************************/ ++static unsigned char ac97_timer_on = 0; ++static struct timer_list ac97_timer; ++static void ac97_timer_set(unsigned long); ++static void ac97_timer_clear(void); ++ ++static void ac97_timer_func(unsigned long data) ++{ ++ ac97_timer_on = 0; ++ if ( (ac97_seq.seq == AC97_SEQ_READ_DONE) || ++ (ac97_seq.seq == AC97_SEQ_WRITE_DONE) ) { ++ DEBUG(DBG_L2, "CAR_completion\n"); ++ complete(&CAR_completion); ++ ac97_timer_set(data); ++ } else { ++ printk(KERN_WARNING "AC97: lost interrupt(%08lx)\n", data); ++ ac97_timer_set(data); ++ } ++} ++ ++static void ac97_timer_clear(void) ++{ ++ if ( ac97_timer_on ) ++ del_timer(&ac97_timer); ++ ac97_timer_on = 0; ++} ++ ++static void ac97_timer_set(unsigned long val) ++{ ++ ac97_timer_clear(); ++ init_timer(&ac97_timer); ++ ac97_timer.data = val; ++ ac97_timer.function = ac97_timer_func; ++ ac97_timer.expires = jiffies + HZ; ++ add_timer(&ac97_timer); ++ ac97_timer_on = 1; ++} ++ ++/************************************************************ ++ * AC97 functions ++ ************************************************************/ ++#define AC97_TIMEOUT_VAL 0x10000 ++static u16 pxa_ac97_read(struct ac97_codec *codec, u8 reg) ++{ ++ down(&CAR_mutex); ++ lock_FCS(LOCK_FCS_AC97_SUB, 1); ++ if ( !(CAR & CAR_CAIP) ) { ++ ac97_addr = (volatile u32 *)&PAC_REG_BASE + (reg >> 1); ++#ifdef USE_AC97_INTERRUPT ++ ac97_seq.val = -1; ++ ac97_seq.seq = AC97_SEQ_READ1; ++ ++ init_completion(&CAR_completion); ++ ++ ac97_timer_set(ac97_seq.seq); ++ ++ (void)*ac97_addr; ++ wait_for_completion(&CAR_completion); ++ ++ ac97_timer_clear(); ++#else ++ { ++ u16 data=0; ++ int timeout; ++ // dummy ++ GSR |= GSR_RDCS; ++ GSR |= GSR_SDONE; ++ data = *ac97_addr; ++ timeout = 0; ++ while((GSR & GSR_SDONE)==0 && timeout++=AC97_TIMEOUT_VAL) { ++ GSR |= GSR_RDCS; ++ printk(KERN_CRIT __FUNCTION__": AC97 is busy.\n"); ++ lock_FCS(LOCK_FCS_AC97_SUB, 0); ++ up(&CAR_mutex); ++ return data; ++ } ++ ++ // actual read ++ GSR |= GSR_SDONE; ++ data = *ac97_addr; ++ timeout = 0; ++ while((GSR & GSR_SDONE)==0 && timeout++=AC97_TIMEOUT_VAL) { ++ GSR |= GSR_RDCS; ++ printk(KERN_CRIT __FUNCTION__": AC97 is busy.\n"); ++ } ++ lock_FCS(LOCK_FCS_AC97_SUB, 0); ++ up(&CAR_mutex); ++ return data; ++ } ++#endif // end USE_AC97_INTERRUPT ++ } else { ++ printk(KERN_CRIT __FUNCTION__": CAR_CAIP already set\n"); ++ } ++ lock_FCS(LOCK_FCS_AC97_SUB, 0); ++ up(&CAR_mutex); ++ return ac97_seq.val; ++} ++ ++static void pxa_ac97_write(struct ac97_codec *codec, u8 reg, u16 val) ++{ ++ down(&CAR_mutex); ++ lock_FCS(LOCK_FCS_AC97_SUB, 1); ++ if ( !(CAR & CAR_CAIP) ) { ++ ac97_addr = (volatile u32 *)&PAC_REG_BASE + (reg >> 1); ++#ifdef USE_AC97_INTERRUPT ++ ac97_seq.val = val; ++ ac97_seq.seq = AC97_SEQ_WRITE_DONE; ++ init_completion(&CAR_completion); ++ ++ ac97_timer_set(ac97_seq.seq); ++ ++ *ac97_addr = ac97_seq.val; ++ wait_for_completion(&CAR_completion); ++ ++ ac97_timer_clear(); ++#else ++ { ++ int timeout=0; ++ GSR |= GSR_CDONE; ++ *ac97_addr = val; ++ while((GSR & GSR_CDONE)==0 && timeout++=AC97_TIMEOUT_VAL) { ++ printk(KERN_CRIT __FUNCTION__": AC97 is busy.\n"); ++ } ++ } ++#endif // end USE_AC97_INTERRUPT ++ } else { ++ printk(KERN_CRIT __FUNCTION__": CAR_CAIP already set\n"); ++ } ++ lock_FCS(LOCK_FCS_AC97_SUB, 0); ++ up(&CAR_mutex); ++} ++ ++static void pxa_ac97_bit_clear(struct ac97_codec *codec, u8 reg, u16 val) ++{ ++ unsigned short dat = codec->codec_read(codec, reg); ++ dat &= ~val; ++ codec->codec_write(codec, reg, dat); ++} ++ ++static void pxa_ac97_bit_set(struct ac97_codec *codec, u8 reg, u16 val) ++{ ++ unsigned short dat = codec->codec_read(codec, reg); ++ dat |= val; ++ codec->codec_write(codec, reg, dat); ++} ++ ++static void pxa_ac97_irq(int irq, void *dev_id, struct pt_regs *regs) ++{ ++ if (GSR & (GSR_SDONE|GSR_CDONE)) { ++ GSR = GSR_SDONE|GSR_CDONE; ++ ++ ac97_timer_set(ac97_seq.seq); ++ ++ switch ( ac97_seq.seq ) { ++ case AC97_SEQ_READ1: ++ ac97_seq.seq = AC97_SEQ_READ2; ++ (void)*ac97_addr; ++ break; ++ case AC97_SEQ_READ2: ++ ac97_seq.seq = AC97_SEQ_READ_DONE; ++ if ( GSR & GSR_RDCS ) { ++ GSR |= GSR_RDCS; ++ printk(KERN_CRIT __FUNCTION__": read codec register timeout.\n"); ++ } ++ ac97_seq.val = *ac97_addr; ++ break; ++ case AC97_SEQ_READ_DONE: ++ udelay(20); ++ complete(&CAR_completion); ++ break; ++ case AC97_SEQ_WRITE_DONE: ++ complete(&CAR_completion); ++ break; ++ } ++ } ++} ++ ++static struct ac97_codec pxa_ac97_codec = { ++ codec_read: pxa_ac97_read, ++ codec_write: pxa_ac97_write, ++ codec_bit_clear: pxa_ac97_bit_clear, ++ codec_bit_set: pxa_ac97_bit_set, ++}; ++ ++static DECLARE_MUTEX(pxa_ac97_mutex); ++static int pxa_ac97_refcount = 0; ++ ++static char *codec_id(u16 id1, u16 id2, char *buf) ++{ ++ if(id1&0x8080) { ++ snprintf(buf, CODEC_ID_BUFSZ, "0x%04x:0x%04x", id1, id2); ++ } else { ++ buf[0] = (id1 >> 8); ++ buf[1] = (id1 & 0xFF); ++ buf[2] = (id2 >> 8); ++ snprintf(buf+3, CODEC_ID_BUFSZ - 3, "%d", id2&0xFF); ++ } ++ return buf; ++} ++ ++static int ac97_check_modem(struct ac97_codec *codec) ++{ ++ /* Check for an AC97 1.0 soft modem (ID1) */ ++ if(codec->codec_read(codec, AC97_RESET) & 2) ++ return 1; ++ /* Check for an AC97 2.x soft modem */ ++ codec->codec_write(codec, AC97_EXTENDED_MODEM_ID, 0L); ++ if(codec->codec_read(codec, AC97_EXTENDED_MODEM_ID) & 1) ++ return 1; ++ return 0; ++} ++ ++static int ac97_probe(struct ac97_codec *codec) ++{ ++ u16 id1, id2; ++ u16 audio; ++ int i; ++ char cidbuf[CODEC_ID_BUFSZ]; ++ ++ codec->codec_write(codec, AC97_RESET, 0L); ++ ++ /* also according to spec, we wait for codec-ready state */ ++ if ( codec->codec_wait ) codec->codec_wait(codec); ++ else udelay(10); ++ ++ if ( (audio = codec->codec_read(codec, AC97_RESET)) & 0x8000 ) { ++ printk(KERN_ERR "ac97_codec: %s ac97 codec not present\n", ++ (codec->id & 0x2) ? (codec->id&1 ? "4th" : "Tertiary") ++ : (codec->id&1 ? "Secondary": "Primary")); ++ return 0; ++ } ++ ++ /* probe for Modem Codec */ ++ codec->modem = ac97_check_modem(codec); ++ codec->name = NULL; ++ codec->codec_ops = &null_ops; ++ ++ id1 = codec->codec_read(codec, AC97_VENDOR_ID1); ++ id2 = codec->codec_read(codec, AC97_VENDOR_ID2); ++ for (i = 0; i < ARRAY_SIZE(ac97_ids); i++) { ++ if (ac97_ids[i].id == ((id1 << 16) | id2)) { ++ codec->type = ac97_ids[i].id; ++ codec->name = ac97_ids[i].name; ++ codec->codec_ops = ac97_ids[i].ops; ++ codec->flags = ac97_ids[i].flags; ++ break; ++ } ++ } ++ ++ /* A device which thinks its a modem but isnt */ ++ if ( codec->flags & AC97_DELUDED_MODEM ) ++ codec->modem = 0; ++ ++ if ( codec->name == NULL ) ++ codec->name = "Unknown"; ++ printk(KERN_INFO "ac97_codec: AC97 %s codec, id: %s (%s)\n", ++ codec->modem ? "Modem" : (audio ? "Audio" : ""), ++ codec_id(id1, id2, cidbuf), codec->name); ++ return 1; ++} ++ ++int pxa_ac97_get(struct ac97_codec **codec, unsigned char *ac97_on) ++{ ++ if ( *ac97_on != 0 ) return 0; ++ ++ *codec = NULL; ++ down(&pxa_ac97_mutex); ++ ++ DEBUG(DBG_L1, "count(%d)\n", pxa_ac97_refcount); ++ pxa_ac97_refcount++; ++ up(&pxa_ac97_mutex); ++ *codec = &pxa_ac97_codec; ++ *ac97_on = 1; ++ ++ return 0; ++} ++ ++void pxa_ac97_put(unsigned char *ac97_on) ++{ ++ if ( *ac97_on == 0 ) return; ++ down(&pxa_ac97_mutex); ++ pxa_ac97_refcount--; ++ DEBUG(DBG_L1, "count(%d)\n", pxa_ac97_refcount); ++ up(&pxa_ac97_mutex); ++ *ac97_on = 0; ++} ++ ++unsigned int ac97_set_dac_rate(struct ac97_codec *codec, unsigned int rate) ++{ ++ unsigned int new_rate = rate; ++ u32 dacp; ++ u32 mast_vol, phone_vol, mono_vol, pcm_vol; ++ u32 mute_vol = 0x8000; /* The mute volume? */ ++ ++ if( rate != codec->codec_read(codec, AC97_PCM_FRONT_DAC_RATE) ) { ++ /* Mute several registers */ ++ mast_vol = codec->codec_read(codec, AC97_MASTER_VOL_STEREO); ++ mono_vol = codec->codec_read(codec, AC97_MASTER_VOL_MONO); ++ phone_vol = codec->codec_read(codec, AC97_HEADPHONE_VOL); ++ pcm_vol = codec->codec_read(codec, AC97_PCMOUT_VOL); ++ codec->codec_write(codec, AC97_MASTER_VOL_STEREO, mute_vol); ++ codec->codec_write(codec, AC97_MASTER_VOL_MONO, mute_vol); ++ codec->codec_write(codec, AC97_HEADPHONE_VOL, mute_vol); ++ codec->codec_write(codec, AC97_PCMOUT_VOL, mute_vol); ++ ++ /* Power down the DAC */ ++ dacp=codec->codec_read(codec, AC97_POWER_CONTROL); ++ codec->codec_write(codec, AC97_POWER_CONTROL, dacp|0x0200); ++ /* Load the rate and read the effective rate */ ++ codec->codec_write(codec, AC97_PCM_FRONT_DAC_RATE, rate); ++ new_rate=codec->codec_read(codec, AC97_PCM_FRONT_DAC_RATE); ++ /* Power it back up */ ++ codec->codec_write(codec, AC97_POWER_CONTROL, dacp); ++ ++ /* Restore volumes */ ++ codec->codec_write(codec, AC97_MASTER_VOL_STEREO, mast_vol); ++ codec->codec_write(codec, AC97_MASTER_VOL_MONO, mono_vol); ++ codec->codec_write(codec, AC97_HEADPHONE_VOL, phone_vol); ++ codec->codec_write(codec, AC97_PCMOUT_VOL, pcm_vol); ++ } ++ return new_rate; ++} ++ ++unsigned int ac97_set_adc_rate(struct ac97_codec *codec, unsigned int rate) ++{ ++ unsigned int new_rate = rate; ++ u32 dacp; ++ if( rate != codec->codec_read(codec, AC97_PCM_LR_ADC_RATE) ) { ++ /* Power "Up" the ADC */ ++ dacp=codec->codec_read(codec, AC97_POWER_CONTROL); ++ dacp &= ~(0x1<<8); ++ codec->codec_write(codec, AC97_POWER_CONTROL, dacp); ++ ++ codec->codec_write(codec, AC97_PCM_LR_ADC_RATE, rate); ++ new_rate=codec->codec_read(codec, AC97_PCM_LR_ADC_RATE); ++ ++ /* Power it back up */ ++ codec->codec_write(codec, AC97_POWER_CONTROL, dacp); ++ } ++ return new_rate; ++} ++ ++void wm9712_power_mode(int dev, int mode) ++{ ++ int i; ++ power_mode_t new_power_status; ++ dev %= NUM_OF_WM9712_DEV; ++ mode %= num_of_pwr_values; ++ // printk("wm9712_power_mode(%d,%d)\n",dev,mode); ++ power_mode_status[dev] = pwr_values[mode]; ++ // create new state ++ new_power_status = power_mode_status[0]; ++ for (i=1; i 0; timeo-- ) { ++ if ( GSR & GSR_PCR ) break; ++ //X schedule(); ++ mdelay(5); ++ } ++ if( timeo > 0 ) break; ++ printk(KERN_WARNING "AC97 power on retry!!\n"); ++ } ++ ++#ifdef USE_AC97_INTERRUPT ++ if( (ret = request_irq(IRQ_AC97, pxa_ac97_irq, 0, "AC97", NULL)) ) { ++ lock_FCS(LOCK_FCS_AC97, 0); ++ return ret; ++ } ++ } ++#endif ++ ++ if ( (ret = ac97_probe(&pxa_ac97_codec)) != 1 ) { ++#ifdef USE_AC97_INTERRUPT ++ free_irq(IRQ_AC97, NULL); ++#endif ++ GCR = GCR_ACLINK_OFF; ++ CKEN &= ~CKEN2_AC97; ++ lock_FCS(LOCK_FCS_AC97, 0); ++ return ret; ++ } ++ pxa_ac97_write(&pxa_ac97_codec, AC97_EXTENDED_STATUS, 1); ++ /* ++ * Setting AC97 GPIO ++ * i/o function ++ * GPIO1: input EAR_IN signal ++ * GPIO2: output IRQ signal ++ * GPIO3: output PENDOWN signal ++ * GPIO4: input MASK signal ++ * GPIO5: input DETECT MIC signal ++ */ ++ pxa_ac97_bit_clear(&pxa_ac97_codec, AC97_GPIO_FUNC, ++ ((1<<2)|(1<<3)|(1<<4)|(1<<5))); ++ pxa_ac97_bit_clear(&pxa_ac97_codec, AC97_GPIO_CONFIG,(1<<2)|(1<<3)); ++ pxa_ac97_bit_set(&pxa_ac97_codec, AC97_GPIO_CONFIG, (1<<1)|(1<<4)|(1<<5)); ++#endif ++ codec = &pxa_ac97_codec; ++ lock_FCS(LOCK_FCS_AC97, 0); ++} ++ ++void tosa_ac97_exit(void) ++{ ++#if 1 // move from ac97_put ++ GCR = GCR_ACLINK_OFF; ++ CKEN &= ~CKEN2_AC97; ++#ifdef USE_AC97_INTERRUPT ++ free_irq(IRQ_AC97, NULL); ++#endif ++ pxa_ac97_refcount = 0; ++#endif ++} ++ ++EXPORT_SYMBOL(ac97_set_dac_rate); ++EXPORT_SYMBOL(ac97_set_adc_rate); ++EXPORT_SYMBOL(pxa_ac97_get); ++EXPORT_SYMBOL(pxa_ac97_put); ++EXPORT_SYMBOL(wm9712_power_mode); +diff -Nur linux_c860_org/arch/arm/mach-pxa/tosa_battery.c linux/arch/arm/mach-pxa/tosa_battery.c +--- linux_c860_org/arch/arm/mach-pxa/tosa_battery.c 1970-01-01 09:00:00.000000000 +0900 ++++ linux/arch/arm/mach-pxa/tosa_battery.c 2004-06-10 21:09:10.000000000 +0900 +@@ -0,0 +1,2603 @@ ++/* ++ * linux/arch/arm/mach-pxa/tosa_battery.c ++ * ++ * Based on ++ * linux/arch/arm/mach-sa1100/collie_battery.c ++ * linux/arch/arm/mach-pxa/sharpsl_battery.c ++ * ++ * Battery routines for tosa (SHARP) ++ * ++ * Copyright (C) 2004 SHARP ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * ChangeLog: ++ * ++ */ ++ ++ ++/* this driver support the following functions ++ * - apm_get_power_status ++ * - charge proc ++ */ ++ ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include