From f8a4782d36b59b457c49a86d6630de7a8699e36b Mon Sep 17 00:00:00 2001
From: Koen Kooi <koen@openembedded.org>
Date: Tue, 22 Jul 2008 08:33:45 +0000
Subject: linux omap2 git: update TWL4030 patches for beagle, add mrus clock
 patches

---
 .../linux-omap2-git/beagleboard/TWL4030-01.patch   |  49 +---
 .../linux-omap2-git/beagleboard/TWL4030-02.patch   |  49 +---
 .../linux-omap2-git/beagleboard/TWL4030-03.patch   |  50 +---
 .../linux-omap2-git/beagleboard/TWL4030-04.patch   |  49 +---
 .../linux-omap2-git/beagleboard/TWL4030-05.patch   | 208 ++++++++++-------
 .../linux-omap2-git/beagleboard/TWL4030-06.patch   |  83 ++-----
 .../linux-omap2-git/beagleboard/TWL4030-07.patch   |  62 +----
 .../linux-omap2-git/beagleboard/TWL4030-08.patch   | 231 +++++++++---------
 .../linux-omap2-git/beagleboard/TWL4030-09.patch   | 258 ++++++++++++---------
 .../linux-omap2-git/beagleboard/mru-clocks1.diff   |  25 ++
 .../linux-omap2-git/beagleboard/mru-clocks2.diff   |  62 +++++
 packages/linux/linux-omap2_git.bb                  |   4 +-
 12 files changed, 517 insertions(+), 613 deletions(-)
 create mode 100644 packages/linux/linux-omap2-git/beagleboard/mru-clocks1.diff
 create mode 100644 packages/linux/linux-omap2-git/beagleboard/mru-clocks2.diff

diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-01.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-01.patch
index b6142ea1f5..c361c33d61 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-01.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-01.patch
@@ -1,42 +1,6 @@
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-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 1/9] TWL4030: remove superfluous PWR interrupt status clear
-	before masking
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:49 -0600
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+TWL4030: remove superfluous PWR interrupt status clear before masking
+
+From: Paul Walmsley <paul@pwsan.com>
 
 twl_irq_init() clears PWR interrupt status bits, then masks the interrupts
 off, then clears the PWR interrupt status bits again.  The first clear
@@ -77,10 +41,3 @@ index adc45d4..ff662bc 100644
  	/* PWR_IMR1 */
  	res = twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x1);
  	if (res < 0) {
-
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diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-02.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-02.patch
index 18b2f589c1..48a59b945b 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-02.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-02.patch
@@ -1,42 +1,6 @@
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-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 2/9] TWL4030: clear TWL GPIO interrupt status registers
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:50 -0600
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+TWL4030: clear TWL GPIO interrupt status registers
+
+From: Paul Walmsley <paul@pwsan.com>
 
 twl_init_irq() does not clear the TWL GPIO ISR registers, but the PIH
 ISR thinks that it has.  This causes any previously-latched GPIO interrupts
@@ -105,10 +69,3 @@ index ff662bc..dfc3805 100644
  	/* install an irq handler for each of the PIH modules */
  	for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) {
  		set_irq_chip(i, &twl4030_irq_chip);
-
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diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch
index 062d99fe5a..fe1bea5398 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch
@@ -1,43 +1,6 @@
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-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 3/9] TWL4030: use correct register addresses for BCI IMR
-	registers
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:50 -0600
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+TWL4030: use correct register addresses for BCI IMR registers
+
+From: Paul Walmsley <paul@pwsan.com>
 
 The existing code to mask and clear BCI interrupts in twl_init_irq() is
 wrong.  It uses the wrong register offsets, it does not mask all of the
@@ -117,10 +80,3 @@ index dfc3805..bb0732c 100644
  	if (res < 0) {
  		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
  		return;
-
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diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-04.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-04.patch
index 12d76bfb23..fb65ac98bb 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-04.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-04.patch
@@ -1,42 +1,6 @@
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-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 4/9] TWL4030: clear MADC interrupt status registers upon init
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:51 -0600
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+TWL4030: clear MADC interrupt status registers upon init
+
+From: Paul Walmsley <paul@pwsan.com>
 
 twl_init_irq() does not clear MADC interrupt status registers upon init -
 fix.
@@ -72,10 +36,3 @@ index bb0732c..9d93524 100644
  	/* key Pad */
  	/* KEYPAD - IMR1 */
  	res = twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xFF, (0x12));
-
-
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diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-05.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-05.patch
index b41c836711..02a72ed9df 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-05.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-05.patch
@@ -1,68 +1,54 @@
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-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 5/9] TWL4030: read and write module ISRs to clear them at init
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:52 -0600
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+TWL4030: use *_SIH_CTRL.COR bit to determine whether to read or write ISR to clear
+
+From: Paul Walmsley <paul@pwsan.com>
 
 TWL4030 interrupt status register bits can be cleared in one of two ways:
 either by reading from the register, or by writing a 1 to the
 appropriate bit(s) in the register.  This behavior can be altered at any
 time by the <twlmodule>_SIH_CTRL.COR register bit ("clear-on-read").
 
-twl4030-core.c does not touch these *_SIH_CTRL registers during boot,
-and the TWL4030 TRM is deeply confused as to whether COR=1 means that
-the registers are cleared on reads, or cleared on writes.
+The TWL4030 TRM is deeply confused as to whether COR=1 means that the
+registers are cleared on reads, or cleared on writes.  Peter De
+Schrijver <peter.de-schrijver> confirms that COR=1 means that the registers
+are cleared on read.
+
+So, for each TWL4030 SIH, check the value of the *_SIH_CTRL.COR bit, and if
+it is 1, use reads to clear the ISRs; if it is 0, use writes.
+
+Also, use WARN_ON() to warn if the read/write failed, and don't skip
+the rest of the initialization on failure either.
+
+Thanks to Peter for his help with this patch.
 
-So, take the cautious way out and both read from and write to the TWL4030
-module ISRs to clear them at startup.  Also, use WARN_ON() to warn if the
-read/write failed, and don't skip the rest of the initialization on failure
-either.
 
 Signed-off-by: Paul Walmsley <paul@pwsan.com>
 ---
 
- drivers/i2c/chips/twl4030-core.c |  128 +++++++++++++++-----------------------
- 1 files changed, 51 insertions(+), 77 deletions(-)
+ drivers/i2c/chips/twl4030-core.c |  183 ++++++++++++++++++++++----------------
+ 1 files changed, 106 insertions(+), 77 deletions(-)
 
 diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
-index 9d93524..615fb84 100644
+index 9d93524..eae0634 100644
 --- a/drivers/i2c/chips/twl4030-core.c
 +++ b/drivers/i2c/chips/twl4030-core.c
-@@ -712,6 +712,28 @@ static int power_companion_init(void)
+@@ -133,6 +133,16 @@
+ /* on I2C-1 for 2430SDP */
+ #define CONFIG_I2C_TWL4030_ID		1
+ 
++/* SIH_CTRL registers */
++#define TWL4030_INT_PWR_SIH_CTRL	0x07
++#define TWL4030_INTERRUPTS_BCISIHCTRL	0x0d
++#define TWL4030_MADC_MADC_SIH_CTRL	0x67
++#define TWL4030_KEYPAD_KEYP_SIH_CTRL	0x17
++#define TWL4030_GPIO_GPIO_SIH_CTRL	0x2d
++
++#define TWL4030_SIH_CTRL_COR_MASK	(1 << 2)
++
++
+ /* Helper functions */
+ static int
+ twl4030_detect_client(struct i2c_adapter *adapter, unsigned char sid);
+@@ -712,13 +722,61 @@ static int power_companion_init(void)
  	return e;
  }
  
@@ -70,28 +56,46 @@ index 9d93524..615fb84 100644
 + * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write
 + * @mod_no: TWL4030 module number
 + * @reg: register index to clear
++ * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0)
 + *
-+ * Reads, then writes 0xff to a TWL4030 interrupt status register to ensure
-+ * that interrupts are cleared.  The read + write is necessary since we
-+ * don't know whether the COR bit is set in <module>_SIH_CTRL.  Returns
-+ * the status from the I2C read operation.
++ * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt
++ * status register to ensure that any prior interrupts are cleared.
++ * Returns the status from the I2C read operation.
 + */
-+static int twl4030_i2c_clear_isr(u8 mod_no, u8 reg)
++static int twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor)
 +{
-+	int res;
 +	u8 tmp;
 +
-+	res = twl4030_i2c_read_u8(mod_no, &tmp, reg);
-+	if (res < 0)
-+		return res;
++	return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) :
++		twl4030_i2c_write_u8(mod_no, 0xff, reg);
++}
++
++/**
++ * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes?
++ * @mod_no: TWL4030 module number
++ * @reg: register index to clear
++ *
++ * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for
++ * the specified TWL module are cleared by reads, or 0 if cleared by
++ * writes.
++ */
++static int twl4030_read_cor_bit(u8 mod_no, u8 reg)
++{
++	u8 tmp = 0;
++
++	WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0);
++
++	tmp &= TWL4030_SIH_CTRL_COR_MASK;
++	tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK);
 +
-+	return twl4030_i2c_write_u8(mod_no, 0xff, reg);
++	return tmp;
 +}
 +
  static void twl_init_irq(void)
  {
  	int	i = 0;
-@@ -719,6 +741,13 @@ static void twl_init_irq(void)
+ 	int	res = 0;
++	int cor;
  	char	*msg = "Unable to register interrupt subsystem";
  	unsigned int irq_num;
  
@@ -101,20 +105,28 @@ index 9d93524..615fb84 100644
 +	 * since we initially do not have any TWL4030 module interrupt
 +	 * handlers present.
 +	 */
++
 +
  	/* PWR_IMR1 */
  	res = twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x1);
  	if (res < 0) {
-@@ -735,19 +764,11 @@ static void twl_init_irq(void)
+@@ -734,20 +792,18 @@ static void twl_init_irq(void)
+ 	}
  
  	/* Clear off any other pending interrupts on power */
++
++	/* Are PWR interrupt status bits cleared by reads or writes? */
++	cor = twl4030_read_cor_bit(TWL4030_MODULE_INT,
++				   TWL4030_INT_PWR_SIH_CTRL);
++	WARN_ON(cor < 0);
++
  	/* PWR_ISR1 */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x00);
 -	if (res < 0) {
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x00) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x00, cor) < 0);
  
  	/* PWR_ISR2 */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x02);
@@ -123,21 +135,27 @@ index 9d93524..615fb84 100644
 -		return;
 -	}
 -	/* POWER HACK (END) */
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x02) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x02, cor) < 0);
 +
  	/* Slave address 0x4A */
  
  	/* BCIIMR1A */
-@@ -779,32 +800,16 @@ static void twl_init_irq(void)
+@@ -778,33 +834,22 @@ static void twl_init_irq(void)
+ 		return;
  	}
  
++	/* Are BCI interrupt status bits cleared by reads or writes? */
++	cor = twl4030_read_cor_bit(TWL4030_MODULE_INTERRUPTS,
++				   TWL4030_INTERRUPTS_BCISIHCTRL);
++	WARN_ON(cor < 0);
++
  	/* BCIISR1A */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x0);
 -	if (res < 0) {
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x0) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x0, cor) < 0);
  
  	/* BCIISR2A */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x1);
@@ -145,7 +163,7 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x1) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x1, cor) < 0);
  
  	/* BCIISR1B */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x4);
@@ -153,7 +171,7 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x4) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x4, cor) < 0);
  
  	/* BCIISR2B */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x5);
@@ -161,20 +179,26 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x5) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x5, cor) < 0);
  
  	/* MAD C */
  	/* MADC_IMR1 */
-@@ -822,18 +827,10 @@ static void twl_init_irq(void)
+@@ -821,19 +866,16 @@ static void twl_init_irq(void)
+ 		return;
  	}
  
++	/* Are MADC interrupt status bits cleared by reads or writes? */
++	cor = twl4030_read_cor_bit(TWL4030_MODULE_MADC,
++				   TWL4030_MADC_MADC_SIH_CTRL);
++	WARN_ON(cor < 0);
++
  	/* MADC_ISR1 */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xFF, 0x61);
 -	if (res < 0) {
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x61) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x61, cor) < 0);
  
  	/* MADC_ISR2 */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xFF, 0x63);
@@ -182,11 +206,11 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x63) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x63, cor) < 0);
  
  	/* key Pad */
  	/* KEYPAD - IMR1 */
-@@ -842,12 +839,10 @@ static void twl_init_irq(void)
+@@ -842,12 +884,15 @@ static void twl_init_irq(void)
  		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
  		return;
  	}
@@ -197,32 +221,43 @@ index 9d93524..615fb84 100644
 -		twl4030_i2c_read_u8(TWL4030_MODULE_KEYPAD, &clear, 0x11);
 -	}
 +
++	/* Are keypad interrupt status bits cleared by reads or writes? */
++	cor = twl4030_read_cor_bit(TWL4030_MODULE_KEYPAD,
++				   TWL4030_KEYPAD_KEYP_SIH_CTRL);
++	WARN_ON(cor < 0);
++
 +	/* KEYPAD - ISR1 */
 +	/* XXX does this still need to be done twice for some reason? */
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11, cor) < 0);
  
  	/* KEYPAD - IMR2 */
  	res = twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xFF, (0x14));
-@@ -856,6 +851,9 @@ static void twl_init_irq(void)
+@@ -856,6 +901,9 @@ static void twl_init_irq(void)
  		return;
  	}
  
 +	/* KEYPAD - ISR2 */
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13, cor) < 0);
 +
  	/* Slave address 0x49 */
  	/* GPIO_IMR1A */
  	res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, (0x1C));
-@@ -900,46 +898,22 @@ static void twl_init_irq(void)
+@@ -899,47 +947,28 @@ static void twl_init_irq(void)
+ 		return;
  	}
  
++	/* Are GPIO interrupt status bits cleared by reads or writes? */
++	cor = twl4030_read_cor_bit(TWL4030_MODULE_GPIO,
++				   TWL4030_GPIO_GPIO_SIH_CTRL);
++	WARN_ON(cor < 0);
++
  	/* GPIO_ISR1A */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x19);
 -	if (res < 0) {
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x19) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x19, cor) < 0);
  
  	/* GPIO_ISR2A */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1a);
@@ -230,7 +265,7 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1a) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1a, cor) < 0);
  
  	/* GPIO_ISR3A */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1b);
@@ -238,7 +273,7 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1b) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1b, cor) < 0);
  
  	/* GPIO_ISR1B */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1f);
@@ -246,7 +281,7 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1f) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1f, cor) < 0);
  
  	/* GPIO_ISR2B */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x20);
@@ -254,7 +289,7 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x20) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x20, cor) < 0);
  
  	/* GPIO_ISR3B */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x21);
@@ -262,14 +297,7 @@ index 9d93524..615fb84 100644
 -		pr_err("%s[%d][%d]\n", msg, res, __LINE__);
 -		return;
 -	}
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x21) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x21, cor) < 0);
  
  	/* install an irq handler for each of the PIH modules */
  	for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) {
-
-
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diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-06.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-06.patch
index 501437a365..67b837c454 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-06.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-06.patch
@@ -1,41 +1,6 @@
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-MBOX-Line: From nobody Thu Jul 17 19:34:53 2008
-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 6/9] TWL4030: change init-time IMR mask code to WARN if error
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:53 -0600
-Message-ID: <20080718013452.18943.96350.stgit@localhost.localdomain>
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+TWL4030: change init-time IMR mask code to WARN if error
+
+From: Paul Walmsley <paul@pwsan.com>
 
 twl_init_irq() prints error messages and returns if any interrupt mask
 register writes fail.  Change this to generate a warning traceback and
@@ -50,11 +15,11 @@ Signed-off-by: Paul Walmsley <paul@pwsan.com>
  1 files changed, 18 insertions(+), 82 deletions(-)
 
 diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
-index 615fb84..1906635 100644
+index eae0634..99cc143 100644
 --- a/drivers/i2c/chips/twl4030-core.c
 +++ b/drivers/i2c/chips/twl4030-core.c
-@@ -749,18 +749,10 @@ static void twl_init_irq(void)
- 	 */
+@@ -778,18 +778,10 @@ static void twl_init_irq(void)
+ 
  
  	/* PWR_IMR1 */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x1);
@@ -73,8 +38,8 @@ index 615fb84..1906635 100644
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, 0x3) < 0);
  
  	/* Clear off any other pending interrupts on power */
- 	/* PWR_ISR1 */
-@@ -772,32 +764,16 @@ static void twl_init_irq(void)
+ 
+@@ -807,32 +799,16 @@ static void twl_init_irq(void)
  	/* Slave address 0x4A */
  
  	/* BCIIMR1A */
@@ -111,9 +76,9 @@ index 615fb84..1906635 100644
 -	}
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, 0x7) < 0);
  
- 	/* BCIISR1A */
- 	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x0) < 0);
-@@ -813,18 +789,10 @@ static void twl_init_irq(void)
+ 	/* Are BCI interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_INTERRUPTS,
+@@ -853,18 +829,10 @@ static void twl_init_irq(void)
  
  	/* MAD C */
  	/* MADC_IMR1 */
@@ -132,9 +97,9 @@ index 615fb84..1906635 100644
 -	}
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff, 0x64) < 0);
  
- 	/* MADC_ISR1 */
- 	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x61) < 0);
-@@ -834,68 +802,36 @@ static void twl_init_irq(void)
+ 	/* Are MADC interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_MADC,
+@@ -879,11 +847,7 @@ static void twl_init_irq(void)
  
  	/* key Pad */
  	/* KEYPAD - IMR1 */
@@ -145,9 +110,10 @@ index 615fb84..1906635 100644
 -	}
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x12) < 0);
  
- 	/* KEYPAD - ISR1 */
- 	/* XXX does this still need to be done twice for some reason? */
- 	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11) < 0);
+ 	/* Are keypad interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_KEYPAD,
+@@ -895,57 +859,29 @@ static void twl_init_irq(void)
+ 	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11, cor) < 0);
  
  	/* KEYPAD - IMR2 */
 -	res = twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xFF, (0x14));
@@ -158,7 +124,7 @@ index 615fb84..1906635 100644
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x14) < 0);
  
  	/* KEYPAD - ISR2 */
- 	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13) < 0);
+ 	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13, cor) < 0);
  
  	/* Slave address 0x49 */
  	/* GPIO_IMR1A */
@@ -209,12 +175,5 @@ index 615fb84..1906635 100644
 -	}
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x24) < 0);
  
- 	/* GPIO_ISR1A */
- 	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x19) < 0);
-
-
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-
+ 	/* Are GPIO interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_GPIO,
diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-07.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-07.patch
index 2847e84f62..8e4c4d6be4 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-07.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-07.patch
@@ -1,50 +1,13 @@
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+TWL4030: move TWL module register defs into separate include files
 
-twl_init_irq() accesses TWL module IMR and ISR registers.  Currently, it
-uses "magic numbers" for these register indices, but symbolic constants
-are definitely preferred.  Rather than duplicating already existing
-symbolic constants in twl4030-gpio.c and twl4030-pwrirq.c, move the
-existing constants out into include files.  This patch should not change
-kernel behavior.
+From: Paul Walmsley <paul@pwsan.com>
+
+twl_init_irq() uses "magic numbers" to access TWL module IMR and ISR
+registers.  Symbolic constants are definitely preferred.
+
+Rather than duplicating already existing symbolic constants in
+twl4030-gpio.c and twl4030-pwrirq.c, move the existing constants out
+into include files.  This patch should not change kernel behavior.
 
 Signed-off-by: Paul Walmsley <paul@pwsan.com>
 ---
@@ -309,10 +272,3 @@ index 0000000..7a13368
 +#define TWL4030_INT_PWR_SIH_CTRL	0x7
 +
 +#endif /* End of __TWL4030_PWRIRQ_H */
-
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html
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diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch
index 713eebffd6..9af25a762d 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch
@@ -1,43 +1,6 @@
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-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 8/9] TWL4030: use symbolic ISR/IMR register names during
-	twl_init_irq()
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:55 -0600
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+TWL4030: use symbolic ISR/IMR register names during twl_init_irq()
+
+From: Paul Walmsley <paul@pwsan.com>
 
 twl_init_irq() uses a bunch of magic numbers as register indices; this
 has already led to several errors, fixed earlier in this patch series.
@@ -47,11 +10,11 @@ not change kernel behavior.
 Signed-off-by: Paul Walmsley <paul@pwsan.com>
 ---
 
- drivers/i2c/chips/twl4030-core.c |  181 +++++++++++++++++++-------------------
- 1 files changed, 89 insertions(+), 92 deletions(-)
+ drivers/i2c/chips/twl4030-core.c |  188 +++++++++++++++++++-------------------
+ 1 files changed, 96 insertions(+), 92 deletions(-)
 
 diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
-index 1906635..5855f5f 100644
+index 99cc143..38c227a 100644
 --- a/drivers/i2c/chips/twl4030-core.c
 +++ b/drivers/i2c/chips/twl4030-core.c
 @@ -40,6 +40,9 @@
@@ -88,10 +51,25 @@ index 1906635..5855f5f 100644
  /* Triton Core internal information (END) */
  
  /* Few power values */
-@@ -748,108 +768,85 @@ static void twl_init_irq(void)
+@@ -133,12 +153,10 @@
+ /* on I2C-1 for 2430SDP */
+ #define CONFIG_I2C_TWL4030_ID		1
+ 
+-/* SIH_CTRL registers */
+-#define TWL4030_INT_PWR_SIH_CTRL	0x07
++/* SIH_CTRL registers that aren't defined elsewhere */
+ #define TWL4030_INTERRUPTS_BCISIHCTRL	0x0d
+ #define TWL4030_MADC_MADC_SIH_CTRL	0x67
+ #define TWL4030_KEYPAD_KEYP_SIH_CTRL	0x17
+-#define TWL4030_GPIO_GPIO_SIH_CTRL	0x2d
+ 
+ #define TWL4030_SIH_CTRL_COR_MASK	(1 << 2)
+ 
+@@ -776,135 +794,121 @@ static void twl_init_irq(void)
  	 * handlers present.
  	 */
  
+-
 -	/* PWR_IMR1 */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, 0x1) < 0);
 -
@@ -99,21 +77,27 @@ index 1906635..5855f5f 100644
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, 0x3) < 0);
 -
 -	/* Clear off any other pending interrupts on power */
--	/* PWR_ISR1 */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x00) < 0);
--
--	/* PWR_ISR2 */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x02) < 0);
 +	/* Mask INT (PWR) interrupts at TWL4030 */
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff,
 +				     TWL4030_INT_PWR_IMR1) < 0);
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff,
 +				     TWL4030_INT_PWR_IMR2) < 0);
+ 
+ 	/* Are PWR interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_INT,
+ 				   TWL4030_INT_PWR_SIH_CTRL);
+ 	WARN_ON(cor < 0);
+ 
+-	/* PWR_ISR1 */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x00, cor) < 0);
+-
+-	/* PWR_ISR2 */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x02, cor) < 0);
 +	/* Clear TWL4030 INT (PWR) ISRs */
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT,
-+				      TWL4030_INT_PWR_ISR1) < 0);
++				      TWL4030_INT_PWR_ISR1, cor) < 0);
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT,
-+				      TWL4030_INT_PWR_ISR2) < 0);
++				      TWL4030_INT_PWR_ISR2, cor) < 0);
  
  	/* Slave address 0x4A */
  
@@ -128,18 +112,6 @@ index 1906635..5855f5f 100644
 -
 -	/* BCIIMR2B */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, 0x7) < 0);
--
--	/* BCIISR1A */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x0) < 0);
--
--	/* BCIISR2A */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x1) < 0);
--
--	/* BCIISR1B */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x4) < 0);
--
--	/* BCIISR2B */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x5) < 0);
 +	/* Mask BCI interrupts at TWL4030 */
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff,
 +				     TWL4030_INTERRUPTS_BCIIMR1A) < 0);
@@ -149,15 +121,32 @@ index 1906635..5855f5f 100644
 +				     TWL4030_INTERRUPTS_BCIIMR1B) < 0);
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff,
 +				     TWL4030_INTERRUPTS_BCIIMR2B) < 0);
+ 
+ 	/* Are BCI interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_INTERRUPTS,
+ 				   TWL4030_INTERRUPTS_BCISIHCTRL);
+ 	WARN_ON(cor < 0);
+ 
+-	/* BCIISR1A */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x0, cor) < 0);
+-
+-	/* BCIISR2A */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x1, cor) < 0);
+-
+-	/* BCIISR1B */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x4, cor) < 0);
+-
+-	/* BCIISR2B */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x5, cor) < 0);
 +	/* Clear TWL4030 BCI ISRs */
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
-+				      TWL4030_INTERRUPTS_BCIISR1A) < 0);
++				      TWL4030_INTERRUPTS_BCIISR1A, cor) < 0);
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
-+				      TWL4030_INTERRUPTS_BCIISR2A) < 0);
++				      TWL4030_INTERRUPTS_BCIISR2A, cor) < 0);
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
-+				      TWL4030_INTERRUPTS_BCIISR1B) < 0);
++				      TWL4030_INTERRUPTS_BCIISR1B, cor) < 0);
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
-+				      TWL4030_INTERRUPTS_BCIISR2B) < 0);
++				      TWL4030_INTERRUPTS_BCIISR2B, cor) < 0);
  
  	/* MAD C */
 -	/* MADC_IMR1 */
@@ -165,46 +154,56 @@ index 1906635..5855f5f 100644
 -
 -	/* MADC_IMR2 */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff, 0x64) < 0);
--
--	/* MADC_ISR1 */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x61) < 0);
--
--	/* MADC_ISR2 */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x63) < 0);
 +	/* Mask MADC interrupts at TWL4030 */
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff,
 +				     TWL4030_MADC_IMR1) < 0);
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff,
 +				     TWL4030_MADC_IMR2) < 0);
+ 
+ 	/* Are MADC interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_MADC,
+ 				   TWL4030_MADC_MADC_SIH_CTRL);
+ 	WARN_ON(cor < 0);
+ 
+-	/* MADC_ISR1 */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x61, cor) < 0);
+-
+-	/* MADC_ISR2 */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x63, cor) < 0);
 +	/* Clear TWL4030 MADC ISRs */
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC,
-+				      TWL4030_MADC_ISR1) < 0);
++				      TWL4030_MADC_ISR1, cor) < 0);
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC,
-+				      TWL4030_MADC_ISR2) < 0);
++				      TWL4030_MADC_ISR2, cor) < 0);
  
  	/* key Pad */
 -	/* KEYPAD - IMR1 */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x12) < 0);
--
--	/* KEYPAD - ISR1 */
 +	/* Mask keypad interrupts at TWL4030 */
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff,
 +				     TWL4030_KEYPAD_KEYP_IMR1) < 0);
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff,
 +				     TWL4030_KEYPAD_KEYP_IMR2) < 0);
+ 
+ 	/* Are keypad interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_KEYPAD,
+ 				   TWL4030_KEYPAD_KEYP_SIH_CTRL);
+ 	WARN_ON(cor < 0);
+ 
+-	/* KEYPAD - ISR1 */
 +	/* Clear TWL4030 keypad ISRs */
  	/* XXX does this still need to be done twice for some reason? */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11) < 0);
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11, cor) < 0);
 -
 -	/* KEYPAD - IMR2 */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x14) < 0);
 -
 -	/* KEYPAD - ISR2 */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13) < 0);
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13, cor) < 0);
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD,
-+				      TWL4030_KEYPAD_KEYP_ISR1) < 0);
++				      TWL4030_KEYPAD_KEYP_ISR1, cor) < 0);
 +	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD,
-+				      TWL4030_KEYPAD_KEYP_ISR2) < 0);
++				      TWL4030_KEYPAD_KEYP_ISR2, cor) < 0);
  
  	/* Slave address 0x49 */
 -	/* GPIO_IMR1A */
@@ -218,30 +217,12 @@ index 1906635..5855f5f 100644
 -
 -	/* GPIO_IMR1B */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x22) < 0);
--
+ 
 -	/* GPIO_IMR2B */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x23) < 0);
 -
 -	/* GPIO_IMR3B */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x24) < 0);
--
--	/* GPIO_ISR1A */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x19) < 0);
--
--	/* GPIO_ISR2A */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1a) < 0);
--
--	/* GPIO_ISR3A */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1b) < 0);
--
--	/* GPIO_ISR1B */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1f) < 0);
--
--	/* GPIO_ISR2B */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x20) < 0);
--
--	/* GPIO_ISR3B */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x21) < 0);
 +	/* Mask GPIO interrupts at TWL4030 */
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
 +				     REG_GPIO_IMR1A) < 0);
@@ -255,21 +236,43 @@ index 1906635..5855f5f 100644
 +				     REG_GPIO_IMR2B) < 0);
 +	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
 +				     REG_GPIO_IMR3B) < 0);
-+
+ 
+ 	/* Are GPIO interrupt status bits cleared by reads or writes? */
+ 	cor = twl4030_read_cor_bit(TWL4030_MODULE_GPIO,
+-				   TWL4030_GPIO_GPIO_SIH_CTRL);
++				   REG_GPIO_SIH_CTRL);
+ 	WARN_ON(cor < 0);
+ 
+-	/* GPIO_ISR1A */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x19, cor) < 0);
+-
+-	/* GPIO_ISR2A */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1a, cor) < 0);
+-
+-	/* GPIO_ISR3A */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1b, cor) < 0);
+-
+-	/* GPIO_ISR1B */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1f, cor) < 0);
+-
+-	/* GPIO_ISR2B */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x20, cor) < 0);
+-
+-	/* GPIO_ISR3B */
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x21, cor) < 0);
 +	/* Clear TWL4030 GPIO ISRs */
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1A) < 0);
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2A) < 0);
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3A) < 0);
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1B) < 0);
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2B) < 0);
-+	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3B) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1A,
++				      cor) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2A,
++				      cor) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3A,
++				      cor) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1B,
++				      cor) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2B,
++				      cor) < 0);
++	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3B,
++				      cor) < 0);
  
  	/* install an irq handler for each of the PIH modules */
  	for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) {
-
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html
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diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-09.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-09.patch
index 3a2eb05fd8..ab6cc6d87b 100644
--- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-09.patch
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-09.patch
@@ -1,63 +1,28 @@
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-	<rfc822;linux-omap@vger.kernel.org>); Thu, 17 Jul 2008 21:35:25 -0400
-Received: (qmail 13900 invoked by uid 526); 18 Jul 2008 01:35:24 -0000
-MBOX-Line: From nobody Thu Jul 17 19:34:56 2008
-From:	Paul Walmsley <paul@pwsan.com>
-Subject: [PATCH 9/9] TWL4030: convert early interrupt mask/clear funcs to use
-	array
-To:	linux-omap@vger.kernel.org
-Date:	Thu, 17 Jul 2008 19:34:56 -0600
-Message-ID: <20080718013455.18943.62389.stgit@localhost.localdomain>
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+TWL4030: convert early interrupt mask/clear funcs to use array
+
+From: Paul Walmsley <paul@pwsan.com>
 
 Mask/clear TWL module IMRs/ISRs by iterating through arrays rather than
-using a block of cut-and-pasted commands.  Removes 632 bytes of bloat.
+using a block of cut-and-pasted commands.  Removes 1056 bytes of bloat.
 
 Signed-off-by: Paul Walmsley <paul@pwsan.com>
 ---
 
- drivers/i2c/chips/twl4030-core.c |  218 ++++++++++++++++++++++++--------------
- 1 files changed, 137 insertions(+), 81 deletions(-)
+ drivers/i2c/chips/twl4030-core.c |  302 +++++++++++++++++++++++---------------
+ 1 files changed, 180 insertions(+), 122 deletions(-)
 
 diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
-index 5855f5f..47d547d 100644
+index 38c227a..776b1dd 100644
 --- a/drivers/i2c/chips/twl4030-core.c
 +++ b/drivers/i2c/chips/twl4030-core.c
-@@ -153,6 +153,130 @@
- /* on I2C-1 for 2430SDP */
- #define CONFIG_I2C_TWL4030_ID		1
+@@ -160,6 +160,136 @@
+ 
+ #define TWL4030_SIH_CTRL_COR_MASK	(1 << 2)
  
 +/**
 + * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init
 + * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO)
++ * @sih_ctrl: address of module SIH_CTRL register
 + * @reg_cnt: number of IMR/ISR regs
 + * @imrs: pointer to array of TWL module interrupt mask register indices
 + * @isrs: pointer to array of TWL module interrupt status register indices
@@ -67,6 +32,7 @@ index 5855f5f..47d547d 100644
 + */
 +struct twl4030_mod_iregs {
 +	const u8 mod_no;
++	const u8 sih_ctrl;
 +	const u8 reg_cnt;
 +	const u8 *imrs;
 +	const u8 *isrs;
@@ -147,53 +113,110 @@ index 5855f5f..47d547d 100644
 +/* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */
 +static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = {
 +	{
-+		.mod_no = TWL4030_MODULE_INT,
-+		.reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs),
-+		.imrs = twl4030_int_imr_regs,
-+		.isrs = twl4030_int_isr_regs,
++		.mod_no	  = TWL4030_MODULE_INT,
++		.sih_ctrl = TWL4030_INT_PWR_SIH_CTRL,
++		.reg_cnt  = ARRAY_SIZE(twl4030_int_imr_regs),
++		.imrs	  = twl4030_int_imr_regs,
++		.isrs	  = twl4030_int_isr_regs,
 +	},
 +	{
-+		.mod_no = TWL4030_MODULE_INTERRUPTS,
-+		.reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs),
-+		.imrs = twl4030_interrupts_imr_regs,
-+		.isrs = twl4030_interrupts_isr_regs,
++		.mod_no	  = TWL4030_MODULE_INTERRUPTS,
++		.sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL,
++		.reg_cnt  = ARRAY_SIZE(twl4030_interrupts_imr_regs),
++		.imrs	  = twl4030_interrupts_imr_regs,
++		.isrs	  = twl4030_interrupts_isr_regs,
 +	},
 +	{
-+		.mod_no = TWL4030_MODULE_MADC,
-+		.reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs),
-+		.imrs = twl4030_madc_imr_regs,
-+		.isrs = twl4030_madc_isr_regs,
++		.mod_no	  = TWL4030_MODULE_MADC,
++		.sih_ctrl = TWL4030_MADC_MADC_SIH_CTRL,
++		.reg_cnt  = ARRAY_SIZE(twl4030_madc_imr_regs),
++		.imrs	  = twl4030_madc_imr_regs,
++		.isrs	  = twl4030_madc_isr_regs,
 +	},
 +	{
-+		.mod_no = TWL4030_MODULE_KEYPAD,
-+		.reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs),
-+		.imrs = twl4030_keypad_imr_regs,
-+		.isrs = twl4030_keypad_isr_regs,
++		.mod_no	  = TWL4030_MODULE_KEYPAD,
++		.sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL,
++		.reg_cnt  = ARRAY_SIZE(twl4030_keypad_imr_regs),
++		.imrs	  = twl4030_keypad_imr_regs,
++		.isrs	  = twl4030_keypad_isr_regs,
 +	},
 +	{
-+		.mod_no = TWL4030_MODULE_GPIO,
-+		.reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs),
-+		.imrs = twl4030_gpio_imr_regs,
-+		.isrs = twl4030_gpio_isr_regs,
++		.mod_no	  = TWL4030_MODULE_GPIO,
++		.sih_ctrl = REG_GPIO_SIH_CTRL,
++		.reg_cnt  = ARRAY_SIZE(twl4030_gpio_imr_regs),
++		.imrs	  = twl4030_gpio_imr_regs,
++		.isrs	  = twl4030_gpio_isr_regs,
 +	},
 +};
 +
-+
+ 
  /* Helper functions */
  static int
- twl4030_detect_client(struct i2c_adapter *adapter, unsigned char sid);
-@@ -756,7 +880,7 @@ static int twl4030_i2c_clear_isr(u8 mod_no, u8 reg)
+@@ -779,136 +909,64 @@ static int twl4030_read_cor_bit(u8 mod_no, u8 reg)
+ 	return tmp;
+ }
  
++/**
++ * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts
++ * @t: pointer to twl4030_mod_iregs array
++ * @t_sz: ARRAY_SIZE(t) (starting at 1)
++ *
++ * Mask all TWL4030 interrupt mask registers (IMRs) and clear all
++ * interrupt status registers (ISRs).  No return value, but will WARN if
++ * any I2C operations fail.
++ */
++static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t,
++					    const u8 t_sz)
++{
++	int i, j;
++
++	/*
++	 * N.B. - further efficiency is possible here.  Eight I2C
++	 * operations on BCI and GPIO modules are avoidable if I2C
++	 * burst read/write transactions were implemented.  Would
++	 * probably save about 1ms of boot time and a small amount of
++	 * power.
++	 */
++	for (i = 0; i < t_sz; i++) {
++		const struct twl4030_mod_iregs tmr = t[i];
++
++		for (j = 0; j < tmr.reg_cnt; j++) {
++			int cor;
++
++			/* Mask interrupts at the TWL4030 */
++			WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
++						     tmr.imrs[j]) < 0);
++
++			/* Are ISRs cleared by reads or writes? */
++			cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl);
++			WARN_ON(cor < 0);
++
++			/* Clear TWL4030 ISRs */
++			WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
++						      tmr.isrs[j], cor) < 0);
++		}
++	}
++
++	return;
++}
++
++
  static void twl_init_irq(void)
  {
 -	int	i = 0;
-+	int	i, j;
++	int	i;
  	int	res = 0;
+-	int cor;
  	char	*msg = "Unable to register interrupt subsystem";
  	unsigned int irq_num;
-@@ -767,86 +891,18 @@ static void twl_init_irq(void)
- 	 * since we initially do not have any TWL4030 module interrupt
- 	 * handlers present.
+ 
+ 	/*
+-	 * For each TWL4030 module with ISR/IMR registers, mask all
+-	 * interrupts and then clear any existing interrupt status bits,
+-	 * since we initially do not have any TWL4030 module interrupt
+-	 * handlers present.
++	 * Mask and clear all TWL4030 interrupts since initially we do
++	 * not have any TWL4030 module interrupt handlers present
  	 */
 -
 -	/* Mask INT (PWR) interrupts at TWL4030 */
@@ -201,11 +224,17 @@ index 5855f5f..47d547d 100644
 -				     TWL4030_INT_PWR_IMR1) < 0);
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff,
 -				     TWL4030_INT_PWR_IMR2) < 0);
+-
+-	/* Are PWR interrupt status bits cleared by reads or writes? */
+-	cor = twl4030_read_cor_bit(TWL4030_MODULE_INT,
+-				   TWL4030_INT_PWR_SIH_CTRL);
+-	WARN_ON(cor < 0);
+-
 -	/* Clear TWL4030 INT (PWR) ISRs */
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT,
--				      TWL4030_INT_PWR_ISR1) < 0);
+-				      TWL4030_INT_PWR_ISR1, cor) < 0);
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT,
--				      TWL4030_INT_PWR_ISR2) < 0);
+-				      TWL4030_INT_PWR_ISR2, cor) < 0);
 -
 -	/* Slave address 0x4A */
 -
@@ -218,15 +247,21 @@ index 5855f5f..47d547d 100644
 -				     TWL4030_INTERRUPTS_BCIIMR1B) < 0);
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff,
 -				     TWL4030_INTERRUPTS_BCIIMR2B) < 0);
+-
+-	/* Are BCI interrupt status bits cleared by reads or writes? */
+-	cor = twl4030_read_cor_bit(TWL4030_MODULE_INTERRUPTS,
+-				   TWL4030_INTERRUPTS_BCISIHCTRL);
+-	WARN_ON(cor < 0);
+-
 -	/* Clear TWL4030 BCI ISRs */
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
--				      TWL4030_INTERRUPTS_BCIISR1A) < 0);
+-				      TWL4030_INTERRUPTS_BCIISR1A, cor) < 0);
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
--				      TWL4030_INTERRUPTS_BCIISR2A) < 0);
+-				      TWL4030_INTERRUPTS_BCIISR2A, cor) < 0);
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
--				      TWL4030_INTERRUPTS_BCIISR1B) < 0);
+-				      TWL4030_INTERRUPTS_BCIISR1B, cor) < 0);
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
--				      TWL4030_INTERRUPTS_BCIISR2B) < 0);
+-				      TWL4030_INTERRUPTS_BCIISR2B, cor) < 0);
 -
 -	/* MAD C */
 -	/* Mask MADC interrupts at TWL4030 */
@@ -234,11 +269,17 @@ index 5855f5f..47d547d 100644
 -				     TWL4030_MADC_IMR1) < 0);
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff,
 -				     TWL4030_MADC_IMR2) < 0);
+-
+-	/* Are MADC interrupt status bits cleared by reads or writes? */
+-	cor = twl4030_read_cor_bit(TWL4030_MODULE_MADC,
+-				   TWL4030_MADC_MADC_SIH_CTRL);
+-	WARN_ON(cor < 0);
+-
 -	/* Clear TWL4030 MADC ISRs */
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC,
--				      TWL4030_MADC_ISR1) < 0);
+-				      TWL4030_MADC_ISR1, cor) < 0);
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC,
--				      TWL4030_MADC_ISR2) < 0);
+-				      TWL4030_MADC_ISR2, cor) < 0);
 -
 -	/* key Pad */
 -	/* Mask keypad interrupts at TWL4030 */
@@ -246,14 +287,21 @@ index 5855f5f..47d547d 100644
 -				     TWL4030_KEYPAD_KEYP_IMR1) < 0);
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff,
 -				     TWL4030_KEYPAD_KEYP_IMR2) < 0);
+-
+-	/* Are keypad interrupt status bits cleared by reads or writes? */
+-	cor = twl4030_read_cor_bit(TWL4030_MODULE_KEYPAD,
+-				   TWL4030_KEYPAD_KEYP_SIH_CTRL);
+-	WARN_ON(cor < 0);
+-
 -	/* Clear TWL4030 keypad ISRs */
 -	/* XXX does this still need to be done twice for some reason? */
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD,
--				      TWL4030_KEYPAD_KEYP_ISR1) < 0);
+-				      TWL4030_KEYPAD_KEYP_ISR1, cor) < 0);
 -	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD,
--				      TWL4030_KEYPAD_KEYP_ISR2) < 0);
+-				      TWL4030_KEYPAD_KEYP_ISR2, cor) < 0);
 -
 -	/* Slave address 0x49 */
+-
 -	/* Mask GPIO interrupts at TWL4030 */
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
 -				     REG_GPIO_IMR1A) < 0);
@@ -268,32 +316,26 @@ index 5855f5f..47d547d 100644
 -	WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
 -				     REG_GPIO_IMR3B) < 0);
 -
+-	/* Are GPIO interrupt status bits cleared by reads or writes? */
+-	cor = twl4030_read_cor_bit(TWL4030_MODULE_GPIO,
+-				   REG_GPIO_SIH_CTRL);
+-	WARN_ON(cor < 0);
+-
 -	/* Clear TWL4030 GPIO ISRs */
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1A) < 0);
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2A) < 0);
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3A) < 0);
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1B) < 0);
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2B) < 0);
--	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3B) < 0);
-+	for (i = 0; i < ARRAY_SIZE(twl4030_mod_regs); i++) {
-+		const struct twl4030_mod_iregs tmr = twl4030_mod_regs[i];
-+
-+		for (j = 0; j < tmr.reg_cnt; j++) {
-+			/* Mask interrupts at the TWL4030 */
-+			WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
-+						     tmr.imrs[j]) < 0);
-+			/* Clear TWL4030 ISRs */
-+			WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
-+						      tmr.isrs[j]) < 0);
-+		}
-+	}
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1A,
+-				      cor) < 0);
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2A,
+-				      cor) < 0);
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3A,
+-				      cor) < 0);
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1B,
+-				      cor) < 0);
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2B,
+-				      cor) < 0);
+-	WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3B,
+-				      cor) < 0);
++	twl4030_mask_clear_intrs(twl4030_mod_regs,
++				 ARRAY_SIZE(twl4030_mod_regs));
  
  	/* install an irq handler for each of the PIH modules */
  	for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) {
-
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html
-
diff --git a/packages/linux/linux-omap2-git/beagleboard/mru-clocks1.diff b/packages/linux/linux-omap2-git/beagleboard/mru-clocks1.diff
new file mode 100644
index 0000000000..a17cc52c16
--- /dev/null
+++ b/packages/linux/linux-omap2-git/beagleboard/mru-clocks1.diff
@@ -0,0 +1,25 @@
+From: Mans Rullgard <mans@mansr.com>
+Date: Tue, 22 Jul 2008 00:31:11 +0000 (+0100)
+Subject: ARM: OMAP: make dpll4_m4_ck programmable with clk_set_rate()
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=edc6cd29284f64f524dd410fdc5e6133bc177a8f
+
+ARM: OMAP: make dpll4_m4_ck programmable with clk_set_rate()
+
+Filling the set_rate and round_rate fields of dpll4_m4_ck makes
+this clock programmable through clk_set_rate().  This is needed
+to give omapfb control over the dss1_alwon_fck rate.
+---
+
+diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
+index 161da12..876eb13 100644
+--- a/arch/arm/mach-omap2/clock34xx.h
++++ b/arch/arm/mach-omap2/clock34xx.h
+@@ -815,6 +815,8 @@ static struct clk dpll4_m4_ck = {
+ 	.flags		= CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ 				PARENT_CONTROLS_CLOCK,
+ 	.recalc		= &omap2_clksel_recalc,
++	.set_rate	= &omap2_clksel_set_rate,
++	.round_rate	= &omap2_clksel_round_rate,
+ };
+ 
+ /* The PWRDN bit is apparently only available on 3430ES2 and above */
diff --git a/packages/linux/linux-omap2-git/beagleboard/mru-clocks2.diff b/packages/linux/linux-omap2-git/beagleboard/mru-clocks2.diff
new file mode 100644
index 0000000000..99c8f7c285
--- /dev/null
+++ b/packages/linux/linux-omap2-git/beagleboard/mru-clocks2.diff
@@ -0,0 +1,62 @@
+From: Mans Rullgard <mans@mansr.com>
+Date: Tue, 22 Jul 2008 00:58:18 +0000 (+0100)
+Subject: ARM: OMAP: add clk_get_parent() for OMAP2/3
+X-Git-Url: http://git.mansr.com/?p=linux-omap;a=commitdiff_plain;h=76a35ce79194b60e3697378e726e1e510c9349d1
+
+ARM: OMAP: add clk_get_parent() for OMAP2/3
+
+Signed-off-by: Mans Rullgard <mans@mansr.com>
+---
+
+diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
+index 577be44..28aec36 100644
+--- a/arch/arm/mach-omap2/clock.c
++++ b/arch/arm/mach-omap2/clock.c
+@@ -824,6 +824,11 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
+ 	return 0;
+ }
+ 
++struct clk *omap2_clk_get_parent(struct clk *clk)
++{
++	return clk->parent;
++}
++
+ /* DPLL rate rounding code */
+ 
+ /**
+diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
+index 49245f7..4aa69d5 100644
+--- a/arch/arm/mach-omap2/clock.h
++++ b/arch/arm/mach-omap2/clock.h
+@@ -29,6 +29,7 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
+ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
+ int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance);
+ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate);
++struct clk *omap2_clk_get_parent(struct clk *clk);
+ 
+ #ifdef CONFIG_OMAP_RESET_CLOCKS
+ void omap2_clk_disable_unused(struct clk *clk);
+diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
+index 54cc6e1..ed7af21 100644
+--- a/arch/arm/mach-omap2/clock24xx.c
++++ b/arch/arm/mach-omap2/clock24xx.c
+@@ -422,6 +422,7 @@ static struct clk_functions omap2_clk_functions = {
+ 	.clk_round_rate		= omap2_clk_round_rate,
+ 	.clk_set_rate		= omap2_clk_set_rate,
+ 	.clk_set_parent		= omap2_clk_set_parent,
++	.clk_get_parent		= omap2_clk_get_parent,
+ 	.clk_disable_unused	= omap2_clk_disable_unused,
+ #ifdef	CONFIG_CPU_FREQ
+ 	.clk_init_cpufreq_table	= omap2_clk_init_cpufreq_table,
+diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
+index 04dedec..08c8c46 100644
+--- a/arch/arm/mach-omap2/clock34xx.c
++++ b/arch/arm/mach-omap2/clock34xx.c
+@@ -541,6 +541,7 @@ static struct clk_functions omap2_clk_functions = {
+ 	.clk_round_rate		= omap2_clk_round_rate,
+ 	.clk_set_rate		= omap2_clk_set_rate,
+ 	.clk_set_parent		= omap2_clk_set_parent,
++	.clk_get_parent		= omap2_clk_get_parent,
+ 	.clk_disable_unused	= omap2_clk_disable_unused,
+ };
+ 
diff --git a/packages/linux/linux-omap2_git.bb b/packages/linux/linux-omap2_git.bb
index 88cd433166..c6ffd347de 100644
--- a/packages/linux/linux-omap2_git.bb
+++ b/packages/linux/linux-omap2_git.bb
@@ -6,7 +6,7 @@ SRCREV = "d3b3ae0fe6c71641da19c8de466ec366d39847e3"
 
 PV = "2.6.26"
 #PV = "2.6.25+2.6.26-rc9+${PR}+git${SRCREV}"
-PR = "r45"
+PR = "r46"
 
 SRC_URI = "git://source.mvista.com/git/linux-omap-2.6.git;protocol=git \
 	   file://defconfig"
@@ -41,6 +41,8 @@ SRC_URI_append_beagleboard = " file://no-harry-potter.diff;patch=1 \
            file://TWL4030-07.patch;patch=1 \
            file://TWL4030-08.patch;patch=1 \
            file://TWL4030-09.patch;patch=1 \
+           file://mru-clocks1.diff;patch=1 \
+           file://mru-clocks2.diff;patch=1 \
 "
 
 SRC_URI_append_omap3evm = " file://no-harry-potter.diff;patch=1 \
-- 
cgit v1.2.3