From 58d6c0ace0c9fe2a3ed9fa845bec9a89583e2fd5 Mon Sep 17 00:00:00 2001 From: Florian Boor Date: Mon, 6 Jul 2009 18:52:53 +0200 Subject: linux: Update 2.6.30-rc4 with more tx25 patches. --- .../linux-2.6.29+2.6.30-rc4/tx25/tx25-can.patch | 5914 ++++++++++++++++++++ .../linux-2.6.29+2.6.30-rc4/tx25/tx25-ts2.patch | 1759 ++++++ recipes/linux/linux_2.6.29+2.6.30-rc4.bb | 6 +- 3 files changed, 7677 insertions(+), 2 deletions(-) create mode 100644 recipes/linux/linux-2.6.29+2.6.30-rc4/tx25/tx25-can.patch create mode 100644 recipes/linux/linux-2.6.29+2.6.30-rc4/tx25/tx25-ts2.patch diff --git a/recipes/linux/linux-2.6.29+2.6.30-rc4/tx25/tx25-can.patch b/recipes/linux/linux-2.6.29+2.6.30-rc4/tx25/tx25-can.patch new file mode 100644 index 0000000000..dd857d5846 --- /dev/null +++ b/recipes/linux/linux-2.6.29+2.6.30-rc4/tx25/tx25-can.patch @@ -0,0 +1,5914 @@ +diff -purN -X linux-2.6.30-rc4-karo/Documentation/dontdiff linux-2.6.30-rc4-karo/arch/arm/mach-mx2/Kconfig linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/Kconfig +--- linux-2.6.30-rc4-karo/arch/arm/mach-mx2/Kconfig 2009-06-08 11:15:16.000000000 +0200 ++++ linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/Kconfig 2009-07-01 11:09:09.000000000 +0200 +@@ -15,6 +15,9 @@ config MACH_MX27 + bool "i.MX27 support" + select ARCH_MXC_IOMUX_V2 + select ARCH_MXC_HAS_NFC_V1 ++ select USB_ARCH_HAS_EHCI ++ select ARCH_MXC_HAS_USBH2 ++ select ARCH_MXC_HAS_USBOTG + help + This enables support for Freescale's MX2 based i.MX27 processor. + +@@ -22,6 +25,9 @@ config MACH_MX25 + bool "i.MX25 support" + select ARCH_MXC_IOMUX_V3 + select ARCH_MXC_HAS_NFC_V1_1 ++ select USB_ARCH_HAS_EHCI ++ select ARCH_MXC_HAS_USBH2 ++ select ARCH_MXC_HAS_USBOTG + select PHYLIB if FEC + help + This enables support for Freescale's MX2 based i.MX25 processor. +diff -purN -X linux-2.6.30-rc4-karo/Documentation/dontdiff linux-2.6.30-rc4-karo/arch/arm/mach-mx2/clock_imx25.c linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/clock_imx25.c +--- linux-2.6.30-rc4-karo/arch/arm/mach-mx2/clock_imx25.c 2009-07-06 17:32:59.000000000 +0200 ++++ linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/clock_imx25.c 2009-07-06 15:40:57.000000000 +0200 +@@ -274,37 +274,42 @@ static void _perclk_disable(struct clk * + static int _clk_pll_set_rate(struct clk *clk, unsigned long rate) + { + unsigned long reg; +- signed long pd = 1; /* Pre-divider */ +- signed long mfi; /* Multiplication Factor (Integer part) */ ++ unsigned int pd = 1; /* Pre-divider */ ++ unsigned long mfi; /* Multiplication Factor (Integer part) */ + signed long mfn; /* Multiplication Factor (Integer part) */ +- signed long mfd; /* Multiplication Factor (Denominator Part) */ ++ unsigned long mfd; /* Multiplication Factor (Denominator Part) */ + signed long tmp; + unsigned long ref_freq = clk_get_rate(clk->parent); ++ unsigned long err = ~0; ++ int best_mfn = -1; ++ int best_mfd = -1; + + while (((ref_freq / pd) * 10) > rate) + pd++; + +- /* the ref_freq/2 in the following is to round up */ +- mfi = (((rate / 2) * pd) + (ref_freq / 2)) / ref_freq; ++ mfi = ((rate / 2) * pd) / ref_freq; + if (mfi < 5 || mfi > 15) + return -EINVAL; + +- /* pick a mfd value that will work +- * then solve for mfn */ +- mfd = ref_freq / 50000; +- +- /* +- * pll_freq * pd * mfd +- * mfn = -------------------- - (mfi * mfd) +- * 2 * ref_freq +- */ +- /* the tmp/2 is for rounding */ + tmp = ref_freq / 10000; +- mfn = ((((((rate / 2) + (tmp / 2)) / tmp) * pd) * mfd) / 10000) - +- (mfi * mfd); ++ for (mfd = 1; mfd <= 1024; mfd++) { ++ unsigned long act_freq; + +- printk(KERN_DEBUG "pll freq: %lu PD=%ld MFI=%ld MFD=%ld MFN=%ld (0x%03lx)\n", +- rate, pd, mfi, mfd, mfn, (mfn + ((mfn < 0) ? 1024 : 0)) & 0x3ff); ++ mfn = ((((((rate / 2) + (tmp - 1)) / tmp) * pd) * mfd) / 10000) - ++ (mfi * mfd); ++ ++ act_freq = (2 * ref_freq * mfi + (2 * ref_freq * mfn / mfd)) / pd; ++ act_freq -= rate; ++ if (abs(act_freq) < err) { ++ best_mfn = mfn; ++ best_mfd = mfd; ++ err = abs(act_freq); ++ if (err == 0) ++ break; ++ } ++ } ++ mfn = best_mfn; ++ mfd = best_mfd; + + mfn = (mfn + ((mfn < 0) ? 1024 : 0)) & 0x3ff; + pd--; +@@ -333,7 +338,8 @@ static int _clk_pll_set_rate(struct clk + static unsigned long _clk_pll_getrate(struct clk *clk) + { + unsigned long rate; +- signed long mfi, mfn, mfd, pdf; ++ unsigned int mfi, mfd, pdf; ++ int mfn; + unsigned long ref_clk; + unsigned long reg; + +@@ -355,6 +361,9 @@ static unsigned long _clk_pll_getrate(st + BUG(); /* oops */ + } + ++ if (mfn >= 512) ++ mfn = 1024 - mfn; ++ + mfi = (mfi < 5) ? 5 : mfi; + rate = 2LL * ref_clk * mfn; + do_div(rate, mfd + 1); +@@ -436,8 +445,8 @@ static unsigned long _clk_perclkx_getrat + + pcdr = __raw_readl(pcdr_a[clk->id >> 2]); + +- perclk_pdf = +- (pcdr >> ((clk->id & 3) << 3)) & MXC_CCM_PCDR1_PERDIV1_MASK; ++ perclk_pdf = (pcdr >> ((clk->id & 3) << 3)) & ++ MXC_CCM_PCDR1_PERDIV1_MASK; + + return clk_get_rate(clk->parent) / (perclk_pdf + 1); + } +@@ -466,8 +475,6 @@ static int _clk_perclkx_set_rate(struct + return -EINVAL; + + div = clk_get_rate(clk->parent) / rate; +- printk(KERN_DEBUG "%s: perclk[%d] parent_rate=%lu rate=%lu div=%lu\n", +- __FUNCTION__, clk->id, clk_get_rate(clk->parent), rate, div); + if (div > 64 || div < 1 || ((clk_get_rate(clk->parent) / div) != rate)) + return -EINVAL; + div--; +@@ -542,7 +549,8 @@ static int _clk_perclkx_set_parent3(stru + + static unsigned long _clk_ipg_getrate(struct clk *clk) + { +- return clk_get_rate(clk->parent) / 2; /* Always AHB / 2 */ ++ unsigned long rate = clk_get_rate(clk->parent) / 2; /* Always AHB / 2 */ ++ return rate; + } + + /* Top-level clocks */ +@@ -714,7 +722,7 @@ static struct clk per_clk[] = { + }, + { + .id = 5, +- .parent = &upll_clk, /* can be AHB or UPLL */ ++ .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, +@@ -1121,7 +1129,7 @@ static struct clk gpt2_clk[] = { + { + .id = 1, + .parent = &per_clk[5], +- .secondary = &gpt1_clk[1], ++ .secondary = &gpt2_clk[1], + }, + { + .id = 1, +@@ -1137,7 +1145,7 @@ static struct clk gpt3_clk[] = { + { + .id = 2, + .parent = &per_clk[5], +- .secondary = &gpt1_clk[1], ++ .secondary = &gpt3_clk[1], + }, + { + .id = 2, +@@ -1153,7 +1161,7 @@ static struct clk gpt4_clk[] = { + { + .id = 3, + .parent = &per_clk[5], +- .secondary = &gpt1_clk[1], ++ .secondary = &gpt4_clk[1], + }, + { + .id = 3, +@@ -1576,9 +1584,9 @@ static int _clk_usb_set_rate(struct clk + + static unsigned long _clk_usb_getrate(struct clk *clk) + { +- unsigned long div = +- __raw_readl(MXC_CCM_MCR) & MXC_CCM_CCTL_USB_DIV_MASK; ++ unsigned long div; + ++ div = __raw_readl(MXC_CCM_MCR) & MXC_CCM_CCTL_USB_DIV_MASK; + div >>= MXC_CCM_CCTL_USB_DIV_OFFSET; + + return clk_get_rate(clk->parent) / (div + 1); +@@ -1726,8 +1734,8 @@ static struct clk_lookup lookups[] = { + _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) + _REGISTER_CLOCK(NULL, "audmux", audmux_clk) + _REGISTER_CLOCK(NULL, "ata", ata_clk[0]) +- _REGISTER_CLOCK("mxc-can.0", NULL, can_clk[0]) +- _REGISTER_CLOCK("mxc-can.1", NULL, can_clk[1]) ++ _REGISTER_CLOCK("mxc-flexcan.0", NULL, can_clk[0]) ++ _REGISTER_CLOCK("mxc-flexcan.1", NULL, can_clk[1]) + _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) + _REGISTER_CLOCK(NULL, "cspi.0", cspi_clk[0]) + _REGISTER_CLOCK(NULL, "cspi.1", cspi_clk[1]) +@@ -1784,12 +1792,8 @@ int __init mx25_clocks_init(unsigned lon + { + int i; + +- for (i = 0; i < ARRAY_SIZE(lookups); i++) { +- printk(KERN_DEBUG "Registering clock '%s' '%s'\n", +- lookups[i].dev_id ? lookups[i].dev_id : "", +- lookups[i].con_id ? lookups[i].con_id : ""); ++ for (i = 0; i < ARRAY_SIZE(lookups); i++) + clkdev_add(&lookups[i]); +- } + + ckih_rate = fref; + #ifndef CONFIG_DEBUG_LL +@@ -1825,23 +1829,19 @@ int __init mx25_clocks_init(unsigned lon + } + } + } +-#endif ++ + /* the NFC clock must be derived from AHB clock */ + clk_set_parent(&per_clk[8], &ahb_clk); ++#endif + clk_set_rate(&per_clk[8], clk_get_rate(&ahb_clk) / 6); ++ clk_set_rate(&per_clk[7], clk_get_rate(per_clk[7].parent)); + + /* This will propagate to all children and init all the clock rates */ + #ifdef CONFIG_DEBUG_LL + clk_enable(&uart1_clk[0]); + #endif + clk_enable(&emi_clk); +- clk_enable(&gpio_clk[0]); +- clk_enable(&gpio_clk[1]); +- clk_enable(&gpio_clk[2]); + clk_enable(&iim_clk); +- clk_enable(&gpt1_clk[0]); +- clk_enable(&iomuxc_clk); +- clk_enable(&scc_clk); + + pr_info("Clock input source is %ld\n", clk_get_rate(&osc24m_clk)); + +@@ -1856,6 +1856,6 @@ int __init mx25_clocks_init(unsigned lon + clk_set_rate(&mpll_clk, clk_get_rate(&mpll_clk)); + clk_set_rate(&upll_clk, clk_get_rate(&upll_clk)); + +- mxc_timer_init(&gpt1_clk[0]); ++ mxc_timer_init(&gpt1_clk[1]); + return 0; + } +diff -purN -X linux-2.6.30-rc4-karo/Documentation/dontdiff linux-2.6.30-rc4-karo/arch/arm/mach-mx2/devices.h linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/devices.h +--- linux-2.6.30-rc4-karo/arch/arm/mach-mx2/devices.h 2009-06-02 17:59:16.000000000 +0200 ++++ linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/devices.h 2009-07-01 11:10:15.000000000 +0200 +@@ -20,6 +20,9 @@ extern struct platform_device mxc_i2c_de + extern struct platform_device mxc_i2c_device1; + extern struct platform_device mxc_sdhc_device0; + extern struct platform_device mxc_sdhc_device1; ++extern struct platform_device mxc_usbh1_device; ++extern struct platform_device mxc_usbh2_device; ++extern struct platform_device mxc_usbotg_device; + #ifdef CONFIG_MACH_MX25 + extern struct platform_device mx25_i2c_device0; + extern struct platform_device mx25_i2c_device1; +diff -purN -X linux-2.6.30-rc4-karo/Documentation/dontdiff linux-2.6.30-rc4-karo/arch/arm/mach-mx2/devices_mx25.c linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/devices_mx25.c +--- linux-2.6.30-rc4-karo/arch/arm/mach-mx2/devices_mx25.c 2009-06-02 17:59:17.000000000 +0200 ++++ linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/devices_mx25.c 2009-06-29 10:48:40.000000000 +0200 +@@ -142,12 +142,12 @@ struct platform_device mxc_fb_device = { + * Resource definition for the CSPI1 + */ + static struct resource mx25_spi1_resources[] = { +- [0] = { ++ { + .start = CSPI1_BASE_ADDR, + .end = CSPI1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +- [1] = { ++ { + .start = MXC_INT_CSPI1, + .end = MXC_INT_CSPI1, + .flags = IORESOURCE_IRQ, +@@ -178,12 +178,12 @@ static struct platform_device mx25_spi1_ + * Resource definition for the CSPI2 + */ + static struct resource mx25_spi2_resources[] = { +- [0] = { ++ { + .start = CSPI2_BASE_ADDR, + .end = CSPI2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +- [1] = { ++ { + .start = MXC_INT_CSPI2, + .end = MXC_INT_CSPI2, + .flags = IORESOURCE_IRQ, +@@ -213,12 +213,12 @@ static struct platform_device mx25_spi2_ + * Resource definition for the CSPI3 + */ + static struct resource mx25_spi3_resources[] = { +- [0] = { ++ { + .start = CSPI3_BASE_ADDR, + .end = CSPI3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +- [1] = { ++ { + .start = MXC_INT_CSPI3, + .end = MXC_INT_CSPI3, + .flags = IORESOURCE_IRQ, +@@ -267,6 +267,56 @@ static inline void mx25_init_spi(void) + } + #endif + ++#if defined(CONFIG_USB_EHCI_MXC) || defined(CONFIG_USB_EHCI_MXC_MODULE) ++static struct resource mxc_usbotg_resources[] = { ++ { ++ .start = OTG_BASE_ADDR, ++ .end = OTG_BASE_ADDR + 0x1ff, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = MXC_INT_USB_OTG, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 usbotg_dmamask = (u32)~0; ++ ++struct platform_device mxc_usbotg_device = { ++ .name = "mxc-ehci", ++ .id = 0, ++ .dev = { ++ .coherent_dma_mask = 0xffffffff, ++ .dma_mask = &usbotg_dmamask, ++ }, ++ .num_resources = ARRAY_SIZE(mxc_usbotg_resources), ++ .resource = mxc_usbotg_resources, ++}; ++ ++static struct resource mxc_usbh2_resources[] = { ++ { ++ .start = USBH2_BASE_ADDR, ++ .end = USBH2_BASE_ADDR + 0x1ff, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = MXC_INT_USB_H2, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 usbh2_dmamask = (u32)~0; ++ ++struct platform_device mxc_usbh2_device = { ++ .name = "mxc-ehci", ++ .id = 1, ++ .dev = { ++ .coherent_dma_mask = 0xffffffff, ++ .dma_mask = &usbh2_dmamask, ++ }, ++ .num_resources = ARRAY_SIZE(mxc_usbh2_resources), ++ .resource = mxc_usbh2_resources, ++}; ++#endif ++ + /* I2C controller and device data */ + #if defined(CONFIG_I2C_IMX) || defined(CONFIG_I2C_IMX_MODULE) + +@@ -274,12 +324,12 @@ static inline void mx25_init_spi(void) + * Resource definition for the I2C1 + */ + static struct resource mx25_i2c1_resources[] = { +- [0] = { ++ { + .start = I2C_BASE_ADDR, + .end = I2C_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +- [1] = { ++ { + .start = MXC_INT_I2C, + .end = MXC_INT_I2C, + .flags = IORESOURCE_IRQ, +@@ -290,12 +340,12 @@ static struct resource mx25_i2c1_resourc + * Resource definition for the I2C2 + */ + static struct resource mx25_i2c2_resources[] = { +- [0] = { ++ { + .start = I2C2_BASE_ADDR, + .end = I2C2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +- [1] = { ++ { + .start = MXC_INT_I2C2, + .end = MXC_INT_I2C2, + .flags = IORESOURCE_IRQ, +@@ -306,12 +356,12 @@ static struct resource mx25_i2c2_resourc + * Resource definition for the I2C3 + */ + static struct resource mx25_i2c3_resources[] = { +- [0] = { ++ { + .start = I2C3_BASE_ADDR, + .end = I2C3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +- [1] = { ++ { + .start = MXC_INT_I2C3, + .end = MXC_INT_I2C3, + .flags = IORESOURCE_IRQ, +diff -purN -X linux-2.6.30-rc4-karo/Documentation/dontdiff linux-2.6.30-rc4-karo/arch/arm/mach-mx2/karo-tx25.c linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/karo-tx25.c +--- linux-2.6.30-rc4-karo/arch/arm/mach-mx2/karo-tx25.c 2009-07-06 17:32:59.000000000 +0200 ++++ linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/karo-tx25.c 2009-07-06 16:02:49.000000000 +0200 +@@ -31,8 +31,6 @@ + #include + #include + #include +-//#include +-//#include + #include + #include + #include +@@ -61,15 +59,12 @@ + #include + #include + #include +-//#include +-//#include + #include + #include + #include +-//#include +-//#include +-//#include ++#include + #include ++#include + + #include "crm_regs.h" + #include "devices.h" +@@ -83,161 +78,172 @@ static int tx25_debug; + module_param(tx25_debug, int, 0); + #endif + +-//#include "karo.h" +- + int karo_board_type = 0; + int karo_mod_type = -1; + + +-#ifdef CONFIG_USB_EHCI_MXC +- +-#define SMSC_VENDOR_ID 0x0424 +-#define USB3317_PROD_ID 0x0006 +-#define ULPI_FCTL 7 +- +-static inline const char *ulpi_name(void __iomem *view) +-{ +- if ((unsigned long)view & 0x400) { +- return "USBH2"; +- } else { +- return "USBOTG"; +- } +-} +- +-static int usb3317_init(void __iomem *view) ++static int karo_tx25_gpio_config(struct pad_desc *pd, int num) + { +- int vid, pid, ret; +-#if 1 +- /* This is a kludge until we know why we sometimes read a wrong +- * vendor or product ID! +- */ +- int retries = 3; +- +- retry: +-#endif +- ret = ulpi_read(ISP1504_VID_HIGH, view); +- if (ret < 0) { +- goto err; +- } +- vid = ret << 8; ++ int ret; ++ int i; ++ int count = 0; + +- ret = ulpi_read(ISP1504_VID_LOW, view); +- if (ret < 0) { +- goto err; ++ for (i = 0; i < num; i++) { ++ ret = mxc_iomux_v3_setup_pad(&pd[i]); ++ if (ret == 0) { ++ DBG(0, "%s: PAD[%d] %s set up as GPIO\n", __FUNCTION__, i, ++ MXC_PAD_NAME(&pd[i])); ++ count++; ++ mxc_iomux_v3_release_pad(&pd[i]); ++ } else { ++ DBG(0, "%s: PAD[%d] %s skipped\n", __FUNCTION__, i, ++ MXC_PAD_NAME(&pd[i])); ++ } + } +- vid |= ret; ++ return count; ++} + +- ret = ulpi_read(ISP1504_PID_HIGH, view); +- if (ret < 0) { +- goto err; +- } +- pid = ret << 8; ++#ifdef CONFIG_USB_EHCI_MXC + +- ret = ulpi_read(ISP1504_PID_LOW, view); +- if (ret < 0) { +- goto err; +- } +- pid |= ret; ++/* USB register offsets */ ++#define REG_USBCTRL 0x600 ++#define REG_PHY_CTRL 0x608 ++ ++#define PHY_CTRL_USBEN (1 << 24) ++ ++/* USB Host/OTG register offsets referenced to ULPI view port */ ++#define REG_USBCMD 0x140 ++#define REG_USBSTS 0x144 ++#define REG_PORTSC1 0x184 ++#define REG_USBMODE 0x1a8 ++ ++#define USBCMD_RST (1 << 1) ++#define USBCMD_RUN (1 << 0) ++ ++#define USBSTS_HCH (1 << 12) ++ ++/* USB_CTRL register bits */ ++#define USBCTRL_OCPOL_HST (1 << 2) ++#define USBCTRL_OCPOL_OTG (1 << 3) ++#define USBCTRL_USBTE (1 << 4) ++#define USBCTRL_HSDT (1 << 5) ++#define USBCTRL_XCSH (1 << 9) ++#define USBCTRL_XCSO (1 << 10) ++#define USBCTRL_PP_OTG (1 << 11) ++#define USBCTRL_HLKEN (1 << 12) ++#define USBCTRL_OLKEN (1 << 13) ++#define USBCTRL_HPM (1 << 16) ++#define USBCTRL_PP_HST (1 << 18) ++#define USBCTRL_HWIE (1 << 19) ++#define USBCTRL_HUIE (1 << 20) ++#define USBCTRL_OPM (1 << 24) ++#define USBCTRL_OEXTEN (1 << 25) ++#define USBCTRL_HEXTEN (1 << 26) ++#define USBCTRL_OWIE (1 << 27) ++#define USBCTRL_OUIE (1 << 28) + +- pr_info("ULPI on %s port Vendor ID 0x%x Product ID 0x%x\n", +- ulpi_name(view), vid, pid); +- if (vid != SMSC_VENDOR_ID || pid != USB3317_PROD_ID) { +- if (retries-- < 0) { +- pr_err("No USB3317 found\n"); +- return -ENODEV; ++static int tx25_usb_init(struct platform_device *pdev, void __iomem *base, int host_mode) ++{ ++ u32 val; ++ unsigned long flags; ++ const char __maybe_unused *name = pdev->id ? "USBH2" : "USBOTG"; ++ unsigned int loops = 0; ++ void __iomem *otg_base = IO_ADDRESS(OTG_BASE_ADDR); ++ ++ if (!(__raw_readl(base + REG_USBSTS) & USBSTS_HCH)) { ++ DBG(0, "%s: %s[%p] is busy: %08x\n", __FUNCTION__, name, ++ base + REG_USBSTS, __raw_readl(base + REG_USBSTS)); ++ __raw_writel(__raw_readl(base + REG_USBCTRL) & ~USBCMD_RUN, ++ base + REG_USBCTRL); ++ while (__raw_readl(base + REG_USBCTRL) & USBCMD_RUN) { ++ cpu_relax(); + } +- goto retry; + } +- err: +- if (ret < 0) { +- printk(KERN_ERR "ULPI read on %s port failed with error %d\n", +- ulpi_name(view), ret); +- return ret; ++ DBG(0, "%s: PHY_CTRL[%p]=%08x\n", __FUNCTION__, otg_base + REG_PHY_CTRL, ++ __raw_readl(otg_base + REG_PHY_CTRL)); ++ DBG(0, "%s: USBCMD[%p]=%08x\n", __FUNCTION__, base + REG_USBCMD, ++ __raw_readl(base + REG_USBCMD)); ++ DBG(0, "%s: USBSTS[%p]=%08x\n", __FUNCTION__, base + REG_USBSTS, ++ __raw_readl(base + REG_USBSTS)); ++ ++ /* reset USB Host controller */ ++ __raw_writel(USBCMD_RST, base + REG_USBCMD); ++ while (__raw_readl(base + REG_USBCMD) & USBCMD_RST) { ++ cpu_relax(); ++ loops++; + } +- return 0; +-} +- +-static int usb3317_set_vbus_power(void __iomem *view, int on) +-{ +- int ret; +- +- DBG(0, "%s: Switching %s port VBUS power %s\n", __FUNCTION__, +- ulpi_name(view), on ? "on" : "off"); ++ DBG(0, "USB controller reset finished after %u loops\n", loops); ++ local_irq_save(flags); ++ val = __raw_readl(otg_base + REG_USBCTRL); ++ if (pdev->id == 1) { ++ val &= ~(USBCTRL_OCPOL_HST | USBCTRL_HPM | ++ USBCTRL_HEXTEN | USBCTRL_HWIE); ++ val |= USBCTRL_PP_HST | USBCTRL_HSDT | USBCTRL_USBTE | ++ USBCTRL_XCSH; ++ } else { ++ val &= ~(USBCTRL_OCPOL_OTG | USBCTRL_OPM | ++ USBCTRL_OEXTEN | USBCTRL_OWIE); ++ val |= USBCTRL_PP_OTG | USBCTRL_XCSO; ++ } ++ DBG(0, "%s: Changing %s_USBCTRL from %08x to %08x\n", __FUNCTION__, name, ++ __raw_readl(otg_base + REG_USBCTRL), val); ++ __raw_writel(val, otg_base + REG_USBCTRL); ++ local_irq_restore(flags); + +- if (on) { +- ret = ulpi_set(DRV_VBUS_EXT | /* enable external Vbus */ +- DRV_VBUS | /* enable internal Vbus */ +- CHRG_VBUS, /* charge Vbus */ +- ISP1504_OTGCTL, view); ++ val = __raw_readl(base + REG_PORTSC1); ++ if (pdev->id == 1) { ++ /* select serial transceiver */ ++ val = (val & ~(3 << 30)) | (3 << 30) | (1 << 28); + } else { +- ret = ulpi_clear(DRV_VBUS_EXT | /* disable external Vbus */ +- DRV_VBUS, /* disable internal Vbus */ +- ISP1504_OTGCTL, view); +- if (ret == 0) { +- ret = ulpi_set(DISCHRG_VBUS, /* discharge Vbus */ +- ISP1504_OTGCTL, view); +- } +- } +- if (ret < 0) { +- printk(KERN_ERR "ULPI read on %s port failed with error %d\n", +- ulpi_name(view), ret); +- return ret; ++ /* select UTMI transceiver */ ++ val = (val & ~(3 << 30)) | (0 << 30) | (1 << 28); + } ++ DBG(0, "%s: Changing %s_PORTSC1 from %08x to %08x\n", __FUNCTION__, name, ++ __raw_readl(base + REG_PORTSC1), val); ++ __raw_writel(val, base + REG_PORTSC1); ++ ++ val = __raw_readl(otg_base + REG_PHY_CTRL); ++ __raw_writel(val & ~PHY_CTRL_USBEN, otg_base + REG_PHY_CTRL); ++ //__raw_writel(val | PHY_CTRL_USBEN, otg_base + REG_PHY_CTRL); ++ DBG(0, "%s: PHY_CTRL[%p]=%08x\n", __FUNCTION__, otg_base + REG_PHY_CTRL, ++ __raw_readl(otg_base + REG_PHY_CTRL)); ++ ++ /* Switch to Host mode */ ++ val = __raw_readl(base + REG_USBMODE); ++ DBG(0, "%s: Changing %s_USBMODE from %08x to %08x\n", __FUNCTION__, name, ++ val, val | (host_mode ? 0x3 : 0x02)); ++ __raw_writel(val | (host_mode ? 0x3 : 0x02), base + REG_USBMODE); ++ + return 0; + } + ++#ifdef CONFIG_ARCH_MXC_EHCI_USBH2 ++static struct pad_desc karo_tx25_usbh2_pads[] = { ++ MX25_PAD_D9__USBH2_PWR, ++ MX25_PAD_D8__USBH2_OC, ++}; ++ + static int tx25_usbh2_init(struct platform_device *pdev) + { + int ret; +- u32 temp; +- unsigned long flags; +- void __iomem *view = IO_ADDRESS(OTG_BASE_ADDR + 0x570); ++ void __iomem *base = IO_ADDRESS(OTG_BASE_ADDR + 0x400); + +- local_irq_save(flags); +- temp = readl(IO_ADDRESS(OTG_BASE_ADDR) + 0x600); +- temp &= ~((3 << 21) | (1 << 0)); +- temp |= (1 << 5) | (1 << 16) | (1 << 19) | (1 << 20); +- writel(temp, IO_ADDRESS(OTG_BASE_ADDR) + 0x600); +- local_irq_restore(flags); +- +- /* select ULPI transceiver */ +- /* this must be done _before_ setting up the GPIOs! */ +- temp = readl(view + 0x14); +- DBG(0, "%s: Changing USBH2_PORTSC1 from %08x to %08x\n", __FUNCTION__, +- temp, (temp & ~(3 << 30)) | (2 << 30)); +- temp &= ~(3 << 30); +- temp |= 2 << 30; +- writel(temp, view + 0x14); +- +- /* Set to Host mode */ +- temp = readl(view + 0x38); +- DBG(0, "%s: Changing USBH2_USBMODE from %08x to %08x\n", __FUNCTION__, +- temp, temp | 3); +- writel(temp | 0x3, view + 0x38); ++ DBG(0, "%s: \n", __FUNCTION__); + +- ret = gpio_usbh2_active(); ++ ret = tx25_usb_init(pdev, base, 1); + if (ret != 0) { + return ret; + } + +- ret = usb3317_init(view); +- if (ret != 0) { +- goto err; +- } +- ret = usb3317_set_vbus_power(view, 1); +- if (ret != 0) { +- goto err; +- } +- return 0; +- +- err: +- gpio_usbh2_inactive(); ++ ret = mxc_iomux_v3_setup_multiple_pads(karo_tx25_usbh2_pads, ++ ARRAY_SIZE(karo_tx25_usbh2_pads)); + return ret; + } + + static int tx25_usbh2_exit(struct platform_device *pdev) + { +- gpio_usbh2_inactive(); ++ mxc_iomux_v3_release_multiple_pads(karo_tx25_usbh2_pads, ++ ARRAY_SIZE(karo_tx25_usbh2_pads)); + return 0; + } + +@@ -250,10 +256,55 @@ int tx25_usbh2_register(void) + { + int ret; + +- ret = mxc_register_device(&mxc_ehci2, &tx25_usbh2_data); ++ ret = mxc_register_device(&mxc_usbh2_device, &tx25_usbh2_data); + return ret; + } + device_initcall(tx25_usbh2_register); ++#endif // CONFIG_ARCH_MXC_EHCI_USBH2 ++ ++#ifdef CONFIG_ARCH_MXC_EHCI_USBOTG ++static struct pad_desc karo_tx25_usbotg_pads[] = { ++ MX25_PAD_GPIO_A__USBOTG_PWR, ++ MX25_PAD_GPIO_B__USBOTG_OC, ++}; ++ ++static int tx25_usbotg_init(struct platform_device *pdev) ++{ ++ int ret; ++ void __iomem *base = IO_ADDRESS(OTG_BASE_ADDR + 0x000); ++ ++ DBG(0, "%s: \n", __FUNCTION__); ++ ++ ret = tx25_usb_init(pdev, base, 1); ++ if (ret != 0) { ++ return ret; ++ } ++ ret = mxc_iomux_v3_setup_multiple_pads(karo_tx25_usbotg_pads, ++ ARRAY_SIZE(karo_tx25_usbotg_pads)); ++ return 0; ++} ++ ++static int tx25_usbotg_exit(struct platform_device *pdev) ++{ ++ mxc_iomux_v3_release_multiple_pads(karo_tx25_usbotg_pads, ++ ARRAY_SIZE(karo_tx25_usbotg_pads)); ++ return 0; ++} ++ ++static struct mxc_usbh_platform_data tx25_usbotg_data = { ++ .init = tx25_usbotg_init, ++ .exit = tx25_usbotg_exit, ++}; ++ ++int tx25_usbotg_register(void) ++{ ++ int ret; ++ ++ ret = mxc_register_device(&mxc_usbotg_device, &tx25_usbotg_data); ++ return ret; ++} ++device_initcall(tx25_usbotg_register); ++#endif // CONFIG_ARCH_MXC_EHCI_USBOTG + #endif // CONFIG_USB_EHCI_MXC + + //#define FEC_MII_IRQ IRQ_GPIOD(8) +@@ -382,17 +433,7 @@ static int gpio_fec_active(void) + return ret; + } + DBG(0, "%s: Switching FEC PHY power on\n", __FUNCTION__); +- //gpio_set_value(TX25_FEC_PWR_GPIO, 1); +-#if 0 +- while (1) { +- gpio_set_value(TX25_FEC_PWR_GPIO, 1); +- mdelay(1000); +- gpio_set_value(TX25_FEC_PWR_GPIO, 0); +- mdelay(1000); +- } +-#endif + DBG(0, "%s: Asserting FEC PHY reset\n", __FUNCTION__); +-// gpio_set_value(TX25_FEC_RST_GPIO, 0); + for (i = 0; i < ARRAY_SIZE(karo_tx25_fec_strap_gpios); i++) { + struct gpio_desc *pd = &karo_tx25_fec_strap_gpios[i]; + +@@ -462,13 +503,6 @@ static int gpio_fec_active(void) + rel_gpio: + while (--i >= 0) { + struct gpio_desc *pd = &karo_tx25_fec_strap_gpios[i]; +-#ifdef DEBUG +- int grp = pd->gpio / 32 + 1; +- int ofs = pd->gpio % 32; +- +- DBG(0, "%s: Freeing GPIO%d_%d\n", __FUNCTION__, +- grp, ofs); +-#endif + gpio_free(pd->gpio); + } + mxc_iomux_v3_release_multiple_pads(karo_tx25_fec_pwr_gpios, +@@ -499,13 +533,6 @@ static void gpio_fec_inactive(void) + ARRAY_SIZE(karo_tx25_fec_pwr_gpios)); + for (i = 0; i < ARRAY_SIZE(karo_tx25_fec_strap_gpios); i++) { + struct gpio_desc *pd = &karo_tx25_fec_strap_gpios[i]; +-#ifdef DEBUG +- int grp = pd->gpio / 32 + 1; +- int ofs = pd->gpio % 32; +- +- DBG(0, "%s: Freeing GPIO%d_%d\n", __FUNCTION__, +- grp, ofs); +-#endif + gpio_free(pd->gpio); + } + } +@@ -530,45 +557,6 @@ static int tx25_fec_resume(struct platfo + return 0; + } + +-#if 0 +-/* +- * i.MX25 allows RMII mode to be configured via a gasket +- */ +-#define FEC_MIIGSK_CFGR_FRCONT (1 << 6) +-#define FEC_MIIGSK_CFGR_LBMODE (1 << 4) +-#define FEC_MIIGSK_CFGR_EMODE (1 << 3) +-#define FEC_MIIGSK_CFGR_IF_MODE_MASK (3 << 0) +-#define FEC_MIIGSK_CFGR_IF_MODE_MII (0 << 0) +-#define FEC_MIIGSK_CFGR_IF_MODE_RMII (1 << 0) +- +-#define FEC_MIIGSK_ENR_READY (1 << 2) +-#define FEC_MIIGSK_ENR_EN (1 << 1) +- +-#include "../arch/arm/mach-mx25/crm_regs.h" +-static void __inline__ fec_localhw_setup(struct net_device *dev) +-{ +- struct fec_enet_private *fep = netdev_priv(dev); +- +- /* +- * Set up the MII gasket for RMII mode +- */ +- printk("%s: enable RMII gasket\n", dev->name); +- +- /* disable the gasket and wait */ +- fec_reg_write16(fep, FEC_MIIGSK_ENR, 0); +- while (fec_reg_read16(fep, FEC_MIIGSK_ENR) & FEC_MIIGSK_ENR_READY) +- udelay(1); +- +- /* configure the gasket for RMII, 50 MHz, no loopback, no echo */ +- fec_reg_write16(fep, FEC_MIIGSK_CFGR, FEC_MIIGSK_CFGR_IF_MODE_RMII); +- +- /* re-enable the gasket */ +- fec_reg_write16(fep, FEC_MIIGSK_ENR, FEC_MIIGSK_ENR_EN); +- fec_reg_read16(fep, FEC_MIIGSK_CFGR); +- fec_reg_read16(fep, FEC_MIIGSK_ENR); +-} +-#endif +- + static int fec_arch_init(struct platform_device *pdev) + { + int ret; +@@ -648,62 +636,6 @@ static struct pad_desc karo_tx25_nand_pa + MX25_PAD_D0__D0, + }; + +-#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2 +-static struct mtd_partition tx25_nand_partitions[] = { +- { +- .name = "RedBoot", +- .offset = 0, +- .size = 0x00040000, +- }, { +- .name = "kernel", +- .offset = MTDPART_OFS_APPEND, +- .size = 0x001A0000, +- }, { +- .name = "rootfs", +- .offset = MTDPART_OFS_APPEND, +- .size = 0x07E000000, +- }, { +- .name = "FIS directory", +- .offset = MTDPART_OFS_APPEND, +- .size = 0x00003000, +- .mask_flags = MTD_WRITEABLE, +- }, { +- .name = "RedBoot config", +- .offset = MTDPART_OFS_APPEND, +- .size = 0x00001000, +- .mask_flags = MTD_WRITEABLE, +- }, +-}; +- +-static int tx25_nand_init(void) +-{ +- int ret; +- +- DBG(0, "%s: Configuring NAND pins\n", __FUNCTION__); +- ret = mxc_iomux_v3_setup_multiple_pads(karo_tx25_nand_pads, +- ARRAY_SIZE(karo_tx25_nand_pads)); +- if (ret) { +- return ret; +- } +- return 0; +-} +- +-static void tx25_nand_exit(void) +-{ +- mxc_iomux_v3_release_multiple_pads(karo_tx25_nand_pads, +- ARRAY_SIZE(karo_tx25_nand_pads)); +-} +- +-static struct flash_platform_data tx25_nand_data = { +- .map_name = "nand_probe", +- .name = "tx25-nand", +- .parts = tx25_nand_partitions, +- .nr_parts = ARRAY_SIZE(tx25_nand_partitions), +- .width = 1, +- .init = tx25_nand_init, +- .exit = tx25_nand_exit, +-}; +-#else + static struct mxc_nand_platform_data tx25_nand_data = { + .hw_ecc = 1, + .width = 1, +@@ -722,7 +654,6 @@ static int tx25_nand_init(void) + return 0; + } + arch_initcall(tx25_nand_init); +-#endif + + static struct resource tx25_nand_resources[] = { + { +@@ -767,10 +698,6 @@ static struct platform_device tx25_v4l2o + #if 0 + #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) + static struct pad_desc mxc_i2c0_pins[] = { +- /* +- * it seems the data line misses a pullup, so we must enable +- * the internal pullup as a local workaround +- */ + MX25_PAD_I2C1_CLK__I2C1_CLK, + MX25_PAD_I2C1_DAT__I2C1_DAT, + }; +@@ -847,7 +774,7 @@ static struct resource mxc_tsadcc_resour + static struct mxc_tsadcc_pdata mxc_tsadcc_pdata = { + .pen_debounce_time = 32, + .intref = 1, +- .adc_clk = 1666667, ++ .adc_clk = 1750000, + .tsc_mode = MXC_TSC_4WIRE, + .hsyncen = 0, + }; +@@ -863,6 +790,113 @@ static struct platform_device mxc_tsadcc + }; + #endif + ++#if defined(CONFIG_CAN_FLEXCAN) || defined(CONFIG_CAN_FLEXCAN_MODULE) ++ ++#ifdef CONFIG_CAN_FLEXCAN_CAN1 ++static struct pad_desc tx25_flexcan1_pads[] = { ++ MX25_PAD_GPIO_A__CAN1_TX, ++ MX25_PAD_GPIO_B__CAN1_RX, ++}; ++ ++static struct resource tx25_flexcan1_resources[] = { ++ { ++ .start = CAN1_BASE_ADDR, ++ .end = CAN1_BASE_ADDR + 0x97f, ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = MXC_INT_CAN1, ++ .end = MXC_INT_CAN1, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static int tx25_flexcan1_active(struct platform_device *pdev) ++{ ++ return mxc_iomux_v3_setup_multiple_pads(tx25_flexcan1_pads, ++ ARRAY_SIZE(tx25_flexcan1_pads)); ++} ++ ++static void tx25_flexcan1_inactive(struct platform_device *pdev) ++{ ++ mxc_iomux_v3_release_multiple_pads(tx25_flexcan1_pads, ++ ARRAY_SIZE(tx25_flexcan1_pads)); ++ karo_tx25_gpio_config(tx25_flexcan1_pads, ++ ARRAY_SIZE(tx25_flexcan1_pads)); ++} ++ ++static struct flexcan_platform_data tx25_flexcan1_pdata = { ++ //.core_reg = NULL; ++ //.io_reg = NULL; ++ //.xcvr_enable = NULL, ++ .active = tx25_flexcan1_active, ++ .inactive = tx25_flexcan1_inactive, ++}; ++ ++static struct platform_device tx25_flexcan1_device = { ++ .id = 0, ++ .name = "mxc-flexcan", ++ .num_resources = ARRAY_SIZE(tx25_flexcan1_resources), ++ .resource = tx25_flexcan1_resources, ++ .dev = { ++ .platform_data = &tx25_flexcan1_pdata, ++ }, ++}; ++#endif // CONFIG_CAN_FLEXCAN_CAN1 ++ ++#ifdef CONFIG_CAN_FLEXCAN_CAN2 ++static struct pad_desc tx25_flexcan2_pads[] = { ++ MX25_PAD_GPIO_C__CAN2_TX, ++ MX25_PAD_GPIO_D__CAN2_RX, ++}; ++ ++static struct resource tx25_flexcan2_resources[] = { ++ { ++ .start = CAN2_BASE_ADDR, ++ .end = CAN2_BASE_ADDR + 0x97f, ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = MXC_INT_CAN2, ++ .end = MXC_INT_CAN2, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static int tx25_flexcan2_active(struct platform_device *pdev) ++{ ++ return mxc_iomux_v3_setup_multiple_pads(tx25_flexcan2_pads, ++ ARRAY_SIZE(tx25_flexcan2_pads)); ++} ++ ++static void tx25_flexcan2_inactive(struct platform_device *pdev) ++{ ++ mxc_iomux_v3_release_multiple_pads(tx25_flexcan2_pads, ++ ARRAY_SIZE(tx25_flexcan2_pads)); ++ karo_tx25_gpio_config(tx25_flexcan2_pads, ++ ARRAY_SIZE(tx25_flexcan2_pads)); ++} ++ ++static struct flexcan_platform_data tx25_flexcan2_pdata = { ++ //.core_reg = NULL; ++ //.io_reg = NULL; ++ //.xcvr_enable = NULL, ++ .active = tx25_flexcan2_active, ++ .inactive = tx25_flexcan2_inactive, ++}; ++ ++static struct platform_device tx25_flexcan2_device = { ++ .id = 1, ++ .name = "mxc-flexcan", ++ .num_resources = ARRAY_SIZE(tx25_flexcan2_resources), ++ .resource = tx25_flexcan2_resources, ++ .dev = { ++ .platform_data = &tx25_flexcan2_pdata, ++ }, ++}; ++#endif // CONFIG_CAN_FLEXCAN_CAN2 ++#endif // CONFIG_CAN_FLEXCAN || CONFIG_CAN_FLEXCAN_MODULE ++ + struct platform_dev_list { + struct platform_device *pdev; + int flag; +@@ -871,22 +905,28 @@ struct platform_dev_list { + { .pdev = &mxc_rtc_device, .flag = -1, }, + #endif + #if defined(CONFIG_MTD_NAND_MXC) || defined(CONFIG_MTD_NAND_MXC_MODULE) +- { .pdev = &tx25_nand_mtd_device, .flag = 1, }, ++ { .pdev = &tx25_nand_mtd_device, .flag = -1, }, + #endif + #if defined(CONFIG_FEC) || defined(CONFIG_FEC_MODULE) +- { .pdev = &fec_device, .flag = 1, }, ++ { .pdev = &fec_device, .flag = -1, }, + #endif + #if defined(CONFIG_SPI_MXC) || defined(CONFIG_SPI_MXC_MODULE) +- { .pdev = &mxcspi1_device, .flag = 1, }, ++ { .pdev = &mxcspi1_device, .flag = -1, }, + #endif + #if defined(CONFIG_VIDEO_MXC_EMMA_OUTPUT) || defined(CONFIG_VIDEO_MXC_EMMA_OUTPUT_MODULE) +- { .pdev = &tx25_v4l2out_device, .flag = 1, }, ++ { .pdev = &tx25_v4l2out_device, .flag = -1, }, + #endif + #if defined(CONFIG_MXC_VPU) || defined(CONFIG_MXC_VPU_MODULE) +- { .pdev = &mxc_vpu_device, .flag = 1, }, ++ { .pdev = &mxc_vpu_device, .flag = -1, }, + #endif + #if defined(CONFIG_TOUCHSCREEN_MXC_TSADCC) || defined(CONFIG_TOUCHSCREEN_MXC_TSADCC_MODULE) +- { .pdev = &mxc_tsadcc_device, .flag = 1, }, ++ { .pdev = &mxc_tsadcc_device, .flag = -1, }, ++#endif ++#ifdef CONFIG_CAN_FLEXCAN_CAN1 ++ { .pdev = &tx25_flexcan1_device, .flag = -1, }, ++#endif ++#ifdef CONFIG_CAN_FLEXCAN_CAN2 ++ { .pdev = &tx25_flexcan2_device, .flag = -1, }, + #endif + }; + #define TX25_NUM_DEVICES ARRAY_SIZE(tx25_devices) +@@ -1057,17 +1097,20 @@ static struct pad_desc karo_tx25_gpios[] + + static int __init karo_tx25_setup_gpios(void) + { ++#if 1 ++ int count; ++ ++ count = karo_tx25_gpio_config(karo_tx25_gpios, ARRAY_SIZE(karo_tx25_gpios)); ++ DBG(0, "%s: %d out of %d pins set up as GPIO\n", __FUNCTION__, ++ count, ARRAY_SIZE(karo_tx25_gpios)); ++#else + int i; + int ret; + int count = 0; + + for (i = 0; i < ARRAY_SIZE(karo_tx25_gpios); i++) { + struct pad_desc *pd = &karo_tx25_gpios[i]; +-#if 0 +- if (i - 64 >= 16 && i - 64 < 32) { +- continue; +- } +-#endif ++ + ret = mxc_iomux_v3_setup_pad(pd); + if (ret == 0) { + #ifdef IOMUX_DEBUG +@@ -1086,23 +1129,6 @@ static int __init karo_tx25_setup_gpios( + } + } + DBG(0, "%s: %d out of %d pins set up as GPIO\n", __FUNCTION__, count, i); +-#if 0 +- if (gpio_request(42, "TEST") == 0) { +- gpio_direction_output(42, 1); +- while (1) { +- gpio_set_value(42, 0); +- if (gpio_get_value(42)) { +- DBG(0, "%s: GPIO 42 is HIGH instead of LOW\n", __FUNCTION__); +- } +- msleep(1000); +- gpio_set_value(42, 1); +- if (!gpio_get_value(42)) { +- DBG(0, "%s: GPIO 42 is LOW instead of HIGH\n", __FUNCTION__); +- } +- msleep(1000); +- } +- } +- gpio_free(42); + #endif + return 0; + } +diff -purN -X linux-2.6.30-rc4-karo/Documentation/dontdiff linux-2.6.30-rc4-karo/arch/arm/mach-mx2/stk5-baseboard.c linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/stk5-baseboard.c +--- linux-2.6.30-rc4-karo/arch/arm/mach-mx2/stk5-baseboard.c 2009-06-02 17:59:18.000000000 +0200 ++++ linux-2.6.30-rc4-karo2/arch/arm/mach-mx2/stk5-baseboard.c 2009-07-06 15:40:58.000000000 +0200 +@@ -34,7 +34,6 @@ + #include + #include + #include +-//#include + + #include + #include +@@ -59,8 +58,6 @@ + #include + #include + #include +-//#include +-//#include + #include + + #include "crm_regs.h" +@@ -184,167 +181,6 @@ static void __init karo_stk5_serial_init + } + #endif + +-#ifdef CONFIG_USB_EHCI_MXC +- +-#define SMSC_VENDOR_ID 0x0424 +-#define USB3317_PROD_ID 0x0006 +-#define ULPI_FCTL 7 +- +-static inline const char *ulpi_name(void __iomem *view) +-{ +- if ((unsigned long)view & 0x400) { +- return "USBH2"; +- } else { +- return "USBOTG"; +- } +-} +- +-static int usb3317_init(void __iomem *view) +-{ +- int vid, pid, ret; +- +- ret = ulpi_read(ISP1504_VID_HIGH, view); +- if (ret < 0) { +- goto err; +- } +- vid = ret << 8; +- +- ret = ulpi_read(ISP1504_VID_LOW, view); +- if (ret < 0) { +- goto err; +- } +- vid |= ret; +- +- ret = ulpi_read(ISP1504_PID_HIGH, view); +- if (ret < 0) { +- goto err; +- } +- pid = ret << 8; +- +- ret = ulpi_read(ISP1504_PID_LOW, view); +- if (ret < 0) { +- goto err; +- } +- pid |= ret; +- +- pr_info("ULPI on %s port Vendor ID 0x%x Product ID 0x%x\n", +- ulpi_name(view), vid, pid); +- if (vid != SMSC_VENDOR_ID || pid != USB3317_PROD_ID) { +- pr_err("No USB3317 found\n"); +- return -ENODEV; +- } +- err: +- if (ret < 0) { +- printk(KERN_ERR "ULPI read on %s port failed with error %d\n", +- ulpi_name(view), ret); +- return ret; +- } +- return 0; +-} +- +-static int usb3317_set_vbus_power(void __iomem *view, int on) +-{ +- int ret; +- +- DBG(0, "%s: Switching %s port VBUS power %s\n", __FUNCTION__, +- ulpi_name(view), on ? "on" : "off"); +- +- if (on) { +- ret = ulpi_set(DRV_VBUS_EXT | /* enable external Vbus */ +- DRV_VBUS | /* enable internal Vbus */ +- CHRG_VBUS, /* charge Vbus */ +- ISP1504_OTGCTL, view); +- } else { +- ret = ulpi_clear(DRV_VBUS_EXT | /* disable external Vbus */ +- DRV_VBUS, /* disable internal Vbus */ +- ISP1504_OTGCTL, view); +- if (ret == 0) { +- ret = ulpi_set(DISCHRG_VBUS, /* discharge Vbus */ +- ISP1504_OTGCTL, view); +- } +- } +- if (ret < 0) { +- printk(KERN_ERR "ULPI read on %s port failed with error %d\n", +- ulpi_name(view), ret); +- return ret; +- } +- return 0; +-} +- +-static int stk5_usbh2_init(struct platform_device *pdev) +-{ +- int ret; +- u32 temp; +- unsigned long flags; +- void __iomem *view = IO_ADDRESS(OTG_BASE_ADDR + 0x570); +- +- local_irq_save(flags); +- temp = readl(IO_ADDRESS(OTG_BASE_ADDR) + 0x600); +- temp &= ~((3 << 21) | (1 << 0)); +- temp |= (1 << 5) | (1 << 16) | (1 << 19) | (1 << 20); +- writel(temp, IO_ADDRESS(OTG_BASE_ADDR) + 0x600); +- local_irq_restore(flags); +- +- /* select ULPI transceiver */ +- /* this must be done _before_ setting up the GPIOs! */ +- temp = readl(view + 0x14); +- DBG(0, "%s: Changing USBH2_PORTSC1 from %08x to %08x\n", __FUNCTION__, +- temp, (temp & ~(3 << 30)) | (2 << 30)); +- temp &= ~(3 << 30); +- temp |= 2 << 30; +- writel(temp, view + 0x14); +- +- /* Set to Host mode */ +- temp = readl(view + 0x38); +- DBG(0, "%s: Changing USBH2_USBMODE from %08x to %08x\n", __FUNCTION__, +- temp, temp | 3); +- writel(temp | 0x3, view + 0x38); +- +- ret = gpio_usbh2_active(); +- if (ret != 0) { +- return ret; +- } +- +- ret = usb3317_init(view); +- if (ret != 0) { +- goto err; +- } +- ret = usb3317_set_vbus_power(view, 1); +- if (ret != 0) { +- goto err; +- } +- return 0; +- +- err: +- gpio_usbh2_inactive(); +- return ret; +-} +- +-static int stk5_usbh2_exit(struct platform_device *pdev) +-{ +- gpio_usbh2_inactive(); +- return 0; +-} +- +-static struct mxc_usbh_platform_data stk5_usbh2_data = { +- .init = stk5_usbh2_init, +- .exit = stk5_usbh2_exit, +-}; +- +-static int __init karo_stk5_usbh2_register(void) +-{ +- int ret; +- +- ret = mxc_register_device(&mxc_ehci2, &stk5_usbh2_data); +- return ret; +-} +-#else +-static inline int karo_stk5_usbh2_register(void) +-{ +- return 0; +-} +-#endif // CONFIG_USB_EHCI_MXC +- + #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) + static struct gpio_led stk5_leds[] = { + { +@@ -470,25 +306,71 @@ static void stk5_gpio_lcdc_inactive(stru + + static struct imx_fb_platform_data stk5_fb_data[] __initdata = { + { ++#if 1 + //.fb_mode = "Xenarc_700_Y-18", + .init = stk5_gpio_lcdc_active, + .exit = stk5_gpio_lcdc_inactive, + .lcd_power = NULL, + .backlight_power = NULL, + ++ .pixclock = 45833, ++ ++ .xres = 640, ++ .yres = 480, ++ ++ .bpp = 8, ++ ++ .hsync_len = 64, ++ .right_margin = 28 + 1, ++ .left_margin = 20 + 3, ++ ++ .vsync_len = 1, ++ .lower_margin = 0, ++ .upper_margin = 16, ++ ++ .pcr = PCR_TFT | PCR_COLOR | PCR_END_BYTE_SWAP | ++ PCR_BPIX_8 | PCR_FLMPOL | PCR_LPPOL | PCR_SCLK_SEL, ++ .dmacr = 0x80040060, ++ ++ .cmap_greyscale = 0, ++ .cmap_inverse = 0, ++ .cmap_static = 0, ++ ++ .fixed_screen_cpu = NULL, ++ }, { ++#endif ++ //.fb_mode = "Xenarc_700_Y-18", ++ .init = stk5_gpio_lcdc_active, ++ .exit = stk5_gpio_lcdc_inactive, ++ .lcd_power = NULL, ++ .backlight_power = NULL, ++#if 1 + .pixclock = 34576, ++#else ++ .pixclock = 38033, ++#endif + .xres = 640, + .yres = 480, + + .bpp = 32, +- ++#if 1 + .hsync_len = 64, + .right_margin = 60 + 1, + .left_margin = 80 + 3, +- ++#else ++ .hsync_len = 64, ++ .right_margin = 79 + 1, ++ .left_margin = 57 + 3, ++#endif ++#if 1 + .vsync_len = 2, ++ .lower_margin = 54, + .upper_margin = 54, ++#else ++ .vsync_len = 4, + .lower_margin = 54, ++ .upper_margin = 54, ++#endif + #if 0 + /* currently not used by driver! */ + .sync = ((0*FB_SYNC_HOR_HIGH_ACT) | +@@ -497,7 +379,7 @@ static struct imx_fb_platform_data stk5_ + #else + .pcr = PCR_TFT | PCR_COLOR | PCR_PBSIZ_8 | + PCR_BPIX_18 | PCR_END_SEL | PCR_FLMPOL | PCR_LPPOL | PCR_SCLK_SEL, +- .dmacr = 0x800a0078, ++ .dmacr = 0x80040060, + #endif + .cmap_greyscale = 0, + .cmap_inverse = 0, +@@ -522,8 +404,8 @@ static struct imx_fb_platform_data stk5_ + .left_margin = 118 + 3, + + .vsync_len = 7, +- .upper_margin = 44, + .lower_margin = 44, ++ .upper_margin = 44, + #if 0 + /* currently not used by driver! */ + .sync = ((0*FB_SYNC_HOR_HIGH_ACT) | +@@ -560,8 +442,8 @@ static struct imx_fb_platform_data stk5_ + .left_margin = 118 + 3, + + .vsync_len = 7, +- .upper_margin = 28, + .lower_margin = 60, ++ .upper_margin = 28, + #if 0 + /* currently not used by driver! */ + .sync = ((0*FB_SYNC_HOR_HIGH_ACT) | +@@ -602,8 +484,8 @@ static struct imx_fb_platform_data stk5_ + .left_margin = 0 + 3, + + .vsync_len = 35, +- .upper_margin = 0, + .lower_margin = 0, ++ .upper_margin = 0, + #if 0 + /* currently not used by driver! */ + .sync = ((0*FB_SYNC_HOR_HIGH_ACT) | +@@ -974,11 +856,6 @@ static __init int karo_stk5_board_init(v + printk(KERN_WARNING "%s: karo_stk5_fb_register() failed: %d\n", + __FUNCTION__, ret); + } +- ret = karo_stk5_usbh2_register(); +- if (ret) { +- printk(KERN_WARNING "%s: karo_stk5_usbh2_register() failed: %d\n", +- __FUNCTION__, ret); +- } + + for (i = 0; i < STK5_NUM_DEVICES; i++) { + if (stk5_devices[i].pdev == NULL) continue; +diff -purN -X linux-2.6.30-rc4-karo/Documentation/dontdiff linux-2.6.30-rc4-karo/arch/arm/plat-mxc/include/mach/iomux-mx25.h linux-2.6.30-rc4-karo2/arch/arm/plat-mxc/include/mach/iomux-mx25.h +--- linux-2.6.30-rc4-karo/arch/arm/plat-mxc/include/mach/iomux-mx25.h 2009-07-06 17:00:57.000000000 +0200 ++++ linux-2.6.30-rc4-karo2/arch/arm/plat-mxc/include/mach/iomux-mx25.h 2009-07-06 15:41:30.000000000 +0200 +@@ -34,475 +34,345 @@ + * IOMUX/PAD Bit field definitions + */ + +-#define MX25_PAD_A10__A10 IOMUX_PAD(A10, A10, 0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_A10__GPIO_4_0 IOMUX_PAD(A10, GPIO_4_0, 0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_A13__A13 IOMUX_PAD(A13, A13, 0x22C, 0x00c, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A13__GPIO_4_1 IOMUX_PAD(A13, GPIO_4_1, 0x22C, 0x00c, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A14__A14 IOMUX_PAD(A14, A14, 0x230, 0x010, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A14__GPIO_2_0 IOMUX_PAD(A14, GPIO_2_0, 0x230, 0x010, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A15__A15 IOMUX_PAD(A15, A15, 0x234, 0x014, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A15__GPIO_2_1 IOMUX_PAD(A15, GPIO_2_1, 0x234, 0x014, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A16__A16 IOMUX_PAD(A16, A16, 0x000, 0x018, 0x10, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_A16__GPIO_2_2 IOMUX_PAD(A16, GPIO_2_2, 0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_A17__A17 IOMUX_PAD(A17, A17, 0x238, 0x01c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A17__GPIO_2_3 IOMUX_PAD(A17, GPIO_2_3, 0x238, 0x01c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A18__A18 IOMUX_PAD(A18, A18, 0x23c, 0x020, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(A18, GPIO_2_4, 0x23c, 0x020, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A18__FEC_COL IOMUX_PAD(A18, FEC_COL, 0x23c, 0x020, 0x17, 0x504, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_A19__A19 IOMUX_PAD(A19, A19, 0x240, 0x024, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(A19, FEC_RX_ER, 0x240, 0x024, 0x17, 0x518, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(A19, GPIO_2_5, 0x240, 0x024, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A20__A20 IOMUX_PAD(A20, A20, 0x244, 0x028, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(A20, GPIO_2_6, 0x244, 0x028, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(A20, FEC_RDATA2, 0x244, 0x028, 0x17, 0x50c, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_A21__A21 IOMUX_PAD(A21, A21, 0x248, 0x02c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(A21, GPIO_2_7, 0x248, 0x02c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(A21, FEC_RDATA3, 0x248, 0x02c, 0x17, 0x510, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_A22__A22 IOMUX_PAD(A22, A22, 0x000, 0x030, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(A22, GPIO_2_8, 0x000, 0x030, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A23__A23 IOMUX_PAD(A23, A23, 0x24c, 0x034, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A23__GPIO_2_9 IOMUX_PAD(A23, GPIO_2_9, 0x24c, 0x034, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A24__A24 IOMUX_PAD(A24, A24, 0x250, 0x038, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(A24, GPIO_2_10, 0x250, 0x038, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(A24, FEC_RX_CLK, 0x250, 0x038, 0x17, 0x514, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_A25__A25 IOMUX_PAD(A25, A25, 0x254, 0x03c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(A25, GPIO_2_11, 0x254, 0x03c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_A25__FEC_CRS IOMUX_PAD(A25, FEC_CRS, 0x254, 0x03c, 0x17, 0x508, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_EB0__EB0 IOMUX_PAD(EB0, EB0, 0x258, 0x040, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(EB0, AUD4_TXD, 0x258, 0x040, 0x14, 0x464, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_EB0__GPIO_2_12 IOMUX_PAD(EB0, GPIO_2_12, 0x258, 0x040, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_EB1__EB1 IOMUX_PAD(EB1, EB1, 0x25c, 0x044, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_EB1__AUD4_RXD IOMUX_PAD(EB1, AUD4_RXD, 0x25c, 0x044, 0x14, 0x460, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_EB1__GPIO_2_13 IOMUX_PAD(EB1, GPIO_2_13, 0x25c, 0x044, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_OE__OE IOMUX_PAD(OE, OE, 0x260, 0x048, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_OE__AUD4_TXC IOMUX_PAD(OE, AUD4_TXC, 0x260, 0x048, 0x14, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_OE__GPIO_2_14 IOMUX_PAD(OE, GPIO_2_14, 0x260, 0x048, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CS0__CS0 IOMUX_PAD(CS0, CS0, 0x000, 0x04c, 0x00, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_CS0__GPIO_4_2 IOMUX_PAD(CS0, GPIO_4_2, 0x000, 0x04c, 0x05, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_CS1__CS1 IOMUX_PAD(CS1, CS1, 0x000, 0x050, 0x00, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_CS1__GPIO_4_3 IOMUX_PAD(CS1, GPIO_4_3, 0x000, 0x050, 0x05, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_CS4__CS4 IOMUX_PAD(CS4, CS4, 0x264, 0x054, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CS4__UART5_CTS IOMUX_PAD(CS4, UART5_CTS, 0x264, 0x054, 0x13, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CS4__GPIO_3_20 IOMUX_PAD(CS4, GPIO_3_20, 0x264, 0x054, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CS5__CS5 IOMUX_PAD(CS5, CS5, 0x268, 0x058, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(CS5, UART5_RTS, 0x268, 0x058, 0x13, 0x574, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(CS5, GPIO_3_21, 0x268, 0x058, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(NF_CE0, NF_CE0, 0x26c, 0x05c, 0x10, 0, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(NF_CE0, GPIO_3_22, 0x26c, 0x05c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_ECB__ECB IOMUX_PAD(ECB, ECB, 0x270, 0x060, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_ECB__UART5_TXD_MUX IOMUX_PAD(ECB, UART5_TXD_MUX, 0x270, 0x060, 0x13, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_ECB__GPIO_3_23 IOMUX_PAD(ECB, GPIO_3_23, 0x270, 0x060, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LBA__LBA IOMUX_PAD(LBA, LBA, 0x274, 0x064, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LBA__UART5_RXD_MUX IOMUX_PAD(LBA, UART5_RXD_MUX, 0x274, 0x064, 0x13, 0x578, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LBA__GPIO_3_24 IOMUX_PAD(LBA, GPIO_3_24, 0x274, 0x064, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_BCLK__BCLK IOMUX_PAD(BCLK, BCLK, 0x000, 0x068, 0x00, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_BCLK__GPIO_4_4 IOMUX_PAD(BCLK, GPIO_4_4, 0x000, 0x068, 0x05, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_RW__RW IOMUX_PAD(RW, RW, 0x278, 0x06c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_RW__AUD4_TXFS IOMUX_PAD(RW, AUD4_TXFS, 0x278, 0x06c, 0x14, 0x474, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_RW__GPIO_3_25 IOMUX_PAD(RW, GPIO_3_25, 0x278, 0x06c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_NFWE_B__NFWE_B IOMUX_PAD(NFWE_B, NFWE_B, 0x000, 0x070, 0x10, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFWE_B__GPIO_3_26 IOMUX_PAD(NFWE_B, GPIO_3_26, 0x000, 0x070, 0x15, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFRE_B__NFRE_B IOMUX_PAD(NFRE_B, NFRE_B, 0x000, 0x074, 0x10, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFRE_B__GPIO_3_27 IOMUX_PAD(NFRE_B, GPIO_3_27, 0x000, 0x074, 0x15, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFALE__NFALE IOMUX_PAD(NFALE, NFALE, 0x000, 0x078, 0x10, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFALE__GPIO_3_28 IOMUX_PAD(NFALE, GPIO_3_28, 0x000, 0x078, 0x15, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFCLE__NFCLE IOMUX_PAD(NFCLE, NFCLE, 0x000, 0x07c, 0x10, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFCLE__GPIO_3_29 IOMUX_PAD(NFCLE, GPIO_3_29, 0x000, 0x07c, 0x15, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFWP_B__NFWP_B IOMUX_PAD(NFWP_B, NFWP_B, 0x000, 0x080, 0x10, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFWP_B__GPIO_3_30 IOMUX_PAD(NFWP_B, GPIO_3_30, 0x000, 0x080, 0x15, 0, 0, NO_PAD_CTRL) +-#define MX25_PAD_NFRB__NFRB IOMUX_PAD(NFRB, NFRB, 0x27c, 0x084, 0x10, 0, 0, PAD_CTL_PULL_KEEPER) +-#define MX25_PAD_NFRB__GPIO_3_31 IOMUX_PAD(NFRB, GPIO_3_31, 0x27c, 0x084, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D15__D15 IOMUX_PAD(D15, D15, 0x280, 0x088, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D15__LD16 IOMUX_PAD(D15, LD16, 0x280, 0x088, 0x01, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D15__GPIO_4_5 IOMUX_PAD(D15, GPIO_4_5, 0x280, 0x088, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D14__D14 IOMUX_PAD(D14, D14, 0x284, 0x08c, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D14__LD17 IOMUX_PAD(D14, LD17, 0x284, 0x08c, 0x01, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D14__GPIO_4_6 IOMUX_PAD(D14, GPIO_4_6, 0x284, 0x08c, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D13__D13 IOMUX_PAD(D13, D13, 0x288, 0x090, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D13__LD18 IOMUX_PAD(D13, LD18, 0x288, 0x090, 0x01, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D13__GPIO_4_7 IOMUX_PAD(D13, GPIO_4_7, 0x288, 0x090, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D12__D12 IOMUX_PAD(D12, D12, 0x28c, 0x094, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D12__GPIO_4_8 IOMUX_PAD(D12, GPIO_4_8, 0x28c, 0x094, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D11__D11 IOMUX_PAD(D11, D11, 0x290, 0x098, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D11__GPIO_4_9 IOMUX_PAD(D11, GPIO_4_9, 0x290, 0x098, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D10__D10 IOMUX_PAD(D10, D10, 0x294, 0x09c, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D10__GPIO_4_10 IOMUX_PAD(D10, GPIO_4_10, 0x294, 0x09c, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D10__USBOTG_OC IOMUX_PAD(D10, USBOTG_OC, 0x294, 0x09c, 0x06, 0x57c, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D9__D9 IOMUX_PAD(D9, D9, 0x298, 0x0a0, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D9__GPIO_4_11 IOMUX_PAD(D9, GPIO_4_11, 0x298, 0x0a0, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D9__USBH2_PWR IOMUX_PAD(D9, USBH2_PWR, 0x298, 0x0a0, 0x06, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D8__D8 IOMUX_PAD(D8, D8, 0x29c, 0x0a4, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D8__GPIO_4_12 IOMUX_PAD(D8, GPIO_4_12, 0x29c, 0x0a4, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D8__USBH2_OC IOMUX_PAD(D8, USBH2_OC, 0x29c, 0x0a4, 0x06, 0x580, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D7__D7 IOMUX_PAD(D7, D7, 0x2a0, 0x0a8, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D7__GPIO_4_13 IOMUX_PAD(D7, GPIO_4_13, 0x2a0, 0x0a8, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D6__D6 IOMUX_PAD(D6, D6, 0x2a4, 0x0ac, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D6__GPIO_4_14 IOMUX_PAD(D6, GPIO_4_14, 0x2a4, 0x0ac, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D5__D5 IOMUX_PAD(D5, D5, 0x2a8, 0x0b0, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D5__GPIO_4_15 IOMUX_PAD(D5, GPIO_4_15, 0x2a8, 0x0b0, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D4__D4 IOMUX_PAD(D4, D4, 0x2ac, 0x0b4, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D4__GPIO_4_16 IOMUX_PAD(D4, GPIO_4_16, 0x2ac, 0x0b4, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D3__D3 IOMUX_PAD(D3, D3, 0x2b0, 0x0b8, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D3__GPIO_4_17 IOMUX_PAD(D3, GPIO_4_17, 0x2b0, 0x0b8, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D2__D2 IOMUX_PAD(D2, D2, 0x2b4, 0x0bc, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D2__GPIO_4_18 IOMUX_PAD(D2, GPIO_4_18, 0x2b4, 0x0bc, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D1__D1 IOMUX_PAD(D1, D1, 0x2b8, 0x0c0, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D1__GPIO_4_19 IOMUX_PAD(D1, GPIO_4_19, 0x2b8, 0x0c0, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D0__D0 IOMUX_PAD(D0, D0, 0x2bc, 0x0c4, 0x00, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_D0__GPIO_4_20 IOMUX_PAD(D0, GPIO_4_20, 0x2bc, 0x0c4, 0x05, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD0__LD0 IOMUX_PAD(LD0, LD0, 0x2c0, 0x0c8, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD0__CSI_D0 IOMUX_PAD(LD0, CSI_D0, 0x2c0, 0x0c8, 0x12, 0x488, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD0__GPIO_2_15 IOMUX_PAD(LD0, GPIO_2_15, 0x2c0, 0x0c8, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD1__LD1 IOMUX_PAD(LD1, LD1, 0x2c4, 0x0cc, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD1__CSI_D1 IOMUX_PAD(LD1, CSI_D1, 0x2c4, 0x0cc, 0x12, 0x48c, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD1__GPIO_2_16 IOMUX_PAD(LD1, GPIO_2_16, 0x2c4, 0x0cc, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD2__LD2 IOMUX_PAD(LD2, LD2, 0x2c8, 0x0d0, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD2__GPIO_2_17 IOMUX_PAD(LD2, GPIO_2_17, 0x2c8, 0x0d0, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD3__LD3 IOMUX_PAD(LD3, LD3, 0x2cc, 0x0d4, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD3__GPIO_2_18 IOMUX_PAD(LD3, GPIO_2_18, 0x2cc, 0x0d4, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD4__LD4 IOMUX_PAD(LD4, LD4, 0x2d0, 0x0d8, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD4__GPIO_2_19 IOMUX_PAD(LD4, GPIO_2_19, 0x2d0, 0x0d8, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD5__LD5 IOMUX_PAD(LD5, LD5, 0x2d4, 0x0dc, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD5__GPIO_1_19 IOMUX_PAD(LD5, GPIO_1_19, 0x2d4, 0x0dc, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD6__LD6 IOMUX_PAD(LD6, LD6, 0x2d8, 0x0e0, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD6__GPIO_1_20 IOMUX_PAD(LD6, GPIO_1_20, 0x2d8, 0x0e0, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD7__LD7 IOMUX_PAD(LD7, LD7, 0x2dc, 0x0e4, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(LD7, GPIO_1_21, 0x2dc, 0x0e4, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD8__LD8 IOMUX_PAD(LD8, LD8, 0x2e0, 0x0e8, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(LD8, FEC_TX_ERR, 0x2e0, 0x0e8, 0x15, 0, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_LD9__LD9 IOMUX_PAD(LD9, LD9, 0x2e4, 0x0ec, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(LD9, FEC_COL, 0x2e4, 0x0ec, 0x15, 0x504, 1, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_LD10__LD10 IOMUX_PAD(LD10, LD10, 0x2e8, 0x0f0, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(LD10, FEC_RX_ER, 0x2e8, 0x0f0, 0x15, 0x518, 1, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_LD11__LD11 IOMUX_PAD(LD11, LD11, 0x2ec, 0x0f4, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(LD11, FEC_RDATA2, 0x2ec, 0x0f4, 0x15, 0x50c, 1, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_LD12__LD12 IOMUX_PAD(LD12, LD12, 0x2f0, 0x0f8, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(LD12, FEC_RDATA3, 0x2f0, 0x0f8, 0x15, 0x510, 1, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_LD13__LD13 IOMUX_PAD(LD13, LD13, 0x2f4, 0x0fc, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(LD13, FEC_TDATA2, 0x2f4, 0x0fc, 0x15, 0, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_LD14__LD14 IOMUX_PAD(LD14, LD14, 0x2f8, 0x100, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(LD14, FEC_TDATA3, 0x2f8, 0x100, 0x15, 0, 0, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_LD15__LD15 IOMUX_PAD(LD15, LD15, 0x2fc, 0x104, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(LD15, FEC_RX_CLK, 0x2fc, 0x104, 0x15, 0x514, 1, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(HSYNC, HSYNC, 0x300, 0x108, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(HSYNC, GPIO_1_22, 0x300, 0x108, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_VSYNC__VSYNC IOMUX_PAD(VSYNC, VSYNC, 0x304, 0x10c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_VSYNC__GPIO_1_23 IOMUX_PAD(VSYNC, GPIO_1_23, 0x304, 0x10c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LSCLK__LSCLK IOMUX_PAD(LSCLK, LSCLK, 0x308, 0x110, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_LSCLK__GPIO_1_24 IOMUX_PAD(LSCLK, GPIO_1_24, 0x308, 0x110, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_OE_ACD__OE_ACD IOMUX_PAD(OE_ACD, OE_ACD, 0x30c, 0x114, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(OE_ACD, GPIO_1_25, 0x30c, 0x114, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(CONTRAST, CONTRAST, 0x310, 0x118, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(CONTRAST, FEC_CRS, 0x310, 0x118, 0x15, 0x508, 1, PAD_CTL_SLEW_RATE_FAST) +-#define MX25_PAD_PWM__PWM IOMUX_PAD(PWM, PWM, 0x314, 0x11c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(PWM, GPIO_1_26, 0x314, 0x11c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_PWM__USBH2_OC IOMUX_PAD(PWM, USBH2_OC, 0x314, 0x11c, 0x16, 0x580, 1, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D2__CSI_D2 IOMUX_PAD(CSI_D2, CSI_D2, 0x318, 0x120, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D2__UART5_RXD_MUX IOMUX_PAD(CSI_D2, UART5_RXD_MUX, 0x318, 0x120, 0x11, 0x578, 1, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D2__GPIO_1_27 IOMUX_PAD(CSI_D2, GPIO_1_27, 0x318, 0x120, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D3__CSI_D3 IOMUX_PAD(CSI_D3, CSI_D3, 0x31c, 0x124, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D3__GPIO_1_28 IOMUX_PAD(CSI_D3, GPIO_1_28, 0x31c, 0x124, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D4__CSI_D4 IOMUX_PAD(CSI_D4, CSI_D4, 0x320, 0x128, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D4__UART5_RTS IOMUX_PAD(CSI_D4, UART5_RTS, 0x320, 0x128, 0x11, 0x574, 1, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D4__GPIO_1_29 IOMUX_PAD(CSI_D4, GPIO_1_29, 0x320, 0x128, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D5__CSI_D5 IOMUX_PAD(CSI_D5, CSI_D5, 0x324, 0x12c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D5__GPIO_1_30 IOMUX_PAD(CSI_D5, GPIO_1_30, 0x324, 0x12c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D6__CSI_D6 IOMUX_PAD(CSI_D6, CSI_D6, 0x328, 0x130, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D6__GPIO_1_31 IOMUX_PAD(CSI_D6, GPIO_1_31, 0x328, 0x130, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D7__CSI_D7 IOMUX_PAD(CSI_D7, CSI_D7, 0x32c, 0x134, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D7__GPIO_1_6 IOMUX_PAD(CSI_D7, GPIO_1_6, 0x32c, 0x134, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D8__CSI_D8 IOMUX_PAD(CSI_D8, CSI_D8, 0x330, 0x138, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D8__GPIO_1_7 IOMUX_PAD(CSI_D8, GPIO_1_7, 0x330, 0x138, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D9__CSI_D9 IOMUX_PAD(CSI_D9, CSI_D9, 0x334, 0x13c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_D9__GPIO_4_21 IOMUX_PAD(CSI_D9, GPIO_4_21, 0x334, 0x13c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_MCLK__CSI_MCLK IOMUX_PAD(CSI_MCLK, CSI_MCLK, 0x338, 0x140, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_MCLK__GPIO_1_8 IOMUX_PAD(CSI_MCLK, GPIO_1_8, 0x338, 0x140, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_VSYNC__CSI_VSYNC IOMUX_PAD(CSI_VSYNC, CSI_VSYNC, 0x33c, 0x144, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_VSYNC__GPIO_1_9 IOMUX_PAD(CSI_VSYNC, GPIO_1_9, 0x33c, 0x144, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_HSYNC__CSI_HSYNC IOMUX_PAD(CSI_HSYNC, CSI_HSYNC, 0x340, 0x148, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_HSYNC__GPIO_1_10 IOMUX_PAD(CSI_HSYNC, GPIO_1_10, 0x340, 0x148, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_PIXCLK__CSI_PIXCLK IOMUX_PAD(CSI_PIXCLK, CSI_PIXCLK, 0x344, 0x14c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSI_PIXCLK__GPIO_1_11 IOMUX_PAD(CSI_PIXCLK, GPIO_1_11, 0x344, 0x14c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_I2C1_CLK__I2C1_CLK IOMUX_PAD(I2C1_CLK, I2C1_CLK, 0x348, 0x150, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_I2C1_CLK__GPIO_1_12 IOMUX_PAD(I2C1_CLK, GPIO_1_12, 0x348, 0x150, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_I2C1_DAT__I2C1_DAT IOMUX_PAD(I2C1_DAT, I2C1_DAT, 0x34c, 0x154, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_I2C1_DAT__GPIO_1_13 IOMUX_PAD(I2C1_DAT, GPIO_1_13, 0x34c, 0x154, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_MOSI__CSPI1_MOSI IOMUX_PAD(CSPI1_MOSI, CSPI1_MOSI, 0x350, 0x158, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_MOSI__GPIO_1_14 IOMUX_PAD(CSPI1_MOSI, GPIO_1_14, 0x350, 0x158, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_MISO__CSPI1_MISO IOMUX_PAD(CSPI1_MISO, CSPI1_MISO, 0x354, 0x15c, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_MISO__GPIO_1_15 IOMUX_PAD(CSPI1_MISO, GPIO_1_15, 0x354, 0x15c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_SS0__CSPI1_SS0 IOMUX_PAD(CSPI1_SS0, CSPI1_SS0, 0x358, 0x160, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_SS0__GPIO_1_16 IOMUX_PAD(CSPI1_SS0, GPIO_1_16, 0x358, 0x160, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_SS1__CSPI1_SS1 IOMUX_PAD(CSPI1_SS1, CSPI1_SS1, 0x35c, 0x164, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_SS1__GPIO_1_17 IOMUX_PAD(CSPI1_SS1, GPIO_1_17, 0x35c, 0x164, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_SCLK__CSPI1_SCLK IOMUX_PAD(CSPI1_SCLK, CSPI1_SCLK, 0x360, 0x168, 0x10, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_SCLK__GPIO_1_18 IOMUX_PAD(CSPI1_SCLK, GPIO_1_18, 0x360, 0x168, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_CSPI1_RDY__CSPI1_RDY IOMUX_PAD(CSPI1_RDY, CSPI1_RDY, 0x364, 0x16c, 0x10, 0, 0, PAD_CTL_PULL_KEEPER) +-#define MX25_PAD_CSPI1_RDY__GPIO_2_22 IOMUX_PAD(CSPI1_RDY, GPIO_2_22, 0x364, 0x16c, 0x15, 0, 0, 0 | NO_PAD_CTRL) +-#define MX25_PAD_UART1_RXD__UART1_RXD IOMUX_PAD(UART1_RXD,