From 332db9ccd29c15038e7ba960cb7204704a1a76c4 Mon Sep 17 00:00:00 2001 From: Koen Kooi Date: Thu, 19 Mar 2009 14:46:18 +0100 Subject: linux-omap 2.6.28: update resizer patch --- .../linux-omap-2.6.28/add-resizer-driver.patch | 28284 +++++++++---------- 1 file changed, 14134 insertions(+), 14150 deletions(-) diff --git a/recipes/linux/linux-omap-2.6.28/add-resizer-driver.patch b/recipes/linux/linux-omap-2.6.28/add-resizer-driver.patch index 9457bec576..e8ac73b78f 100644 --- a/recipes/linux/linux-omap-2.6.28/add-resizer-driver.patch +++ b/recipes/linux/linux-omap-2.6.28/add-resizer-driver.patch @@ -1,14 +1,757 @@ -Index: git/drivers/media/video/isp/bluegamma_table.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ git/drivers/media/video/isp/bluegamma_table.h 2009-02-12 10:29:26.000000000 -0600 + arch/arm/plat-omap/include/mach/isp_user.h | 676 +++++++ + drivers/media/video/Makefile | 2 + drivers/media/video/isp/Makefile | 12 + drivers/media/video/isp/bluegamma_table.h | 1040 +++++++++++ + drivers/media/video/isp/cfa_coef_table.h | 603 ++++++ + drivers/media/video/isp/greengamma_table.h | 1040 +++++++++++ + drivers/media/video/isp/isp.c | 2547 +++++++++++++++++++++++++++ + drivers/media/video/isp/isp.h | 318 +++ + drivers/media/video/isp/isp_af.c | 784 ++++++++ + drivers/media/video/isp/isp_af.h | 125 + + drivers/media/video/isp/ispccdc.c | 1638 +++++++++++++++++ + drivers/media/video/isp/ispccdc.h | 209 ++ + drivers/media/video/isp/ispcsi2.c | 2124 ++++++++++++++++++++++ + drivers/media/video/isp/ispcsi2.h | 232 ++ + drivers/media/video/isp/isph3a.c | 932 +++++++++ + drivers/media/video/isp/isph3a.h | 127 + + drivers/media/video/isp/isphist.c | 608 ++++++ + drivers/media/video/isp/isphist.h | 105 + + drivers/media/video/isp/ispmmu.c | 141 + + drivers/media/video/isp/ispmmu.h | 36 + drivers/media/video/isp/isppreview.c | 1929 ++++++++++++++++++++ + drivers/media/video/isp/isppreview.h | 354 +++ + drivers/media/video/isp/ispreg.h | 1674 +++++++++++++++++ + drivers/media/video/isp/ispresizer.c | 928 +++++++++ + drivers/media/video/isp/ispresizer.h | 158 + + drivers/media/video/isp/luma_enhance_table.h | 144 + + drivers/media/video/isp/noise_filter_table.h | 79 + drivers/media/video/isp/redgamma_table.h | 1040 +++++++++++ + 28 files changed, 19605 insertions(+) +diff --git a/arch/arm/plat-omap/include/mach/isp_user.h b/arch/arm/plat-omap/include/mach/isp_user.h +new file mode 100644 +index 0000000..b819e26 +--- /dev/null ++++ b/arch/arm/plat-omap/include/mach/isp_user.h +@@ -0,0 +1,676 @@ ++/* ++ * isp_user.h ++ * ++ * Include file for OMAP ISP module in TI's OMAP3. ++ * ++ * Copyright (C) 2009 Texas Instruments, Inc. ++ * ++ * Contributors: ++ * Mohit Jalori ++ * Sergio Aguirre ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_USER_H ++#define OMAP_ISP_USER_H ++ ++/* ISP Private IOCTLs */ ++#define VIDIOC_PRIVATE_ISP_CCDC_CFG \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct ispccdc_update_config) ++#define VIDIOC_PRIVATE_ISP_PRV_CFG \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct ispprv_update_config) ++#define VIDIOC_PRIVATE_ISP_AEWB_CFG \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct isph3a_aewb_config) ++#define VIDIOC_PRIVATE_ISP_AEWB_REQ \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct isph3a_aewb_data) ++#define VIDIOC_PRIVATE_ISP_HIST_CFG \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct isp_hist_config) ++#define VIDIOC_PRIVATE_ISP_HIST_REQ \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct isp_hist_data) ++#define VIDIOC_PRIVATE_ISP_AF_CFG \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct af_configuration) ++#define VIDIOC_PRIVATE_ISP_AF_REQ \ ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct isp_af_data) ++ ++/* AE/AWB related structures and flags*/ ++ ++/* Flags for update field */ ++#define REQUEST_STATISTICS (1 << 0) ++#define SET_COLOR_GAINS (1 << 1) ++#define SET_DIGITAL_GAIN (1 << 2) ++#define SET_EXPOSURE (1 << 3) ++#define SET_ANALOG_GAIN (1 << 4) ++ ++#define MAX_FRAME_COUNT 0x0FFF ++#define MAX_FUTURE_FRAMES 10 ++ ++#define MAX_SATURATION_LIM 1023 ++#define MIN_WIN_H 2 ++#define MAX_WIN_H 256 ++#define MIN_WIN_W 6 ++#define MAX_WIN_W 256 ++#define MAX_WINVC 128 ++#define MAX_WINHC 36 ++#define MAX_WINSTART 4095 ++#define MIN_SUB_INC 2 ++#define MAX_SUB_INC 32 ++ ++/* Range Constants */ ++#define AF_IIRSH_MIN 0 ++#define AF_IIRSH_MAX 4094 ++#define AF_PAXEL_HORIZONTAL_COUNT_MIN 0 ++#define AF_PAXEL_HORIZONTAL_COUNT_MAX 35 ++#define AF_PAXEL_VERTICAL_COUNT_MIN 0 ++#define AF_PAXEL_VERTICAL_COUNT_MAX 127 ++#define AF_PAXEL_INCREMENT_MIN 0 ++#define AF_PAXEL_INCREMENT_MAX 14 ++#define AF_PAXEL_HEIGHT_MIN 0 ++#define AF_PAXEL_HEIGHT_MAX 127 ++#define AF_PAXEL_WIDTH_MIN 0 ++#define AF_PAXEL_WIDTH_MAX 127 ++#define AF_PAXEL_HZSTART_MIN 2 ++#define AF_PAXEL_HZSTART_MAX 4094 ++ ++#define AF_PAXEL_VTSTART_MIN 0 ++#define AF_PAXEL_VTSTART_MAX 4095 ++#define AF_THRESHOLD_MAX 255 ++#define AF_COEF_MAX 4095 ++#define AF_PAXEL_SIZE 48 ++ ++/** ++ * struct isph3a_aewb_config - AE AWB configuration reset values. ++ * saturation_limit: Saturation limit. ++ * @win_height: Window Height. Range 2 - 256, even values only. ++ * @win_width: Window Width. Range 6 - 256, even values only. ++ * @ver_win_count: Vertical Window Count. Range 1 - 128. ++ * @hor_win_count: Horizontal Window Count. Range 1 - 36. ++ * @ver_win_start: Vertical Window Start. Range 0 - 4095. ++ * @hor_win_start: Horizontal Window Start. Range 0 - 4095. ++ * @blk_ver_win_start: Black Vertical Windows Start. Range 0 - 4095. ++ * @blk_win_height: Black Window Height. Range 2 - 256, even values only. ++ * @subsample_ver_inc: Subsample Vertical points increment Range 2 - 32, even ++ * values only. ++ * @subsample_hor_inc: Subsample Horizontal points increment Range 2 - 32, even ++ * values only. ++ * @alaw_enable: AEW ALAW EN flag. ++ * @aewb_enable: AE AWB stats generation EN flag. ++ */ ++struct isph3a_aewb_config { ++ __u16 saturation_limit; ++ __u16 win_height; ++ __u16 win_width; ++ __u16 ver_win_count; ++ __u16 hor_win_count; ++ __u16 ver_win_start; ++ __u16 hor_win_start; ++ __u16 blk_ver_win_start; ++ __u16 blk_win_height; ++ __u16 subsample_ver_inc; ++ __u16 subsample_hor_inc; ++ __u8 alaw_enable; ++ __u8 aewb_enable; ++}; ++ ++/** ++ * struct isph3a_aewb_data - Structure of data sent to or received from user ++ * @h3a_aewb_statistics_buf: Pointer to pass to user. ++ * @shutter: Shutter speed. ++ * @gain: Sensor analog Gain. ++ * @shutter_cap: Shutter speed for capture. ++ * @gain_cap: Sensor Gain for capture. ++ * @dgain: White balance digital gain. ++ * @wb_gain_b: White balance color gain blue. ++ * @wb_gain_r: White balance color gain red. ++ * @wb_gain_gb: White balance color gain green blue. ++ * @wb_gain_gr: White balance color gain green red. ++ * @frame_number: Frame number of requested stats. ++ * @curr_frame: Current frame number being processed. ++ * @update: Bitwise flags to update parameters. ++ * @ts: Timestamp of returned framestats. ++ * @field_count: Sequence number of returned framestats. ++ */ ++struct isph3a_aewb_data { ++ void *h3a_aewb_statistics_buf; ++ __u32 shutter; ++ __u16 gain; ++ __u32 shutter_cap; ++ __u16 gain_cap; ++ __u16 dgain; ++ __u16 wb_gain_b; ++ __u16 wb_gain_r; ++ __u16 wb_gain_gb; ++ __u16 wb_gain_gr; ++ __u16 frame_number; ++ __u16 curr_frame; ++ __u8 update; ++ struct timeval ts; ++ __u32 config_counter; ++ unsigned long field_count; ++}; ++ ++ ++/* Histogram related structs */ ++/* Flags for number of bins */ ++#define BINS_32 0x0 ++#define BINS_64 0x1 ++#define BINS_128 0x2 ++#define BINS_256 0x3 ++ ++struct isp_hist_config { ++ __u8 hist_source; /* CCDC or Memory */ ++ __u8 input_bit_width; /* Needed o know the size per pixel */ ++ __u8 hist_frames; /* Num of frames to be processed and ++ * accumulated ++ */ ++ __u8 hist_h_v_info; /* frame-input width and height if source is ++ * memory ++ */ ++ __u16 hist_radd; /* frame-input address in memory */ ++ __u16 hist_radd_off; /* line-offset for frame-input */ ++ __u16 hist_bins; /* number of bins: 32, 64, 128, or 256 */ ++ __u16 wb_gain_R; /* White Balance Field-to-Pattern Assignments */ ++ __u16 wb_gain_RG; /* White Balance Field-to-Pattern Assignments */ ++ __u16 wb_gain_B; /* White Balance Field-to-Pattern Assignments */ ++ __u16 wb_gain_BG; /* White Balance Field-to-Pattern Assignments */ ++ __u8 num_regions; /* number of regions to be configured */ ++ __u16 reg0_hor; /* Region 0 size and position */ ++ __u16 reg0_ver; /* Region 0 size and position */ ++ __u16 reg1_hor; /* Region 1 size and position */ ++ __u16 reg1_ver; /* Region 1 size and position */ ++ __u16 reg2_hor; /* Region 2 size and position */ ++ __u16 reg2_ver; /* Region 2 size and position */ ++ __u16 reg3_hor; /* Region 3 size and position */ ++ __u16 reg3_ver; /* Region 3 size and position */ ++}; ++ ++struct isp_hist_data { ++ __u32 *hist_statistics_buf; /* Pointer to pass to user */ ++}; ++ ++/* Auto Focus related structs */ ++ ++#define AF_NUMBER_OF_COEF 11 ++ ++/* Flags for update field */ ++#define REQUEST_STATISTICS (1 << 0) ++#define LENS_DESIRED_POSITION (1 << 1) ++#define LENS_CURRENT_POSITION (1 << 2) ++ ++/** ++ * struct isp_af_xtrastats - Extra statistics related to AF generated stats. ++ * @ts: Timestamp when the frame gets delivered to the user. ++ * @field_count: Field count of the frame delivered to the user. ++ * @lens_position: Lens position when the stats are being generated. ++ */ ++struct isp_af_xtrastats { ++ struct timeval ts; ++ unsigned long field_count; ++ __u16 lens_position; /* deprecated */ ++}; ++ ++/** ++ * struct isp_af_data - AF statistics data to transfer between driver and user. ++ * @af_statistics_buf: Pointer to pass to user. ++ * @lens_current_position: Read value of lens absolute position. ++ * @desired_lens_direction: Lens desired location. ++ * @update: Bitwise flags to update parameters. ++ * @frame_number: Data for which frame is desired/given. ++ * @curr_frame: Current frame number being processed by AF module. ++ * @xtrastats: Extra statistics structure. ++ */ ++struct isp_af_data { ++ void *af_statistics_buf; ++ __u16 lens_current_position; /* deprecated */ ++ __u16 desired_lens_direction; /* deprecated */ ++ __u16 update; ++ __u16 frame_number; ++ __u16 curr_frame; ++ __u32 config_counter; ++ struct isp_af_xtrastats xtrastats; ++}; ++ ++/* enum used for status of specific feature */ ++enum af_alaw_enable { ++ H3A_AF_ALAW_DISABLE = 0, ++ H3A_AF_ALAW_ENABLE = 1 ++}; ++ ++enum af_hmf_enable { ++ H3A_AF_HMF_DISABLE = 0, ++ H3A_AF_HMF_ENABLE = 1 ++}; ++ ++enum af_config_flag { ++ H3A_AF_CFG_DISABLE = 0, ++ H3A_AF_CFG_ENABLE = 1 ++}; ++ ++enum af_mode { ++ ACCUMULATOR_SUMMED = 0, ++ ACCUMULATOR_PEAK = 1 ++}; ++ ++/* Red, Green, and blue pixel location in the AF windows */ ++enum rgbpos { ++ GR_GB_BAYER = 0, /* GR and GB as Bayer pattern */ ++ RG_GB_BAYER = 1, /* RG and GB as Bayer pattern */ ++ GR_BG_BAYER = 2, /* GR and BG as Bayer pattern */ ++ RG_BG_BAYER = 3, /* RG and BG as Bayer pattern */ ++ GG_RB_CUSTOM = 4, /* GG and RB as custom pattern */ ++ RB_GG_CUSTOM = 5 /* RB and GG as custom pattern */ ++}; ++ ++/* Contains the information regarding the Horizontal Median Filter */ ++struct af_hmf { ++ enum af_hmf_enable enable; /* Status of Horizontal Median Filter */ ++ unsigned int threshold; /* Threshhold Value for Horizontal Median ++ * Filter ++ */ ++}; ++ ++/* Contains the information regarding the IIR Filters */ ++struct af_iir { ++ unsigned int hz_start_pos; /* IIR Start Register Value */ ++ int coeff_set0[AF_NUMBER_OF_COEF]; /* ++ * IIR Filter Coefficient for ++ * Set 0 ++ */ ++ int coeff_set1[AF_NUMBER_OF_COEF]; /* ++ * IIR Filter Coefficient for ++ * Set 1 ++ */ ++}; ++ ++/* Contains the information regarding the Paxels Structure in AF Engine */ ++struct af_paxel { ++ unsigned int width; /* Width of the Paxel */ ++ unsigned int height; /* Height of the Paxel */ ++ unsigned int hz_start; /* Horizontal Start Position */ ++ unsigned int vt_start; /* Vertical Start Position */ ++ unsigned int hz_cnt; /* Horizontal Count */ ++ unsigned int vt_cnt; /* vertical Count */ ++ unsigned int line_incr; /* Line Increment */ ++}; ++/* Contains the parameters required for hardware set up of AF Engine */ ++struct af_configuration { ++ enum af_alaw_enable alaw_enable; /*ALWAW status */ ++ struct af_hmf hmf_config; /*HMF configurations */ ++ enum rgbpos rgb_pos; /*RGB Positions */ ++ struct af_iir iir_config; /*IIR filter configurations */ ++ struct af_paxel paxel_config; /*Paxel parameters */ ++ enum af_mode mode; /*Accumulator mode */ ++ enum af_config_flag af_config; /*Flag indicates Engine is configured */ ++}; ++ ++/* ISP CCDC structs */ ++ ++/* Abstraction layer CCDC configurations */ ++#define ISP_ABS_CCDC_ALAW (1 << 0) ++#define ISP_ABS_CCDC_LPF (1 << 1) ++#define ISP_ABS_CCDC_BLCLAMP (1 << 2) ++#define ISP_ABS_CCDC_BCOMP (1 << 3) ++#define ISP_ABS_CCDC_FPC (1 << 4) ++#define ISP_ABS_CCDC_CULL (1 << 5) ++#define ISP_ABS_CCDC_COLPTN (1 << 6) ++#define ISP_ABS_CCDC_CONFIG_LSC (1 << 7) ++#define ISP_ABS_TBL_LSC (1 << 8) ++ ++#define RGB_MAX 3 ++ ++/* Enumeration constants for Alaw input width */ ++enum alaw_ipwidth { ++ ALAW_BIT12_3 = 0x3, ++ ALAW_BIT11_2 = 0x4, ++ ALAW_BIT10_1 = 0x5, ++ ALAW_BIT9_0 = 0x6 ++}; ++ ++/* Enumeration constants for Video Port */ ++enum vpin { ++ BIT12_3 = 3, ++ BIT11_2 = 4, ++ BIT10_1 = 5, ++ BIT9_0 = 6 ++}; ++ ++enum vpif_freq { ++ PIXCLKBY2, ++ PIXCLKBY3_5, ++ PIXCLKBY4_5, ++ PIXCLKBY5_5, ++ PIXCLKBY6_5 ++}; ++ ++/** ++ * struct ispccdc_lsc_config - Structure for LSC configuration. ++ * @offset: Table Offset of the gain table. ++ * @gain_mode_n: Vertical dimension of a paxel in LSC configuration. ++ * @gain_mode_m: Horizontal dimension of a paxel in LSC configuration. ++ * @gain_format: Gain table format. ++ * @fmtsph: Start pixel horizontal from start of the HS sync pulse. ++ * @fmtlnh: Number of pixels in horizontal direction to use for the data ++ * reformatter. ++ * @fmtslv: Start line from start of VS sync pulse for the data reformatter. ++ * @fmtlnv: Number of lines in vertical direction for the data reformatter. ++ * @initial_x: X position, in pixels, of the first active pixel in reference ++ * to the first active paxel. Must be an even number. ++ * @initial_y: Y position, in pixels, of the first active pixel in reference ++ * to the first active paxel. Must be an even number. ++ * @size: Size of LSC gain table. Filled when loaded from userspace. ++ */ ++struct ispccdc_lsc_config { ++ __u16 offset; ++ __u8 gain_mode_n; ++ __u8 gain_mode_m; ++ __u8 gain_format; ++ __u16 fmtsph; ++ __u16 fmtlnh; ++ __u16 fmtslv; ++ __u16 fmtlnv; ++ __u8 initial_x; ++ __u8 initial_y; ++ __u32 size; ++}; ++ ++/** ++ * struct ispccdc_bclamp - Structure for Optical & Digital black clamp subtract ++ * @obgain: Optical black average gain. ++ * @obstpixel: Start Pixel w.r.t. HS pulse in Optical black sample. ++ * @oblines: Optical Black Sample lines. ++ * @oblen: Optical Black Sample Length. ++ * @dcsubval: Digital Black Clamp subtract value. ++ */ ++struct ispccdc_bclamp { ++ __u8 obgain; ++ __u8 obstpixel; ++ __u8 oblines; ++ __u8 oblen; ++ __u16 dcsubval; ++}; ++ ++/** ++ * ispccdc_fpc - Structure for FPC ++ * @fpnum: Number of faulty pixels to be corrected in the frame. ++ * @fpcaddr: Memory address of the FPC Table ++ */ ++struct ispccdc_fpc { ++ __u16 fpnum; ++ __u32 fpcaddr; ++}; ++ ++/** ++ * ispccdc_blcomp - Structure for Black Level Compensation parameters. ++ * @b_mg: B/Mg pixels. 2's complement. -128 to +127. ++ * @gb_g: Gb/G pixels. 2's complement. -128 to +127. ++ * @gr_cy: Gr/Cy pixels. 2's complement. -128 to +127. ++ * @r_ye: R/Ye pixels. 2's complement. -128 to +127. ++ */ ++struct ispccdc_blcomp { ++ __u8 b_mg; ++ __u8 gb_g; ++ __u8 gr_cy; ++ __u8 r_ye; ++}; ++ ++/** ++ * struct ispccdc_vp - Structure for Video Port parameters ++ * @bitshift_sel: Video port input select. 3 - bits 12-3, 4 - bits 11-2, ++ * 5 - bits 10-1, 6 - bits 9-0. ++ * @freq_sel: Video port data ready frequency. 1 - 1/3.5, 2 - 1/4.5, ++ * 3 - 1/5.5, 4 - 1/6.5. ++ */ ++struct ispccdc_vp { ++ enum vpin bitshift_sel; ++ enum vpif_freq freq_sel; ++}; ++ ++/** ++ * ispccdc_culling - Structure for Culling parameters. ++ * @v_pattern: Vertical culling pattern. ++ * @h_odd: Horizontal Culling pattern for odd lines. ++ * @h_even: Horizontal Culling pattern for even lines. ++ */ ++struct ispccdc_culling { ++ __u8 v_pattern; ++ __u16 h_odd; ++ __u16 h_even; ++}; ++ ++/** ++ * ispccdc_update_config - Structure for CCDC configuration. ++ * @update: Specifies which CCDC registers should be updated. ++ * @flag: Specifies which CCDC functions should be enabled. ++ * @alawip: Enable/Disable A-Law compression. ++ * @bclamp: Black clamp control register. ++ * @blcomp: Black level compensation value for RGrGbB Pixels. 2's complement. ++ * @fpc: Number of faulty pixels corrected in the frame, address of FPC table. ++ * @cull: Cull control register. ++ * @colptn: Color pattern of the sensor. ++ * @lsc: Pointer to LSC gain table. ++ */ ++struct ispccdc_update_config { ++ __u16 update; ++ __u16 flag; ++ enum alaw_ipwidth alawip; ++ struct ispccdc_bclamp *bclamp; ++ struct ispccdc_blcomp *blcomp; ++ struct ispccdc_fpc *fpc; ++ struct ispccdc_lsc_config *lsc_cfg; ++ struct ispccdc_culling *cull; ++ __u32 colptn; ++ __u8 *lsc; ++}; ++ ++/* Preview configuration */ ++ ++/*Abstraction layer preview configurations*/ ++#define ISP_ABS_PREV_LUMAENH (1 << 0) ++#define ISP_ABS_PREV_INVALAW (1 << 1) ++#define ISP_ABS_PREV_HRZ_MED (1 << 2) ++#define ISP_ABS_PREV_CFA (1 << 3) ++#define ISP_ABS_PREV_CHROMA_SUPP (1 << 4) ++#define ISP_ABS_PREV_WB (1 << 5) ++#define ISP_ABS_PREV_BLKADJ (1 << 6) ++#define ISP_ABS_PREV_RGB2RGB (1 << 7) ++#define ISP_ABS_PREV_COLOR_CONV (1 << 8) ++#define ISP_ABS_PREV_YC_LIMIT (1 << 9) ++#define ISP_ABS_PREV_DEFECT_COR (1 << 10) ++#define ISP_ABS_PREV_GAMMABYPASS (1 << 11) ++#define ISP_ABS_TBL_NF (1 << 12) ++#define ISP_ABS_TBL_REDGAMMA (1 << 13) ++#define ISP_ABS_TBL_GREENGAMMA (1 << 14) ++#define ISP_ABS_TBL_BLUEGAMMA (1 << 15) ++ ++#define ISPPRV_NF_TBL_SIZE 64 ++#define ISPPRV_CFA_TBL_SIZE 576 ++#define ISPPRV_GAMMA_TBL_SIZE 1024 ++#define ISPPRV_YENH_TBL_SIZE 128 ++ ++/** ++ * struct ispprev_hmed - Structure for Horizontal Median Filter. ++ * @odddist: Distance between consecutive pixels of same color in the odd line. ++ * @evendist: Distance between consecutive pixels of same color in the even ++ * line. ++ * @thres: Horizontal median filter threshold. ++ */ ++struct ispprev_hmed { ++ __u8 odddist; ++ __u8 evendist; ++ __u8 thres; ++}; ++ ++/* ++ * Enumeration for CFA Formats supported by preview ++ */ ++enum cfa_fmt { ++ CFAFMT_BAYER, CFAFMT_SONYVGA, CFAFMT_RGBFOVEON, ++ CFAFMT_DNSPL, CFAFMT_HONEYCOMB, CFAFMT_RRGGBBFOVEON ++}; ++ ++/** ++ * struct ispprev_cfa - Structure for CFA Inpterpolation. ++ * @cfafmt: CFA Format Enum value supported by preview. ++ * @cfa_gradthrs_vert: CFA Gradient Threshold - Vertical. ++ * @cfa_gradthrs_horz: CFA Gradient Threshold - Horizontal. ++ * @cfa_table: Pointer to the CFA table. ++ */ ++struct ispprev_cfa { ++ enum cfa_fmt cfafmt; ++ __u8 cfa_gradthrs_vert; ++ __u8 cfa_gradthrs_horz; ++ __u32 *cfa_table; ++}; ++ ++/** ++ * struct ispprev_csup - Structure for Chrominance Suppression. ++ * @gain: Gain. ++ * @thres: Threshold. ++ * @hypf_en: Flag to enable/disable the High Pass Filter. ++ */ ++struct ispprev_csup { ++ __u8 gain; ++ __u8 thres; ++ __u8 hypf_en; ++}; ++ ++/** ++ * struct ispprev_wbal - Structure for White Balance. ++ * @dgain: Digital gain (U10Q8). ++ * @coef3: White balance gain - COEF 3 (U8Q5). ++ * @coef2: White balance gain - COEF 2 (U8Q5). ++ * @coef1: White balance gain - COEF 1 (U8Q5). ++ * @coef0: White balance gain - COEF 0 (U8Q5). ++ */ ++struct ispprev_wbal { ++ __u16 dgain; ++ __u8 coef3; ++ __u8 coef2; ++ __u8 coef1; ++ __u8 coef0; ++}; ++ ++/** ++ * struct ispprev_blkadj - Structure for Black Adjustment. ++ * @red: Black level offset adjustment for Red in 2's complement format ++ * @green: Black level offset adjustment for Green in 2's complement format ++ * @blue: Black level offset adjustment for Blue in 2's complement format ++ */ ++struct ispprev_blkadj { ++ /*Black level offset adjustment for Red in 2's complement format */ ++ __u8 red; ++ /*Black level offset adjustment for Green in 2's complement format */ ++ __u8 green; ++ /* Black level offset adjustment for Blue in 2's complement format */ ++ __u8 blue; ++}; ++ ++/** ++ * struct ispprev_rgbtorgb - Structure for RGB to RGB Blending. ++ * @matrix: Blending values(S12Q8 format) ++ * [RR] [GR] [BR] ++ * [RG] [GG] [BG] ++ * [RB] [GB] [BB] ++ * @offset: Blending offset value for R,G,B in 2's complement integer format. ++ */ ++struct ispprev_rgbtorgb { ++ __u16 matrix[3][3]; ++ __u16 offset[3]; ++}; ++ ++/** ++ * struct ispprev_csc - Structure for Color Space Conversion from RGB-YCbYCr ++ * @matrix: Color space conversion coefficients(S10Q8) ++ * [CSCRY] [CSCGY] [CSCBY] ++ * [CSCRCB] [CSCGCB] [CSCBCB] ++ * [CSCRCR] [CSCGCR] [CSCBCR] ++ * @offset: CSC offset values for Y offset, CB offset and CR offset respectively ++ */ ++struct ispprev_csc { ++ __u16 matrix[RGB_MAX][RGB_MAX]; ++ __s16 offset[RGB_MAX]; ++}; ++ ++/** ++ * struct ispprev_yclimit - Structure for Y, C Value Limit. ++ * @minC: Minimum C value ++ * @maxC: Maximum C value ++ * @minY: Minimum Y value ++ * @maxY: Maximum Y value ++ */ ++struct ispprev_yclimit { ++ __u8 minC; ++ __u8 maxC; ++ __u8 minY; ++ __u8 maxY; ++}; ++ ++/** ++ * struct ispprev_dcor - Structure for Defect correction. ++ * @couplet_mode_en: Flag to enable or disable the couplet dc Correction in NF ++ * @detect_correct: Thresholds for correction bit 0:10 detect 16:25 correct ++ */ ++struct ispprev_dcor { ++ __u8 couplet_mode_en; ++ __u32 detect_correct[4]; ++}; ++ ++/** ++ * struct ispprev_nf - Structure for Noise Filter ++ * @spread: Spread value to be used in Noise Filter ++ * @table: Pointer to the Noise Filter table ++ */ ++struct ispprev_nf { ++ __u8 spread; ++ __u32 table[ISPPRV_NF_TBL_SIZE]; ++}; ++ ++/** ++ * struct ispprv_update_config - Structure for Preview Configuration (user). ++ * @update: Specifies which ISP Preview registers should be updated. ++ * @flag: Specifies which ISP Preview functions should be enabled. ++ * @yen: Pointer to luma enhancement table. ++ * @shading_shift: 3bit value of shift used in shading compensation. ++ * @prev_hmed: Pointer to structure containing the odd and even distance. ++ * between the pixels in the image along with the filter threshold. ++ * @prev_cfa: Pointer to structure containing the CFA interpolation table, CFA. ++ * format in the image, vertical and horizontal gradient threshold. ++ * @csup: Pointer to Structure for Chrominance Suppression coefficients. ++ * @prev_wbal: Pointer to structure for White Balance. ++ * @prev_blkadj: Pointer to structure for Black Adjustment. ++ * @rgb2rgb: Pointer to structure for RGB to RGB Blending. ++ * @prev_csc: Pointer to structure for Color Space Conversion from RGB-YCbYCr. ++ * @yclimit: Pointer to structure for Y, C Value Limit. ++ * @prev_dcor: Pointer to structure for defect correction. ++ * @prev_nf: Pointer to structure for Noise Filter ++ * @red_gamma: Pointer to red gamma correction table. ++ * @green_gamma: Pointer to green gamma correction table. ++ * @blue_gamma: Pointer to blue gamma correction table. ++ */ ++struct ispprv_update_config { ++ __u16 update; ++ __u16 flag; ++ void *yen; ++ __u32 shading_shift; ++ struct ispprev_hmed *prev_hmed; ++ struct ispprev_cfa *prev_cfa; ++ struct ispprev_csup *csup; ++ struct ispprev_wbal *prev_wbal; ++ struct ispprev_blkadj *prev_blkadj; ++ struct ispprev_rgbtorgb *rgb2rgb; ++ struct ispprev_csc *prev_csc; ++ struct ispprev_yclimit *yclimit; ++ struct ispprev_dcor *prev_dcor; ++ struct ispprev_nf *prev_nf; ++ __u32 *red_gamma; ++ __u32 *green_gamma; ++ __u32 *blue_gamma; ++}; ++ ++#endif /* OMAP_ISP_USER_H */ +diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile +index 72f6d03..e654270 100644 +--- a/drivers/media/video/Makefile ++++ b/drivers/media/video/Makefile +@@ -106,6 +106,8 @@ obj-$(CONFIG_VIDEO_CX2341X) += cx2341x.o + obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o + obj-$(CONFIG_VIDEO_OV7670) += ov7670.o + ++obj-y += isp/ ++ + obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o + + obj-$(CONFIG_USB_DABUSB) += dabusb.o +diff --git a/drivers/media/video/isp/Makefile b/drivers/media/video/isp/Makefile +new file mode 100644 +index 0000000..f14d617 +--- /dev/null ++++ b/drivers/media/video/isp/Makefile +@@ -0,0 +1,12 @@ ++# Makefile for OMAP3 ISP driver ++ ++ifdef CONFIG_ARCH_OMAP3410 ++isp-mod-objs += \ ++ isp.o ispccdc.o ++else ++isp-mod-objs += \ ++ isp.o ispccdc.o ispmmu.o \ ++ isppreview.o ispresizer.o isph3a.o isphist.o isp_af.o ispcsi2.o ++endif ++ ++obj-$(CONFIG_VIDEO_OMAP3) += isp-mod.o +diff --git a/drivers/media/video/isp/bluegamma_table.h b/drivers/media/video/isp/bluegamma_table.h +new file mode 100644 +index 0000000..301382a +--- /dev/null ++++ b/drivers/media/video/isp/bluegamma_table.h @@ -0,0 +1,1040 @@ +/* -+ * drivers/media/video/omap/isp/redgamma_table.h ++ * bluegamma_table.h + * -+ * Gamma Table values for Red for TI's OMAP3430 Camera ISP ++ * Gamma Table values for BLUE for TI's OMAP3 Camera ISP + * -+ * Copyright (C) 2007 Texas Instruments, Inc. ++ * Copyright (C) 2009 Texas Instruments, Inc. + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as @@ -1043,171 +1786,86 @@ Index: git/drivers/media/video/isp/bluegamma_table.h +255, +255, +255 -Index: git/drivers/media/video/isp/cfa_coef_table.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ git/drivers/media/video/isp/cfa_coef_table.h 2009-02-12 10:29:26.000000000 -0600 -@@ -0,0 +1,592 @@ -+/* -+ * drivers/media/video/omap/isp/cfa_coef_table.h +diff --git a/drivers/media/video/isp/cfa_coef_table.h b/drivers/media/video/isp/cfa_coef_table.h +new file mode 100644 +index 0000000..8cafa1f +--- /dev/null ++++ b/drivers/media/video/isp/cfa_coef_table.h +@@ -0,0 +1,603 @@ ++/* ++ * cfa_coef_table.h + * -+ * CFA Coefficient Table values for TI's OMAP3430 Camera ISP ++ * Copyright (C) 2009 Nokia Corporation + * -+ * Copyright (C) 2007 Texas Instruments, Inc. ++ * Contact: Sakari Ailus ++ * Tuukka Toivonen + * -+ * This package is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. ++ * Written by Gjorgji Rosikopulos ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA ++ * 02110-1301 USA + * -+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR -+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED -+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + ++244, +0, +247, +0, -+244, -+247, -+36, -+27, +12, -+0, +27, -+0, -+250, -+244, -+12, ++36, ++247, +250, -+4, -+0, -+0, -+0, -+248, -+0, +0, -+40, ++27, +0, +4, +250, +12, +244, -+250, -+0, -+27, -+0, -+12, -+27, -+36, -+247, -+244, -+0, -+247, -+0, -+0, -+40, -+0, -+0, +248, +0, +0, +0, +0, -+247, -+0, -+244, -+247, -+36, -+27, -+12, ++40, +0, -+27, +0, -+250, +244, +12, +250, +4, +0, -+0, -+0, -+248, -+0, -+0, -+40, -+0, -+4, -+250, -+12, -+244, -+250, -+0, -+27, -+0, -+12, +27, -+36, -+247, -+244, -+0, -+247, -+0, -+0, -+40, -+0, -+0, -+248, -+0, -+0, -+0, +0, -+247, -+0, -+244, ++250, +247, +36, +27, +12, +0, -+27, ++247, +0, -+250, +244, -+12, -+250, -+4, -+0, -+0, -+0, -+248, +0, +0, +40, +0, -+4, -+250, -+12, -+244, -+250, -+0, -+27, -+0, -+12, -+27, -+36, -+247, -+244, -+0, -+247, -+0, +0, -+40, +0, +0, +248, -+0, -+0, -+0, +244, +0, +247, @@ -1304,198 +1962,198 @@ Index: git/drivers/media/video/isp/cfa_coef_table.h +0, +0, +248, -+244, +0, +247, +0, -+12, -+27, -+36, ++244, +247, -+250, ++36, ++27, ++12, +0, +27, +0, -+4, +250, -+12, +244, -+248, ++12, ++250, ++4, ++0, +0, +0, ++248, +0, +0, +40, +0, -+0, -+244, ++4, ++250, +12, ++244, +250, -+4, +0, +27, +0, -+250, -+247, -+36, -+27, +12, -+0, ++27, ++36, +247, -+0, +244, +0, ++247, ++0, +0, +40, +0, +0, ++248, ++0, +0, +0, -+248, -+244, -+12, -+250, -+4, +0, -+27, ++247, +0, -+250, ++244, +247, +36, +27, +12, +0, -+247, ++27, +0, ++250, +244, -+248, -+0, -+0, ++12, ++250, ++4, +0, +0, -+40, +0, ++248, +0, -+244, +0, -+247, ++40, +0, ++4, ++250, +12, -+27, -+36, -+247, ++244, +250, +0, +27, +0, -+4, -+250, +12, ++27, ++36, ++247, +244, +0, ++247, ++0, +0, +40, +0, +0, ++248, +0, +0, -+248, -+244, -+12, -+250, -+4, +0, -+27, +0, -+250, ++247, ++0, ++244, +247, +36, +27, +12, +0, -+247, ++27, +0, ++250, +244, -+248, ++12, ++250, ++4, ++0, +0, +0, ++248, +0, +0, +40, +0, -+0, ++4, ++250, ++12, +244, ++250, +0, -+247, ++27, +0, +12, +27, +36, +247, -+250, -+0, -+27, -+0, -+4, -+250, -+12, +244, +0, ++247, ++0, +0, +40, +0, +0, ++248, +0, +0, -+248, -+244, ++0, ++4, ++250, +12, ++244, +250, -+4, +0, +27, +0, -+250, -+247, -+36, -+27, +12, ++27, ++36, ++247, ++244, +0, +247, +0, -+244, -+248, +0, +0, +0, ++248, ++0, +0, +40, +0, +0, -+244, -+0, +247, +0, -+12, -+27, -+36, ++244, +247, -+250, ++36, ++27, ++12, +0, +27, +0, -+4, +250, -+12, +244, -+0, ++12, ++250, ++4, +0, +40, +0, +0, ++248, ++0, +0, +0, -+248, +4, +250, +12, @@ -1592,65 +2250,163 @@ Index: git/drivers/media/video/isp/cfa_coef_table.h +0, +0, +0, ++244, ++12, ++250, +4, ++0, ++27, ++0, +250, ++247, ++36, ++27, +12, ++0, ++247, ++0, +244, -+250, ++248, ++0, +0, -+27, ++0, ++0, ++40, ++0, ++0, ++244, ++0, ++247, +0, +12, +27, +36, +247, ++250, ++0, ++27, ++0, ++4, ++250, ++12, +244, +0, -+247, +0, ++40, +0, +0, +0, -+248, +0, ++248, ++244, ++12, ++250, ++4, +0, -+40, ++27, +0, ++250, ++247, ++36, ++27, ++12, +0, +247, +0, +244, ++248, ++0, ++0, ++0, ++0, ++40, ++0, ++0, ++244, ++0, +247, ++0, ++12, ++27, +36, ++247, ++250, ++0, +27, ++0, ++4, ++250, ++12, ++244, ++0, ++0, ++40, ++0, ++0, ++0, ++0, ++248, ++244, +12, ++250, ++4, +0, +27, +0, +250, ++247, ++36, ++27, ++12, ++0, ++247, ++0, ++244, ++248, ++0, ++0, ++0, ++0, ++40, ++0, ++0, +244, ++0, ++247, ++0, +12, ++27, ++36, ++247, +250, ++0, ++27, ++0, +4, ++250, ++12, ++244, ++0, +0, +40, +0, +0, -+248, +0, +0, -+0 -Index: git/drivers/media/video/isp/greengamma_table.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ git/drivers/media/video/isp/greengamma_table.h 2009-02-12 10:29:26.000000000 -0600 ++248 ++ +diff --git a/drivers/media/video/isp/greengamma_table.h b/drivers/media/video/isp/greengamma_table.h +new file mode 100644 +index 0000000..0f5c5e4 +--- /dev/null ++++ b/drivers/media/video/isp/greengamma_table.h @@ -0,0 +1,1040 @@ +/* -+ * drivers/media/video/omap/isp/redgamma_table.h ++ * greengamma_table.h + * -+ * Gamma Table values for Red for TI's OMAP3430 Camera ISP ++ * Gamma Table values for GREEN for TI's OMAP3 Camera ISP + * -+ * Copyright (C) 2007 Texas Instruments, Inc. ++ * Copyright (C) 2009 Texas Instruments, Inc. + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as @@ -2685,18 +3441,28 @@ Index: git/drivers/media/video/isp/greengamma_table.h +255, +255, +255 -Index: git/drivers/media/video/isp/isp.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ git/drivers/media/video/isp/isp.c 2009-02-12 15:21:14.000000000 -0600 -@@ -0,0 +1,2301 @@ -+/* -+ * drivers/media/video/isp/isp.c +diff --git a/drivers/media/video/isp/isp.c b/drivers/media/video/isp/isp.c +new file mode 100644 +index 0000000..54c839b +--- /dev/null ++++ b/drivers/media/video/isp/isp.c +@@ -0,0 +1,2547 @@ ++/* ++ * isp.c + * -+ * Driver Library for ISP Control module in TI's OMAP3430 Camera ISP ++ * Driver Library for ISP Control module in TI's OMAP3 Camera ISP + * ISP interface and IRQ related APIs are defined here. + * -+ * Copyright (C) 2008 Texas Instruments. ++ * Copyright (C) 2009 Texas Instruments. ++ * Copyright (C) 2009 Nokia. ++ * ++ * Contributors: ++ * Sameer Venkatraman ++ * Mohit Jalori ++ * Sergio Aguirre ++ * Sakari Ailus ++ * Tuukka Toivonen ++ * Toni Leinonen + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as @@ -2707,222 +3473,202 @@ Index: git/drivers/media/video/isp/isp.c + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + -+#include -+#include -+#include ++#include ++ +#include -+#include +#include +#include -+#include -+#include -+#include -+#include -+#include -+#include ++#include ++#include ++#include + +#include "isp.h" ++#include "ispmmu.h" +#include "ispreg.h" +#include "ispccdc.h" -+#include "isppreview.h" -+#include "ispresizer.h" -+#include "ispmmu.h" +#include "isph3a.h" -+#include "isp_af.h" +#include "isphist.h" ++#include "isp_af.h" ++#include "isppreview.h" ++#include "ispresizer.h" ++#include "ispcsi2.h" + -+#define ISP_XCLKA_DEFAULT 0x12 ++static struct isp_device *omap3isp; + -+#ifdef CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER -+#define USE_ISP_PREVIEW -+#endif ++static int isp_try_size(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output); + -+#ifdef CONFIG_VIDEO_OMAP34XX_ISP_RESIZER -+#define USE_ISP_RESZ -+#endif -+/* list of image formats supported via OMAP ISP */ ++static void isp_save_ctx(void); ++ ++static void isp_restore_ctx(void); ++ ++static void isp_buf_init(void); ++ ++/* List of image formats supported via OMAP ISP */ +const static struct v4l2_fmtdesc isp_formats[] = { + { -+#ifndef ENABLE_BT_656_CAPTURE -+ .description = "UYVY, packed", -+#else -+ .description = "UYVY (YUV 4:2:2), packed", -+#endif -+ .pixelformat = V4L2_PIX_FMT_UYVY, ++ .description = "UYVY, packed", ++ .pixelformat = V4L2_PIX_FMT_UYVY, + }, + { -+ .description = "YUYV (YUV 4:2:2), packed", -+ .pixelformat = V4L2_PIX_FMT_YUYV, ++ .description = "YUYV (YUV 4:2:2), packed", ++ .pixelformat = V4L2_PIX_FMT_YUYV, + }, + { -+ .description = "Bayer10 (GrR/BGb)", -+ .pixelformat = V4L2_PIX_FMT_SGRBG10, ++ .description = "Bayer10 (GrR/BGb)", ++ .pixelformat = V4L2_PIX_FMT_SGRBG10, + }, +}; + -+#define NUM_ISP_CAPTURE_FORMATS (sizeof(isp_formats)/sizeof(isp_formats[0])) -+ -+ +/* ISP Crop capabilities */ +static struct v4l2_rect ispcroprect; +static struct v4l2_rect cur_rect; + -+/* Video controls */ ++/** ++ * struct vcontrol - Video control structure. ++ * @qc: V4L2 Query control structure. ++ * @current_value: Current value of the control. ++ */ +static struct vcontrol { + struct v4l2_queryctrl qc; + int current_value; +} video_control[] = { + { + { -+ .id = V4L2_CID_BRIGHTNESS, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Brightness", -+ .minimum = ISPPRV_BRIGHT_LOW, -+ .maximum = ISPPRV_BRIGHT_HIGH, -+ .step = ISPPRV_BRIGHT_STEP, -+ .default_value = ISPPRV_BRIGHT_DEF, -+ }, -+ .current_value = ISPPRV_BRIGHT_DEF, -+ }, -+ { -+ { -+ .id = V4L2_CID_CONTRAST, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Contrast", -+ .minimum = ISPPRV_CONTRAST_LOW, -+ .maximum = ISPPRV_CONTRAST_HIGH, -+ .step = ISPPRV_CONTRAST_STEP, -+ .default_value = ISPPRV_CONTRAST_DEF, -+ }, -+ .current_value = ISPPRV_CONTRAST_DEF, -+ }, -+ { -+ { -+ .id = V4L2_CID_PRIVATE_ISP_COLOR_FX, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Color Effects", -+ .minimum = PREV_DEFAULT_COLOR, -+ .maximum = PREV_SEPIA_COLOR, -+ .step = 1, -+ .default_value = PREV_DEFAULT_COLOR, -+ }, -+ .current_value = PREV_DEFAULT_COLOR, -+ }, -+ { -+ { -+ .id = V4L2_CID_PRIVATE_ISP_CCDC_CFG, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "CCDC", -+ .minimum = 0, -+ .maximum = 1, -+ .step = 1, -+ .default_value = 0, -+ }, -+ .current_value = 0, -+ }, -+ { -+ { -+ .id = V4L2_CID_PRIVATE_ISP_PRV_CFG, ++ .id = V4L2_CID_BRIGHTNESS, + .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Previewer", -+ .minimum = 0, -+ .maximum = 1, -+ .step = 1, -+ .default_value = 0, ++ .name = "Brightness", ++ .minimum = ISPPRV_BRIGHT_LOW, ++ .maximum = ISPPRV_BRIGHT_HIGH, ++ .step = ISPPRV_BRIGHT_STEP, ++ .default_value = ISPPRV_BRIGHT_DEF, + }, -+ .current_value = 0, ++ .current_value = ISPPRV_BRIGHT_DEF, + }, + { + { -+ .id = V4L2_CID_PRIVATE_ISP_LSC_UPDATE, ++ .id = V4L2_CID_CONTRAST, + .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Tables", -+ .minimum = 0, -+ .maximum = 1, -+ .step = 1, -+ .default_value = 0, ++ .name = "Contrast", ++ .minimum = ISPPRV_CONTRAST_LOW, ++ .maximum = ISPPRV_CONTRAST_HIGH, ++ .step = ISPPRV_CONTRAST_STEP, ++ .default_value = ISPPRV_CONTRAST_DEF, + }, -+ .current_value = 0, ++ .current_value = ISPPRV_CONTRAST_DEF, + }, + { + { -+ .id = V4L2_CID_PRIVATE_ISP_AEWB_CFG, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Auto Exposure, Auto WB Config", -+ .minimum = 0, -+ .maximum = 1, ++ .id = V4L2_CID_COLORFX, ++ .type = V4L2_CTRL_TYPE_MENU, ++ .name = "Color Effects", ++ .minimum = V4L2_COLORFX_NONE, ++ .maximum = V4L2_COLORFX_SEPIA, + .step = 1, -+ .default_value = 0, ++ .default_value = V4L2_COLORFX_NONE, + }, -+ .current_value = 0, -+ }, ++ .current_value = V4L2_COLORFX_NONE, ++ } ++}; ++ ++static struct v4l2_querymenu video_menu[] = { + { -+ { -+ .id = V4L2_CID_PRIVATE_ISP_AEWB_REQ, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "AEWB Request Statistics", -+ .minimum = 0, -+ .maximum = 1, -+ .step = 1, -+ .default_value = 0, -+ }, -+ .current_value = 0, ++ .id = V4L2_CID_COLORFX, ++ .index = 0, ++ .name = "None", + }, -+ { -+ { -+ .id = V4L2_CID_PRIVATE_ISP_AF_CFG, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "Auto Focus Config", -+ .minimum = 0, -+ .maximum = 1, -+ .step = 1, -+ .default_value = 0, -+ }, -+ .current_value = 0, ++ { ++ .id = V4L2_CID_COLORFX, ++ .index = 1, ++ .name = "B&W", + }, + { -+ { -+ .id = V4L2_CID_PRIVATE_ISP_AF_REQ, -+ .type = V4L2_CTRL_TYPE_INTEGER, -+ .name = "AF Request Statistics", -+ .minimum = 0, -+ .maximum = 1, -+ .step = 1, -+ .default_value = 0, -+ }, -+ .current_value = 0, -+ } ++ .id = V4L2_CID_COLORFX, ++ .index = 2, ++ .name = "Sepia", ++ }, +}; + -+/*Structure for IRQ related info */ -+static struct ispirq { -+ isp_callback_t isp_callbk[10]; -+ isp_vbq_callback_ptr isp_callbk_arg1[10]; -+ void *isp_callbk_arg2[10]; -+} ispirq_obj; ++struct isp_buf { ++ dma_addr_t isp_addr; ++ void (*complete)(struct videobuf_buffer *vb, void *priv); ++ struct videobuf_buffer *vb; ++ void *priv; ++ u32 vb_state; ++}; + -+/* Structure for storing ISP Control module information*/ -+static struct isp { -+ spinlock_t lock; /* spinlock to sync b/w isr and processes */ -+ spinlock_t isp_temp_buf_lock; -+ struct mutex isp_mutex; -+ u8 if_status; -+ u8 interfacetype; -+ int ref_count; -+ struct clk *cam_ick; -+ struct clk *cam_fck; -+} isp_obj; ++#define ISP_BUFS_IS_FULL(bufs) \ ++ (((bufs)->queue + 1) % NUM_BUFS == (bufs)->done) ++#define ISP_BUFS_IS_EMPTY(bufs) ((bufs)->queue == (bufs)->done) ++#define ISP_BUFS_IS_LAST(bufs) \ ++ ((bufs)->queue == ((bufs)->done + 1) % NUM_BUFS) ++#define ISP_BUFS_QUEUED(bufs) \ ++ ((((bufs)->done - (bufs)->queue + NUM_BUFS)) % NUM_BUFS) ++#define ISP_BUF_DONE(bufs) ((bufs)->buf + (bufs)->done) ++#define ISP_BUF_NEXT_DONE(bufs) \ ++ ((bufs)->buf + ((bufs)->done + 1) % NUM_BUFS) ++#define ISP_BUF_QUEUE(bufs) ((bufs)->buf + (bufs)->queue) ++#define ISP_BUF_MARK_DONE(bufs) \ ++ (bufs)->done = ((bufs)->done + 1) % NUM_BUFS; ++#define ISP_BUF_MARK_QUEUED(bufs) \ ++ (bufs)->queue = ((bufs)->queue + 1) % NUM_BUFS; ++ ++struct isp_bufs { ++ dma_addr_t isp_addr_capture[VIDEO_MAX_FRAME]; ++ spinlock_t lock; /* For handling current buffer */ ++ /* queue full: (ispsg.queue + 1) % NUM_BUFS == ispsg.done ++ queue empty: ispsg.queue == ispsg.done */ ++ struct isp_buf buf[NUM_BUFS]; ++ /* Next slot to queue a buffer. */ ++ int queue; ++ /* Buffer that is being processed. */ ++ int done; ++ /* Wait for this many hs_vs before anything else. */ ++ int wait_hs_vs; ++}; + -+struct isp_sgdma ispsg; ++/** ++ * struct ispirq - Structure for containing callbacks to be called in ISP ISR. ++ * @isp_callbk: Array which stores callback functions, indexed by the type of ++ * callback (8 possible types). ++ * @isp_callbk_arg1: Pointer to array containing pointers to the first argument ++ * to be passed to the requested callback function. ++ * @isp_callbk_arg2: Pointer to array containing pointers to the second ++ * argument to be passed to the requested callback function. ++ * ++ * This structure is used to contain all the callback functions related for ++ * each callback type (CBK_CCDC_VD0, CBK_CCDC_VD1, CBK_PREV_DONE, ++ * CBK_RESZ_DONE, CBK_MMU_ERR, CBK_H3A_AWB_DONE, CBK_HIST_DONE, CBK_HS_VS, ++ * CBK_LSC_ISR). ++ */ ++struct isp_irq { ++ isp_callback_t isp_callbk[CBK_END]; ++ isp_vbq_callback_ptr isp_callbk_arg1[CBK_END]; ++ void *isp_callbk_arg2[CBK_END]; ++}; + -+/* Structure for storing ISP sub-module information - CCDC,PRV,RSZ */ -+struct ispmodule { -+ /* Bit mask for sub-modules enabled within the ISP */ ++/** ++ * struct ispmodule - Structure for storing ISP sub-module information. ++ * @isp_pipeline: Bit mask for submodules enabled within the ISP. ++ * @applyCrop: Flag to do a crop operation when video buffer queue ISR is done ++ * @pix: Structure containing the format and layout of the output image. ++ * @ccdc_input_width: ISP CCDC module input image width. ++ * @ccdc_input_height: ISP CCDC module input image height. ++ * @ccdc_output_width: ISP CCDC module output image width. ++ * @ccdc_output_height: ISP CCDC module output image height. ++ * @preview_input_width: ISP Preview module input image width. ++ * @preview_input_height: ISP Preview module input image height. ++ * @preview_output_width: ISP Preview module output image width. ++ * @preview_output_height: ISP Preview module output image height. ++ * @resizer_input_width: ISP Resizer module input image width. ++ * @resizer_input_height: ISP Resizer module input image height. ++ * @resizer_output_width: ISP Resizer module output image width. ++ * @resizer_output_height: ISP Resizer module output image height. ++ */ ++struct isp_module { + unsigned int isp_pipeline; -+ int isp_temp_state; + int applyCrop; + struct v4l2_pix_format pix; -+ /* tried ISP output sizes for video mode */ + unsigned int ccdc_input_width; + unsigned int ccdc_input_height; + unsigned int ccdc_output_width; @@ -2934,3188 +3680,2341 @@ Index: git/drivers/media/video/isp/isp.c + unsigned int resizer_input_width; + unsigned int resizer_input_height; + unsigned int resizer_output_width; -+ unsigned int resizer_output_height; -+#ifdef ENABLE_BT_656_CAPTURE -+ /* Flag to indicate whether capture is interlaced or progressive */ -+ int capture_type; -+ int current_field; -+ __u32 input_pixelformat; -+#endif -+}; -+ -+#ifdef ENABLE_BT_656_CAPTURE -+#define ISP_SD_STD_PARAMS \ -+ {"NTSC", 858, 525, 720, 480, 720 * 2, 30, V4L2_PIX_FMT_UYVY, \ -+ V4L2_FIELD_INTERLACED, 720 * 2, 720 * 2 * 480, \ -+ V4L2_COLORSPACE_SMPTE170M}, \ -+ {"PAL", 864, 625, 720, 576, 720 * 2, 25, V4L2_PIX_FMT_UYVY, \ -+ V4L2_FIELD_INTERLACED, 720 * 2, 720 * 2 * 480, \ -+ V4L2_COLORSPACE_SMPTE170M} -+ -+struct isp_std_config_params { -+ char name[30]; -+ unsigned int num_pixels; -+ unsigned int num_lines; -+ unsigned int active_pixels; -+ unsigned int active_lines; -+ unsigned int pitch; -+ unsigned int fps; -+ __u32 pixelformat; -+ enum v4l2_field field; -+ __u32 bytesperline; -+ __u32 sizeimage; -+ enum v4l2_colorspace colorspace; -+}; -+ -+static struct isp_std_config_params std_params[] = { -+ ISP_SD_STD_PARAMS -+}; -+#endif -+ -+static struct ispmodule ispmodule_obj = { -+ .isp_pipeline = OMAP_ISP_CCDC, -+ .isp_temp_state = ISP_BUF_INIT, -+ .applyCrop = 0, -+ .pix = { -+ .width = 176, -+ .height = 144, -+ .pixelformat = V4L2_PIX_FMT_UYVY, -+ .field = V4L2_FIELD_NONE, -+ .bytesperline = 176*2, -+ .colorspace = V4L2_COLORSPACE_JPEG, -+ .priv = 0, -+ }, -+#ifdef ENABLE_BT_656_CAPTURE -+ .capture_type = 0, -+ .current_field = 0, -+ .input_pixelformat = V4L2_PIX_FMT_UYVY, -+#endif -+}; -+ -+/* Structure for saving/restoring ISP module registers*/ -+ -+static struct isp_reg isp_reg_list[] = { -+ {ISP_SYSCONFIG, 0x0000}, -+ {ISP_IRQ0ENABLE, 0x0000}, -+ {ISP_IRQ1ENABLE, 0x0000}, -+ {ISP_TCTRL_GRESET_LENGTH, 0x0000}, -+ {ISP_TCTRL_PSTRB_REPLAY, 0x0000}, -+ {ISP_CTRL, 0x0000}, -+ {ISP_TCTRL_CTRL, 0x0000}, -+ {ISP_TCTRL_FRAME, 0x0000}, -+ {ISP_TCTRL_PSTRB_DELAY, 0x0000}, -+ {ISP_TCTRL_STRB_DELAY, 0x0000}, -+ {ISP_TCTRL_SHUT_DELAY, 0x0000}, -+ {ISP_TCTRL_PSTRB_LENGTH, 0x0000}, -+ {ISP_TCTRL_STRB_LENGTH, 0x0000}, -+ {ISP_TCTRL_SHUT_LENGTH, 0x0000}, -+ {ISP_CBUFF_SYSCONFIG, 0x0000}, -+ {ISP_CBUFF_IRQENABLE, 0x0000}, -+ {ISP_CBUFF0_CTRL, 0x0000}, -+ {ISP_CBUFF1_CTRL, 0x0000}, -+ {ISP_CBUFF0_START, 0x0000}, -+ {ISP_CBUFF1_START, 0x0000}, -+ {ISP_CBUFF0_END, 0x0000}, -+ {ISP_CBUFF1_END, 0x0000}, -+ {ISP_CBUFF0_WINDOWSIZE, 0x0000}, -+ {ISP_CBUFF1_WINDOWSIZE, 0x0000}, -+ {ISP_CBUFF0_THRESHOLD, 0x0000}, -+ {ISP_CBUFF1_THRESHOLD, 0x0000}, -+ {ISP_TOK_TERM, 0x0000} -+}; -+ -+/* -+ * -+ * V4L2 Handling -+ * -+ */ -+ -+/* Returns the index of the requested ID from the control structure array */ -+static int -+find_vctrl(int id) -+{ -+ int i; -+ -+ if (id < V4L2_CID_BASE) -+ return -EDOM; -+ -+ for (i = (ARRAY_SIZE(video_control) - 1); i >= 0; i--) -+ if (video_control[i].qc.id == id) -+ break; -+ if (i < 0) -+ i = -EINVAL; -+ return i; -+} -+ -+void isp_open(void) -+{ -+ ispccdc_request(); -+ isppreview_request(); -+ ispresizer_request(); -+ return; -+} -+EXPORT_SYMBOL(isp_open); -+ -+void isp_close(void) -+{ -+ ispccdc_free(); -+ isppreview_free(); -+ ispresizer_free(); -+ memset(&ispcroprect, 0, sizeof(ispcroprect)); -+ memset(&cur_rect, 0, sizeof(cur_rect)); -+ return; -+} -+EXPORT_SYMBOL(isp_close); -+ -+/* flag to check first time of isp_get */ -+static int off_mode; -+ -+int isp_set_sgdma_callback(struct isp_sgdma_state *sgdma_state, -+ isp_vbq_callback_ptr func_ptr) -+{ -+#ifdef USE_ISP_RESZ -+ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) { -+ isp_set_callback(CBK_RESZ_DONE, sgdma_state->callback, -+ func_ptr, sgdma_state->arg); -+ } -+#endif -+ -+#ifdef USE_ISP_PREVIEW -+ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) { -+ isp_set_callback(CBK_PREV_DONE, sgdma_state->callback, -+ func_ptr, sgdma_state->arg); -+ } -+#endif -+ if (ispmodule_obj.isp_pipeline & OMAP_ISP_CCDC) { -+ isp_set_callback(CBK_CCDC_VD0, sgdma_state->callback, func_ptr, -+ sgdma_state->arg); -+ isp_set_callback(CBK_CCDC_VD1, sgdma_state->callback, func_ptr, -+ sgdma_state->arg); -+#ifndef ENABLE_BT_656_CAPTURE -+ isp_set_callback(CBK_LSC_ISR, NULL, NULL, NULL); -+#endif -+ } -+ isp_set_callback(CBK_HS_VS, sgdma_state->callback, func_ptr, -+ sgdma_state->arg); -+ return 0; -+} -+ -+/* -+ *Sets the callback for the ISP module done events. -+ * type : Type of the event for which callback is requested. -+ * callback : Method to be called as callback in the ISR context. -+ * arg1 : Argument to be passed when callback is called in ISR. -+ * arg2 : Argument to be passed when callback is called in ISR. -+ */ -+int isp_set_callback(enum isp_callback_type type, isp_callback_t callback, -+ isp_vbq_callback_ptr arg1, -+ void *arg2) -+{ -+ unsigned long irqflags = 0; -+ -+ if (callback == NULL) { -+ DPRINTK_ISPCTRL("ISP_ERR : Null Callback\n"); -+ return -EINVAL; -+ } -+ -+ spin_lock_irqsave(&isp_obj.lock, irqflags); -+ ispirq_obj.isp_callbk[type] = callback; -+ ispirq_obj.isp_callbk_arg1[type] = arg1; -+ ispirq_obj.isp_callbk_arg2[type] = arg2; -+ spin_unlock_irqrestore(&isp_obj.lock, irqflags); -+ -+ switch (type) { -+ case CBK_HS_VS: -+ omap_writel(IRQ0ENABLE_HS_VS_IRQ, ISP_IRQ0STATUS); -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) | IRQ0ENABLE_HS_VS_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_PREV_DONE: -+ omap_writel(IRQ0ENABLE_PRV_DONE_IRQ, ISP_IRQ0STATUS); -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) | -+ IRQ0ENABLE_PRV_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_RESZ_DONE: -+ omap_writel(IRQ0ENABLE_RSZ_DONE_IRQ, ISP_IRQ0STATUS); -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) | -+ IRQ0ENABLE_RSZ_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_MMU_ERR: -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) | -+ IRQ0ENABLE_MMU_ERR_IRQ, -+ ISP_IRQ0ENABLE); -+ -+ omap_writel(omap_readl(ISPMMU_IRQENABLE) | -+ IRQENABLE_MULTIHITFAULT | -+ IRQENABLE_TWFAULT | -+ IRQENABLE_EMUMISS | -+ IRQENABLE_TRANSLNFAULT | -+ IRQENABLE_TLBMISS, -+ ISPMMU_IRQENABLE); -+ break; -+ case CBK_H3A_AWB_DONE: -+ omap_writel(IRQ0ENABLE_H3A_AWB_DONE_IRQ, ISP_IRQ0STATUS); -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) | -+ IRQ0ENABLE_H3A_AWB_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_H3A_AF_DONE: -+ omap_writel(IRQ0ENABLE_H3A_AF_DONE_IRQ, ISP_IRQ0STATUS); -+ omap_writel(omap_readl(ISP_IRQ0ENABLE)| -+ IRQ0ENABLE_H3A_AF_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_HIST_DONE: -+ omap_writel(IRQ0ENABLE_HIST_DONE_IRQ, ISP_IRQ0STATUS); -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) | -+ IRQ0ENABLE_HIST_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_LSC_ISR: -+ omap_writel(IRQ0ENABLE_CCDC_LSC_DONE_IRQ | -+ IRQ0ENABLE_CCDC_LSC_PREF_COMP_IRQ | -+ IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ, -+ ISP_IRQ0STATUS); -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) | -+ IRQ0ENABLE_CCDC_LSC_DONE_IRQ | -+ IRQ0ENABLE_CCDC_LSC_PREF_COMP_IRQ | -+ IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ default: -+ break; -+ }; -+ -+ return 0; -+} -+EXPORT_SYMBOL(isp_set_callback); -+ -+/** -+ * isp_unset_callback - Clears the callback for the ISP module done events. -+ * @type: Type of the event for which callback to be cleared. -+ * -+ * This function clears a callback function for a done event in the ISP -+ * module, and disables the corresponding interrupt. -+ **/ -+int isp_unset_callback(enum isp_callback_type type) -+{ -+ unsigned long irqflags = 0; -+ -+ spin_lock_irqsave(&isp_obj.lock, irqflags); -+ ispirq_obj.isp_callbk[type] = NULL; -+ ispirq_obj.isp_callbk_arg1[type] = NULL; -+ ispirq_obj.isp_callbk_arg2[type] = NULL; -+ spin_unlock_irqrestore(&isp_obj.lock, irqflags); -+ -+ switch (type) { -+ case CBK_CCDC_VD0: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & -+ ~IRQ0ENABLE_CCDC_VD0_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_CCDC_VD1: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & -+ ~IRQ0ENABLE_CCDC_VD1_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_PREV_DONE: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & -+ ~IRQ0ENABLE_PRV_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_RESZ_DONE: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & -+ ~IRQ0ENABLE_RSZ_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_MMU_ERR: -+ omap_writel(omap_readl(ISPMMU_IRQENABLE) & -+ ~(IRQENABLE_MULTIHITFAULT | -+ IRQENABLE_TWFAULT | -+ IRQENABLE_EMUMISS | -+ IRQENABLE_TRANSLNFAULT | -+ IRQENABLE_TLBMISS), -+ ISPMMU_IRQENABLE); -+ break; -+ case CBK_H3A_AWB_DONE: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & -+ ~IRQ0ENABLE_H3A_AWB_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_H3A_AF_DONE: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE))& -+ (~IRQ0ENABLE_H3A_AF_DONE_IRQ),ISP_IRQ0ENABLE); -+ break; -+ case CBK_HIST_DONE: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & -+ ~IRQ0ENABLE_HIST_DONE_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_HS_VS: -+ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & -+ ~IRQ0ENABLE_HS_VS_IRQ, -+ ISP_IRQ0ENABLE); -+ break; -+ case CBK_LSC_ISR: -+ omap_writel(omap_readl(ISP_IRQ0ENABLE) & -+ ~(IRQ0ENABLE_CCDC_LSC_DONE_IRQ | -+ IRQ0ENABLE_CCDC_LSC_PREF_COMP_IRQ | -+ IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ), -+ ISP_IRQ0ENABLE); -+ break; -+ default: -+ break; -+ }; -+ return 0; -+} -+EXPORT_SYMBOL(isp_unset_callback); -+ -+/** -+ * isp_request_interface - Requests an ISP interface type (parallel or serial). -+ * @if_t: Type of requested ISP interface (parallel or serial). -+ * -+ * This function requests for allocation of an ISP interface type. -+ **/ -+int isp_request_interface(enum isp_interface_type if_t) -+{ -+ if (isp_obj.if_status & if_t) { -+ DPRINTK_ISPCTRL("ISP_ERR : Requested Interface already \ -+ allocated\n"); -+ goto err_ebusy; -+ } -+ if ((isp_obj.if_status == (ISP_PARLL | ISP_CSIA)) -+ || isp_obj.if_status == (ISP_CSIA | ISP_CSIB)) { -+ DPRINTK_ISPCTRL("ISP_ERR : No Free interface now\n"); -+ goto err_ebusy; -+ } -+ -+ if (((isp_obj.if_status == ISP_PARLL) && (if_t == ISP_CSIA)) || -+ ((isp_obj.if_status == ISP_CSIA) && -+ (if_t == ISP_PARLL)) || -+ ((isp_obj.if_status == ISP_CSIA) && -+ (if_t == ISP_CSIB)) || -+ ((isp_obj.if_status == ISP_CSIB) && -+ (if_t == ISP_CSIA)) || -+ (isp_obj.if_status == 0)) { -+ isp_obj.if_status |= if_t; -+ return 0; -+ } else { -+ DPRINTK_ISPCTRL("ISP_ERR : Invalid Combination Serial- \ -+ Parallel interface\n"); -+ return -EINVAL; -+ } -+ -+err_ebusy: -+ return -EBUSY; -+} -+EXPORT_SYMBOL(isp_request_interface); -+ -+/** -+ * isp_free_interface - Frees an ISP interface type (parallel or serial). -+ * @if_t: Type of ISP interface to be freed (parallel or serial). -+ * -+ * This function frees the allocation of an ISP interface type. -+ **/ -+int isp_free_interface(enum isp_interface_type if_t) -+{ -+ isp_obj.if_status &= ~if_t; -+ return 0; -+} -+EXPORT_SYMBOL(isp_free_interface); -+ -+/** -+ * isp_set_xclk - Configures the specified cam_xclk to the desired frequency. -+ * @xclk: Desired frequency of the clock in Hz. -+ * @xclksel: XCLK to configure (0 = A, 1 = B). -+ * -+ * Configures the specified MCLK divisor in the ISP timing control register -+ * (TCTRL_CTRL) to generate the desired xclk clock value. -+ * -+ * Divisor = CM_CAM_MCLK_HZ / xclk -+ * -+ * Returns the final frequency that is actually being generated -+ **/ -+u32 isp_set_xclk(u32 xclk, u8 xclksel) -+{ -+ u32 divisor; -+ u32 currentxclk; -+ -+ if (xclk == CM_CAM_MCLK_HZ) { -+ divisor = (xclksel == 0) ? ISPTCTRL_CTRL_DIVA_Bypass : -+ ISPTCTRL_CTRL_DIVB_Bypass; -+ currentxclk = CM_CAM_MCLK_HZ; -+ } else { -+ if (xclk >= 2) { -+ divisor = CM_CAM_MCLK_HZ / xclk; -+ divisor &= (xclksel == 0) ? ISPTCTRL_CTRL_DIVA_Bypass : -+ ISPTCTRL_CTRL_DIVB_Bypass; -+ currentxclk = CM_CAM_MCLK_HZ / divisor; -+ } else { -+ divisor = xclk; -+ currentxclk = 0; -+ } -+ } -+ -+ switch (xclksel) { -+ case 0: -+ omap_writel((omap_readl(ISP_TCTRL_CTRL) & -+ ~ISPTCTRL_CTRL_DIVA_Bypass) | -+ (divisor << ISPTCTRL_CTRL_DIVA_SHIFT), -+ ISP_TCTRL_CTRL); -+ DPRINTK_ISPCTRL("isp_set_xclk(): cam_xclka set to %x Hz\n", -+ currentxclk); -+ break; -+ case 1: -+ omap_writel((omap_readl(ISP_TCTRL_CTRL) & -+ ~ISPTCTRL_CTRL_DIVB_Bypass) | -+ (divisor << ISPTCTRL_CTRL_DIVB_SHIFT), -+ ISP_TCTRL_CTRL); -+ DPRINTK_ISPCTRL("isp_set_xclk(): cam_xclkb set to %x Hz\n", -+ currentxclk); -+ break; -+ default: -+ DPRINTK_ISPCTRL("ISP_ERR: isp_set_xclk(): Invalid requested " -+ "xclk. Must be 0 (A) or 1 (B)." -+ "\n"); -+ return -EINVAL; -+ } -+ -+ return currentxclk; -+} -+EXPORT_SYMBOL(isp_set_xclk); -+ -+/** -+ * isp_get_xclk - Returns the frequency in Hz of the desired cam_xclk. -+ * @xclksel: XCLK to retrieve (0 = A, 1 = B). -+ * -+ * This function returns the External Clock (XCLKA or XCLKB) value generated -+ * by the ISP. -+ **/ -+u32 isp_get_xclk(u8 xclksel) -+{ -+ u32 xclkdiv; -+ u32 xclk; -+ -+ switch (xclksel) { -+ case 0: -+ xclkdiv = omap_readl(ISP_TCTRL_CTRL) & ISPTCTRL_CTRL_DIVA_MASK; -+ xclkdiv = xclkdiv >> ISPTCTRL_CTRL_DIVA_SHIFT; -+ break; -+ case 1: -+ xclkdiv = omap_readl(ISP_TCTRL_CTRL) & ISPTCTRL_CTRL_DIVB_MASK; -+ xclkdiv = xclkdiv >> ISPTCTRL_CTRL_DIVB_SHIFT; -+ break; -+ default: -+ DPRINTK_ISPCTRL("ISP_ERR: isp_get_xclk(): Invalid requested " -+ "xclk. Must be 0 (A) or 1 (B)." -+ "\n"); -+ return -EINVAL; -+ } -+ -+ switch (xclkdiv) { -+ case 0: -+ case 1: -+ xclk = 0; -+ break; -+ case 0x1f: -+ xclk = CM_CAM_MCLK_HZ; -+ break; -+ default: -+ xclk = CM_CAM_MCLK_HZ / xclkdiv; -+ } ++ unsigned int resizer_output_height; ++}; + -+ return xclk; -+} -+EXPORT_SYMBOL(isp_get_xclk); ++#define RAW_CAPTURE(isp) \ ++ (!((isp)->module.isp_pipeline & OMAP_ISP_PREVIEW)) + +/** -+ * isp_power_settings - Sysconfig settings, for Power Management. -+ * @isp_sysconfig: Structure containing the power settings for ISP to configure ++ * struct isp - Structure for storing ISP Control module information ++ * @lock: Spinlock to sync between isr and processes. ++ * @isp_mutex: Semaphore used to get access to the ISP. ++ * @ref_count: Reference counter. ++ * @cam_ick: Pointer to ISP Interface clock. ++ * @cam_fck: Pointer to ISP Functional clock. + * -+ * Sets the power settings for the ISP, and SBL bus. -+ **/ -+void isp_power_settings(struct isp_sysc isp_sysconfig) -+{ -+ if (isp_sysconfig.idle_mode) { -+ omap_writel(ISP_SYSCONFIG_AUTOIDLE | -+ (ISP_SYSCONFIG_MIdleMode_SmartStandBy << -+ ISP_SYSCONFIG_MIdleMode_SHIFT), -+ ISP_SYSCONFIG); -+ -+ omap_writel(ISPMMU_AUTOIDLE | (ISPMMU_SIdlemode_Smartidle << -+ ISPMMU_SIdlemode_Shift), -+ ISPMMU_SYSCONFIG); -+/// if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) { -+ omap_writel(ISPCSI1_AUTOIDLE | -+ (ISPCSI1_MIdleMode_SmartStandBy << -+ ISPCSI1_MIdleMode_Shift), -+ ISP_CSIA_SYSCONFIG); -+ omap_writel(ISPCSI1_AUTOIDLE | -+ (ISPCSI1_MIdleMode_SmartStandBy << -+ ISPCSI1_MIdleMode_Shift), -+ ISP_CSIB_SYSCONFIG); -+/// } -+ omap_writel(ISPCTRL_SBL_AutoIdle, ISP_CTRL); -+ -+ } else { -+ omap_writel(ISP_SYSCONFIG_AUTOIDLE | -+ (ISP_SYSCONFIG_MIdleMode_ForceStandBy << -+ ISP_SYSCONFIG_MIdleMode_SHIFT), ISP_SYSCONFIG); -+ -+ omap_writel(ISPMMU_AUTOIDLE | -+ (ISPMMU_SIdlemode_Noidle << ISPMMU_SIdlemode_Shift), -+ ISPMMU_SYSCONFIG); -+/// if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) { -+ omap_writel(ISPCSI1_AUTOIDLE | -+ (ISPCSI1_MIdleMode_ForceStandBy << -+ ISPCSI1_MIdleMode_Shift), ISP_CSIA_SYSCONFIG); -+ -+ omap_writel(ISPCSI1_AUTOIDLE | -+ (ISPCSI1_MIdleMode_ForceStandBy << -+ ISPCSI1_MIdleMode_Shift), ISP_CSIB_SYSCONFIG); -+/// } -+ -+ omap_writel(ISPCTRL_SBL_AutoIdle, ISP_CTRL); -+ -+ } -+ ++ * This structure is used to store the OMAP ISP Control Information. ++ */ ++static struct isp { ++ spinlock_t lock; /* For handling registered ISP callbacks */ ++ struct mutex isp_mutex; /* For handling ref_count field */ ++ int ref_count; ++ struct clk *cam_ick; ++ struct clk *cam_mclk; ++ struct clk *csi2_fck; ++ struct isp_interface_config *config; ++ dma_addr_t tmp_buf; ++ size_t tmp_buf_size; ++ unsigned long tmp_buf_offset; ++ struct isp_bufs bufs; ++ struct isp_irq irq; ++ struct isp_module module; ++} isp_obj; + -+} -+EXPORT_SYMBOL(isp_power_settings); ++/* Structure for saving/restoring ISP module registers */ ++static struct isp_reg isp_reg_list[] = { ++ {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_GRESET_LENGTH, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_PSTRB_REPLAY, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_FRAME, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_PSTRB_DELAY, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_STRB_DELAY, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_SHUT_DELAY, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_PSTRB_LENGTH, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_STRB_LENGTH, 0}, ++ {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_SHUT_LENGTH, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF_SYSCONFIG, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF_IRQENABLE, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF0_CTRL, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF1_CTRL, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF0_START, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF1_START, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF0_END, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF1_END, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF0_WINDOWSIZE, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF1_WINDOWSIZE, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF0_THRESHOLD, 0}, ++ {OMAP3_ISP_IOMEM_CBUFF, ISP_CBUFF1_THRESHOLD, 0}, ++ {0, ISP_TOK_TERM, 0} ++}; + -+/** -+ * isp_configure_interface - Configures ISP Control I/F related parameters. -+ * @config: Structure containing the desired configuration for the ISP. -+ * -+ * Configures ISP control register (ISP_CTRL) with the values specified inside -+ * the config structure. Controls: -+ * - Selection of parallel or serial input to the preview hardware. -+ * - Data lane shifter. -+ * - Pixel clock polarity. -+ * - 8 to 16-bit bridge at the input of CCDC module. -+ * - HS or VS synchronization signal detection -+ **/ -+int isp_configure_interface(struct isp_interface_config *config) ++u32 isp_reg_readl(enum isp_mem_resources isp_mmio_range, u32 reg_offset) +{ -+ u32 ispctrl_val = omap_readl(ISP_CTRL); -+ u32 ispccdc_vdint_val; -+ -+ ispctrl_val &= (ISPCTRL_PAR_SER_CLK_SEL_MASK); -+ ispctrl_val |= config->ccdc_par_ser; -+ ispctrl_val &= ISPCTRL_SHIFT_MASK; -+ ispctrl_val |= (config->dataline_shift << ISPCTRL_SHIFT_SHIFT); -+ ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV; -+ ispctrl_val |= (config->para_clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT); -+ ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_BENDIAN; -+ ispctrl_val |= (config->par_bridge << ISPCTRL_PAR_BRIDGE_SHIFT); -+ ispctrl_val &= ~(ISPCTRL_SYNC_DETECT_VSRISE); -+ ispctrl_val |= (config->hsvs_syncdetect << ISPCTRL_SYNC_DETECT_SHIFT); -+ -+ omap_writel(ispctrl_val, ISP_CTRL); -+ -+ ispccdc_vdint_val = omap_readl(ISPCCDC_VDINT); -+ ispccdc_vdint_val &= ~(ISPCCDC_VDINT_0_MASK << ISPCCDC_VDINT_0_SHIFT); -+ ispccdc_vdint_val &= ~(ISPCCDC_VDINT_1_MASK << ISPCCDC_VDINT_1_SHIFT); -+ omap_writel((config->vdint0_timing << ISPCCDC_VDINT_0_SHIFT) | -+ (config->vdint1_timing << -+ ISPCCDC_VDINT_1_SHIFT), -+ ISPCCDC_VDINT); -+ return 0; ++ return __raw_readl(omap3isp->mmio_base[isp_mmio_range] + reg_offset); +} -+EXPORT_SYMBOL(isp_configure_interface); ++EXPORT_SYMBOL(isp_reg_readl); + -+/** -+ * isp_CCDC_VD01_enable - Enables VD0 and VD1 IRQs. -+ * -+ * Sets VD0 and VD1 bits in IRQ0STATUS to reset the flag, and sets them in -+ * IRQ0ENABLE to enable the corresponding IRQs. -+ **/ -+void is