From 6b53879bce3f8883577e8b38dd43c2ec25f31d8c Mon Sep 17 00:00:00 2001 From: Marcin Juszkiewicz Date: Tue, 3 Jul 2007 14:08:54 +0000 Subject: sarge_at91: added AT91RM9200 board from Black Mesa East project --- conf/machine/sarge_at91.conf | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 conf/machine/sarge_at91.conf diff --git a/conf/machine/sarge_at91.conf b/conf/machine/sarge_at91.conf new file mode 100644 index 0000000000..9f936a68a4 --- /dev/null +++ b/conf/machine/sarge_at91.conf @@ -0,0 +1,19 @@ +#@TYPE: Machine +#@Name: Sarge AT91RM9200 blackmesaeast dev boards +#@DESCRIPTION: Machine configuration for sarge_at91 dev boards +# +#Homepage: http://blackmesaeast.com.pl/projects/electronics/sarge-single-board-computer/ + +TARGET_ARCH = "arm" +PACKAGE_EXTRA_ARCHS = "armv4t" + +# used by sysvinit_2 +SERIAL_CONSOLE = "115200 ttyS0" + +IMAGE_FSTYPES = "tar.gz" + +MACHINE_FEATURES = "kernel26" + +require conf/machine/include/tune-arm920t.conf + +PREFERRED_PROVIDER_virtual/kernel = "linux-sarge" -- cgit v1.2.3 From dc7403b7abb7365dcdba06dfd6a4efd94f1dd763 Mon Sep 17 00:00:00 2001 From: Marcin Juszkiewicz Date: Tue, 3 Jul 2007 14:19:05 +0000 Subject: sarge-at91: renamed to not conflict with overrides --- conf/machine/sarge-at91.conf | 19 +++++++++++++++++++ conf/machine/sarge_at91.conf | 19 ------------------- 2 files changed, 19 insertions(+), 19 deletions(-) create mode 100644 conf/machine/sarge-at91.conf delete mode 100644 conf/machine/sarge_at91.conf diff --git a/conf/machine/sarge-at91.conf b/conf/machine/sarge-at91.conf new file mode 100644 index 0000000000..9f936a68a4 --- /dev/null +++ b/conf/machine/sarge-at91.conf @@ -0,0 +1,19 @@ +#@TYPE: Machine +#@Name: Sarge AT91RM9200 blackmesaeast dev boards +#@DESCRIPTION: Machine configuration for sarge_at91 dev boards +# +#Homepage: http://blackmesaeast.com.pl/projects/electronics/sarge-single-board-computer/ + +TARGET_ARCH = "arm" +PACKAGE_EXTRA_ARCHS = "armv4t" + +# used by sysvinit_2 +SERIAL_CONSOLE = "115200 ttyS0" + +IMAGE_FSTYPES = "tar.gz" + +MACHINE_FEATURES = "kernel26" + +require conf/machine/include/tune-arm920t.conf + +PREFERRED_PROVIDER_virtual/kernel = "linux-sarge" diff --git a/conf/machine/sarge_at91.conf b/conf/machine/sarge_at91.conf deleted file mode 100644 index 9f936a68a4..0000000000 --- a/conf/machine/sarge_at91.conf +++ /dev/null @@ -1,19 +0,0 @@ -#@TYPE: Machine -#@Name: Sarge AT91RM9200 blackmesaeast dev boards -#@DESCRIPTION: Machine configuration for sarge_at91 dev boards -# -#Homepage: http://blackmesaeast.com.pl/projects/electronics/sarge-single-board-computer/ - -TARGET_ARCH = "arm" -PACKAGE_EXTRA_ARCHS = "armv4t" - -# used by sysvinit_2 -SERIAL_CONSOLE = "115200 ttyS0" - -IMAGE_FSTYPES = "tar.gz" - -MACHINE_FEATURES = "kernel26" - -require conf/machine/include/tune-arm920t.conf - -PREFERRED_PROVIDER_virtual/kernel = "linux-sarge" -- cgit v1.2.3 From c9c7cd865a29b3bb1f503b4a9f56975aacba6cb9 Mon Sep 17 00:00:00 2001 From: Marcin Juszkiewicz Date: Tue, 3 Jul 2007 14:37:21 +0000 Subject: sarge-at91: use u-boot 1.1.6 and linux 2.6.21 --- conf/machine/sarge-at91.conf | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/conf/machine/sarge-at91.conf b/conf/machine/sarge-at91.conf index 9f936a68a4..6001e69cf7 100644 --- a/conf/machine/sarge-at91.conf +++ b/conf/machine/sarge-at91.conf @@ -16,4 +16,8 @@ MACHINE_FEATURES = "kernel26" require conf/machine/include/tune-arm920t.conf -PREFERRED_PROVIDER_virtual/kernel = "linux-sarge" +PREFERRED_PROVIDER_virtual/kernel = "linux" + +# device has own patchset for u-boot 1.1.6 +PREFERRED_VERSION_u-boot = "1.1.6" +PREFERRED_VERSION_linux = "2.6.21" -- cgit v1.2.3 From db1f0b4eee16506860278466f9618d4186be024f Mon Sep 17 00:00:00 2001 From: Grzegorz Ratajczak Date: Tue, 3 Jul 2007 14:39:54 +0000 Subject: u-boot 1.1.6: added Sarge-AT91 support --- packages/uboot/u-boot-1.1.6/sarge-uboot.patch | 3375 +++++++++++++++++++++++++ packages/uboot/u-boot_1.1.6.bb | 4 +- 2 files changed, 3378 insertions(+), 1 deletion(-) create mode 100644 packages/uboot/u-boot-1.1.6/sarge-uboot.patch diff --git a/packages/uboot/u-boot-1.1.6/sarge-uboot.patch b/packages/uboot/u-boot-1.1.6/sarge-uboot.patch new file mode 100644 index 0000000000..affc3d38cd --- /dev/null +++ b/packages/uboot/u-boot-1.1.6/sarge-uboot.patch @@ -0,0 +1,3375 @@ +diff -Nurp ../u-boot-1.1.6/arm_config.mk ./arm_config.mk +--- ../u-boot-1.1.6/arm_config.mk 2006-11-02 15:15:01.000000000 +0100 ++++ ./arm_config.mk 2007-04-23 18:07:47.000000000 +0200 +@@ -21,4 +21,6 @@ + # MA 02111-1307 USA + # + ++#PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 -msoft-float ++PLATFORM_CPPFLAGS += -march=armv4t -mtune=arm920t + PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ +diff -Nurp ../u-boot-1.1.6/board/sarge/config.mk ./board/sarge/config.mk +--- ../u-boot-1.1.6/board/sarge/config.mk 1970-01-01 01:00:00.000000000 +0100 ++++ ./board/sarge/config.mk 2007-03-21 00:31:33.000000000 +0100 +@@ -0,0 +1 @@ ++TEXT_BASE = 0x21F00000 +diff -Nurp ../u-boot-1.1.6/board/sarge/flash.c ./board/sarge/flash.c +--- ../u-boot-1.1.6/board/sarge/flash.c 1970-01-01 01:00:00.000000000 +0100 ++++ ./board/sarge/flash.c 2007-03-09 01:25:41.000000000 +0100 +@@ -0,0 +1,504 @@ ++/* ++ * (C) Copyright 2002 ++ * Lineo, Inc. ++ * Bernhard Kuhn ++ * ++ * (C) Copyright 2002 ++ * Sysgo Real-Time Solutions, GmbH ++ * Alex Zuepke ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include ++ ++ulong myflush(void); ++ ++ ++/* Flash Organization Structure */ ++typedef struct OrgDef ++{ ++ unsigned int sector_number; ++ unsigned int sector_size; ++} OrgDef; ++ ++ ++/* Flash Organizations */ ++OrgDef OrgAT49BV16x4[] = ++{ ++ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ ++ { 2, 32*1024 }, /* 2 * 32 kBytes sectors */ ++ { 30, 64*1024 }, /* 30 * 64 kBytes sectors */ ++}; ++ ++OrgDef OrgAT49BV16x4A[] = ++{ ++ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ ++ { 31, 64*1024 }, /* 31 * 64 kBytes sectors */ ++}; ++ ++OrgDef OrgAT49BV6416[] = ++{ ++ { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ ++ { 127, 64*1024 }, /* 127 * 64 kBytes sectors */ ++}; ++ ++flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; ++ ++/* AT49BV1614A Codes */ ++#define FLASH_CODE1 0xAA ++#define FLASH_CODE2 0x55 ++#define ID_IN_CODE 0x90 ++#define ID_OUT_CODE 0xF0 ++ ++ ++#define CMD_READ_ARRAY 0x00F0 ++#define CMD_UNLOCK1 0x00AA ++#define CMD_UNLOCK2 0x0055 ++#define CMD_ERASE_SETUP 0x0080 ++#define CMD_ERASE_CONFIRM 0x0030 ++#define CMD_PROGRAM 0x00A0 ++#define CMD_UNLOCK_BYPASS 0x0020 ++#define CMD_SECTOR_UNLOCK 0x0070 ++ ++#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1))) ++#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1))) ++ ++#define BIT_ERASE_DONE 0x0080 ++#define BIT_RDY_MASK 0x0080 ++#define BIT_PROGRAM_ERROR 0x0020 ++#define BIT_TIMEOUT 0x80000000 /* our flag */ ++ ++#define READY 1 ++#define ERR 2 ++#define TMO 4 ++ ++/*----------------------------------------------------------------------- ++ */ ++void flash_identification (flash_info_t * info) ++{ ++ volatile u16 manuf_code, device_code, add_device_code; ++ ++ MEM_FLASH_ADDR1 = FLASH_CODE1; ++ MEM_FLASH_ADDR2 = FLASH_CODE2; ++ MEM_FLASH_ADDR1 = ID_IN_CODE; ++ ++ manuf_code = *(volatile u16 *) CFG_FLASH_BASE; ++ device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2); ++ add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1)); ++ ++ MEM_FLASH_ADDR1 = FLASH_CODE1; ++ MEM_FLASH_ADDR2 = FLASH_CODE2; ++ MEM_FLASH_ADDR1 = ID_OUT_CODE; ++ ++ /* Vendor type */ ++ info->flash_id = ATM_MANUFACT & FLASH_VENDMASK; ++ printf ("Atmel: "); ++ ++ if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) { ++ ++ if ((add_device_code & FLASH_TYPEMASK) == ++ (ATM_ID_BV1614A & FLASH_TYPEMASK)) { ++ info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK; ++ printf ("AT49BV1614A (16Mbit)\n"); ++ } else { /* AT49BV1614 Flash */ ++ info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK; ++ printf ("AT49BV1614 (16Mbit)\n"); ++ } ++ ++ } else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) { ++ info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK; ++ printf ("AT49BV6416 (64Mbit)\n"); ++ } ++} ++ ++ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks) ++{ ++ int i, nb_sectors = 0; ++ ++ for (i=0; istart[sector]); ++ ++ MEM_FLASH_ADDR1 = CMD_UNLOCK1; ++ *addr = CMD_SECTOR_UNLOCK; ++} ++ ++ ++ulong flash_init (void) ++{ ++ int i, j, k; ++ unsigned int flash_nb_blocks, sector; ++ unsigned int start_address; ++ OrgDef *pOrgDef; ++ ++ ulong size = 0; ++ ++ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { ++ ulong flashbase = 0; ++ ++ flash_identification (&flash_info[i]); ++ ++ if ((flash_info[i].flash_id & FLASH_TYPEMASK) == ++ (ATM_ID_BV1614 & FLASH_TYPEMASK)) { ++ ++ pOrgDef = OrgAT49BV16x4; ++ flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef); ++ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == ++ (ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A Flash */ ++ ++ pOrgDef = OrgAT49BV16x4A; ++ flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef); ++ } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == ++ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */ ++ ++ pOrgDef = OrgAT49BV6416; ++ flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef); ++ } else { ++ flash_nb_blocks = 0; ++ pOrgDef = OrgAT49BV16x4; ++ } ++ ++ flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks); ++ memset (flash_info[i].protect, 0, flash_info[i].sector_count); ++ ++ if (i == 0) ++ flashbase = PHYS_FLASH_1; ++ else ++ panic ("configured too many flash banks!\n"); ++ ++ sector = 0; ++ start_address = flashbase; ++ flash_info[i].size = 0; ++ ++ for (j = 0; j < flash_nb_blocks; j++) { ++ for (k = 0; k < pOrgDef[j].sector_number; k++) { ++ flash_info[i].start[sector++] = start_address; ++ start_address += pOrgDef[j].sector_size; ++ flash_info[i].size += pOrgDef[j].sector_size; ++ } ++ } ++ ++ size += flash_info[i].size; ++ ++ if ((flash_info[i].flash_id & FLASH_TYPEMASK) == ++ (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */ ++ ++ /* Unlock all sectors at reset */ ++ for (j=0; jflash_id & FLASH_VENDMASK) { ++ case (ATM_MANUFACT & FLASH_VENDMASK): ++ printf ("Atmel: "); ++ break; ++ default: ++ printf ("Unknown Vendor "); ++ break; ++ } ++ ++ switch (info->flash_id & FLASH_TYPEMASK) { ++ case (ATM_ID_BV1614 & FLASH_TYPEMASK): ++ printf ("AT49BV1614 (16Mbit)\n"); ++ break; ++ case (ATM_ID_BV1614A & FLASH_TYPEMASK): ++ printf ("AT49BV1614A (16Mbit)\n"); ++ break; ++ case (ATM_ID_BV6416 & FLASH_TYPEMASK): ++ printf ("AT49BV6416 (64Mbit)\n"); ++ break; ++ default: ++ printf ("Unknown Chip Type\n"); ++ return; ++ } ++ ++ printf (" Size: %ld MB in %d Sectors\n", ++ info->size >> 20, info->sector_count); ++ ++ printf (" Sector Start Addresses:"); ++ for (i = 0; i < info->sector_count; i++) { ++ if ((i % 5) == 0) { ++ printf ("\n "); ++ } ++ printf (" %08lX%s", info->start[i], ++ info->protect[i] ? " (RO)" : " "); ++ } ++ printf ("\n"); ++} ++ ++/*----------------------------------------------------------------------- ++ */ ++ ++int flash_erase (flash_info_t * info, int s_first, int s_last) ++{ ++ ulong result; ++ int iflag, cflag, prot, sect; ++ int rc = ERR_OK; ++ int chip1; ++ ++ /* first look for protection bits */ ++ ++ if (info->flash_id == FLASH_UNKNOWN) ++ return ERR_UNKNOWN_FLASH_TYPE; ++ ++ if ((s_first < 0) || (s_first > s_last)) { ++ return ERR_INVAL; ++ } ++ ++ if ((info->flash_id & FLASH_VENDMASK) != ++ (ATM_MANUFACT & FLASH_VENDMASK)) { ++ return ERR_UNKNOWN_FLASH_VENDOR; ++ } ++ ++ prot = 0; ++ for (sect = s_first; sect <= s_last; ++sect) { ++ if (info->protect[sect]) { ++ prot++; ++ } ++ } ++ if (prot) ++ return ERR_PROTECTED; ++ ++ /* ++ * Disable interrupts which might cause a timeout ++ * here. Remember that our exception vectors are ++ * at address 0 in the flash, and we don't want a ++ * (ticker) exception to happen while the flash ++ * chip is in programming mode. ++ */ ++ cflag = icache_status (); ++ icache_disable (); ++ iflag = disable_interrupts (); ++ ++ /* Start erase on unprotected sectors */ ++ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { ++ printf ("Erasing sector %2d ... ", sect); ++ ++ /* arm simple, non interrupt dependent timer */ ++ reset_timer_masked (); ++ ++ if (info->protect[sect] == 0) { /* not protected */ ++ volatile u16 *addr = (volatile u16 *) (info->start[sect]); ++ ++ MEM_FLASH_ADDR1 = CMD_UNLOCK1; ++ MEM_FLASH_ADDR2 = CMD_UNLOCK2; ++ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; ++ ++ MEM_FLASH_ADDR1 = CMD_UNLOCK1; ++ MEM_FLASH_ADDR2 = CMD_UNLOCK2; ++ *addr = CMD_ERASE_CONFIRM; ++ ++ /* wait until flash is ready */ ++ chip1 = 0; ++ ++ do { ++ result = *addr; ++ ++ /* check timeout */ ++ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { ++ MEM_FLASH_ADDR1 = CMD_READ_ARRAY; ++ chip1 = TMO; ++ break; ++ } ++ ++ if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) ++ chip1 = READY; ++ ++ } while (!chip1); ++ ++ MEM_FLASH_ADDR1 = CMD_READ_ARRAY; ++ ++ if (chip1 == ERR) { ++ rc = ERR_PROG_ERROR; ++ goto outahere; ++ } ++ if (chip1 == TMO) { ++ rc = ERR_TIMOUT; ++ goto outahere; ++ } ++ ++ printf ("ok.\n"); ++ } else { /* it was protected */ ++ printf ("protected!\n"); ++ } ++ } ++ ++ if (ctrlc ()) ++ printf ("User Interrupt!\n"); ++ ++outahere: ++ /* allow flash to settle - wait 10 ms */ ++ udelay_masked (10000); ++ ++ if (iflag) ++ enable_interrupts (); ++ ++ if (cflag) ++ icache_enable (); ++ ++ return rc; ++} ++ ++/*----------------------------------------------------------------------- ++ * Copy memory to flash ++ */ ++ ++volatile static int write_word (flash_info_t * info, ulong dest, ++ ulong data) ++{ ++ volatile u16 *addr = (volatile u16 *) dest; ++ ulong result; ++ int rc = ERR_OK; ++ int cflag, iflag; ++ int chip1; ++ ++ /* ++ * Check if Flash is (sufficiently) erased ++ */ ++ result = *addr; ++ if ((result & data) != data) ++ return ERR_NOT_ERASED; ++ ++ ++ /* ++ * Disable interrupts which might cause a timeout ++ * here. Remember that our exception vectors are ++ * at address 0 in the flash, and we don't want a ++ * (ticker) exception to happen while the flash ++ * chip is in programming mode. ++ */ ++ cflag = icache_status (); ++ icache_disable (); ++ iflag = disable_interrupts (); ++ ++ MEM_FLASH_ADDR1 = CMD_UNLOCK1; ++ MEM_FLASH_ADDR2 = CMD_UNLOCK2; ++ MEM_FLASH_ADDR1 = CMD_PROGRAM; ++ *addr = data; ++ ++ /* arm simple, non interrupt dependent timer */ ++ reset_timer_masked (); ++ ++ /* wait until flash is ready */ ++ chip1 = 0; ++ do { ++ result = *addr; ++ ++ /* check timeout */ ++ if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { ++ chip1 = ERR | TMO; ++ break; ++ } ++ if (!chip1 && ((result & 0x80) == (data & 0x80))) ++ chip1 = READY; ++ ++ } while (!chip1); ++ ++ *addr = CMD_READ_ARRAY; ++ ++ if (chip1 == ERR || *addr != data) ++ rc = ERR_PROG_ERROR; ++ ++ if (iflag) ++ enable_interrupts (); ++ ++ if (cflag) ++ icache_enable (); ++ ++ return rc; ++} ++ ++/*----------------------------------------------------------------------- ++ * Copy memory to flash. ++ */ ++ ++int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) ++{ ++ ulong wp, data; ++ int rc; ++ ++ if (addr & 1) { ++ printf ("unaligned destination not supported\n"); ++ return ERR_ALIGN; ++ }; ++ ++ if ((int) src & 1) { ++ printf ("unaligned source not supported\n"); ++ return ERR_ALIGN; ++ }; ++ ++ wp = addr; ++ ++ while (cnt >= 2) { ++ data = *((volatile u16 *) src); ++ if ((rc = write_word (info, wp, data)) != 0) { ++ return (rc); ++ } ++ src += 2; ++ wp += 2; ++ cnt -= 2; ++ } ++ ++ if (cnt == 1) { ++ data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << ++ 8); ++ if ((rc = write_word (info, wp, data)) != 0) { ++ return (rc); ++ } ++ src += 1; ++ wp += 1; ++ cnt -= 1; ++ }; ++ ++ return ERR_OK; ++} +diff -Nurp ../u-boot-1.1.6/board/sarge/Makefile ./board/sarge/Makefile +--- ../u-boot-1.1.6/board/sarge/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ ./board/sarge/Makefile 2007-03-14 01:05:48.000000000 +0100 +@@ -0,0 +1,46 @@ ++# ++# (C) Copyright 2007 ++# Grzegorz Rajtar, mcgregor@blackmesaeast.com.pl. ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++ ++include $(TOPDIR)/config.mk ++ ++LIB = lib$(BOARD).a ++ ++OBJS := sarge_board.o at45.o flash.o ++ ++$(LIB): $(OBJS) $(SOBJS) ++ $(AR) crv $@ $(OBJS) $(SOBJS) ++ ++clean: ++ rm -f $(SOBJS) $(OBJS) ++ ++distclean: clean ++ rm -f $(LIB) core *.bak .depend ++ ++######################################################################### ++ ++.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) ++ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ ++ ++-include .depend ++ ++######################################################################### +diff -Nurp ../u-boot-1.1.6/board/sarge/sarge_board.c ./board/sarge/sarge_board.c +--- ../u-boot-1.1.6/board/sarge/sarge_board.c 1970-01-01 01:00:00.000000000 +0100 ++++ ./board/sarge/sarge_board.c 2007-05-11 23:45:25.000000000 +0200 +@@ -0,0 +1,363 @@ ++/* ++ * (C) Copyright 2007 ++ * Grzegorz Rajtar ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++/* ------------------------------------------------------------------------- */ ++/* ++ * Miscelaneous platform dependent initialisations ++ */ ++ ++void lowlevel_init(void) ++{ ++} ++/* ------------------------------------------------------------------------- */ ++ ++void cs_init(int enable) ++{ ++ unsigned long flag = ++ AT91C_PIO_PA0 | AT91C_PIO_PA1 | AT91C_PIO_PA2 | ++ AT91C_PIO_PA4 | AT91C_PIO_PA5 | AT91C_PIO_PA6; ++ //MISO, MOSI, SPCK, NPCS1, NPCS2, NPCS3; ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_ASR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PER = flag; ++} ++ ++void mac_init(int enable) ++{ ++ unsigned long flag = ++ // ETXCK, ETXEN, ETX0, ETX1, EXRS, ++ // ERX0, ERX1, ERXER, EMDC, EMDIO ++ AT91C_PIO_PA7 | AT91C_PIO_PA8 | AT91C_PIO_PA9 | AT91C_PIO_PA10 | ++ AT91C_PIO_PA11 | AT91C_PIO_PA12 | AT91C_PIO_PA13 | AT91C_PIO_PA14 | ++ AT91C_PIO_PA13 | AT91C_PIO_PA16; ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_ASR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PER = flag; ++ ++ //ERXCK, ECOL, ERXDV, ERX3, ERX2, ETXER, ETX3, ETX2 ++ flag = AT91C_PIO_PB19 | AT91C_PIO_PB18 | AT91C_PIO_PB17 | AT91C_PIO_PB16 | ++ AT91C_PIO_PB15 | AT91C_PIO_PB14 | AT91C_PIO_PB13 | AT91C_PIO_PB12; ++ ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_BSR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PER = flag; ++ // EMDINT - ++ flag = AT91C_PIO_PB1; ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PER = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_IER = flag; ++ } ++ else ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_IDR = flag; ++ } ++} ++ ++void peripheral_init(int enable) ++{ ++ unsigned long flag = ++ // A - TXD0, RXD0, SCK0, RXD2, TXD2, I2C_SCL. I2C_SDA ++ AT91C_PIO_PA17 | AT91C_PIO_PA18 | AT91C_PIO_PA19 | ++ AT91C_PIO_PA20 | AT91C_PIO_PA21 | AT91C_PIO_PA22 | ++ AT91C_PIO_PA23 | AT91C_PA25_TWD | AT91C_PA26_TWCK; ++ ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_ASR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PER = flag; ++ ++ //B - PCK1 ++ flag = AT91C_PIO_PA24; ++ ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_BSR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PER = flag; ++ ++ ++ // PA20, PA21 - I/O ++ flag = AT91C_PIO_PA20 | AT91C_PIO_PA21; ++ if (enable) ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PER = flag; ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PDR = flag; ++ ++ // A - PCK0, RXD1, TXD1,RF1,RK1, RD1, TD1, TK1, TF1 ++ flag = AT91C_PIO_PB27 | AT91C_PIO_PB21 | AT91C_PIO_PB20 | ++ AT91C_PIO_PB11 | AT91C_PIO_PB10 | AT91C_PIO_PB9 | ++ AT91C_PIO_PB8 | AT91C_PIO_PB7 | AT91C_PIO_PB6; ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_ASR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PER = flag; ++ // I/O PB26 - PB22 ++ flag = AT91C_PIO_PB22 | AT91C_PIO_PB23 | AT91C_PIO_PB24 | ++ AT91C_PIO_PB25 | AT91C_PIO_PB26; ++ if (enable) ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PER = flag; ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PDR = flag; ++} ++ ++void mmc_init(int enable) ++{ ++ // MCCK, MCCDA, MCDA0 ++ unsigned long flag = ++ AT91C_PIO_PA27 | AT91C_PIO_PA28 | AT91C_PIO_PA29; ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_ASR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_PER = flag; ++ // MCDA3, MCDA2, MCDA1 ++ flag = AT91C_PIO_PB5 | AT91C_PIO_PB4 | AT91C_PIO_PB3; ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_BSR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PER = flag; ++ //MCWP, MCCD ++ flag = AT91C_PIO_PB2 | AT91C_PIO_PB0; ++ ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PER = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_IER = AT91C_PIO_PB0; ++ } ++ else ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_IDR = AT91C_PIO_PB0; ++ } ++} ++ ++void irq_init(int enable) ++{ ++ // IRQ, FIQ ++ unsigned long flag = ++ AT91C_PIO_PB29 | AT91C_PIO_PB28; ++ if (enable) ++ { ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PDR = flag; ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_ASR = flag; ++ } ++ else ++ ((AT91PS_PIO) AT91C_BASE_PIOB)->PIO_PER = flag; ++} ++ ++int board_init (void) ++{ ++ DECLARE_GLOBAL_DATA_PTR; ++ long flag; ++ ++ /* Enable Ctrlc */ ++ console_init_f (); ++ ++ /* sarge board specific */ ++ /* ++ cs_init(1); ++ mac_init(1); ++ peripheral_init(1); ++ mmc_init(1); ++ irq_init(1); ++ */ ++ ++ /* PIOB and PIOA clock enabling */ ++ ++ *AT91C_PMC_PCER = 1 << AT91C_ID_PIOA; ++ *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB; ++ ++ ++ //miiphy_init(); ++ /* memory and cpu-speed are setup before relocation */ ++ /* so we do _nothing_ here */ ++ ++ /* Correct IRDA resistor problem */ ++ /* Set PA23_TXD in Output */ ++ ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2; ++ ++ /* arch number of AT91RM9200-Board */ ++ gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200; ++ ++ /* adress of boot parameters */ ++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; ++ ++ return 0; ++} ++ ++int dram_init (void) ++{ ++ DECLARE_GLOBAL_DATA_PTR; ++ ++ gd->bd->bi_dram[0].start = PHYS_SDRAM; ++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; ++ return 0; ++} ++ ++ ++int sarge_before_linux(void) ++{ ++ DECLARE_GLOBAL_DATA_PTR; ++ AT91PS_EMAC mac = AT91C_BASE_EMAC; ++ char* isolate_str = getenv("phy_isolate"); ++ if (strlen(isolate_str) && strcmp(isolate_str, "yes") == 0) ++ { ++ printf("\nisolating PHY\n"); ++ eth_init(gd->bd); ++ ste100p_DisableInterrupts(mac); ++ ste100p_Isolate(mac); ++ } ++} ++ ++#ifdef CONFIG_DRIVER_ETHER ++#if (CONFIG_COMMANDS & CFG_CMD_NET) ++ ++/* ++ * Name: ++ * at91rm9200_GetPhyInterface ++ * Description: ++ * Initialise the interface functions to the PHY ++ * Arguments: ++ * None ++ * Return value: ++ * None ++ */ ++void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) ++{ ++#ifdef DM9161_ETH ++ p_phyops->Init = dm9161_InitPhy; ++ p_phyops->IsPhyConnected = dm9161_IsPhyConnected; ++ p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed; ++ p_phyops->AutoNegotiate = dm9161_AutoNegotiate; ++#endif ++ ++#ifdef RTL8201BL_ETH ++ p_phyops->Init = rtl8201bl_InitPhy; ++ p_phyops->IsPhyConnected = rtl8201bl_IsPhyConnected; ++ p_phyops->GetLinkSpeed = rtl8201bl_GetLinkSpeed; ++ p_phyops->AutoNegotiate = rtl8201bl_AutoNegotiate; ++ ++#endif ++#ifdef STE100P_ETH ++ p_phyops->Init = ste100p_InitPhy; ++ p_phyops->IsPhyConnected = ste100p_IsPhyConnected; ++ p_phyops->GetLinkSpeed = ste100p_GetLinkSpeed; ++ p_phyops->AutoNegotiate = ste100p_AutoNegotiate; ++ p_phyops->Isolate = ste100p_Isolate; ++ ++#endif ++ ++} ++ ++#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ ++#endif /* CONFIG_DRIVER_ETHER */ ++ ++/* ++ * Disk On Chip (NAND) Millenium initialization. ++ * The NAND lives in the CS2* space ++ */ ++#if (CONFIG_COMMANDS & CFG_CMD_NAND) ++extern ulong nand_probe (ulong physadr); ++ ++#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */ ++void nand_init (void) ++{ ++ /* Setup Smart Media, fitst enable the address range of CS3 */ ++ *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia; ++ /* set the bus interface characteristics based on ++ tDS Data Set up Time 30 - ns ++ tDH Data Hold Time 20 - ns ++ tALS ALE Set up Time 20 - ns ++ 16ns at 60 MHz ~= 3 */ ++/*memory mapping structures */ ++#define SM_ID_RWH (5 << 28) ++#define SM_RWH (1 << 28) ++#define SM_RWS (0 << 24) ++#define SM_TDF (1 << 8) ++#define SM_NWS (3) ++ AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS | ++ AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 | ++ SM_TDF | AT91C_SMC2_WSEN | SM_NWS); ++ ++ /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */ ++ *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | ++ AT91C_PC3_BFBAA_SMWE; ++ *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | ++ AT91C_PC3_BFBAA_SMWE; ++ ++ /* Configure PC2 as input (signal READY of the SmartMedia) */ ++ *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */ ++ *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */ ++ ++ /* Configure PB1 as input (signal Card Detect of the SmartMedia) */ ++ *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */ ++ *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */ ++ ++ /* PIOB and PIOC clock enabling */ ++ *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB; ++ *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC; ++ ++ if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1) ++ printf (" No SmartMedia card inserted\n"); ++#ifdef DEBUG ++ printf (" SmartMedia card inserted\n"); ++ ++ printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE); ++#endif ++ printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20); ++} ++#endif +diff -Nurp ../u-boot-1.1.6/board/sarge/u-boot.lds ./board/sarge/u-boot.lds +--- ../u-boot-1.1.6/board/sarge/u-boot.lds 1970-01-01 01:00:00.000000000 +0100 ++++ ./board/sarge/u-boot.lds 2007-03-09 01:25:41.000000000 +0100 +@@ -0,0 +1,57 @@ ++/* ++ * (C) Copyright 2002 ++ * Gary Jennejohn, DENX Software Engineering, ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") ++/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ ++OUTPUT_ARCH(arm) ++ENTRY(_start) ++SECTIONS ++{ ++ . = 0x00000000; ++ ++ . = ALIGN(4); ++ .text : ++ { ++ cpu/arm920t/start.o (.text) ++ *(.text) ++ } ++ ++ . = ALIGN(4); ++ .rodata : { *(.rodata) } ++ ++ . = ALIGN(4); ++ .data : { *(.data) } ++ ++ . = ALIGN(4); ++ .got : { *(.got) } ++ ++ . = .; ++ __u_boot_cmd_start = .; ++ .u_boot_cmd : { *(.u_boot_cmd) } ++ __u_boot_cmd_end = .; ++ ++ . = ALIGN(4); ++ __bss_start = .; ++ .bss : { *(.bss) } ++ _end = .; ++} +diff -Nurp ../u-boot-1.1.6/common/cmd_bootm.c ./common/cmd_bootm.c +--- ../u-boot-1.1.6/common/cmd_bootm.c 2006-11-02 15:15:01.000000000 +0100 ++++ ./common/cmd_bootm.c 2007-03-27 02:55:11.000000000 +0200 +@@ -79,7 +79,10 @@ DECLARE_GLOBAL_DATA_PTR; + # define CHUNKSZ (64 * 1024) + #endif + +-int gunzip (void *, int, unsigned char *, unsigned long *); ++ ++//int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp); ++int gunzip(unsigned char *inbuf, unsigned long *insize, unsigned char *outbuf, unsigned long *outsize); ++ + + static void *zalloc(void *, unsigned, unsigned); + static void zfree(void *, void *, unsigned); +@@ -94,6 +97,12 @@ extern flash_info_t flash_info[]; /* inf + static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + #endif + ++ ++#ifdef CONFIG_HAS_DATAFLASH ++extern int AT91F_DataflashInit(void); ++#endif ++ ++ + static void print_type (image_header_t *hdr); + + #ifdef __I386__ +@@ -176,8 +185,9 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag + + /* Copy header so we can blank CRC field for re-calculation */ + #ifdef CONFIG_HAS_DATAFLASH ++ AT91F_DataflashInit(); + if (addr_dataflash(addr)){ +- read_dataflash(addr, sizeof(image_header_t), (char *)&header); ++ read_dataflash(addr, sizeof(image_header_t), (char *)&header); + } else + #endif + memmove (&header, (char *)addr, sizeof(image_header_t)); +@@ -194,7 +204,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag + } else + #endif /* __I386__ */ + { +- puts ("Bad Magic Number\n"); ++ printf ("Bad Magic Number, got 0x%x, should be: 0x%x\n", hdr->ih_magic, IH_MAGIC); + SHOW_BOOT_PROGRESS (-1); + return 1; + } +@@ -216,9 +226,14 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag + + #ifdef CONFIG_HAS_DATAFLASH + if (addr_dataflash(addr)){ +- len = ntohl(hdr->ih_size) + sizeof(image_header_t); +- read_dataflash(addr, len, (char *)CFG_LOAD_ADDR); +- addr = CFG_LOAD_ADDR; ++ len = ntohl(hdr->ih_size) + sizeof(image_header_t); ++ char* env_loadaddr = getenv("loadaddr"); ++ unsigned long load_addr = CFG_LOAD_ADDR; ++ if (env_loadaddr) ++ load_addr = simple_strtoul(env_loadaddr, NULL, 16); ++ read_dataflash(addr, len, (char *)load_addr); ++ addr = load_addr; ++ + } + #endif + +@@ -227,6 +242,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag + print_image_hdr ((image_header_t *)addr); + + data = addr + sizeof(image_header_t); ++ + len = ntohl(hdr->ih_size); + + if (verify) { +@@ -343,12 +359,24 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag + break; + case IH_COMP_GZIP: + printf (" Uncompressing %s ... ", name); +- if (gunzip ((void *)ntohl(hdr->ih_load), unc_len, +- (uchar *)data, &len) != 0) { +- puts ("GUNZIP ERROR - must RESET board to recover\n"); ++ int res; ++ if ((res = gunzip ((uchar *)data, &len, (void *)ntohl(hdr->ih_load), &unc_len ++ )) != 0) { ++ printf ("GUNZIP ERROR (code %d)- must RESET board to recover\n", res); + SHOW_BOOT_PROGRESS (-6); ++ + do_reset (cmdtp, flag, argc, argv); + } ++ //addr = ntohl(hdr->ih_load); ++ //old gunzip switched parameters list ++ ++/* if ((res = gunzip ((void *)ntohl(hdr->ih_load), unc_len, ++ (uchar *)data, &len)) != 0) { ++ printf ("GUNZIP ERROR (code %d)- must RESET board to recover\n", res); ++ SHOW_BOOT_PROGRESS (-6); ++ do_reset (cmdtp, flag, argc, argv); ++ } */ ++ + break; + #ifdef CONFIG_BZIP2 + case IH_COMP_BZIP2: +@@ -413,7 +441,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag + default: /* handled by (original) Linux case */ + case IH_OS_LINUX: + #ifdef CONFIG_SILENT_CONSOLE +- fixup_silent_linux(); ++// fixup_silent_linux(); + #endif + do_bootm_linux (cmdtp, flag, argc, argv, + addr, len_ptr, verify); +@@ -1429,12 +1457,13 @@ static void zfree(void *x, void *addr, u + + #define DEFLATED 8 + ++/* + int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) + { + z_stream s; + int r, i, flags; + +- /* skip header */ ++ // skip header + i = 10; + flags = src[3]; + if (src[2] != DEFLATED || (flags & RESERVED) != 0) { +@@ -1462,9 +1491,10 @@ int gunzip(void *dst, int dstlen, unsign + s.outcb = (cb_func)WATCHDOG_RESET; + #else + s.outcb = Z_NULL; +-#endif /* CONFIG_HW_WATCHDOG */ +- ++#endif // CONFIG_HW_WATCHDOG // ++ + r = inflateInit2(&s, -MAX_WBITS); ++ // gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) + if (r != Z_OK) { + printf ("Error: inflateInit2() returned %d\n", r); + return (-1); +@@ -1480,9 +1510,8 @@ int gunzip(void *dst, int dstlen, unsign + } + *lenp = s.next_out - (unsigned char *) dst; + inflateEnd(&s); +- + return (0); +-} ++}*/ + + #ifdef CONFIG_BZIP2 + void bz_internal_error(int errcode) +diff -Nurp ../u-boot-1.1.6/cpu/arm920t/at91rm9200/Makefile ./cpu/arm920t/at91rm9200/Makefile +--- ../u-boot-1.1.6/cpu/arm920t/at91rm9200/Makefile 2006-11-02 15:15:01.000000000 +0100 ++++ ./cpu/arm920t/at91rm9200/Makefile 2007-05-13 20:19:07.000000000 +0200 +@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk + LIB = $(obj)lib$(SOC).a + + COBJS = bcm5221.o dm9161.o ether.o i2c.o interrupts.o \ +- lxt972.o serial.o usb_ohci.o ++ lxt972.o serial.o usb_ohci.o ste100p.o + SOBJS = lowlevel_init.o + + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +diff -Nurp ../u-boot-1.1.6/cpu/arm920t/at91rm9200/ste100p.c ./cpu/arm920t/at91rm9200/ste100p.c +--- ../u-boot-1.1.6/cpu/arm920t/at91rm9200/ste100p.c 1970-01-01 01:00:00.000000000 +0100 ++++ ./cpu/arm920t/at91rm9200/ste100p.c 2007-05-10 02:02:34.000000000 +0200 +@@ -0,0 +1,517 @@ ++/* ++ * (C) Copyright 2007 ++ * Author : Grzegorz Rajtar (McGregor) (mcgregor@blackmesaeast.com.pl) ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_DRIVER_ETHER ++ ++#if (CONFIG_COMMANDS & CFG_CMD_NET) ++ ++void PhyReset(AT91PS_EMAC p_mac) ++{ ++ static long init_wait = 0; ++ unsigned short IntValue; ++ unsigned Status; ++ ++#ifdef DEBUG_ETHER ++ printf("ste100p PhyReset \n"); ++#endif ++ at91rm9200_EmacEnableMDIO (p_mac); ++ ++ ++ // first software reset the STE100P ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &IntValue); ++ udelay(1000); ++ IntValue |= STE100P_XCR_RESET; ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &IntValue); ++ udelay(10000); ++ ++ while (1) ++ { ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &IntValue); ++ if ((IntValue & STE100P_XCR_RESET) != STE100P_XCR_RESET) ++ break; ++ udelay(1000); ++ } ++ ++ ++ IntValue = STE100P_ANA_FC | STE100P_ANA_TXF | STE100P_ANA_TXH | ++ STE100P_ANA_10F | STE100P_ANA_10H; ++ ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_ANA_REG, &IntValue); ++ ++ //default configuration ++#ifdef CONFIG_STE100P_OVERRIDE_HARDWARE ++ IntValue = STE100P_100CTR_ENDCR | STE100P_100CTR_ENRZI | STE100P_100CTR_EN4B5B; ++ IntValue &= ~(STE100P_100CTR_DISRER); ++ IntValue &= ~(STE100P_100CTR_ISOTX); ++ IntValue &= ~(STE100P_100CTR_DISMLT); ++ IntValue &= ~(STE100P_100CTR_DISCRM); ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_100CTR_REG, &IntValue); ++ ++#endif //CONFIG_STE100P_OVERRIDE_HARDWARE ++ ++ /* Disable PHY Interrupts */ ++ ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XIE_REG, &IntValue); ++ udelay(10000); ++ /* disable all interrypts from SE100P */ ++ ++ IntValue &= ~(STE100P_XIE_ANCE | STE100P_XIE_RFE | STE100P_XIE_LDE | ++ STE100P_XIE_ANAE | STE100P_XIE_PDFE | STE100P_XIE_ANPE | STE100P_XIE_REFE); ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_XIE_REG, &IntValue); ++ udelay(10000); ++ ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &IntValue); ++ ++ IntValue |= STE100P_XCR_AN | STE100P_XCR_RSTRT_AN; ++ at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &IntValue); ++ ++ at91rm9200_EmacDisableMDIO (p_mac); ++} ++ ++/* ++ * Name: ++ * ste100p_Isolate ++ * Description: ++ * Isolates PHY ++ * Arguments: ++ * p_mac - pointer to AT91S_EMAC struct ++ * Return value: ++ * TRUE - if id isolated successfuly ++ * FALSE- if error ++ */ ++ ++unsigned int ste100p_Isolate (AT91PS_EMAC p_mac) ++{ ++ unsigned int result = FALSE; ++ unsigned short IntValue; ++ ++ at91rm9200_EmacEnableMDIO (p_mac); ++ udelay(10000); ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &IntValue); ++ ++ IntValue |= STE100P_XCR_ISOLATE ;//| STE100P_XCR_PWRDN; ++ //IntValue &= ~STE100P_XCR_RESET; ++ //IntValue &= ~STE100P_XCR_AN; ++ ++ result = at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &IntValue); ++ udelay(10000); ++ //Isolate is latch so we need to read once more the register ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &IntValue); ++ at91rm9200_EmacDisableMDIO (p_mac); ++ ++#ifdef DEBUG_ETHER ++ printf("ste100p_Isolate [%d]\n", result); ++#endif ++ return result; ++} ++ ++ ++/* ++ * Name: ++ * ste100p_IsPhyConnected ++ * Description: ++ * Reads the 2 PHY ID registers ++ * Arguments: ++ * p_mac - pointer to AT91S_EMAC struct ++ * Return value: ++ * TRUE - if id read successfully ++ * FALSE- if error ++ */ ++unsigned int ste100p_IsPhyConnected (AT91PS_EMAC p_mac) ++{ ++ unsigned short Id1, Id2; ++ unsigned int result = FALSE; ++ ++ at91rm9200_EmacEnableMDIO (p_mac); ++ udelay(10000); ++ do ++ { ++ Id1 = Id2 = 0; ++ udelay(10000); ++ at91rm9200_EmacReadPhy (p_mac, STE100P_PID1_REG, &Id1); ++ ++ udelay(10000); ++ at91rm9200_EmacReadPhy (p_mac, STE100P_PID2_REG, &Id2); ++ ++ Id2 = (Id2 & STE100P_PID2_PHYID_MASK) >> 6; ++ ++ if ((Id1 == STE100P_PID1_PHYID_VAL) && (Id2 == STE100P_PID2_PHYID_VAL)) ++ result = TRUE; ++ } while (!result); ++ ++ at91rm9200_EmacDisableMDIO (p_mac); ++#ifdef DEBUG_ETHER ++ printf ("ste100p id1[0x%02x] id2[0x%02x]\r\n", Id1, Id2); ++#endif ++ return result; ++} ++ ++/* ++ * Name: ++ * ste100p_GetLinkSpeed ++ * Description: ++ * Link parallel detection status of MAC is checked and set in the ++ * MAC configuration registers ++ * Arguments: ++ * p_mac - pointer to MAC ++ * Return value: ++ * TRUE - if link status set succesfully ++ * FALSE - if link status not set ++ */ ++UCHAR ste100p_GetLinkSpeed (AT91PS_EMAC p_mac) ++{ ++ unsigned short stat; ++ int result = 0; ++ ++ result = at91rm9200_EmacReadPhy (p_mac, STE100P_XSR_REG, &stat); ++ ++ if (!result) ++ return FALSE; ++ ++ if (!(stat & STE100P_XSR_LINK)) /* link status up? */ ++ { //last link failure is latched so reread STE100P_XSR_REG for new value ++ result = at91rm9200_EmacReadPhy (p_mac, STE100P_XSR_REG, &stat); ++ if (!result || !(stat & STE100P_XSR_LINK)) ++ return FALSE; ++ } ++ ++ if (stat & STE100P_XSR_100TX_FULL) { ++ /*set Emac for 100BaseTX and Full Duplex */ ++ p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; ++ return TRUE; ++ } ++ ++ if (stat & STE100P_XSR_100TX) { ++ /*set Emac for 100BaseTX and Half Duplex */ ++ p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ++ ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) ++ | AT91C_EMAC_SPD; ++ return TRUE; ++ } ++ ++ if (stat & STE100P_XSR_10T_FULL) { ++ /*set MII for 10BaseT and Full Duplex */ ++ p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ++ ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) ++ | AT91C_EMAC_FD; ++ return TRUE; ++ } ++ ++ if (stat & STE100P_XSR_10T) { ++ /*set MII for 10BaseT and Half Duplex */ ++ p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); ++ return TRUE; ++ } ++ ++ return FALSE; ++} ++ ++ ++/* ++ * Name: ++ * ste100p_Deisolate ++ * Description: ++ * deisolates PHY ++ * Arguments: ++ * p_mac - pointer to struct AT91S_EMAC ++ */ ++ ++void ste100p_Deisolate (AT91PS_EMAC p_mac) ++{ ++ unsigned short IntValue; ++ ++ IntValue = STE100P_XCR_SPEED | STE100P_XCR_AN | ++ STE100P_XCR_COLLEN; ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &IntValue); ++ ++ udelay(10000); ++ IntValue = STE100P_100CTR_EN4B5B | STE100P_100CTR_ENRZI | ++ STE100P_100CTR_ENDCR; ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_100CTR_REG, &IntValue); ++ udelay(10000); ++ ++ ++ if ((IntValue & STE100P_XCR_ISOLATE) == STE100P_XCR_ISOLATE) ++ { ++ IntValue &= ~STE100P_XCR_ISOLATE; ++ at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &IntValue); ++ udelay(10000); ++ //isolate is latch so read once more the register ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &IntValue); ++ udelay(10000); ++ } ++} ++ ++/* ++ * Name: ++ * ste100p_WaitForLink ++ * Description: ++ * waits for link with timeout ++ * Arguments: ++ * p_mac - pointer to struct AT91S_EMAC ++ * timeout - timeout in miliseconds ++ */ ++ ++UCHAR ste100p_WaitForLink (AT91PS_EMAC p_mac, unsigned long timeout) ++{ ++ unsigned long loop ; ++ unsigned short IntValue; ++ ++ loop = 0; ++ do ++ { ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XSR_REG, &IntValue); ++ if (IntValue & STE100P_XSR_LINK) ++ return TRUE; ++ ++ udelay(1000); ++ loop++; ++ if (loop > timeout) ++ break; ++ ++ } while (1); ++ ++ return FALSE; ++} ++ ++/* ++ * Name: ++ * ste100p_InitPhy ++ * Description: ++ * MAC starts checking its link by using parallel detection and ++ * Autonegotiation and the same is set in the MAC configuration registers ++ * Arguments: ++ * p_mac - pointer to struct AT91S_EMAC ++ * Return value: ++ * TRUE - if link status set succesfully ++ * FALSE - if link status not set ++ */ ++UCHAR ste100p_InitPhy (AT91PS_EMAC p_mac) ++{ ++ UCHAR ret = FALSE; ++ unsigned short IntValue; ++ int aneg_status; ++ unsigned long loop; ++ ++ PhyReset(p_mac); ++ ++ at91rm9200_EmacEnableMDIO (p_mac); ++ ++ ste100p_Deisolate(p_mac); ++ ++ at91rm9200_EmacDisableMDIO (p_mac); ++ ++ ++ ++#if 1 ++ at91rm9200_EmacEnableMDIO (p_mac); ++ ++ ste100p_WaitForLink(p_mac, 10000 /* timeout in ms */); ++ ++ ret = ste100p_GetLinkSpeed (p_mac); ++ ++ if (!ret) ++ { ++ ste100p_AutoNegotiate(p_mac, aneg_status); ++#ifdef DEBUG_ETHER ++ if (aneg_status) ++ { ++ printf("link speed autonegotiated\n"); ++ ret = ste100p_GetLinkSpeed (p_mac); ++ } ++ else ++ printf("auto-neogtiation failed\n"); ++#endif //DEBUG_ETHER ++ } ++ ++ /* Disable PHY Interrupts */ ++ ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XIE_REG, &IntValue); ++ udelay(1000); ++ /* disable all interrypts from SE100P */ ++ ++ IntValue &= ~(STE100P_XIE_ANCE | STE100P_XIE_RFE | STE100P_XIE_LDE | ++ STE100P_XIE_ANAE | STE100P_XIE_PDFE | STE100P_XIE_ANPE | STE100P_XIE_REFE); ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_XIE_REG, &IntValue); ++ udelay(10000); ++ ++ ++ ++ at91rm9200_EmacDisableMDIO (p_mac); ++ udelay(1000); ++#endif ++ ++#ifdef DEBUG_ETHER ++ printf("ste100p InitPhy ["); ++ if (ret) ++ printf("OK]\n"); ++ else ++ printf("FAILED]\n"); ++#endif //DEBUG_ETHER ++ return (ret); ++} ++ ++ ++/* ++ * Name: ++ * ste100p_AutoNegotiate ++ * Description: ++ * MAC Autonegotiates with the partner status of same is set in the ++ * MAC configuration registers ++ * Arguments: ++ * dev - pointer to struct net_device ++ * Return value: ++ * TRUE - if link status set successfully ++ * FALSE - if link status not set ++ */ ++UCHAR ste100p_AutoNegotiate (AT91PS_EMAC p_mac, int *status) ++{ ++ unsigned short value; ++ unsigned short PhyAnar; ++ unsigned short PhyAnalpar; ++#ifdef DEBUG_ETHER ++ printf("ste100p AutoNegotiate\n"); ++#endif //DEBUG_ETHER ++#if 1 ++ /* Set ste100p control register */ ++ if (!at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &value)) ++ return FALSE; ++ ++ value &= ~STE100P_XCR_AN; /* remove autonegotiation enable */ ++ value |= STE100P_XCR_ISOLATE; /* Electrically isolate PHY */ ++ if (!at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &value)) ++ return FALSE; ++ ++ if (!at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &value)) ++ return FALSE; ++ ++ ++ /* Set the Auto_negotiation Advertisement Register */ ++ /* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */ ++ PhyAnar = STE100P_ANA_NXTPG | STE100P_ANA_TXF | STE100P_ANA_TXH | ++ STE100P_ANA_10F | STE100P_ANA_10H | STE100P_ANA_SF; ++ if (!at91rm9200_EmacWritePhy (p_mac, STE100P_ANA_REG, &PhyAnar)) ++ return FALSE; ++ ++ /* Read the Control Register */ ++ if (!at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &value)) ++ return FALSE; ++ ++ value |= STE100P_XCR_SPEED | STE100P_XCR_AN | STE100P_XCR_FULL_DUP; ++ if (!at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &value)) ++ return FALSE; ++ ++ /* Restart Auto_negotiation */ ++ value |= STE100P_XCR_AN; ++ value &= ~STE100P_XCR_ISOLATE; ++ value |= STE100P_XCR_RSTRT_AN; ++ ++ if (!at91rm9200_EmacWritePhy (p_mac, STE100P_XCR_REG, &value)) ++ return FALSE; ++ udelay(10000); ++ if (!at91rm9200_EmacReadPhy (p_mac, STE100P_XCR_REG, &value)) ++ return FALSE; ++ ++ /*check AutoNegotiate complete */ ++ udelay (10000); ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XSR_REG, &value); ++ if (!(value & STE100P_XSR_AN_COMPLETE)) ++ return FALSE; ++ ++ /* Get the AutoNeg Link partner base page */ ++ if (!at91rm9200_EmacReadPhy (p_mac, STE100P_ANLP_REG, &PhyAnalpar)) ++ return FALSE; ++ ++ if ((PhyAnar & STE100P_ANA_TXF) && (PhyAnalpar & STE100P_ANLP_LPTXF)) { ++ /*set MII for 100BaseTX and Full Duplex */ ++ p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; ++ return TRUE; ++ } ++ ++ if ((PhyAnar & STE100P_ANA_10F) && (PhyAnalpar & STE100P_ANLP_LPTXH)) { ++ /*set MII for 10BaseT and Full Duplex */ ++ p_mac->EMAC_CFG = (p_mac->EMAC_CFG & ++ ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) ++ | AT91C_EMAC_FD; ++ return TRUE; ++ } ++#endif ++ return FALSE; ++} ++ ++/* ++ * Name: ++ * ste100p_DisableInterrupts ++ * Description: ++ * disables interrupts ++ * Arguments: ++ * p_mac - pointer to AT91S_EMAC struct ++ */ ++void ste100p_DisableInterrupts (AT91PS_EMAC p_mac) ++{ ++ ++ unsigned short IntValue; ++ unsigned int rep; ++ ++ rep = 0; ++ ++ at91rm9200_EmacEnableMDIO (p_mac); ++ ++ /* Disable PHY Interrupts */ ++ ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XIE_REG, &IntValue); ++ udelay(10000); ++ /* disable all interrypts from SE100P */ ++ ++ IntValue &= ~(STE100P_XIE_ANCE | STE100P_XIE_RFE | STE100P_XIE_LDE | ++ STE100P_XIE_ANAE | STE100P_XIE_PDFE | STE100P_XIE_ANPE | STE100P_XIE_REFE); ++ ++ at91rm9200_EmacWritePhy (p_mac, STE100P_XIE_REG, &IntValue); ++ udelay(10000); ++ ++ IntValue = 1; ++ ++ do ++ { ++ at91rm9200_EmacReadPhy (p_mac, STE100P_XCSIIS_REG, &IntValue); ++ rep++; ++ } while (IntValue != 0 && rep < 100); ++ ++ at91rm9200_EmacDisableMDIO (p_mac); ++} ++ ++ ++#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ ++ ++#endif /* CONFIG_DRIVER_ETHER */ +diff -Nurp ../u-boot-1.1.6/drivers/dataflash.c ./drivers/dataflash.c +--- ../u-boot-1.1.6/drivers/dataflash.c 2006-11-02 15:15:01.000000000 +0100 ++++ ./drivers/dataflash.c 2007-03-19 23:43:20.000000000 +0100 +@@ -46,8 +46,8 @@ extern int AT91F_DataFlashRead (AT91PS_D + unsigned long size, char *buffer); + extern int AT91F_DataFlashWrite( AT91PS_DataFlash pDataFlash, + unsigned char *src, +- int dest, +- int size ); ++ unsigned long dest, ++ unsigned long size ); + + int AT91F_DataflashInit (void) + { +@@ -68,6 +68,8 @@ int AT91F_DataflashInit (void) + dataflash_info[i].Device.pages_size = 528; + dataflash_info[i].Device.page_offset = 10; + dataflash_info[i].Device.byte_mask = 0x300; ++ dataflash_info[i].Device.total_size = ++ dataflash_info[i].Device.pages_size * dataflash_info[i].Device.pages_number; + dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Desc.DataFlash_state = IDLE; + dataflash_info[i].logical_address = cs[i][0]; +@@ -79,6 +81,8 @@ int AT91F_DataflashInit (void) + dataflash_info[i].Device.pages_size = 528; + dataflash_info[i].Device.page_offset = 10; + dataflash_info[i].Device.byte_mask = 0x300; ++ dataflash_info[i].Device.total_size = ++ dataflash_info[i].Device.pages_size * dataflash_info[i].Device.pages_number; + dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Desc.DataFlash_state = IDLE; + dataflash_info[i].logical_address = cs[i][0]; +@@ -90,6 +94,8 @@ int AT91F_DataflashInit (void) + dataflash_info[i].Device.pages_size = 1056; + dataflash_info[i].Device.page_offset = 11; + dataflash_info[i].Device.byte_mask = 0x700; ++ dataflash_info[i].Device.total_size = ++ dataflash_info[i].Device.pages_size * dataflash_info[i].Device.pages_number; + dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Desc.DataFlash_state = IDLE; + dataflash_info[i].logical_address = cs[i][0]; +@@ -100,6 +106,8 @@ int AT91F_DataflashInit (void) + dataflash_info[i].Device.pages_size = 1056; + dataflash_info[i].Device.page_offset = 11; + dataflash_info[i].Device.byte_mask = 0x700; ++ dataflash_info[i].Device.total_size = ++ dataflash_info[i].Device.pages_size * dataflash_info[i].Device.pages_number; + dataflash_info[i].Device.cs = cs[i][1]; + dataflash_info[i].Desc.DataFlash_state = IDLE; + dataflash_info[i].logical_address = cs[i][0]; +@@ -220,11 +228,13 @@ int addr_dataflash (unsigned long addr) + int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size) + { + /* is outside the dataflash */ +- if (((int)addr & 0x0FFFFFFF) > (pdataFlash->pDevice->pages_size * +- pdataFlash->pDevice->pages_number)) return 0; ++ ++ if (((unsigned long)addr & 0x0FFFFFFF) > pdataFlash->pDevice->total_size) ++ return 0; + /* is too large for the dataflash */ +- if (size > ((pdataFlash->pDevice->pages_size * +- pdataFlash->pDevice->pages_number) - ((int)addr & 0x0FFFFFFF))) return 0; ++ ++ if (size > ( pdataFlash->pDevice->total_size - ((unsigned long)addr & 0x0FFFFFFF))) ++ return 0; + + return 1; + } +diff -Nurp ../u-boot-1.1.6/include/asm-arm/arch-at91rm9200/AT91RM9200.h ./include/asm-arm/arch-at91rm9200/AT91RM9200.h +--- ../u-boot-1.1.6/include/asm-arm/arch-at91rm9200/AT91RM9200.h 2006-11-02 15:15:01.000000000 +0100 ++++ ./include/asm-arm/arch-at91rm9200/AT91RM9200.h 2007-03-11 16:21:22.000000000 +0100 +@@ -625,14 +625,40 @@ typedef struct _AT91S_PDC + #define AT91C_PA26_TWCK ((unsigned int) 1 << 26) + #define AT91C_PA31_DTXD ((unsigned int) AT91C_PIO_PA31) /* DBGU Debug Transmit Data */ + #define AT91C_PIO_PA17 ((unsigned int) 1 << 17) /* Pin Controlled by PA17 */ ++#define AT91C_PIO_PA19 ((unsigned int) 1 << 19) /* Pin Controlled by PA19 */ ++#define AT91C_PIO_PA22 ((unsigned int) 1 << 22) /* Pin Controlled by PA22 */ ++#define AT91C_PIO_PA23 ((unsigned int) 1 << 23) /* Pin Controlled by PA23 */ ++#define AT91C_PIO_PA24 ((unsigned int) 1 << 24) /* Pin Controlled by PA24 */ ++#define AT91C_PIO_PA25 ((unsigned int) 1 << 25) /* Pin Controlled by PA26 */ ++#define AT91C_PIO_PA27 ((unsigned int) 1 << 27) /* Pin Controlled by PA27 */ ++#define AT91C_PIO_PA28 ((unsigned int) 1 << 28) /* Pin Controlled by PA28 */ ++#define AT91C_PIO_PA29 ((unsigned int) 1 << 29) /* Pin Controlled by PA29 */ ++ + #define AT91C_PA17_TXD0 AT91C_PIO_PA17 /* USART0 Transmit Data */ + #define AT91C_PIO_PA18 ((unsigned int) 1 << 18) /* Pin Controlled by PA18 */ + #define AT91C_PA18_RXD0 AT91C_PIO_PA18 /* USART0 Receive Data */ + #define AT91C_PIO_PB20 ((unsigned int) 1 << 20) /* Pin Controlled by PB20 */ + #define AT91C_PB20_RXD1 AT91C_PIO_PB20 /* USART1 Receive Data */ ++ ++#define AT91C_PIO_PB29 ((unsigned int) 1 << 29) /* Pin Controlled by PB29 */ ++#define AT91C_PIO_PB28 ((unsigned int) 1 << 28) /* Pin Controlled by PB28 */ ++ + #define AT91C_PIO_PB21 ((unsigned int) 1 << 21) /* Pin Controlled by PB21 */ + #define AT91C_PB21_TXD1 AT91C_PIO_PB21 /* USART1 Transmit Data */ + ++ ++#define AT91C_PIO_PB0 ((unsigned int) 1 << 0) /* Pin Controlled by PB0 */ ++#define AT91C_PIO_PB2 ((unsigned int) 1 << 2) /* Pin Controlled by PB2 */ ++#define AT91C_PIO_PB8 ((unsigned int) 1 << 8) /* Pin Controlled by PB8 */ ++#define AT91C_PIO_PB9 ((unsigned int) 1 << 9) /* Pin Controlled by PB9 */ ++#define AT91C_PIO_PB10 ((unsigned int) 1 << 10) /* Pin Controlled by PB10 */ ++#define AT91C_PIO_PB11 ((unsigned int) 1 << 11) /* Pin Controlled by PB11 */ ++ ++#define AT91C_PIO_PB22 ((unsigned int) 1 << 22) /* Pin Controlled by PB22 */ ++#define AT91C_PIO_PB23 ((unsigned int) 1 << 23) /* Pin Controlled by PB23 */ ++#define AT91C_PIO_PB24 ((unsigned int) 1 << 24) /* Pin Controlled by PB24 */ ++#define AT91C_PIO_PB26 ((unsigned int) 1 << 26) /* Pin Controlled by PB26 */ ++ + #define AT91C_ID_SYS ((unsigned int) 1) /* System Peripheral */ + #define AT91C_ID_PIOA ((unsigned int) 2) /* PIO port A */ + #define AT91C_ID_PIOB ((unsigned int) 3) /* PIO port B */ +@@ -671,6 +697,8 @@ typedef struct _AT91S_PDC + #define AT91C_PIO_PA6 ((unsigned int) 1 << 6) /* Pin Controlled by PA6 */ + #define AT91C_PA6_NPCS3 ((unsigned int) AT91C_PIO_PA6) /* SPI Peripheral Chip Select 3 */ + ++#define AT91C_PIO_PA20 ((unsigned int) 1 << 20) /* Pin Controlled by PA20 */ ++#define AT91C_PIO_PA21 ((unsigned int) 1 << 21) /* Pin Controlled by PA21 */ + #define AT91C_PIO_PA16 ((unsigned int) 1 << 16) /* Pin Controlled by PA16 */ + #define AT91C_PA16_EMDIO ((unsigned int) AT91C_PIO_PA16) /* Ethernet MAC Management Data Input/Output */ + #define AT91C_PIO_PA15 ((unsigned int) 1 << 15) /* Pin Controlled by PA15 */ +@@ -697,6 +725,7 @@ typedef struct _AT91S_PDC + #define AT91C_PIO_PB5 ((unsigned int) 1 << 5) /* Pin Controlled by PB5 */ + #define AT91C_PIO_PB6 ((unsigned int) 1 << 6) /* Pin Controlled by PB6 */ + #define AT91C_PIO_PB7 ((unsigned int) 1 << 7) /* Pin Controlled by PB7 */ ++#define AT91C_PIO_PB27 ((unsigned int) 1 << 27) /* Pin Controlled by PB27 */ + #define AT91C_PIO_PB25 ((unsigned int) 1 << 25) /* Pin Controlled by PB25 */ + #define AT91C_PB25_DSR1 ((unsigned int) AT91C_PIO_PB25) /* USART 1 Data Set ready */ + #define AT91C_PB25_EF100 ((unsigned int) AT91C_PIO_PB25) /* Ethernet MAC Force 100 Mbits */ +diff -Nurp ../u-boot-1.1.6/include/asm-arm/arch-at91rm9200/mmc.h ./include/asm-arm/arch-at91rm9200/mmc.h +--- ../u-boot-1.1.6/include/asm-arm/arch-at91rm9200/mmc.h 1970-01-01 01:00:00.000000000 +0100 ++++ ./include/asm-arm/arch-at91rm9200/mmc.h 2006-10-13 20:55:04.000000000 +0200 +@@ -0,0 +1,117 @@ ++/* ++ * linux/include/linux/mmc/mmc.h ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#ifndef MMC_H ++#define MMC_H ++ ++#include ++#include ++#include ++ ++struct request; ++struct mmc_data; ++struct mmc_request; ++ ++struct mmc_command { ++ u32 opcode; ++ u32 arg; ++ u32 resp[4]; ++ unsigned int flags; /* expected response type */ ++#define MMC_RSP_PRESENT (1 << 0) ++#define MMC_RSP_136 (1 << 1) /* 136 bit response */ ++#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ ++#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ ++#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ ++#define MMC_CMD_MASK (3 << 5) /* command type */ ++#define MMC_CMD_AC (0 << 5) ++#define MMC_CMD_ADTC (1 << 5) ++#define MMC_CMD_BC (2 << 5) ++#define MMC_CMD_BCR (3 << 5) ++ ++/* ++ * These are the response types, and correspond to valid bit ++ * patterns of the above flags. One additional valid pattern ++ * is all zeros, which means we don't expect a response. ++ */ ++#define MMC_RSP_NONE (0) ++#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) ++#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY) ++#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) ++#define MMC_RSP_R3 (MMC_RSP_PRESENT) ++#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC) ++ ++#define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE)) ++ ++/* ++ * These are the command types. ++ */ ++#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK) ++ ++ unsigned int retries; /* max number of retries */ ++ unsigned int error; /* command error */ ++ ++#define MMC_ERR_NONE 0 ++#define MMC_ERR_TIMEOUT 1 ++#define MMC_ERR_BADCRC 2 ++#define MMC_ERR_FIFO 3 ++#define MMC_ERR_FAILED 4 ++#define MMC_ERR_INVALID 5 ++ ++ struct mmc_data *data; /* data segment associated with cmd */ ++ struct mmc_request *mrq; /* associated request */ ++}; ++ ++struct mmc_data { ++ unsigned int timeout_ns; /* data timeout (in ns, max 80ms) */ ++ unsigned int timeout_clks; /* data timeout (in clocks) */ ++ unsigned int blksz_bits; /* data block size */ ++ unsigned int blksz; /* data block size */ ++ unsigned int blocks; /* number of blocks */ ++ unsigned int error; /* data error */ ++ unsigned int flags; ++ ++#define MMC_DATA_WRITE (1 << 8) ++#define MMC_DATA_READ (1 << 9) ++#define MMC_DATA_STREAM (1 << 10) ++#define MMC_DATA_MULTI (1 << 11) ++ ++ unsigned int bytes_xfered; ++ ++ struct mmc_command *stop; /* stop command */ ++ struct mmc_request *mrq; /* associated request */ ++ ++ unsigned int sg_len; /* size of scatter list */ ++ struct scatterlist *sg; /* I/O scatter list */ ++}; ++ ++struct mmc_request { ++ struct mmc_command *cmd; ++ struct mmc_data *data; ++ struct mmc_command *stop; ++ ++ void *done_data; /* completion data */ ++ void (*done)(struct mmc_request *);/* completion function */ ++}; ++ ++struct mmc_host; ++struct mmc_card; ++ ++extern int mmc_wait_for_req(struct mmc_host *, struct mmc_request *); ++extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int); ++extern int mmc_wait_for_app_cmd(struct mmc_host *, unsigned int, ++ struct mmc_command *, int); ++ ++extern int __mmc_claim_host(struct mmc_host *host, struct mmc_card *card); ++ ++static inline void mmc_claim_host(struct mmc_host *host) ++{ ++ __mmc_claim_host(host, (struct mmc_card *)-1); ++} ++ ++extern void mmc_release_host(struct mmc_host *host); ++ ++#endif +diff -Nurp ../u-boot-1.1.6/include/at91rm9200_net.h ./include/at91rm9200_net.h +--- ../u-boot-1.1.6/include/at91rm9200_net.h 2006-11-02 15:15:01.000000000 +0100 ++++ ./include/at91rm9200_net.h 2007-05-04 22:14:56.000000000 +0200 +@@ -38,6 +38,7 @@ typedef struct _AT91S_PhyOps + unsigned int (*IsPhyConnected)(AT91S_EMAC *pmac); + unsigned char (*GetLinkSpeed)(AT91S_EMAC *pmac); + unsigned char (*AutoNegotiate)(AT91S_EMAC *pmac, int *); ++ unsigned int (*Isolate)(AT91S_EMAC *pmac); + + } AT91S_PhyOps,*AT91PS_PhyOps; + +diff -Nurp ../u-boot-1.1.6/include/configs/pxa255_idp.h ./include/configs/pxa255_idp.h +--- ../u-boot-1.1.6/include/configs/pxa255_idp.h 2006-11-02 15:15:01.000000000 +0100 ++++ ./include/configs/pxa255_idp.h 2007-03-07 23:00:57.000000000 +0100 +@@ -41,7 +41,7 @@ + * If we are developing, we might want to start armboot from ram + * so we MUST NOT initialize critical regs like mem-timing ... + */ +-#define CONFIG_INIT_CRITICAL /* undef for developing */ ++#undef CONFIG_INIT_CRITICAL /* undef for developing */ + + /* + * define the following to enable debug blinks. A debug blink function +diff -Nurp ../u-boot-1.1.6/include/configs/sarge.h ./include/configs/sarge.h +--- ../u-boot-1.1.6/include/configs/sarge.h 1970-01-01 01:00:00.000000000 +0100 ++++ ./include/configs/sarge.h 2007-05-10 00:02:56.000000000 +0200 +@@ -0,0 +1,281 @@ ++/* ++ * Grzegorz Rajtar ++ * ++ * Configuation settings for the Sarge (AT91RM9200DK like) board. ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without eve