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* ldflags were being passed unnessarily so set LDFLAGS to nothing in
Makefile.tpl and regenerate top level Makefile.in
* Divide the patches individually earlier the patches were
combined into one big patch
* Shuffle the order of patches.
Signed-off-by: Khem Raj <raj.khem@gmail.com>
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There is a one hunk peice of damage in the patch originally committed, as
compared to the patch posted on gcc-patches. Replacing with the original
patch enables platforms like arm oabi to compile again.
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From Martin W. Guy page http://martinwguy.co.uk/martin/crunch/
The 20090908 version
* performs single and double precision floating point in the FPU (add, sub,
mul, neg, abs, cmp and conversions from single and double precision floats
to integral types).
* by default, disables the floating point cfnegs and cfnegd instructions,
which fail to convert 0 to -0 as they should. You can re-enable them with
the -funsafe-math-optimizations flag, which is one of those enabled
by -ffast-math (gcc-4.3 has an even more specific -fno-signed-zeros flag,
which is one of those enabled by -funsafe-math-optimizations).
* by default, does not respect denormalised values, so the smallest
representable values are ±2-126 for floats and ±2-1022 for doubles instead of
the usual ±2-149 and ±2-1074.
* has a -mieee flag, which enables handling of denormalized values by disabling
all the buggy instructions. With this, floating point addition, subtraction,
negation, absolute value and conversion between floats and integer types are
performed in software, leaving only floating point multiplication and
comparison performed in hardware.
* has no negative impact on regular ARM code generation.
* always works round the hardware bugs in the FPU and no longer has the
-mcirrus-fix-invalid-insns flag since chip development has stopped and all
existing silicon has the same bugs except for the original revision D0 which
is not supported.
* passes GCC's IEEE testsuite except for the one specific test that checks for
correct handling of denormalized values. With -mieee it passes all the math
tests.
* passes all other testsuites that I've tried (see below) including the
stringent "paranoia" floating point IEEE conformance test.
* produces the fastest Maverick code yet: 5.94 MFLOPS according to FFTW's
tests/bench -opatient cf1024 benchmark and LAME takes 2m25 to encode that
30-second WAV file on a 200MHz EP9307 (compared to 5.4 and 2m30 for the
futaris patches for 4.1.2 and 4.2.0).
* does not use the FPU's buggy 64-bit integer instructions unless the new
-mcirrus-di flag is given. Programs that do a lot of 64-bit integer
operations (add, sub, mul, neg, abs, shifts) may be faster using this, but
rigorous testing will be necessary to ensure that bad code is not being
produced. OpenSSL's testsuite fails if this is enabled. There is more detail
at the head of the arm-crunch-cirrus-di-flag.patch file.
Known bugs
* C: Values held in Maverick registers are not restored when performing a
setjmp/longjmp pair. There is a fix to glibc for this in a message to the
linux-cirrus mailing list.
* C++: Similarly, exception unwinding (performing a throw back to a catch block
in a different function) does not restore floating point and 64-bit values
held in Maverick registers.
* C++: Some C++ files will not compile, saying
".save {mv8}" Error: register expected
although the same files will compile with optimization disabled.
There is a patch to make binutils recognize these registers in the .save
macro in a message to the linux-cirrus mailing list.
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Remove fix-ICE-in-arm_unwind_emit_set.diff from gcc versions >= 4.2.1
upstream gcc already includes this fix.
Instead of patching arm_unwind_emit_set the patch was modified and slipped into
thumb_pushpop and can cause a gcc segfault.
Signed-off-by: Dirk Opfer <dirk@do13.de>
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Patchset taken from http://martinwguy.co.uk/martin/crunch/
Text from page:
On 10 March there were no known bugs in this stuff (again). On 19 March
libvorbisenc managed to find a bug in GCC whereby it incorrectly
optimizes certain code sequences that use single-precision floats. The
Maverick code generator exhibits similar symptoms for the same code, but
only at optimization levels -O2 and above, so the fastest reliable
optimization options for Maverick at present are -O -ffast-math.
I've been working on GCC-4.3.3 to make it generate working code for the
Cirrus Logic MaverickCrunch FPU, as found in their ARM-based EP9302,
EP9307, EP9312 and EP9315 chips, making floating point-intensive code
about 2.5 times faster.
This follows on from Hasjim Williams' earlier work with gcc-4.1.2 and
4.2.0, a bundle of his more recent ideas and more hacks from me.
If you want to understand the patches themselves, there is an article
about the MaverickCrunch FPU and GCC's problems with it on the Debian
wiki [1] and I have added commentary at the top of the individual patch
files.
1. http://wiki.debian.org/ArmEabiMaverickCrunch
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Acked-by: Koen Kooi <koen@openembedded.org>
Acked-by: Tom Rini <trini@embeddedalley.com>
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Rework SYSROOT_CFLAGS_FOR_TARGET.patch each time, and rename to -4.3.2/4.3.3.
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See links below for more details:
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21326
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21816
Signed-off-by: Denys Dmytriyenko <denis@denix.org>
Acked-by: Mike Westerhof <mwester@dls.net>
Acked-by: Philip Balister <philip@balister.org>
Acked-by: Khem Raj <raj.khem@gmail.com>
Acked-by: Marcin Juszkiewicz <hrw@openembedded.org>
Acked-by: Koen Kooi <koen@openembedded.org>
Acked-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
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