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Diffstat (limited to 'recipes/kexecboot/linux-kexecboot-2.6.32/cm-t35/0004-omap3-cm-t35-add-cm-t35-mux-configs.patch')
-rw-r--r--recipes/kexecboot/linux-kexecboot-2.6.32/cm-t35/0004-omap3-cm-t35-add-cm-t35-mux-configs.patch427
1 files changed, 427 insertions, 0 deletions
diff --git a/recipes/kexecboot/linux-kexecboot-2.6.32/cm-t35/0004-omap3-cm-t35-add-cm-t35-mux-configs.patch b/recipes/kexecboot/linux-kexecboot-2.6.32/cm-t35/0004-omap3-cm-t35-add-cm-t35-mux-configs.patch
new file mode 100644
index 0000000000..ff8b50b1c9
--- /dev/null
+++ b/recipes/kexecboot/linux-kexecboot-2.6.32/cm-t35/0004-omap3-cm-t35-add-cm-t35-mux-configs.patch
@@ -0,0 +1,427 @@
+From a1a572a6b020996155fa3fd7e70a96299b37cf30 Mon Sep 17 00:00:00 2001
+From: Mike Rapoport <mike@compulab.co.il>
+Date: Mon, 7 Dec 2009 10:27:48 +0200
+Subject: [PATCH 4/6] omap3: cm-t35: add cm-t35 mux configs
+
+Signed-off-by: Mike Rapoport <mike@compulab.co.il>
+---
+ arch/arm/mach-omap2/board-cm-t35.c | 94 +++++++++++++++++++
+ arch/arm/mach-omap2/mux.c | 158 ++++++++++++++++++++++++++++++++-
+ arch/arm/plat-omap/include/plat/mux.h | 86 ++++++++++++++++++
+ 3 files changed, 337 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
+index 2d7a819..3e54499 100644
+--- a/arch/arm/mach-omap2/board-cm-t35.c
++++ b/arch/arm/mach-omap2/board-cm-t35.c
+@@ -693,6 +693,99 @@ static void __init cm_t35_init_i2c(void)
+ ARRAY_SIZE(cm_t35_i2c_boardinfo));
+ }
+
++static void __init cm_t35_init_mux(void)
++{
++ /* nCS and IRQ mux for CM-T35 ethernet */
++ omap_cfg_reg(G5_34XX_GPMC_NCS5);
++ omap_cfg_reg(A23_34XX_GPIO163_UP);
++
++ /* nCS, IRQ and reset mux for SB-T35 ethernet */
++ omap_cfg_reg(F4_34XX_GPMC_NCS4);
++ omap_cfg_reg(N21_34XX_GPIO127_UP);
++ omap_cfg_reg(B23_34XX_GPIO164_OUT);
++
++ /* PENDOWN GPIO */
++ omap_cfg_reg(F3_34XX_GPIO57_UP);
++
++ /* mUSB */
++ omap_cfg_reg(R21_3430_USB0HS_PHY_CLK);
++ omap_cfg_reg(R23_3430_USB0HS_PHY_STP);
++ omap_cfg_reg(P23_3430_USB0HS_PHY_DIR);
++ omap_cfg_reg(R22_3430_USB0HS_PHY_NXT);
++ omap_cfg_reg(T24_3430_USB0HS_PHY_DATA0);
++ omap_cfg_reg(T23_3430_USB0HS_PHY_DATA1);
++ omap_cfg_reg(U24_3430_USB0HS_PHY_DATA2);
++ omap_cfg_reg(U23_3430_USB0HS_PHY_DATA3);
++ omap_cfg_reg(W24_3430_USB0HS_PHY_DATA4);
++ omap_cfg_reg(V23_3430_USB0HS_PHY_DATA5);
++ omap_cfg_reg(W23_3430_USB0HS_PHY_DATA6);
++ omap_cfg_reg(T22_3430_USB0HS_PHY_DATA7);
++
++ /* MMC 2 */
++ omap_cfg_reg(AB2_3430_MMC2_DIR_DAT0);
++ omap_cfg_reg(AA2_3430_MMC2_DIR_DAT1);
++ omap_cfg_reg(Y2_3430_MMC2_DIR_CMD);
++ omap_cfg_reg(AA1_3420_MMC2_CLKIN);
++
++ /* McSPI 1 */
++ omap_cfg_reg(T5_34XX_MCSPI1_CLK);
++ omap_cfg_reg(R4_34XX_MCSPI1_SIMO);
++ omap_cfg_reg(T4_34XX_MCSPI1_SOMI);
++ omap_cfg_reg(T6_34XX_MCSPI1_CS0);
++
++ /* McBSP 2 */
++ omap_cfg_reg(V20_34XX_MCBSP2_FSX);
++ omap_cfg_reg(T21_34XX_MCBSP2_CLKX);
++ omap_cfg_reg(V19_34XX_MCBSP2_DR);
++ omap_cfg_reg(R20_34XX_MCBSP2_DX);
++
++ omap_cfg_reg(F21_34XX_GPIO109_OUT);
++
++ /* serial ports */
++ omap_cfg_reg(W4_34XX_UART2_TX);
++ omap_cfg_reg(V4_34XX_UART2_RX);
++ omap_cfg_reg(W7_34XX_UART1_TX);
++ omap_cfg_reg(V7_34XX_UART1_RX);
++
++ /* display controls */
++ omap_cfg_reg(U8_34XX_GPIO54_OUT);
++ omap_cfg_reg(G4_34XX_GPIO58_OUT);
++/* omap_cfg_reg(??_34XX_GPIO129_OUT); */
++
++ /* DSS */
++ omap_cfg_reg(G22_34XX_DSS_PCLK);
++ omap_cfg_reg(E22_34XX_DSS_HSYNC);
++ omap_cfg_reg(F22_34XX_DSS_VSYNC);
++ omap_cfg_reg(J21_34XX_DSS_ACBIAS);
++ omap_cfg_reg(AC19_34XX_DSS_DATA0);
++ omap_cfg_reg(AB19_34XX_DSS_DATA1);
++ omap_cfg_reg(AD20_34XX_DSS_DATA2);
++ omap_cfg_reg(AC20_34XX_DSS_DATA3);
++ omap_cfg_reg(AD21_34XX_DSS_DATA4);
++ omap_cfg_reg(AC21_34XX_DSS_DATA5);
++ omap_cfg_reg(D24_34XX_DSS_DATA6);
++ omap_cfg_reg(E23_34XX_DSS_DATA7);
++ omap_cfg_reg(E24_34XX_DSS_DATA8);
++ omap_cfg_reg(F23_34XX_DSS_DATA9);
++ omap_cfg_reg(AC22_34XX_DSS_DATA10);
++ omap_cfg_reg(AC23_34XX_DSS_DATA11);
++ omap_cfg_reg(AB22_34XX_DSS_DATA12);
++ omap_cfg_reg(Y22_34XX_DSS_DATA13);
++ omap_cfg_reg(W22_34XX_DSS_DATA14);
++ omap_cfg_reg(V22_34XX_DSS_DATA15);
++ omap_cfg_reg(J22_34XX_DSS_DATA16);
++ omap_cfg_reg(G23_34XX_DSS_DATA17);
++ omap_cfg_reg(G24_34XX_DSS_DATA18);
++ omap_cfg_reg(H23_34XX_DSS_DATA19);
++ omap_cfg_reg(D23_34XX_DSS_DATA20);
++ omap_cfg_reg(K22_34XX_DSS_DATA21);
++ omap_cfg_reg(V21_34XX_DSS_DATA22);
++ omap_cfg_reg(W21_34XX_DSS_DATA23);
++
++ /* TPS IRQ */
++ omap_cfg_reg(AF26_34XX_SYS_NIRQ);
++}
++
+ static struct omap_board_config_kernel cm_t35_config[] __initdata = {
+ };
+
+@@ -716,6 +809,7 @@ static void __init cm_t35_map_io(void)
+ static void __init cm_t35_init(void)
+ {
+ omap_serial_init();
++ cm_t35_init_mux();
+ cm_t35_init_i2c();
+ cm_t35_init_nand();
+ cm_t35_init_ads7846();
+diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
+index c18a94e..23eb011 100644
+--- a/arch/arm/mach-omap2/mux.c
++++ b/arch/arm/mach-omap2/mux.c
+@@ -279,6 +279,33 @@ MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00,
+ MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
++/* HSUSB Port 0 */
++MUX_CFG_34XX("R21_3430_USB0HS_PHY_CLK", 0x1a2,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("R23_3430_USB0HS_PHY_STP", 0x1a4,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT | \
++ OMAP2_PULL_ENA | OMAP2_PULL_UP)
++MUX_CFG_34XX("P23_3430_USB0HS_PHY_DIR", 0x1a6,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("R22_3430_USB0HS_PHY_NXT", 0x1a8,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("T24_3430_USB0HS_PHY_DATA0", 0x1aa,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("T23_3430_USB0HS_PHY_DATA1", 0x1ac,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("U24_3430_USB0HS_PHY_DATA2", 0x1ae,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("U23_3430_USB0HS_PHY_DATA3", 0x1b0,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("W24_3430_USB0HS_PHY_DATA4", 0x1b2,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("V23_3430_USB0HS_PHY_DATA5", 0x1b4,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("W23_3430_USB0HS_PHY_DATA6", 0x1b6,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("T22_3430_USB0HS_PHY_DATA7", 0x1b8,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+ MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da,
+ OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
+@@ -541,6 +568,15 @@ MUX_CFG_34XX("AF3_3430_MMC2_DAT6", 0x168,
+ MUX_CFG_34XX("AE3_3430_MMC2_DAT7", 0x16A,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
++MUX_CFG_34XX("AB2_3430_MMC2_DIR_DAT0", 0x164,
++ OMAP34XX_MUX_MODE1 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AA2_3430_MMC2_DIR_DAT1", 0x166,
++ OMAP34XX_MUX_MODE1 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("Y2_3430_MMC2_DIR_CMD", 0x168,
++ OMAP34XX_MUX_MODE1 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AA1_3420_MMC2_CLKIN", 0x16a,
++ OMAP34XX_MUX_MODE1 | OMAP34XX_PIN_INPUT)
++
+ /* MMC3 */
+ MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
+ OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+@@ -559,13 +595,133 @@ MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
+ MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
+ OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
+ OMAP34XX_MUX_MODE0)
+-/* EHCI GPIO's on OMAP3EVM (Rev >= E) */
++
+ MUX_CFG_34XX("AH14_34XX_GPIO21", 0x5ea,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
+ MUX_CFG_34XX("AF9_34XX_GPIO22", 0x5ec,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
+ MUX_CFG_34XX("U3_34XX_GPIO61", 0x0c8,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
++
++MUX_CFG_34XX("AG4_34XX_GPIO134", 0x160,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("U8_34XX_GPIO54", 0x0b4,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AE4_34XX_GPIO136", 0x164,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("F3_34XX_GPIO57_UP", 0x0ba,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
++MUX_CFG_34XX("G4_34XX_GPIO58_OUT", 0x0bc,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("W2_34XX_GPIO59", 0x0be,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("L1_34XX_GPIO61_OUT", 0x0c8,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("C2_34XX_GPIO65", 0x0d2,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("N21_34XX_GPIO127_UP", 0x152,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
++MUX_CFG_34XX("A23_34XX_GPIO163_UP", 0x19a,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
++MUX_CFG_34XX("B23_34XX_GPIO164_OUT", 0x19c,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AA6_34XX_GPIO164_OUT", 0x1e2,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++
++/* GPMC */
++MUX_CFG_34XX("F4_34XX_GPMC_NCS4", 0x0b6, OMAP34XX_MUX_MODE0)
++MUX_CFG_34XX("G5_34XX_GPMC_NCS5", 0x0b8, OMAP34XX_MUX_MODE0)
++
++/* McSPI 1 */
++MUX_CFG_34XX("T5_34XX_MCSPI1_CLK", 0x1c8,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("R4_34XX_MCSPI1_SIMO", 0x1ca,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("T4_34XX_MCSPI1_SOMI", 0x1cc,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("T6_34XX_MCSPI1_CS0", 0x1ce,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLDOWN)
++
++/* McBSP 2 */
++MUX_CFG_34XX("V20_34XX_MCBSP2_FSX", 0x13c,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("T21_34XX_MCBSP2_CLKX", 0x13e,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("V19_34XX_MCBSP2_DR", 0x140,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("R20_34XX_MCBSP2_DX", 0x142,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++
++MUX_CFG_34XX("F21_34XX_GPIO109_OUT", 0x12a,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++
++/* Serial ports */
++MUX_CFG_34XX("W4_34XX_UART2_TX", 0x170,
++ OMAP34XX_MUX_MODE1 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("V4_34XX_UART2_RX", 0x172,
++ OMAP34XX_MUX_MODE1 | OMAP34XX_PIN_INPUT)
++MUX_CFG_34XX("W7_34XX_UART1_TX", 0x17c,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("V7_34XX_UART1_RX", 0x182,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
++
++/* DSS */
++MUX_CFG_34XX("G22_34XX_DSS_PCLK", 0x0d4,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("E22_34XX_DSS_HSYNC", 0x0d6,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("F22_34XX_DSS_VSYNC", 0x0d8,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("J21_34XX_DSS_ACBIAS", 0x0da,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AC19_34XX_DSS_DATA0", 0x0dc,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AB19_34XX_DSS_DATA1", 0x0de,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AD20_34XX_DSS_DATA2", 0x0e0,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AC20_34XX_DSS_DATA3", 0x0e2,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AD21_34XX_DSS_DATA4", 0x0e4,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AC21_34XX_DSS_DATA5", 0x0e6,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("D24_34XX_DSS_DATA6", 0x0e8,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("E23_34XX_DSS_DATA7", 0x0ea,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("E24_34XX_DSS_DATA8", 0x0ec,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("F23_34XX_DSS_DATA9", 0x0ee,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AC22_34XX_DSS_DATA10", 0x0f0,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AC23_34XX_DSS_DATA11", 0x0f2,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AB22_34XX_DSS_DATA12", 0x0f4,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("Y22_34XX_DSS_DATA13", 0x0f6,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("W22_34XX_DSS_DATA14", 0x0f8,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("V22_34XX_DSS_DATA15", 0x0fa,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("J22_34XX_DSS_DATA16", 0x0fc,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("G23_34XX_DSS_DATA17", 0x0fe,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("G24_34XX_DSS_DATA18", 0x100,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("H23_34XX_DSS_DATA19", 0x102,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("D23_34XX_DSS_DATA20", 0x104,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("K22_34XX_DSS_DATA21", 0x106,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("V21_34XX_DSS_DATA22", 0x108,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("W21_34XX_DSS_DATA23", 0x10a,
++ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
+ };
+
+ #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
+diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h
+index ba77de6..119379c 100644
+--- a/arch/arm/plat-omap/include/plat/mux.h
++++ b/arch/arm/plat-omap/include/plat/mux.h
+@@ -692,6 +692,20 @@ enum omap34xx_index {
+ AD26_34XX_I2C4_SCL,
+ AE26_34XX_I2C4_SDA,
+
++ /* HSUSB Port 0 */
++ R21_3430_USB0HS_PHY_CLK,
++ R23_3430_USB0HS_PHY_STP,
++ P23_3430_USB0HS_PHY_DIR,
++ R22_3430_USB0HS_PHY_NXT,
++ T24_3430_USB0HS_PHY_DATA0,
++ T23_3430_USB0HS_PHY_DATA1,
++ U24_3430_USB0HS_PHY_DATA2,
++ U23_3430_USB0HS_PHY_DATA3,
++ W24_3430_USB0HS_PHY_DATA4,
++ V23_3430_USB0HS_PHY_DATA5,
++ W23_3430_USB0HS_PHY_DATA6,
++ T22_3430_USB0HS_PHY_DATA7,
++
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+ Y8_3430_USB1HS_PHY_CLK,
+ Y9_3430_USB1HS_PHY_STP,
+@@ -839,6 +853,11 @@ enum omap34xx_index {
+ AF3_3430_MMC2_DAT6,
+ AE3_3430_MMC2_DAT7,
+
++ AB2_3430_MMC2_DIR_DAT0,
++ AA2_3430_MMC2_DIR_DAT1,
++ Y2_3430_MMC2_DIR_CMD,
++ AA1_3420_MMC2_CLKIN,
++
+ /* MMC3 */
+ AF10_3430_MMC3_CLK,
+ AC3_3430_MMC3_CMD,
+@@ -854,6 +873,73 @@ enum omap34xx_index {
+ AH14_34XX_GPIO21,
+ AF9_34XX_GPIO22,
+ U3_34XX_GPIO61,
++
++ AG4_34XX_GPIO134,
++ U8_34XX_GPIO54,
++ AE4_34XX_GPIO136,
++ F3_34XX_GPIO57_UP,
++ G4_34XX_GPIO58_OUT,
++ W2_34XX_GPIO59,
++ L1_34XX_GPIO61_OUT,
++ C2_34XX_GPIO65,
++ N21_34XX_GPIO127_UP,
++ A23_34XX_GPIO163_UP,
++ B23_34XX_GPIO164_OUT,
++ AA6_34XX_GPIO186_OUT,
++
++ /* gpmc */
++ F4_34XX_GPMC_NCS4,
++ G5_34XX_GPMC_NCS5,
++
++ /* McSPI 1 */
++ T5_34XX_MCSPI1_CLK,
++ R4_34XX_MCSPI1_SIMO,
++ T4_34XX_MCSPI1_SOMI,
++ T6_34XX_MCSPI1_CS0,
++
++ /* McBSP 2 */
++ V20_34XX_MCBSP2_FSX,
++ T21_34XX_MCBSP2_CLKX,
++ V19_34XX_MCBSP2_DR,
++ R20_34XX_MCBSP2_DX,
++
++ F21_34XX_GPIO109_OUT,
++
++ /* serial ports */
++ W4_34XX_UART2_TX,
++ V4_34XX_UART2_RX,
++ W7_34XX_UART1_TX,
++ V7_34XX_UART1_RX,
++
++ /* DSS */
++ G22_34XX_DSS_PCLK,
++ E22_34XX_DSS_HSYNC,
++ F22_34XX_DSS_VSYNC,
++ J21_34XX_DSS_ACBIAS,
++ AC19_34XX_DSS_DATA0,
++ AB19_34XX_DSS_DATA1,
++ AD20_34XX_DSS_DATA2,
++ AC20_34XX_DSS_DATA3,
++ AD21_34XX_DSS_DATA4,
++ AC21_34XX_DSS_DATA5,
++ D24_34XX_DSS_DATA6,
++ E23_34XX_DSS_DATA7,
++ E24_34XX_DSS_DATA8,
++ F23_34XX_DSS_DATA9,
++ AC22_34XX_DSS_DATA10,
++ AC23_34XX_DSS_DATA11,
++ AB22_34XX_DSS_DATA12,
++ Y22_34XX_DSS_DATA13,
++ W22_34XX_DSS_DATA14,
++ V22_34XX_DSS_DATA15,
++ J22_34XX_DSS_DATA16,
++ G23_34XX_DSS_DATA17,
++ G24_34XX_DSS_DATA18,
++ H23_34XX_DSS_DATA19,
++ D23_34XX_DSS_DATA20,
++ K22_34XX_DSS_DATA21,
++ V21_34XX_DSS_DATA22,
++ W21_34XX_DSS_DATA23,
+ };
+
+ struct omap_mux_cfg {
+--
+1.6.4.4
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-29 10:38:21 +0000