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authorJohn Bowler <jbowler@nslu2-linux.org>2005-11-01 08:12:51 +0000
committerOpenEmbedded Project <openembedded-devel@lists.openembedded.org>2005-11-01 08:12:51 +0000
commit1830ce7071bbdc183a29aa9e0febea3b9fc04876 (patch)
treecc16351356e28ede59f462ce69870da66d143cc3 /packages/linux/nslu2-kernel
parentbfd78e118cb70c13f04b6a26e908892086445bed (diff)
nslu2-kernel: split out LE part of drivers/mtd/maps/ixp4xx.c patch in 2.6.14
Diffstat (limited to 'packages/linux/nslu2-kernel')
-rw-r--r--packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-copy-from.patch61
-rw-r--r--packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-le.patch54
2 files changed, 65 insertions, 50 deletions
diff --git a/packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-copy-from.patch b/packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-copy-from.patch
index 66cf99b32e..f3da2e093f 100644
--- a/packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-copy-from.patch
+++ b/packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-copy-from.patch
@@ -1,61 +1,22 @@
--- linux-2.6.14/drivers/mtd/maps/ixp4xx.c 2005-10-27 17:02:08.000000000 -0700
+++ linux-2.6.14/drivers/mtd/maps/ixp4xx.c 2005-10-29 23:11:24.990820968 -0700
-@@ -22,6 +22,7 @@
- #include <linux/string.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/map.h>
-+#include <linux/mtd/cfi_endian.h>
- #include <linux/mtd/partitions.h>
- #include <linux/ioport.h>
- #include <linux/device.h>
-@@ -30,18 +31,45 @@
-
- #include <linux/reboot.h>
-
-+/* On a little-endian IXP4XX system (tested on NSLU2) an LDRH or STRH
-+ * will flip the second address bit - i.e. XOR the address with 10b.
-+ * This causes the cfi commands (sent to the command address, 0xAA for
-+ * 16 bit flash) to fail. This is fixed here by XOR'ing the address
-+ * before use with 10b. The cost of this is that the flash layout ends
-+ * up with pdp-endiannes (on an LE system), however this is not a problem
-+ * as the access code consistently only accesses half words - so the
-+ * endianness is not determinable on stuff which is written and read
-+ * consistently in the little endian world.
-+ *
-+ * For flash data from the big-endian world, however, the results are
-+ * weird - the pdp-endianness results in the data apparently being
-+ * 2-byte swapped (as in dd conv=swab). To work round this the 16
-+ * bit values are written and read using cpu_to_cfi16 and cfi16_to_cpu,
-+ * by default these are no-ops, but if the MTD driver is configed with
-+ * CONFIG_MTD_CFI_BE_BYTE_SWAP the macros will byte swap the data,
-+ * resulting in a consistently BE view of the flash on both BE (no
-+ * op) and LE systems. This config setting also causes the command
-+ * data from the CFI implementation to get swapped - as is required
-+ * so that this code will *unswap* it and give the correct command
-+ * data to the flash.
-+ */
- #ifndef __ARMEB__
- #define BYTE0(h) ((h) & 0xFF)
- #define BYTE1(h) (((h) >> 8) & 0xFF)
-+#define FLASHWORD(a) (*(__u16*)((u32)(a) ^ 2))
- #else
- #define BYTE0(h) (((h) >> 8) & 0xFF)
+@@ -38,10 +38,14 @@
#define BYTE1(h) ((h) & 0xFF)
-+#define FLASHWORD(a) (*(__u16*)(a))
#endif
-+#define FLASHW(a) cfi16_to_cpu(FLASHWORD(a))
-+#define FLASHSET(a,v) (FLASHWORD(a) = cpu_to_cfi16(v))
++#define FLASHWORD(a) (*(__u16*)(a))
++#define FLASHVAL(a) FLASHWORD(a)
++#define FLASHSET(a,v) do { FLASHWORD(a) = (v); } while (0)
+
static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
{
map_word val;
- val.x[0] = *(__u16 *) (map->map_priv_1 + ofs);
-+ val.x[0] = FLASHW(map->map_priv_1 + ofs);
++ val.x[0] = FLASHVAL(map->map_priv_1 + ofs);
return val;
}
-@@ -53,19 +81,25 @@ static map_word ixp4xx_read16(struct map
+@@ -53,19 +57,25 @@ static map_word ixp4xx_read16(struct map
static void ixp4xx_copy_from(struct map_info *map, void *to,
unsigned long from, ssize_t len)
{
@@ -76,10 +37,10 @@
+ dest = (u8 *) to;
+ src = (u8 *) (map->map_priv_1 + from);
+ if (from & 1)
-+ *dest++ = BYTE1(FLASHW(src-1)), ++src, --len;
++ *dest++ = BYTE1(FLASHVAL(src-1)), ++src, --len;
+
+ while (len >= 2) {
-+ u16 data = FLASHW(src); src += 2;
++ u16 data = FLASHVAL(src); src += 2;
+ *dest++ = BYTE0(data);
+ *dest++ = BYTE1(data);
+ len -= 2;
@@ -88,11 +49,11 @@
- if (len & 1)
- dest[len - 1] = BYTE0(src[i]);
+ if (len > 0)
-+ *dest++ = BYTE0(FLASHW(src));
++ *dest++ = BYTE0(FLASHVAL(src));
}
/*
-@@ -75,7 +109,7 @@ static void ixp4xx_copy_from(struct map_
+@@ -75,7 +85,7 @@ static void ixp4xx_copy_from(struct map_
static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
{
if (!(adr & 1))
@@ -101,7 +62,7 @@
}
/*
-@@ -83,7 +117,7 @@ static void ixp4xx_probe_write16(struct
+@@ -83,7 +93,7 @@ static void ixp4xx_probe_write16(struct
*/
static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
{
diff --git a/packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-le.patch b/packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-le.patch
new file mode 100644
index 0000000000..0b50e4e1a0
--- /dev/null
+++ b/packages/linux/nslu2-kernel/2.6.14/10-ixp4xx-le.patch
@@ -0,0 +1,54 @@
+--- linux-2.6.14/drivers/mtd/maps/ixp4xx.c 2005-10-27 17:02:08.000000000 -0700
++++ linux-2.6.14/drivers/mtd/maps/ixp4xx.c 2005-10-29 23:11:24.990820968 -0700
+@@ -22,6 +22,7 @@
+ #include <linux/string.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/map.h>
++#include <linux/mtd/cfi_endian.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/ioport.h>
+ #include <linux/device.h>
+@@ -30,17 +31,40 @@
+
+ #include <linux/reboot.h>
+
++/* On a little-endian IXP4XX system (tested on NSLU2) an LDRH or STRH
++ * will flip the second address bit - i.e. XOR the address with 10b.
++ * This causes the cfi commands (sent to the command address, 0xAA for
++ * 16 bit flash) to fail. This is fixed here by XOR'ing the address
++ * before use with 10b. The cost of this is that the flash layout ends
++ * up with pdp-endiannes (on an LE system), however this is not a problem
++ * as the access code consistently only accesses half words - so the
++ * endianness is not determinable on stuff which is written and read
++ * consistently in the little endian world.
++ *
++ * For flash data from the big-endian world, however, the results are
++ * weird - the pdp-endianness results in the data apparently being
++ * 2-byte swapped (as in dd conv=swab). To work round this the 16
++ * bit values are written and read using cpu_to_cfi16 and cfi16_to_cpu,
++ * by default these are no-ops, but if the MTD driver is configed with
++ * CONFIG_MTD_CFI_BE_BYTE_SWAP the macros will byte swap the data,
++ * resulting in a consistently BE view of the flash on both BE (no
++ * op) and LE systems. This config setting also causes the command
++ * data from the CFI implementation to get swapped - as is required
++ * so that this code will *unswap* it and give the correct command
++ * data to the flash.
++ */
+ #ifndef __ARMEB__
+ #define BYTE0(h) ((h) & 0xFF)
+ #define BYTE1(h) (((h) >> 8) & 0xFF)
++#define FLASHWORD(a) (*(__u16*)((u32)(a) ^ 2))
+ #else
+ #define BYTE0(h) (((h) >> 8) & 0xFF)
+ #define BYTE1(h) ((h) & 0xFF)
++#define FLASHWORD(a) (*(__u16*)(a))
+ #endif
+
+-#define FLASHWORD(a) (*(__u16*)(a))
+-#define FLASHVAL(a) FLASHWORD(a)
+-#define FLASHSET(a,v) do { FLASHWORD(a) = (v); } while (0)
++#define FLASHVAL(a) cfi16_to_cpu(FLASHWORD(a))
++#define FLASHSET(a,v) (FLASHWORD(a) = cpu_to_cfi16(v))
+
+ static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
+ {