1 files changed, 74 insertions, 0 deletions
diff --git a/include/Fpga/Fpga.h b/include/Fpga/Fpga.h
new file mode 100644
index 0000000..986a269
--- /dev/null
+++ b/include/Fpga/Fpga.h
@@ -0,0 +1,74 @@
+#ifndef FPGA_H_
+#define FPGA_H_
+
+#include "General.h"
+#include "Utility.h"
+#include "Version.h"
+#include <math.h>        /* ceil */
+#include <openssl/sha.h> /* generate hash */
+
+#define MTAC_SX1301 0x0
+#define MTAC_FPGA 0x1
+
+#define MTAC_FPGA_ADDRESS 0x1
+#define READ_ACCESS 0x00
+#define WRITE_ACCESS 0x80
+#define SPI_SPEED 8000000
+
+#define MTAC_PAGE_REG 0
+#define MTAC_SOFT_RESET 1
+#define MTAC_VERSION 2
+
+#define MTCDT_DEFAULT_FILE "/usr/lib/mts-flash-binaries/mtcdt-fpga-v31.hex"
+#define MTCAP_DEFAULT_FILE "/usr/lib/mts-flash-binaries/mtcap-fpga-v31.hex"
+
+struct mtac_reg_s {
+    int8_t page;  /*!< page containing the register (-1 for all pages) */
+    uint8_t addr; /*!< base address of the register (7 bit) */
+    uint8_t offs; /*!< position of the register LSB (between 0 to 7) */
+    bool sign;    /*!< 1 indicates the register is signed (2 complem.) */
+    uint8_t leng; /*!< number of bits in the register */
+    bool rdon;    /*!< 1 indicates a read-only register */
+    int32_t dflt; /*!< register default value */
+};
+
+class Mtac15Fpga {
+  private:
+    HardwareType hardwareType = HARDWARE_INVALID;
+    void *spi_target_ptr = NULL;
+    const char pin_high = '1';
+    const char pin_low = '0';
+    std::string port;
+    std::string spiPath;
+    std::string input_file;
+    uint8_t fpgaVersion;
+    rapidjson::Document deviceInfo;
+    rapidjson::Document::AllocatorType &alloc = deviceInfo.GetAllocator();
+
+    void sha256_hash_string(unsigned char hash[SHA256_DIGEST_LENGTH],
+                            char outputBuffer[65]);
+    void sha256(char *string, char outputBuffer[65]);
+    int sha256_file(const char *path);
+    int spiOpen();
+    int spiRead(uint8_t spi_mux_target, uint8_t address, uint8_t *data);
+    int spiWrite(uint8_t spi_mux_target, uint8_t address, uint8_t data);
+    int spiClose();
+    int busContention();
+    int cresetWrite(char num);
+    int releaseDevice();
+    int writeEnable();
+    int chipEraseVerify();
+    int chipErase();
+    int mtacErase();
+    int pageProgram(uint8_t adr_lower, uint8_t adr_higher, uint32_t data[256]);
+    int mtacProgram(const char input_file[]);
+
+  public:
+    Mtac15Fpga(std::string inputFile, std::string forcedPath);
+    Mtac15Fpga(std::string path);
+    int getFpgaVersion();
+    int FpgaVersion();
+    int upgradeFpga();
+};
+
+#endif /* FPGA_H_ */