/* -------------------------------------------------------------------------- */ /* --- DEPENDANCIES --------------------------------------------------------- */ #include /* C99 types*/ #include /* open */ #include #include /* printf fprintf */ #include /* malloc free */ #include /* memset */ #include #include /* lseek, close */ /* -------------------------------------------------------------------------- */ /* --- PUBLIC CONSTANTS ----------------------------------------------------- */ #define MTAC_BURST_CHUNK 1024 #define MTAC_SPI_MUX_MODE0 0x0 /* No FPGA */ #define MTAC_SPI_MUX_MODE1 0x1 /* FPGA, with spi mux header */ #define MTAC_SX1301 0x0 #define MTAC_FPGA 0x1 #define MTAC_EEPROM 0x2 #define MTAC_SX127X 0x3 /* -------------------------------------------------------------------------- */ /* --- Flash opcodes ---------------------------------------------------------*/ #define WR_STATUS_REG 0x01 /* Write Status Register */ #define PAGE_PROGRAM 0x02 /* Write up to a Page of the Memory */ #define READ_DATA 0x03 /* Read from the Memory */ #define WRITE_DISABLE 0x04 /* Disable Writing to the Memory */ #define RD_STATUS_REG_1 0x05 /* Read Status Register-1 */ #define WRITE_ENABLE 0x06 /* Enable Writing to the Memory */ #define FAST_READ_DATA 0x0B /* Fast Read from the Memory */ #define SECTOR_ERASE 0x20 /* Erase a Sector (4kb) */ #define RD_STATUS_REG_2 0x35 /* Read Status Register-2 */ #define UNIQUE_ID 0x4B /* Read Unique ID */ #define WE_STATUS_REG 0x50 /* Write Enable for Status Registers */ #define BLOCK_ERASE_32 0x52 /* Erase a Block (32kb) */ #define CHIP_ERASE 0x60 /* Erase Entire Chip */ #define MNFTR_DEV_ID 0x90 /* Read Manufacturer ID followed by Device ID */ #define JEDEC_ID 0x9F /* Read JEDEC ID */ #define CHIP_RELEASE 0xAB /* Release chip from power down */ #define BLOCK_ERASE_64 0xD8 /* Erase a Block (64kb) */ /* -------------------------------------------------------------------------- */ /* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */ int mtac_spi_open(char *spidev, void **spi_target_ptr); int mtac_spi_close(void *spi_target); int mtac_spi_w(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, uint8_t address, uint8_t data); int mtac_spi_r(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, uint8_t address, uint8_t *data); int chip_erase(char *spidev, void *spi_target); int mtac_release(char *spidev, void *spi_target); int page_program(char *spidev, void *spi_target, uint8_t adr_lower, uint8_t adr_higher, int data[256]); int write_enable(char *spidev, void *spi_target); int mtac_id(char *spidev, void *spi_target); /* --- EOF ------------------------------------------------------------------ */