From f7c611e12ab924475c1f6c3b81a915e516e04186 Mon Sep 17 00:00:00 2001
From: Harsh Sharma <harsh.sharma@multitech.com>
Date: Fri, 25 Oct 2019 11:10:37 -0500
Subject: added ap port config and fpga flash requirements for mtcdt3

---
 src/mts_fpga_hash.c   | 12 ++++++++++++
 src/mts_fpga_loader.c |  8 ++++++--
 src/mts_fpga_reg.c    | 17 +++++++++++++++++
 src/mts_fpga_reg.h    |  9 +++++++++
 4 files changed, 44 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/mts_fpga_hash.c b/src/mts_fpga_hash.c
index 7bd4da4..e895040 100644
--- a/src/mts_fpga_hash.c
+++ b/src/mts_fpga_hash.c
@@ -39,6 +39,10 @@ static const char *valid_mtcdt_hashes[] = {
   "d9f811fcab57947db3c2323242885a32a7f095a069d3386a148466e7f3da5353", /* v28*/
   "903c1199df46d38683b1aa9fc88310abe2f317c01c3aefa77987990874aba420", /* v31*/
   "7c190506b969aea6198daffb6c9b47685f3a4dc3ce18565c66542bac27d6f24e"};/* v33*/
+
+static const char *valid_mtcdt3_hashes[] = {
+  "54e41b186b2c91f1bcf249648c50357165d361101fc4fe20ee9b8f0c40dce25d"};/* v35*/
+
 static const char *valid_mtcap_hashes[] = {
   "07317fe9ca59393c074215c9d923d8d01025654883291a5e89b27d21668e2263", /* v28*/
   "f208ef5cae03e703951bb8799172a5eaadb74ddb90bf3e65c32030c008a88e75", /* v31*/
@@ -114,6 +118,14 @@ int sha256_file(char* hw, char *path) {
       }
     }
   }
+  else if (strstr(hw, MTCDT3)) {
+    for(i = 0; i < sizeof(valid_mtcdt3_hashes)/sizeof(valid_mtcdt3_hashes[0]); ++i) {
+      if(!strcmp(valid_mtcdt3_hashes[i], file_hash)) {
+      printf("File verified\n");
+      return MTAC_SUCCESS;
+      }
+    }
+  }
   else if (strstr(hw, MTCDT)) {
     for(i = 0; i < sizeof(valid_mtcdt_hashes)/sizeof(valid_mtcdt_hashes[0]); ++i) {
       if(!strcmp(valid_mtcdt_hashes[i], file_hash)) {
diff --git a/src/mts_fpga_loader.c b/src/mts_fpga_loader.c
index d9ed713..1138803 100644
--- a/src/mts_fpga_loader.c
+++ b/src/mts_fpga_loader.c
@@ -31,6 +31,10 @@ int main(int argc, char **argv) {
   char *upgrade_file;
   int path = DEFAULT_PATH;
   opterr = 0;
+  if (argc < 2) {
+      usage(argc, argv);
+      return 0;
+  }
   while ((c = getopt(argc, argv, "shp:ci:")) != -1)
     switch (c) {
     case 's':
@@ -42,10 +46,10 @@ int main(int argc, char **argv) {
     case 'p':
       path = atoi(optarg);
       if (path == 1) {
-        printf("Using ap1 - /dev/spidev32766.2\n");
+        printf("Using ap1\n");
       }
       else if (path == 2) {
-        printf("Using ap2 - /dev/spidev32765.2\n");
+        printf("Using ap2\n");
       }
       else {
         fprintf(stderr, "Path %d must be set to 1(ap1) or 2(ap2)\n", path);
diff --git a/src/mts_fpga_reg.c b/src/mts_fpga_reg.c
index 0c3a922..f2ca298 100644
--- a/src/mts_fpga_reg.c
+++ b/src/mts_fpga_reg.c
@@ -120,6 +120,23 @@ int hw_check(mts_hw *mts) {
       strcpy(mts->creset, CRESET);
       return MTAC_SUCCESS;
     }
+  } else if (strstr(mts->dev_hw, "MTCDT3")) {
+    if (mts->path == 0) {
+      strcpy(mts->mtac_hw, MTCDT3_HW_VERSION_AP1);
+      strcpy(mts->spi_path, SPI_DEV_PATH_MTCDT3_AP1);
+      strcpy(mts->creset, MTCDT3_CRESET_AP1);
+      return MTAC_SUCCESS;
+    } else if (mts->path == 1) {
+      strcpy(mts->mtac_hw, MTCDT3_HW_VERSION_AP1);
+      strcpy(mts->spi_path, SPI_DEV_PATH_MTCDT3_AP1);
+      strcpy(mts->creset, MTCDT3_CRESET_AP1);
+      return MTAC_SUCCESS;
+    } else if (mts->path == 2) {
+      strcpy(mts->mtac_hw, MTCDT3_HW_VERSION_AP2);
+      strcpy(mts->spi_path, SPI_DEV_PATH_MTCDT3_AP2);
+      strcpy(mts->creset, MTCDT3_CRESET_AP2);
+      return MTAC_SUCCESS;
+    }
   } else if (strstr(mts->dev_hw, "MTCDT")) {
     if (mts->path == 0) {
       strcpy(mts->spi_path, SPI_DEV_PATH_MTCDT);
diff --git a/src/mts_fpga_reg.h b/src/mts_fpga_reg.h
index 8efc191..7803802 100644
--- a/src/mts_fpga_reg.h
+++ b/src/mts_fpga_reg.h
@@ -35,10 +35,14 @@ typedef struct mts {
 #define SPI_DEV_PATH_AP2 "/dev/spidev32765.2"
 #define SPI_DEV_PATH_MTCAP "/dev/spidev0.1"
 #define SPI_DEV_PATH_MTCDT "/dev/spidev0.0"
+#define SPI_DEV_PATH_MTCDT3_AP1 "/dev/spidev0.0"
+#define SPI_DEV_PATH_MTCDT3_AP2 "/dev/spidev1.0"
 #define MTCDT "MTAC-LORA-1.5"
+#define MTCDT3 "MTCDT3B-0.0"
 #define MTCAP "MTCAP-LORA-1.5"
 #define HW_FILE "/sys/devices/platform/mts-io/hw-version"
 #define MTCDT_DEFAULT_FILE "/usr/lib/mts-flash-binaries/mtcdt-fpga-v31.hex"
+#define MTCDT3_DEFAULT_FILE "/usr/lib/mts-flash-binaries/mtcdt3-fpga-v35.hex"
 #define MTCAP_DEFAULT_FILE "/usr/lib/mts-flash-binaries/mtcap-fpga-v31.hex"
 #define CRESET "/sys/devices/platform/mts-io/lora/creset"
 #define CRESET_AP1 "/sys/devices/platform/mts-io/ap1/creset"
@@ -46,6 +50,11 @@ typedef struct mts {
 #define MTAC_HW_VERSION "/sys/devices/platform/mts-io/lora/hw-version"
 #define MTAC_HW_VERSION_AP1 "/sys/devices/platform/mts-io/ap1/hw-version"
 #define MTAC_HW_VERSION_AP2 "/sys/devices/platform/mts-io/ap2/hw-version"
+#define MTCDT3_HW_VERSION_AP1 "/sys/devices/platform/mts-io/lora/hw-version"
+#define MTCDT3_HW_VERSION_AP2 "/sys/devices/platform/mts-io/lora-2/hw-version"
+#define MTCDT3_CRESET_AP1 "/sys/devices/platform/mts-io/lora/creset"
+#define MTCDT3_CRESET_AP2 "/sys/devices/platform/mts-io/lora-2/creset"
+
 /* -------------------------------------------------------------------------- */
 /* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */
 
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