From d9846f23826db7744fbb3c187e2de2a76b54d6ac Mon Sep 17 00:00:00 2001
From: Harsh Sharma <harsh.sharma@multitech.com>
Date: Tue, 12 Oct 2021 09:27:57 -0500
Subject: Cleaned  up lora/gpiob overlay for mtcdt

---
 mtcdt/ap2-lora-0.0.dtso | 28 +++++++++++++++++++++++-----
 1 file changed, 23 insertions(+), 5 deletions(-)

(limited to 'mtcdt/ap2-lora-0.0.dtso')

diff --git a/mtcdt/ap2-lora-0.0.dtso b/mtcdt/ap2-lora-0.0.dtso
index 68a0c79..4cfe40b 100644
--- a/mtcdt/ap2-lora-0.0.dtso
+++ b/mtcdt/ap2-lora-0.0.dtso
@@ -1,5 +1,5 @@
 /* 
- * DTS overlay for MTCDT 0.0 hardware version.
+ * DTS overlay for MTCDT hardware version.
  */
 
 /dts-v1/;
@@ -7,6 +7,7 @@
 /*
  * Location(s):
  * Put: MTCDT/0.0/ap2-lora.dtbo
+ * Link: MTCDT/0.1/ap2-lora.dtbo
  */
 
 #include <dt-bindings/dma/at91.h>
@@ -16,15 +17,32 @@
 #include <dt-bindings/clock/at91.h>
 
 / {
-    compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+    compatible = "atmel,at91rm9200-spi";
     fragment@0 {
         target-path = "/ahb/apb/spi@f0004000";
+        /*target = <0x76>; */
         __overlay__ {
+            status = "okay";
+            ap2-spi@0 {
+                compatible = "mts,mtac";
+                spi-max-frequency = <20000000>;
+                reg = <0>;
+            };
+            ap2-spi@1 {
+                compatible = "mts,mtac";
+                spi-max-frequency = <1000000>;
+                reg = <1>;
+            };
             ap2-spi@2 {
                 compatible = "mts,mtac";
-                spi-max-frequency = <0x1e8480>;
-                reg = <0x2>;
-            }; /*ap2-spi*/
+                spi-max-frequency = <2000000>;
+                reg = <2>;
+            };
+            ap2-din@3 {
+                compatible = "mts-io-ap2-din";
+                spi-max-frequency = <1000000>;
+                reg = <3>;
+            };
         }; /*overlay*/
     }; /*fragment@0*/
 };
-- 
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