From 4f5efcb39b25a2a9c24c36c467e7f14ce6e818a5 Mon Sep 17 00:00:00 2001
From: John Klug <john.klug@multitech.com>
Date: Fri, 10 May 2019 17:10:10 -0500
Subject: Device Tree Overlay Example

---
 mtcdt/ap1-xdot-0.0.dtso | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 mtcdt/ap1-xdot-0.0.dtso

(limited to 'mtcdt/ap1-xdot-0.0.dtso')

diff --git a/mtcdt/ap1-xdot-0.0.dtso b/mtcdt/ap1-xdot-0.0.dtso
new file mode 100644
index 0000000..969f8b1
--- /dev/null
+++ b/mtcdt/ap1-xdot-0.0.dtso
@@ -0,0 +1,30 @@
+/*
+ * DTS overlay for MTCDT 0.0 hardware version.
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#define AT91_PINCTRL_OUT_INIT_0 (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(0))
+#define AT91_PINCTRL_OUT_INIT_1 (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))
+
+/ {
+    compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+    fragment@0 {
+        target-path = "/ahb/apb/pinctrl@fffff400";
+        __overlay__ {
+            mtac_xdot {
+                ap1 {
+                    reset {
+                        atmel,pins = <AT91_PIOB 12 AT91_PERIPH_GPIO AT91_PINCTRL_OUT_INIT_1>;
+                        label = "ap1-reset";
+                    }; /* Reset */
+                }; /* ap1 */
+            }; /* mtac_xdot */
+        }; /* overlay */
+    }; /* fragment@0 */
+};
-- 
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