From 18eccdf46f8640afeebd03f8e0f838916af7e3eb Mon Sep 17 00:00:00 2001
From: sharma-mts <86847754+sharma-mts@users.noreply.github.com>
Date: Fri, 14 Jan 2022 13:16:49 -0600
Subject: MTAC-LORA overlay

---
 mtcdt/ap1-lora-0.0.dtso | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 mtcdt/ap1-lora-0.0.dtso

(limited to 'mtcdt/ap1-lora-0.0.dtso')

diff --git a/mtcdt/ap1-lora-0.0.dtso b/mtcdt/ap1-lora-0.0.dtso
new file mode 100644
index 0000000..c314fe2
--- /dev/null
+++ b/mtcdt/ap1-lora-0.0.dtso
@@ -0,0 +1,49 @@
+/* 
+ * DTS overlay for MTCDT 0.0/0.1 hardware versions.
+ */
+
+/dts-v1/;
+
+/*
+ * Location(s):
+ * Put: MTCDT/0.0/lora/ap1-lora.dtbo
+ */
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/gpio/mt-at91.h>
+
+/ {
+    compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+    model = "Multi-Tech Systems MTCDT-0.0";
+    fragment@0 {
+        target-path = "/ahb/apb/spi@f0000000";
+        __overlay__ {
+            status = "okay";
+            cs-gpios = <GPIO0_PH 4 0>, <GPIO0_PH 2 0>, <GPIO0_PH 3 0>, <GPIO0_PH 5 0>;
+            ap1-spi@0 {
+                compatible = "mts,mtac";
+                spi-max-frequency = <20000000>;
+                reg = <0>;
+            };
+            ap1-spi@1 {
+                compatible = "mts,mtac";
+                spi-max-frequency = <2000000>;
+                reg = <1>;
+            };
+            ap1-spi@2 {
+                compatible = "mts,mtac";
+                spi-max-frequency = <2000000>;
+                reg = <2>;
+            };
+            ap1-din@3 {
+                compatible = "mts-io-ap1-din";
+                spi-max-frequency = <1000000>;
+                reg = <3>;
+            };
+        }; /*overlay*/
+    }; /*fragment@0*/
+};
-- 
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