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-rw-r--r--mtcdt/ap1-gpiob-0.0.dtso4
-rw-r--r--mtcdt/ap1-gpiob-0.2.dtso4
-rw-r--r--mtcdt/ap1-lora-0.0.dtso49
-rw-r--r--mtcdt/ap2-gpiob-0.0.dtso8
-rw-r--r--mtcdt/ap2-lora-0.0.dtso49
-rw-r--r--mtcdt/pins-0.0.dtso53
-rw-r--r--mtcdt/pins-0.2.dtso53
-rw-r--r--mtcpmhs/ap1-003-0.0.dtso2
-rw-r--r--mtcpmhs/ap1-gpiob-0.0.dtso2
-rw-r--r--mtcpmhs/ap1-lora-0.0.dtso2
-rw-r--r--mtcpmhs/ap2-003-0.0.dtso2
-rw-r--r--mtcpmhs/ap2-gpiob-0.0.dtso2
-rw-r--r--mtcpmhs/ap2-lora-0.0.dtso2
13 files changed, 218 insertions, 14 deletions
diff --git a/mtcdt/ap1-gpiob-0.0.dtso b/mtcdt/ap1-gpiob-0.0.dtso
index 1278314..5454765 100644
--- a/mtcdt/ap1-gpiob-0.0.dtso
+++ b/mtcdt/ap1-gpiob-0.0.dtso
@@ -6,8 +6,8 @@
/*
* Location(s):
- * Put: MTCDT/0.0/ap1-gpiob.dtbo
- * Link: MTCDTIP/0.0/ap1-gpiob.dtbo
+ * Put: MTCDT/0.0/gpiob/ap1-gpiob.dtbo
+ * Link: MTCDTIP/0.0/gpiob/ap1-gpiob.dtbo
*/
#include <dt-bindings/dma/at91.h>
diff --git a/mtcdt/ap1-gpiob-0.2.dtso b/mtcdt/ap1-gpiob-0.2.dtso
index 0fb7a23..1a6d796 100644
--- a/mtcdt/ap1-gpiob-0.2.dtso
+++ b/mtcdt/ap1-gpiob-0.2.dtso
@@ -6,8 +6,8 @@
/*
* Location(s):
- * Put: MTCDT/0.2/ap1-gpiob.dtbo
- * Link: MTCDTIP/0.1/ap1-gpiob.dtbo
+ * Put: MTCDT/0.2/gpiob/ap1-gpiob.dtbo
+ * Link: MTCDTIP/0.1/gpiob/ap1-gpiob.dtbo
*/
#include <dt-bindings/dma/at91.h>
diff --git a/mtcdt/ap1-lora-0.0.dtso b/mtcdt/ap1-lora-0.0.dtso
new file mode 100644
index 0000000..c314fe2
--- /dev/null
+++ b/mtcdt/ap1-lora-0.0.dtso
@@ -0,0 +1,49 @@
+/*
+ * DTS overlay for MTCDT 0.0/0.1 hardware versions.
+ */
+
+/dts-v1/;
+
+/*
+ * Location(s):
+ * Put: MTCDT/0.0/lora/ap1-lora.dtbo
+ */
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/gpio/mt-at91.h>
+
+/ {
+ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+ model = "Multi-Tech Systems MTCDT-0.0";
+ fragment@0 {
+ target-path = "/ahb/apb/spi@f0000000";
+ __overlay__ {
+ status = "okay";
+ cs-gpios = <GPIO0_PH 4 0>, <GPIO0_PH 2 0>, <GPIO0_PH 3 0>, <GPIO0_PH 5 0>;
+ ap1-spi@0 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+ ap1-spi@1 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <2000000>;
+ reg = <1>;
+ };
+ ap1-spi@2 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <2000000>;
+ reg = <2>;
+ };
+ ap1-din@3 {
+ compatible = "mts-io-ap1-din";
+ spi-max-frequency = <1000000>;
+ reg = <3>;
+ };
+ }; /*overlay*/
+ }; /*fragment@0*/
+};
diff --git a/mtcdt/ap2-gpiob-0.0.dtso b/mtcdt/ap2-gpiob-0.0.dtso
index 225aa72..dce248f 100644
--- a/mtcdt/ap2-gpiob-0.0.dtso
+++ b/mtcdt/ap2-gpiob-0.0.dtso
@@ -7,10 +7,10 @@
/*
* AP2 is the same for MTCDT-0.0 through MTCDT-0.2
* Location(s):
- * Put: MTCDT/0.0/ap2-gpiob.dtbo
- * Link: MTCDT/0.2/ap2-gpiob.dtbo
- * Link: MTCDTIP/0.0/ap2-gpiob.dtbo
- * Link: MTCDTIP/0.1/ap2-gpiob.dtbo
+ * Put: MTCDT/0.0/gpiob/ap2-gpiob.dtbo
+ * Link: MTCDT/0.2/gpiob/ap2-gpiob.dtbo
+ * Link: MTCDTIP/0.0/gpiob/ap2-gpiob.dtbo
+ * Link: MTCDTIP/0.1/gpiob/ap2-gpiob.dtbo
*/
#include <dt-bindings/dma/at91.h>
diff --git a/mtcdt/ap2-lora-0.0.dtso b/mtcdt/ap2-lora-0.0.dtso
new file mode 100644
index 0000000..d72e47c
--- /dev/null
+++ b/mtcdt/ap2-lora-0.0.dtso
@@ -0,0 +1,49 @@
+/*
+ * DTS overlay for MTCDT 0.0/0.1 hardware versions.
+ */
+
+/dts-v1/;
+
+/*
+ * Location(s):
+ * Put: MTCDT/0.0/lora/ap2-lora.dtbo
+ */
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/gpio/mt-at91.h>
+
+/ {
+ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+ model = "Multi-Tech Systems MTCDT-0.0";
+ fragment@0 {
+ target-path = "/ahb/apb/spi@f0004000";
+ __overlay__ {
+ status = "okay";
+ cs-gpios = <GPIO2_PH 15 0>, <GPIO2_PH 16 0>, <GPIO2_PH 17 0>, <GPIO2_PH 18 0>;
+ ap2-spi@0 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+ ap2-spi@1 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <1000000>;
+ reg = <1>;
+ };
+ ap2-spi@2 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <2000000>;
+ reg = <2>;
+ };
+ ap2-din@3 {
+ compatible = "mts-io-ap2-din";
+ spi-max-frequency = <1000000>;
+ reg = <3>;
+ };
+ }; /*overlay*/
+ }; /*fragment@0*/
+};
diff --git a/mtcdt/pins-0.0.dtso b/mtcdt/pins-0.0.dtso
new file mode 100644
index 0000000..0844052
--- /dev/null
+++ b/mtcdt/pins-0.0.dtso
@@ -0,0 +1,53 @@
+/*
+ * DTS file for Multi-Tech Systems MTCDT 0.0 Hardware
+ *
+ * Copyright (C) 2021 by Multi-Tech Systems,
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/*
+ * Location(s):
+ * Put: MTCDT/0.0/pins.dtbo
+ */
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/gpio/mt-at91.h> // Explicit PHandles
+
+/dts-v1/;
+
+/ {
+ model = "Multi-Tech Systems MTCDT-0.0";
+ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+ fragment@0 {
+ target-path = "/mts-io";
+ __overlay__ {
+ status = "okay";
+ WIFI_BT_LPWKUP-gpios = <GPIO0_PH 6 GPIO_ACTIVE_HIGH>;
+ CD_LED-gpios = <GPIO0_PH 25 GPIO_ACTIVE_HIGH>;
+ SIG1_LED-gpios = <GPIO0_PH 26 GPIO_ACTIVE_HIGH>;
+ SIG2_LED-gpios = <GPIO0_PH 27 GPIO_ACTIVE_HIGH>;
+ SIG3_LED-gpios = <GPIO0_PH 28 GPIO_ACTIVE_HIGH>;
+
+ AP1_GPIO3-gpios = <GPIO2_PH 8 GPIO_ACTIVE_HIGH>;
+ AP1_GPIO4-gpios = <GPIO2_PH 9 GPIO_ACTIVE_HIGH>;
+ AP1_TBD1-gpios = <GPIO2_PH 10 GPIO_ACTIVE_HIGH>;
+ AP1_TBD2-gpios = <GPIO2_PH 11 GPIO_ACTIVE_HIGH>;
+ AP1_TBD3-gpios = <GPIO2_PH 12 GPIO_ACTIVE_HIGH>;
+ AP1_TBD4-gpios = <GPIO2_PH 13 GPIO_ACTIVE_HIGH>;
+ AP1_TBD5-gpios = <GPIO2_PH 14 GPIO_ACTIVE_HIGH>;
+ AP2_GPIO3-gpios = <GPIO2_PH 22 GPIO_ACTIVE_HIGH>;
+ AP2_GPIO4-gpios = <GPIO2_PH 23 GPIO_ACTIVE_HIGH>;
+ AP2_TBD1-gpios = <GPIO2_PH 24 GPIO_ACTIVE_HIGH>;
+ AP2_TBD2-gpios = <GPIO2_PH 25 GPIO_ACTIVE_HIGH>;
+ AP2_TBD3-gpios = <GPIO2_PH 26 GPIO_ACTIVE_HIGH>;
+ AP2_TBD4-gpios = <GPIO2_PH 27 GPIO_ACTIVE_HIGH>;
+ AP2_TBD5-gpios = <GPIO2_PH 28 GPIO_ACTIVE_HIGH>;
+
+ };
+ }; /* fragment@0 */
+};
diff --git a/mtcdt/pins-0.2.dtso b/mtcdt/pins-0.2.dtso
new file mode 100644
index 0000000..0e9ef6a
--- /dev/null
+++ b/mtcdt/pins-0.2.dtso
@@ -0,0 +1,53 @@
+/*
+ * DTS file for Multi-Tech Systems MTCDT 0.2 Hardware
+ *
+ * Copyright (C) 2021 by Multi-Tech Systems,
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/*
+ * Location(s):
+ * Put: MTCDT/0.2/pins.dtbo
+ */
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/gpio/mt-at91.h> // Explicit PHandles
+
+/dts-v1/;
+
+/ {
+ model = "Multi-Tech Systems MTCDT-0.2";
+ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+ fragment@0 {
+ target-path = "/mts-io";
+ __overlay__ {
+ AP1_GPIO3-gpios = <GPIO2_PH 10 GPIO_ACTIVE_HIGH>;
+ AP1_GPIO4-gpios = <GPIO2_PH 11 GPIO_ACTIVE_HIGH>;
+ AP2_GPIO4-gpios = <GPIO2_PH 29 GPIO_ACTIVE_HIGH>;
+ AP2_GPIO3-gpios = <GPIO2_PH 30 GPIO_ACTIVE_HIGH>;
+
+ SIG3_LED-gpios = <GPIO4_PCA9557_PH 0 GPIO_ACTIVE_HIGH>;
+ WIFI_BT_LPWKUP-gpios = <GPIO4_PCA9557_PH 1 GPIO_ACTIVE_HIGH>;
+ RADIO_STATUS-gpios = <GPIO4_PCA9557_PH 2 GPIO_ACTIVE_HIGH>;
+ AP1_TDB1-gpios = <GPIO4_PCA9557_PH 3 GPIO_ACTIVE_HIGH>;
+ AP1_TDB2-gpios = <GPIO4_PCA9557_PH 4 GPIO_ACTIVE_HIGH>;
+ AP1_TDB3-gpios = <GPIO4_PCA9557_PH 5 GPIO_ACTIVE_HIGH>;
+ AP1_TDB4-gpios = <GPIO4_PCA9557_PH 6 GPIO_ACTIVE_HIGH>;
+ AP1_TDB5-gpios = <GPIO4_PCA9557_PH 7 GPIO_ACTIVE_HIGH>;
+
+ CD_LED-gpios = <GPIO5_PCA9557_PH 0 GPIO_ACTIVE_HIGH>;
+ SIG1_LED-gpios = <GPIO5_PCA9557_PH 1 GPIO_ACTIVE_HIGH>;
+ SIG2_LED-gpios = <GPIO5_PCA9557_PH 2 GPIO_ACTIVE_HIGH>;
+ AP2_TDB1-gpios = <GPIO5_PCA9557_PH 3 GPIO_ACTIVE_HIGH>;
+ AP2_TDB2-gpios = <GPIO5_PCA9557_PH 4 GPIO_ACTIVE_HIGH>;
+ AP2_TDB3-gpios = <GPIO5_PCA9557_PH 5 GPIO_ACTIVE_HIGH>;
+ AP2_TDB4-gpios = <GPIO5_PCA9557_PH 6 GPIO_ACTIVE_HIGH>;
+ AP2_TDB5-gpios = <GPIO5_PCA9557_PH 7 GPIO_ACTIVE_HIGH>;
+ };
+ }; /* fragment@0 */
+};
diff --git a/mtcpmhs/ap1-003-0.0.dtso b/mtcpmhs/ap1-003-0.0.dtso
index 7ceb4ee..e0580dc 100644
--- a/mtcpmhs/ap1-003-0.0.dtso
+++ b/mtcpmhs/ap1-003-0.0.dtso
@@ -6,7 +6,7 @@
/*
* Location(s):
- * Put: MTCDT3/0.0/ap1-003.dtbo
+ * Put: MTCDT3/0.0/lora/ap1-003.dtbo
*/
#include "am4372.dtsi"
diff --git a/mtcpmhs/ap1-gpiob-0.0.dtso b/mtcpmhs/ap1-gpiob-0.0.dtso
index aeea8c4..f6b1c4a 100644
--- a/mtcpmhs/ap1-gpiob-0.0.dtso
+++ b/mtcpmhs/ap1-gpiob-0.0.dtso
@@ -6,7 +6,7 @@
/*
* Location(s):
- * Put: MTCDT3/0.0/ap1-gpiob.dtbo
+ * Put: MTCDT3/0.0/gpiob/ap1-gpiob.dtbo
*/
#include "am4372.dtsi"
diff --git a/mtcpmhs/ap1-lora-0.0.dtso b/mtcpmhs/ap1-lora-0.0.dtso
index 157e545..7f7b839 100644
--- a/mtcpmhs/ap1-lora-0.0.dtso
+++ b/mtcpmhs/ap1-lora-0.0.dtso
@@ -6,7 +6,7 @@
/*
* Location(s):
- * Put: MTCDT3/0.0/ap1-lora.dtbo
+ * Put: MTCDT3/0.0/lora/ap1-lora.dtbo
*/
#include "am4372.dtsi"
diff --git a/mtcpmhs/ap2-003-0.0.dtso b/mtcpmhs/ap2-003-0.0.dtso
index 93f7de4..bb7652e 100644
--- a/mtcpmhs/ap2-003-0.0.dtso
+++ b/mtcpmhs/ap2-003-0.0.dtso
@@ -6,7 +6,7 @@
/*
* Location(s):
- * Put: MTCDT3/0.0/ap2-003.dtbo
+ * Put: MTCDT3/0.0/lora/ap2-003.dtbo
*/
#include "am4372.dtsi"
diff --git a/mtcpmhs/ap2-gpiob-0.0.dtso b/mtcpmhs/ap2-gpiob-0.0.dtso
index 47089af..5950938 100644
--- a/mtcpmhs/ap2-gpiob-0.0.dtso
+++ b/mtcpmhs/ap2-gpiob-0.0.dtso
@@ -6,7 +6,7 @@
/*
* Location(s):
- * Put: MTCDT3/0.0/ap2-gpiob.dtbo
+ * Put: MTCDT3/0.0/gpiob/ap2-gpiob.dtbo
*/
#include "am4372.dtsi"
diff --git a/mtcpmhs/ap2-lora-0.0.dtso b/mtcpmhs/ap2-lora-0.0.dtso
index babae50..f5a1157 100644
--- a/mtcpmhs/ap2-lora-0.0.dtso
+++ b/mtcpmhs/ap2-lora-0.0.dtso
@@ -6,7 +6,7 @@
/*
* Location(s):
- * Put: MTCDT3/0.0/ap2-lora.dtbo
+ * Put: MTCDT3/0.0/lora/ap2-lora.dtbo
*/
#include "am4372.dtsi"
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-21 12:55:32 +0000