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authorHarsh Sharma <harsh.sharma@multitech.com>2021-10-12 09:27:57 -0500
committerHarsh Sharma <harsh.sharma@multitech.com>2021-10-12 09:27:57 -0500
commitd9846f23826db7744fbb3c187e2de2a76b54d6ac (patch)
tree6356a8a777fdcc7653c6e0f71422b40f6dff3241 /mtcdt/ap1-lora-0.0.dtso
parentdbf084f9a77c5be95613e356854eab7570f34eab (diff)
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Cleaned up lora/gpiob overlay for mtcdt1.0.5
Diffstat (limited to 'mtcdt/ap1-lora-0.0.dtso')
-rw-r--r--mtcdt/ap1-lora-0.0.dtso31
1 files changed, 24 insertions, 7 deletions
diff --git a/mtcdt/ap1-lora-0.0.dtso b/mtcdt/ap1-lora-0.0.dtso
index a05b725..72a8fea 100644
--- a/mtcdt/ap1-lora-0.0.dtso
+++ b/mtcdt/ap1-lora-0.0.dtso
@@ -1,5 +1,5 @@
/*
- * DTS overlay for MTCDT 0.0 hardware version.
+ * DTS overlay for MTCDT hardware version.
*/
/dts-v1/;
@@ -7,6 +7,7 @@
/*
* Location(s):
* Put: MTCDT/0.0/ap1-lora.dtbo
+ * Link: MTCDT/0.1/ap1-lora.dtbo
*/
#include <dt-bindings/dma/at91.h>
@@ -15,17 +16,33 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
-
/ {
- compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+ compatible = "atmel,at91rm9200-spi";
fragment@0 {
- target-path = "/ahb/apb/spi@f0000000";
+ target-path = "/ahb/apb/spi@f0000000";
+/* target = <0x75>;*/
__overlay__ {
+ status = "okay";
+ ap1-spi@0 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+ ap1-spi@1 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <2000000>;
+ reg = <1>;
+ };
ap1-spi@2 {
compatible = "mts,mtac";
- spi-max-frequency = <0x1e8480>;
- reg = <0x2>;
- }; /*ap1-spi*/
+ spi-max-frequency = <2000000>;
+ reg = <2>;
+ };
+ ap1-din@3 {
+ compatible = "mts-io-ap1-din";
+ spi-max-frequency = <1000000>;
+ reg = <3>;
+ };
}; /*overlay*/
}; /*fragment@0*/
};