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| author | Patrick Murphy <patrick.muprphy@multitech.com> | 2021-06-17 08:46:04 -0500 |
|---|---|---|
| committer | Patrick Murphy <patrick.muprphy@multitech.com> | 2021-06-17 08:46:04 -0500 |
| commit | 37da698f503961a95ee0e09a5f4da371e7b81f46 (patch) | |
| tree | 102dc90d00ec160c49de5a597a91fd769535e866 | |
| parent | af13a8292f187945bc5874f941784eea6ff7f2a0 (diff) | |
| download | mt-dt-overlay-37da698f503961a95ee0e09a5f4da371e7b81f46.tar.gz mt-dt-overlay-37da698f503961a95ee0e09a5f4da371e7b81f46.tar.bz2 mt-dt-overlay-37da698f503961a95ee0e09a5f4da371e7b81f46.zip | |
added 4 overlays to restore lora packet forwarder behavior
| -rw-r--r-- | mtcdt/ap1-lora-0.0.dtso | 31 | ||||
| -rw-r--r-- | mtcdt/ap2-lora-0.0.dtso | 30 | ||||
| -rw-r--r-- | mtcpmhs/ap1-lora-0.0.dtso | 29 | ||||
| -rw-r--r-- | mtcpmhs/ap2-lora-0.0.dtso | 29 |
4 files changed, 119 insertions, 0 deletions
diff --git a/mtcdt/ap1-lora-0.0.dtso b/mtcdt/ap1-lora-0.0.dtso new file mode 100644 index 0000000..1412cee --- /dev/null +++ b/mtcdt/ap1-lora-0.0.dtso @@ -0,0 +1,31 @@ +/* + * DTS overlay for MTCDT 0.0 hardware version. + */ + +/dts-v1/; + +/* + * Location(s): + * Put: MTCDT/0.0/ap1-lora.dtbo + */ + +#include <dt-bindings/dma/at91.h> +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> + + +/ { + compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; + fragment@0 { + target-path = "/ahb/apb/spi@f0000000 "; + __overlay__ { + ap1-spi@2 { + compatible = "mts,mtac"; + spi-max-frequency = <0x1e8480>; + reg = <0x2>; + }; /*ap1-spi*/ + }; /*overlay*/ + }; /*fragment@0*/ +}; diff --git a/mtcdt/ap2-lora-0.0.dtso b/mtcdt/ap2-lora-0.0.dtso new file mode 100644 index 0000000..68a0c79 --- /dev/null +++ b/mtcdt/ap2-lora-0.0.dtso @@ -0,0 +1,30 @@ +/* + * DTS overlay for MTCDT 0.0 hardware version. + */ + +/dts-v1/; + +/* + * Location(s): + * Put: MTCDT/0.0/ap2-lora.dtbo + */ + +#include <dt-bindings/dma/at91.h> +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> + +/ { + compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; + fragment@0 { + target-path = "/ahb/apb/spi@f0004000"; + __overlay__ { + ap2-spi@2 { + compatible = "mts,mtac"; + spi-max-frequency = <0x1e8480>; + reg = <0x2>; + }; /*ap2-spi*/ + }; /*overlay*/ + }; /*fragment@0*/ +}; diff --git a/mtcpmhs/ap1-lora-0.0.dtso b/mtcpmhs/ap1-lora-0.0.dtso new file mode 100644 index 0000000..157e545 --- /dev/null +++ b/mtcpmhs/ap1-lora-0.0.dtso @@ -0,0 +1,29 @@ +/* + * DTS overlay for MTCPM 0.0 hardware version. + */ + +/dts-v1/; + +/* + * Location(s): + * Put: MTCDT3/0.0/ap1-lora.dtbo + */ + +#include "am4372.dtsi" +#include <dt-bindings/pinctrl/am43xx.h> +#include <dt-bindings/pwm/pwm.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43"; + fragment@0 { + target-path = "/ocp@44000000/spi@48030000"; + __overlay__ { + ap1-spi@2 { + compatible = "mts,mtac"; + spi-max-frequency = <0x1e8480>; + reg = <0x2>; + }; /*ap1-spi*/ + }; /*overlay*/ + }; /*fragment@0*/ +}; diff --git a/mtcpmhs/ap2-lora-0.0.dtso b/mtcpmhs/ap2-lora-0.0.dtso new file mode 100644 index 0000000..babae50 --- /dev/null +++ b/mtcpmhs/ap2-lora-0.0.dtso @@ -0,0 +1,29 @@ +/* + * DTS overlay for MTCPM 0.0 hardware version. + */ + +/dts-v1/; + +/* + * Location(s): + * Put: MTCDT3/0.0/ap2-lora.dtbo + */ + +#include "am4372.dtsi" +#include <dt-bindings/pinctrl/am43xx.h> +#include <dt-bindings/pwm/pwm.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43"; + fragment@0 { + target-path = "/ocp@44000000/spi@481a2000"; + __overlay__ { + ap2-spi@2 { + compatible = "mts,mtac"; + spi-max-frequency = <0x1e8480>; + reg = <0x2>; + }; /*ap2-spi*/ + }; /*overlay*/ + }; /*fragment@0*/ +}; |