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diff -raNu old/include/configs/at91sam9x5ek.h new/include/configs/at91sam9x5ek.h
--- old/include/configs/at91sam9x5ek.h 2017-05-04 13:59:37.381346896 -0500
+++ new/include/configs/at91sam9x5ek.h 2017-05-04 18:11:04.366618638 -0500
@@ -9,9 +9,12 @@
#ifndef __CONFIG_H__
#define __CONFIG_H__
+#include <linux/kconfig.h>
#include <asm/hardware.h>
-#define CONFIG_SYS_TEXT_BASE 0x26f00000
+#define USE_MTCDT
+#define CONFIG_SYS_TEXT_BASE 0x2ef00000
+
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
@@ -26,6 +29,9 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_MISC_INIT_R /* enable platform-dependent misc_init_r() */
+
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO
@@ -36,6 +42,8 @@
#define CONFIG_USART_ID ATMEL_ID_SYS
/* LCD */
+/* MTCDT has no LCD */
+#if !defined(MTCDT)
#define CONFIG_LCD
#define LCD_BPP LCD_COLOR16
#define LCD_OUTPUT_BPP 24
@@ -46,8 +54,15 @@
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#endif /* !defined(MTCDT) */
+
+/* check for keypress even if bootdelay is 0 */
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+/*STATUS LED*/
+#define BOOT_STATUS_LED AT91_PIN_PA24
+
/*
* BOOTP options
*/
@@ -59,10 +74,13 @@
/* no NOR flash */
#define CONFIG_SYS_NO_FLASH
-/*
- * Command line configuration.
+/* Compat needed or i2c read/write/init is not defined */
+#define CONFIG_DM_I2C_COMPAT
+
+/* Required to prevent conflicting definitions of
+ * I2C_GET_BUS and I2C_SET_BUS
*/
-#define CONFIG_CMD_NAND
+#define CONFIG_DM_I2C
/*
* define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
@@ -72,7 +90,7 @@
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
+#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
@@ -94,13 +112,30 @@
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
+/* MTCDT nand ready is PC31 */
+#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC31
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC 1
#define CONFIG_ATMEL_NAND_HW_PMECC 1
-#define CONFIG_PMECC_CAP 2
+
+/* MTCDT: 4-bit PMECC */
+#define CONFIG_PMECC_CAP 4
#define CONFIG_PMECC_SECTOR_SIZE 512
+/*
++ * CONFIG_PMECC_INDEX_TABLE_OFFSET has been replaced by:
++ * ATMEL_PMECC_INDEX_OFFSET_512 and
++ * ATMEL_PMECC_INDEX_OFFSET_1024
++ *
++ * Which is used depends on:
++ * host->pmecc_sector_size == 512
++ *
++ * 2012.10:
++ * #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
++ * 2016.03 (at91sam9x5.h):
++ * 182:#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
++ */
+
#define CONFIG_CMD_NAND_TRIMFFS
@@ -147,20 +182,36 @@
#endif
#endif
+#define CONFIG_SYS_I2C_SOFT
+#define CONFIG_SOFT_I2C
+#define CONFIG_SOFT_I2C_GPIO_SCL AT91_PIN_PA31
+#define CONFIG_SOFT_I2C_GPIO_SDA AT91_PIN_PA30
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED
+/* Values from previous levels of Conduit U-Boot */
+#define CONFIG_SYS_I2C_SLAVE 0xfe
+#define I2C_RXTX_LEN 128
+
+/* I2C eeprom support */
+#define CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* at24c04 */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END 0x26e00000
+#define CONFIG_SYS_MEMTEST_END 0x2ee00000
#ifdef CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0xc0000
-#define CONFIG_ENV_OFFSET_REDUND 0x100000
+#define CONFIG_ENV_OFFSET_REDUND 0x160000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND "nand read " \
- "0x22000000 0x200000 0x300000; " \
- "bootm 0x22000000"
+/* MTCDT: read from env variables for boot */
+#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
+
#elif defined(CONFIG_SYS_USE_SPIFLASH)
/* bootstrap + u-boot + env + linux in spi flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
@@ -197,6 +248,9 @@
"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
"root=/dev/mmcblk0p2 " \
"rw rootfstype=ext4 rootwait"
+#elif defined(USE_MTCDT)
+/* MTCDT uses jffs2 */
+#define CONFIG_BOOTARGS "mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2"
#else
#define CONFIG_BOOTARGS \
"console=ttyS0,115200 earlyprintk " \
@@ -274,4 +328,20 @@
#endif
+/* MTCDT defaults */
+#define CONFIG_ENV_OVERWRITE 1 /* Allow Overwrite of serial# & ethaddr */
+#define CONFIG_ETHADDR 00:08:00:87:00:02
+#define CONFIG_IPADDR 192.168.2.1
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_SERVERIP 192.168.2.2
+#define CONFIG_HOSTNAME AT91SAM9G25
+#define CONFIG_LOADADDR 0x22000000
+
+/* MTCDT - enable watchdog */
+#define CONFIG_AT91SAM9_WATCHDOG 1
+#define CONFIG_HW_WATCHDOG 1
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "kernel_addr=0x200000\0" \
+ ""
+
#endif
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