Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig
===================================================================
--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig	2013-04-11 05:07:35.000000000 -0500
+++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig	2013-04-29 15:13:01.390913836 -0500
@@ -42,7 +42,8 @@
 ALLOW_PIO3=y
 CONFIG_HAS_PIO3=y
 CPU_HAS_PMECC=y
-CONFIG_LOAD_ONE_WIRE=y
+# MTS: don't load one wire
+# CONFIG_LOAD_ONE_WIRE is not set
 # CONFIG_MMC_SUPPORT is not set
 
 #
@@ -81,8 +82,8 @@
 #
 # PMECC Configuration
 #
-CONFIG_PMECC_CORRECT_BITS_2=y
-# CONFIG_PMECC_CORRECT_BITS_4 is not set
+# CONFIG_PMECC_CORRECT_BITS_2 is not set
+CONFIG_PMECC_CORRECT_BITS_4=y
 # CONFIG_PMECC_CORRECT_BITS_8 is not set
 # CONFIG_PMECC_CORRECT_BITS_12 is not set
 # CONFIG_PMECC_CORRECT_BITS_24 is not set
@@ -116,4 +117,5 @@
 # CONFIG_USER_HW_INIT is not set
 CONFIG_THUMB=y
 CONFIG_SCLK=y
-CONFIG_DISABLE_WATCHDOG=y
+# MTS: don't disable watchdog
+# CONFIG_DISABLE_WATCHDOG is not set
Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c
===================================================================
--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5ek.c	2019-04-04 15:49:54.143358228 -0500
+++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c	2019-04-04 17:31:57.691176941 -0500
@@ -53,6 +53,31 @@
 extern void hw_init_hook(void);
 #endif
 
+
+static void initialize_mt_gpio(void)
+{
+ 	/* Configure DBGU pins */
+	const struct pio_desc mt_gpio_pins[] = {
+		/* Misc. pins -- Pins PD15-PD18 belong to PERIPH
+		 * B A20-A25 until bootstrap shuts them down.
+                 * This code prevents these pins from being used
+                 * during boot, since we do not
+                 * need these pins to boot the system and we
+                 * do not want resets to toggle needlessly.
+		 */
+		{"GNSS-RESET",AT91C_PIN_PD(15), 1, PIO_PULLUP, PIO_OUTPUT},
+		{"SECURE-RESET",AT91C_PIN_PD(16), 1, PIO_PULLUP, PIO_OUTPUT},
+		{"MTQ-RESET",AT91C_PIN_PD(17), 1, PIO_PULLUP, PIO_OUTPUT},
+		{"USBHUB-RESET",AT91C_PIN_PD(18), 1, PIO_PULLUP, PIO_OUTPUT},
+		{"GNSS-INT",AT91C_PIN_PD(19), 1, PIO_PULLUP, PIO_OUTPUT},
+		{"WIFI-BT-LPMODE",AT91C_PIN_PD(20), 0, PIO_PULLUP, PIO_INPUT},
+		{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
+        };
+
+	pio_configure(mt_gpio_pins);
+}
+
+
 static void at91_dbgu_hw_init(void)
 {
 	/* Configure DBGU pins */
@@ -198,6 +223,9 @@
 	slowclk_enable_osc32();
 #endif
 
+        /* Initialize MT GPIO */
+        initialize_mt_gpio();
+
 	/* Initialize dbgu */
 	initialize_dbgu();
 
@@ -322,10 +350,8 @@
 
 	reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA);
 	reg |= AT91C_EBI_CS3A_SM;
-	if (get_cm_rev() == 'A')
-		reg &= ~AT91C_EBI_NFD0_ON_D16;
-	else
-		reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
+	/* MTR */
+	reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
 
 	reg &= ~AT91C_EBI_DRV;
 	writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA);
@@ -355,9 +381,7 @@
 		AT91C_BASE_SMC + SMC_CTRL3);
 
 	/* Configure the PIO controller */
-	if (get_cm_rev() == 'A')
-		pio_configure(nand_pins_lo);
-	else
+	/* MTR2 */
 		pio_configure(nand_pins_hi);
 
 	writel((1 << AT91C_ID_PIOC_D), (PMC_PCER + AT91C_BASE_PMC));