Index: at91bootstrap-3.5.2/driver/at91_slowclk.c
===================================================================
--- at91bootstrap-3.5.2.orig/driver/at91_slowclk.c	2013-01-30 04:01:20.000000000 -0600
+++ at91bootstrap-3.5.2/driver/at91_slowclk.c	2013-04-24 11:35:44.369827054 -0500
@@ -33,12 +33,17 @@
 {
 	unsigned int reg;
 
-	/*
-	 * Enable the 32768 Hz oscillator by setting the bit OSC32EN to 1
-	 */
+
 	reg = readl(AT91C_BASE_SCKCR);
-	reg |= AT91C_SLCKSEL_OSC32EN;
-	writel(reg, AT91C_BASE_SCKCR);
+
+	/* Only enable 32768 Hz oscillator if needed */
+	if ( !(reg & AT91C_SLCKSEL_OSC32EN) ) {
+		/*
+	 	 * Enable the 32768 Hz oscillator by setting the bit OSC32EN to 1
+	 	 */
+		reg |= AT91C_SLCKSEL_OSC32EN;
+		writel(reg, AT91C_BASE_SCKCR);
+	}
 
 	/* start a internal timer */
 	start_interval_timer();
@@ -50,32 +55,40 @@
 {
 	unsigned int reg;
 
-	/*
-	 * Wait 32768 Hz Startup Time for clock stabilization (software loop)
-	 * wait about 1s (1000ms)
-	 */
-	wait_interval_timer(1000);
-
-	/*
-	 * Switching from internal 32kHz RC oscillator to 32768 Hz oscillator
-	 * by setting the bit OSCSEL to 1
-	 */
 	reg = readl(AT91C_BASE_SCKCR);
-	reg |= AT91C_SLCKSEL_OSCSEL;
-	writel(reg, AT91C_BASE_SCKCR);
 
-	/*
-	 * Waiting 5 slow clock cycles for internal resynchronization
-	 * 5 slow clock cycles = ~153 us (5 / 32768)
-	 */
-	udelay(153);
-
-	/*
-	 * Disable the 32kHz RC oscillator by setting the bit RCEN to 0
-	 */
+	/* Only switch clock source if needed */
+	if ( !(reg & AT91C_SLCKSEL_OSCSEL) ) {
+		dbgu_print("Switching slow clock to external oscillator...\n\r");
+		/*
+		 * Wait 32768 Hz Startup Time for clock stabilization (software loop)
+		 * wait about 1s (1000ms)
+		 */
+		wait_interval_timer(1000);
+
+		/*
+		 * Switching from internal 32kHz RC oscillator to 32768 Hz oscillator
+		 * by setting the bit OSCSEL to 1
+		 */
+		reg |= AT91C_SLCKSEL_OSCSEL;
+		writel(reg, AT91C_BASE_SCKCR);
+
+		/*
+		 * Waiting 5 slow clock cycles for internal resynchronization
+		 * 5 slow clock cycles = ~153 us (5 / 32768)
+		 */
+		udelay(153);
+	}
+
+	/* Only disable internal RC oscillator if needed */
 	reg = readl(AT91C_BASE_SCKCR);
-	reg &= ~AT91C_SLCKSEL_RCEN;
-	writel(reg, AT91C_BASE_SCKCR);
+	if (reg | AT91C_SLCKSEL_RCEN) {
+		/*
+		 * Disable the 32kHz RC oscillator by setting the bit RCEN to 0
+		 */
+		reg &= ~AT91C_SLCKSEL_RCEN;
+		writel(reg, AT91C_BASE_SCKCR);
+	}
 
 	return 0;
 }