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-rw-r--r--recipes-kernel/linux/linux-at91-4.9/mtrv1/linux-4.9-mtrv1-device-tree.patch258
1 files changed, 258 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-at91-4.9/mtrv1/linux-4.9-mtrv1-device-tree.patch b/recipes-kernel/linux/linux-at91-4.9/mtrv1/linux-4.9-mtrv1-device-tree.patch
new file mode 100644
index 0000000..0f048a5
--- /dev/null
+++ b/recipes-kernel/linux/linux-at91-4.9/mtrv1/linux-4.9-mtrv1-device-tree.patch
@@ -0,0 +1,258 @@
+diff -aNru linux-4.9-orig/arch/arm/boot/dts/Makefile linux-4.9/arch/arm/boot/dts/Makefile
+--- linux-4.9-orig/arch/arm/boot/dts/Makefile 2018-11-28 17:48:26.197651897 -0600
++++ linux-4.9/arch/arm/boot/dts/Makefile 2018-11-28 17:49:26.441650114 -0600
+@@ -43,7 +43,8 @@
+ at91sam9g25ek.dtb \
+ at91sam9g35ek.dtb \
+ at91sam9x25ek.dtb \
+- at91sam9x35ek.dtb
++ at91sam9x35ek.dtb \
++ mtrv1.dtb
+ dtb-$(CONFIG_SOC_SAM_V7) += \
+ at91-kizbox2.dtb \
+ at91-sama5d2_ptc_ek.dtb \
+diff -Naru linux-4.9.87.orig/arch/arm/boot/dts/mtrv1.dts linux-4.9.87/arch/arm/boot/dts/mtrv1.dts
+--- linux-4.9.87.orig/arch/arm/boot/dts/mtrv1.dts 1969-12-31 18:00:00.000000000 -0600
++++ linux-4.9.87/arch/arm/boot/dts/mtrv1.dts 2018-12-17 18:33:03.880973445 -0600
+@@ -0,0 +1,241 @@
++/*
++ * DTS file for Multi-Tech Systems MTRv1 Hardware
++ *
++ * Copyright (C) 2016 by Multi-Tech Systems,
++ *
++ * Licensed under GPLv2 or later.
++ */
++
++/dts-v1/;
++#include "at91sam9g25.dtsi"
++
++/ {
++ model = "Multi-Tech Systems MTR";
++ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
++
++ chosen {
++ bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2";
++ };
++
++ memory {
++ reg = <0x20000000 0x8000000>;
++ };
++
++ clocks {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++
++ main_clock: clock@0 {
++ compatible = "atmel,osc", "fixed-clock";
++ clock-frequency = <12000000>;
++ };
++ };
++
++ ahb {
++ apb {
++ macb0: ethernet@f802c000 {
++ compatible = "cdns,at32ap7000-macb", "cdns,macb";
++ reg = <0xf802c000 0x4000>;
++ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_macb0_rmii>;
++ phy-mode = "rmii";
++ status = "okay";
++ };
++
++
++ pinctrl@fffff400 {
++ mmc0 {
++ pinctrl_board_mmc0: mmc0-board {
++ atmel,pins =
++ <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
++ };
++ };
++
++ nand {
++ pinctrl_nand: nand-0 {
++ atmel,pins =
++ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A Read Enable */
++ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD1 periph A Write Enable */
++ AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A Address Latch Enable */
++ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A Command Latch Enable */
++ AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
++ AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC31 gpio RDY/BUSY pin pull_up */
++ AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A Data bit 0 */
++ AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A Data bit 1 */
++ AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD8 periph A Data bit 2 */
++ AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD9 periph A Data bit 3 */
++ AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD10 periph A Data bit 4 */
++ AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD11 periph A Data bit 5 */
++ AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD12 periph A Data bit 6 */
++ AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD13 periph A Data bit 7 */
++ };
++
++ pinctrl_nand_16bits: nand_16bits-0 {
++ atmel,pins =
++ <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD14 periph A Data bit 8 */
++ AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD15 periph A Data bit 9 */
++ AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD16 periph A Data bit 10 */
++ AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD17 periph A Data bit 11 */
++ AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD18 periph A Data bit 12 */
++ AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD19 periph A Data bit 13 */
++ AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD20 periph A Data bit 14 */
++ AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD21 periph A Data bit 15 */
++ };
++ };
++
++ 1wire_cm {
++ pinctrl_1wire_cm: 1wire_cm-0 {
++ atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
++ };
++ };
++ };
++
++ rtc@fffffeb0 {
++ status = "okay";
++ };
++
++ i2c0: i2c@f8010000 {
++ compatible = "i2c-gpio";
++ status = "okay";
++
++ id_eeprom@56 {
++ compatible = "atmel,24c04";
++ reg = <0x56>;
++ pagesize = <16>;
++ };
++ };
++
++ dbgu: serial@fffff200 {
++ status = "okay";
++ };
++
++ uart0: serial@f8040000 {
++ status = "okay";
++ };
++ usb2: gadget@f803c000 {
++ atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
++ status = "okay";
++ };
++ watchdog@fffffe40 {
++ status = "okay";
++ };
++ };
++
++ nand0: nand@40000000 {
++ nand-bus-width = <8>;
++ nand-ecc-mode = "hw";
++ atmel,has-pmecc; /* Enable PMECC */
++ atmel,pmecc-sector-size = <512>;
++ status = "okay";
++ reg = < 0x40000000 0x10000000
++ 0xffffe000 0x600 /* PMECC Registers */
++ 0xffffe600 0x200 /* PMECC Error Location Registers */
++ 0x00100000 0x100000 /* PMECC looup table in ROM code */
++ >;
++ atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
++ gpios = < &pioC 31 GPIO_ACTIVE_HIGH
++ &pioD 4 GPIO_ACTIVE_HIGH
++ 0
++ >;
++ atmel,pmecc-cap = <4>;
++ atmel,nand-has-dma;
++
++ nand@0 {
++ label = "NANDFlash";
++ reg = <0x0 0x10000000>;
++ };
++ at91bootstrap@0 {
++ label = "at91bootstrap";
++ reg = <0x0 0x40000>;
++ };
++ uboot@40000 {
++ label = "u-Boot";
++ reg = <0x40000 0x80000>;
++ };
++ ubootconfig0@c0000 {
++ label = "u-Boot Config";
++ reg = <0xc0000 0xa0000>;
++ };
++ ubootconfig1@160000 {
++ label = "u-Boot Redundant Config";
++ reg = <0x160000 0xa0000>;
++ };
++ uImage@200000 {
++ label = "uImage";
++ reg = <0x200000 0x600000>;
++ };
++ config0@800000 {
++ label = "Config";
++ reg = <0x800000 0x800000>;
++ };
++ config1@1000000 {
++ label = "OEM Config";
++ reg = <0x1000000 0x800000>;
++ };
++ rootfs@1800000 {
++ label = "Rootfs";
++ reg = <0x1800000 0xe800000>;
++ };
++ };
++
++ usb0: ohci@00600000 {
++ status = "okay";
++ num-ports = <3>;
++ };
++
++ usb1: ehci@00700000 {
++ status = "okay";
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ pc21 {
++ label = "led-status";
++ gpios = <&pioC 21 GPIO_ACTIVE_LOW>;
++ linux,default-trigger = "default-on";
++ };
++ pc15 {
++ label = "led-b";
++ gpios = <&pioC 15 GPIO_ACTIVE_LOW>;
++ };
++ pc20 {
++ label = "led-c";
++ gpios = <&pioC 20 GPIO_ACTIVE_LOW>;
++ };
++ pc19 {
++ label = "led-d";
++ gpios = <&pioC 19 GPIO_ACTIVE_LOW>;
++ };
++ pc18 {
++ label = "led-e";
++ gpios = <&pioC 18 GPIO_ACTIVE_LOW>;
++ };
++ pc17 {
++ label = "led-f";
++ gpios = <&pioC 17 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ 1wire_cm {
++ compatible = "w1-gpio";
++ gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
++ linux,open-drain;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_1wire_cm>;
++ status = "okay";
++ };
++
++ i2c@0 {
++ status = "okay";
++
++ id_eeprom@56 {
++ compatible = "atmel,24c04";
++ reg = <0x56>;
++ pagesize = <16>;
++ };
++ };
++};