diff options
-rw-r--r-- | recipes-bsp/multitech/mts-id-eeprom_0.2.9.bb (renamed from recipes-bsp/multitech/mts-id-eeprom_0.2.8.bb) | 0 | ||||
-rw-r--r-- | recipes-bsp/multitech/mts-io/mts-io.mtcap.init | 17 | ||||
-rw-r--r-- | recipes-bsp/multitech/mts-io_1.5.1.bb (renamed from recipes-bsp/multitech/mts-io_1.5.0.bb) | 0 |
3 files changed, 16 insertions, 1 deletions
diff --git a/recipes-bsp/multitech/mts-id-eeprom_0.2.8.bb b/recipes-bsp/multitech/mts-id-eeprom_0.2.9.bb index ccf3521..ccf3521 100644 --- a/recipes-bsp/multitech/mts-id-eeprom_0.2.8.bb +++ b/recipes-bsp/multitech/mts-id-eeprom_0.2.9.bb diff --git a/recipes-bsp/multitech/mts-io/mts-io.mtcap.init b/recipes-bsp/multitech/mts-io/mts-io.mtcap.init index b4aa489..02d5834 100644 --- a/recipes-bsp/multitech/mts-io/mts-io.mtcap.init +++ b/recipes-bsp/multitech/mts-io/mts-io.mtcap.init @@ -2,12 +2,27 @@ lora_init() { # reset lora chip - mts-io-sysfs store lora-reset 0 + mts-io-sysfs store lora/reset 1 + mts-io-sysfs store lora/reset 0 + usleep 100000 + mts-io-sysfs store lora/reset 1 + + #Initialize FPGA + # usleep 100000 + # mts-io-sysfs store lora/creset 1 + # mts-io-sysfs store lora/creset 0 + # while [ "$(mts-io-sysfs show lora/cdone)" == "0" ]; do + # usleep 10 + # done + # mts-io-sysfs store lora/creset 1 } eth_init() { # reset eth phy + mts-io-sysfs store eth-reset 1 mts-io-sysfs store eth-reset 0 + usleep 100000 + mts-io-sysfs store eth-reset 1 } cell_init() { diff --git a/recipes-bsp/multitech/mts-io_1.5.0.bb b/recipes-bsp/multitech/mts-io_1.5.1.bb index 85b3de1..85b3de1 100644 --- a/recipes-bsp/multitech/mts-io_1.5.0.bb +++ b/recipes-bsp/multitech/mts-io_1.5.1.bb |