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author | Jesse Gilles <jgilles@multitech.com> | 2014-11-04 11:23:21 -0600 |
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committer | Jesse Gilles <jgilles@multitech.com> | 2014-11-04 11:23:21 -0600 |
commit | 812befa503067ad2bae5de58962ff38321c369ca (patch) | |
tree | b472b5118f62e97f760a5b23f3a72130e5ce235b /recipes-kernel/vizzini | |
download | meta-multitech-812befa503067ad2bae5de58962ff38321c369ca.tar.gz meta-multitech-812befa503067ad2bae5de58962ff38321c369ca.tar.bz2 meta-multitech-812befa503067ad2bae5de58962ff38321c369ca.zip |
initial commit with MTCDT support
Diffstat (limited to 'recipes-kernel/vizzini')
-rw-r--r-- | recipes-kernel/vizzini/files/vizzini.init | 22 | ||||
-rw-r--r-- | recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-enable-cts.patch | 32 | ||||
-rw-r--r-- | recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-rs485.patch | 102 | ||||
-rw-r--r-- | recipes-kernel/vizzini/kernel-module-vizzini-1.1/xr21v141x-lnx3.10-3.11.tar.gz | bin | 0 -> 16958 bytes | |||
-rw-r--r-- | recipes-kernel/vizzini/kernel-module-vizzini_1.1.bb | 10 | ||||
-rw-r--r-- | recipes-kernel/vizzini/vizzini.inc | 48 |
6 files changed, 214 insertions, 0 deletions
diff --git a/recipes-kernel/vizzini/files/vizzini.init b/recipes-kernel/vizzini/files/vizzini.init new file mode 100644 index 0000000..b49473f --- /dev/null +++ b/recipes-kernel/vizzini/files/vizzini.init @@ -0,0 +1,22 @@ +#!/bin/sh + +exit + +case $1 in + start) + echo "Loading vizzini module" + modprobe vizzini + ;; + + stop) + echo "Unloading vizzini module" + modprobe -r vizzini + ;; + + *) + echo "Usage: $0 {start|stop}" + exit 2 + ;; +esac + + diff --git a/recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-enable-cts.patch b/recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-enable-cts.patch new file mode 100644 index 0000000..12e6d04 --- /dev/null +++ b/recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-enable-cts.patch @@ -0,0 +1,32 @@ +Index: xr21v141x-lnx3.10-3.11/vizzini.c +=================================================================== +--- xr21v141x-lnx3.10-3.11.orig/vizzini.c 2014-04-04 19:58:55.000000000 -0500 ++++ xr21v141x-lnx3.10-3.11/vizzini.c 2014-04-16 15:05:16.470621233 -0500 +@@ -61,6 +61,9 @@ + #define DRIVER_AUTHOR "Ravi Reddy" + #define DRIVER_DESC "Exar USB UART Driver for XR21V141x " + ++#define UART_PIN_RTS 0x020 ++#define UART_GPIO_DIR 0x01b ++ + static struct usb_driver xr21v141x_driver; + static struct tty_driver *xr21v141x_tty_driver; + static struct xr21v141x *xr21v141x_table[XR21V141X_TTY_MINORS]; +@@ -1172,6 +1175,17 @@ + vizzini_set_reg(xr21v141x, block, UART_FLOW, flow); + vizzini_set_reg(xr21v141x, block, UART_GPIO_MODE, gpio_mode); + ++ /* if flow control hasn't been turned on, enable RTS for modem-like functionality */ ++ if (flow == UART_FLOW_MODE_NONE) { ++ char value; ++ vizzini_get_reg(xr21v141x, block, UART_GPIO_DIR, &value); ++ value |= UART_PIN_RTS; ++ vizzini_set_reg(xr21v141x, block, UART_GPIO_DIR, value); ++ vizzini_get_reg(xr21v141x, block, UART_GPIO_CLR, &value); ++ value |= UART_PIN_RTS; ++ vizzini_set_reg(xr21v141x, block, UART_GPIO_CLR, value); ++ } ++ + if (xr21v141x->trans9) { + /* Turn on wide mode if we're 9-bit transparent. */ + vizzini_set_reg(xr21v141x, EPLOCALS_REG_BLOCK, (block * MEM_EP_LOCALS_SIZE) + EP_WIDE_MODE, 1); diff --git a/recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-rs485.patch b/recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-rs485.patch new file mode 100644 index 0000000..6833e5b --- /dev/null +++ b/recipes-kernel/vizzini/kernel-module-vizzini-1.1/vizzini-1.1-rs485.patch @@ -0,0 +1,102 @@ +Index: xr21v141x-lnx3.10-3.11/vizzini.c +=================================================================== +--- xr21v141x-lnx3.10-3.11.orig/vizzini.c 2014-05-02 12:20:07.972225646 -0500 ++++ xr21v141x-lnx3.10-3.11/vizzini.c 2014-05-07 13:53:08.125405483 -0500 +@@ -892,6 +892,35 @@ + dev_dbg(&xr21v141x->control->dev, "vz_test_mode: selector=0x%02x\n", selector); + return retval < 0 ? retval : 0; + } ++static int xr21v141x_set_rs485(struct xr21v141x *xr21v141x, struct serial_rs485 *rs485conf) { ++ int block = xr21v141x->block; ++ int result = 0; ++ unsigned int gpio_mode, flow = 0; ++ ++ xr21v141x->rs485 = *rs485conf; ++ ++ if (xr21v141x->rs485.flags & SER_RS485_ENABLED) { ++ dev_info(&xr21v141x->control->dev, "Enabling RS485"); ++ ++ /* enable auto tranceiver enable on transmit, TX active high */ ++ gpio_mode = UART_GPIO_MODE_SEL_XCVR_EN_ACT | UART_GPIO_MODE_XCVR_EN_POL; ++ result = vizzini_set_reg(xr21v141x, block, UART_GPIO_MODE, gpio_mode); ++ if (result < 0) ++ dev_err(&xr21v141x->control->dev, "Error setting auto trans enable"); ++ ++ /* half duplex rs485 */ ++ flow = UART_FLOW_HALF_DUPLEX; ++ result = vizzini_set_reg(xr21v141x, block, UART_FLOW, flow); ++ if (result < 0) ++ dev_err(&xr21v141x->control->dev, "Error setting half duplex"); ++ } else { ++ dev_info(&xr21v141x->control->dev, "Disabling RS485 - flow control off"); ++ vizzini_set_reg(xr21v141x, block, UART_GPIO_MODE, UART_GPIO_MODE_SEL_GPIO); ++ vizzini_set_reg(xr21v141x, block, UART_FLOW, UART_FLOW_MODE_NONE); ++ } ++ ++ return 0; ++} + + static int xr21v141x_tty_ioctl(struct tty_struct *tty, + unsigned int cmd, unsigned long arg) +@@ -902,6 +931,8 @@ + unsigned int block, reg, val, match, preciseflags, unicast, broadcast, flow, selector; + char *data; + ++ struct serial_rs485 rs485conf; ++ + switch (cmd) { + case TIOCGSERIAL: /* gets serial port data */ + rv = get_serial_info(xr21v141x, (struct serial_struct __user *) arg); +@@ -910,6 +941,39 @@ + rv = set_serial_info(xr21v141x, (struct serial_struct __user *) arg); + break; + ++ case TIOCGRS485: ++ if (! arg) { ++ dev_err(&xr21v141x->control->dev, "%s - TIOCGRS485 arg invalid\n", __func__); ++ rv = -EFAULT; ++ break; ++ } ++ ++ if (copy_to_user((struct serial_rs485 *) arg, &(xr21v141x->rs485), sizeof(struct serial_rs485))) { ++ dev_err(&xr21v141x->control->dev, "%s - TIOCGRS485 copy_to_user fail\n", __func__); ++ rv = -EFAULT; ++ break; ++ } ++ rv = 0; ++ break; ++ ++ case TIOCSRS485: ++ if (! arg) { ++ dev_err(&xr21v141x->control->dev, "%s - TIOCSRS485 arg invalid\n", __func__); ++ rv = -EFAULT; ++ break; ++ } ++ ++ if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, sizeof(rs485conf))) { ++ dev_err(&xr21v141x->control->dev, "%s - TIOCSRS485 copy_from_user failed\n", __func__); ++ rv = -EFAULT; ++ break; ++ } ++ ++ vizzini_disable(xr21v141x); ++ rv = xr21v141x_set_rs485(xr21v141x, &rs485conf); ++ vizzini_enable(xr21v141x); ++ break; ++ + case VZIOC_GET_REG: + if (get_user(block, (int __user *)arg)) + return -EFAULT; +Index: xr21v141x-lnx3.10-3.11/vizzini.h +=================================================================== +--- xr21v141x-lnx3.10-3.11.orig/vizzini.h 2014-04-04 19:59:33.000000000 -0500 ++++ xr21v141x-lnx3.10-3.11/vizzini.h 2014-05-02 12:20:08.028225647 -0500 +@@ -282,7 +282,7 @@ + #ifdef VIZZINI_IWA + int iwa; + #endif +- ++ struct serial_rs485 rs485; + }; + + #define CDC_DATA_INTERFACE_TYPE 0x0a diff --git a/recipes-kernel/vizzini/kernel-module-vizzini-1.1/xr21v141x-lnx3.10-3.11.tar.gz b/recipes-kernel/vizzini/kernel-module-vizzini-1.1/xr21v141x-lnx3.10-3.11.tar.gz Binary files differnew file mode 100644 index 0000000..2bc7355 --- /dev/null +++ b/recipes-kernel/vizzini/kernel-module-vizzini-1.1/xr21v141x-lnx3.10-3.11.tar.gz diff --git a/recipes-kernel/vizzini/kernel-module-vizzini_1.1.bb b/recipes-kernel/vizzini/kernel-module-vizzini_1.1.bb new file mode 100644 index 0000000..beab42f --- /dev/null +++ b/recipes-kernel/vizzini/kernel-module-vizzini_1.1.bb @@ -0,0 +1,10 @@ +require vizzini.inc + +PR = "${INC_PR}.1" + +SRC_URI += "file://xr21v141x-lnx3.10-3.11.tar.gz \ + file://vizzini-1.1-enable-cts.patch \ + file://vizzini-1.1-rs485.patch \ + " +S = "${WORKDIR}/xr21v141x-lnx3.10-3.11" + diff --git a/recipes-kernel/vizzini/vizzini.inc b/recipes-kernel/vizzini/vizzini.inc new file mode 100644 index 0000000..def3f1b --- /dev/null +++ b/recipes-kernel/vizzini/vizzini.inc @@ -0,0 +1,48 @@ +DESCRIPTION = "USB Driver for Exar USB UARTs" +HOMEPAGE = "http://www.exar.com/connectivity/uart-and-bridging-solutions/usb-uarts/xr21v1414" +SECTION = "base" +PRIORITY = "optional" +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/GPL-2.0;md5=801f80980d171dd6425610833a22dbe6" + +INC_PR = "r1" + +SRC_URI = " \ + file://vizzini.init \ +" + +inherit module +inherit update-rc.d + +EXTRA_OEMAKE = " -C ${STAGING_KERNEL_DIR} \ + M=${S} \ + modules \ + " + +do_compile () { + unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS + oe_runmake +} + +PACKAGES = "${PN}" + +FILES_${PN} = "${base_libdir}/modules/${KERNEL_VERSION}/extra/vizzini.ko" +FILES_${PN} += "${sysconfdir}/init.d/vizzini" + +INITSCRIPT_NAME = "vizzini" +INITSCRIPT_PARAMS = "start 90 S ." + +PARALLEL_MAKE = "" + +do_install() { + install -m 0755 -d ${D}${base_libdir}/modules/${KERNEL_VERSION}/extra + # use cp instead of install so the driver doesn't get stripped + cp ${S}/vizzini.ko ${D}${base_libdir}/modules/${KERNEL_VERSION}/extra + cp ${S}/vizzini.h ${STAGING_KERNEL_DIR}/include/linux/ + cp ${S}/vizzini.h ${STAGING_INCDIR}/linux/ + cp ${S}/vzioctl.h ${STAGING_KERNEL_DIR}/include/linux/ + cp ${S}/vzioctl.h ${STAGING_INCDIR}/linux/ + + install -d ${D}${sysconfdir}/init.d + install -m 0755 ${WORKDIR}/vizzini.init ${D}${sysconfdir}/init.d/vizzini +} |