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authorJohn Klug <john.klug@multitech.com>2018-06-04 10:21:29 -0500
committerJohn Klug <john.klug@multitech.com>2018-06-04 10:21:29 -0500
commit90f57378fbfacd0ed0e6e11f02b1e60fab784518 (patch)
tree6d2ae69fc1f4cab3def2575707aba7f2b7fd36ae /recipes-bsp
parent7ce8011fb9ef377090fa047a3b75f2e91cd354a2 (diff)
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Add mtr stuff to mLinux
Diffstat (limited to 'recipes-bsp')
-rw-r--r--recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch60
-rw-r--r--recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtrv1-DDRlowDriveStrength.patch34
-rw-r--r--recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb4
-rw-r--r--recipes-bsp/multitech/mts-io/mts-io.init2
-rw-r--r--recipes-bsp/u-boot/u-boot-2016.09.01/mtr.patch270
-rw-r--r--recipes-bsp/u-boot/u-boot-2016.09.01/mtrv1.patch259
-rw-r--r--recipes-bsp/u-boot/u-boot_2016.09.01.bb7
7 files changed, 635 insertions, 1 deletions
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch
new file mode 100644
index 0000000..313bd91
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch
@@ -0,0 +1,60 @@
+Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig
+===================================================================
+--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig 2013-04-11 05:07:35.000000000 -0500
++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig 2013-04-29 15:13:01.390913836 -0500
+@@ -42,7 +42,8 @@
+ ALLOW_PIO3=y
+ CONFIG_HAS_PIO3=y
+ CPU_HAS_PMECC=y
+-CONFIG_LOAD_ONE_WIRE=y
++# MTS: don't load one wire
++# CONFIG_LOAD_ONE_WIRE is not set
+ # CONFIG_MMC_SUPPORT is not set
+
+ #
+@@ -81,8 +82,8 @@
+ #
+ # PMECC Configuration
+ #
+-CONFIG_PMECC_CORRECT_BITS_2=y
+-# CONFIG_PMECC_CORRECT_BITS_4 is not set
++# CONFIG_PMECC_CORRECT_BITS_2 is not set
++CONFIG_PMECC_CORRECT_BITS_4=y
+ # CONFIG_PMECC_CORRECT_BITS_8 is not set
+ # CONFIG_PMECC_CORRECT_BITS_12 is not set
+ # CONFIG_PMECC_CORRECT_BITS_24 is not set
+@@ -116,4 +117,5 @@
+ # CONFIG_USER_HW_INIT is not set
+ CONFIG_THUMB=y
+ CONFIG_SCLK=y
+-CONFIG_DISABLE_WATCHDOG=y
++# MTS: don't disable watchdog
++# CONFIG_DISABLE_WATCHDOG is not set
+Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c
+===================================================================
+--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5ek.c 2013-04-11 05:07:35.000000000 -0500
++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c 2013-04-29 15:14:44.578915819 -0500
+@@ -312,10 +312,8 @@
+
+ reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA);
+ reg |= AT91C_EBI_CS3A_SM;
+- if (get_cm_rev() == 'A')
+- reg &= ~AT91C_EBI_NFD0_ON_D16;
+- else
+- reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
++ /* MTR */
++ reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
+
+ reg &= ~AT91C_EBI_DRV;
+ writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA);
+@@ -345,9 +343,7 @@
+ AT91C_BASE_SMC + SMC_CTRL3);
+
+ /* Configure the PIO controller */
+- if (get_cm_rev() == 'A')
+- pio_configure(nand_pins_lo);
+- else
++ /* MTR2 */
+ pio_configure(nand_pins_hi);
+
+ writel((1 << AT91C_ID_PIOC_D), (PMC_PCER + AT91C_BASE_PMC));
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtrv1-DDRlowDriveStrength.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtrv1-DDRlowDriveStrength.patch
new file mode 100644
index 0000000..912a891
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtrv1-DDRlowDriveStrength.patch
@@ -0,0 +1,34 @@
+Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c
+===================================================================
+--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5ek.c 2015-09-29 09:55:07.335113881 -0500
++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c 2015-09-29 10:13:19.397489104 -0500
+@@ -81,7 +81,8 @@
+ | AT91C_DDRC2_CAS_3 /* CAS Latency 3 */
+ | AT91C_DDRC2_NB_BANKS_8 /* 8 banks */
+ | AT91C_DDRC2_DLL_RESET_DISABLED /* DLL not reset */
+- | AT91C_DDRC2_DECOD_INTERLEAVED);/*Interleaved decode*/
++ | AT91C_DDRC2_DIC_DS /* Low DDR Drive Strength */
++ | AT91C_DDRC2_DECOD_INTERLEAVED);/* Interleaved decode*/
+
+ /*
+ * Make sure to uncomment the following line if the DDR controller
+Index: at91bootstrap-3.5.3/main.c
+===================================================================
+--- at91bootstrap-3.5.3.orig/main.c 2013-04-11 05:07:35.000000000 -0500
++++ at91bootstrap-3.5.3/main.c 2015-09-29 10:10:21.354971492 -0500
+@@ -68,12 +68,15 @@
+ {
+ char *version = "AT91Bootstrap";
+ char *ver_num = " "AT91BOOTSTRAP_VERSION" ("COMPILE_TIME")";
++ char *feature = "DDR Drive Strength: low";
+
+ dbgu_print("\n\r");
+ dbgu_print("\n\r");
+ dbgu_print(version);
+ dbgu_print(ver_num);
+ dbgu_print("\n\r");
++ dbgu_print(feature);
++ dbgu_print("\n\r");
+ dbgu_print("\n\r");
+ }
+
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb b/recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb
index 2e5f086..66d28cb 100644
--- a/recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb
+++ b/recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb
@@ -16,6 +16,10 @@ S = "${WORKDIR}/git"
SRC_URI_append_mtcdt = " file://at91bootstrap-3.5.3-mtcdt.patch "
SRC_URI_append_mtcap = " file://at91bootstrap-3.5.3-mtcdt.patch "
+SRC_URI_append_mtr = " file://at91bootstrap-3.5.3-mtr.patch"
+SRC_URI_append_mtrv1 = " file://at91bootstrap-3.5.3-mtr.patch \
+ file://at91bootstrap-3.5.3-mtrv1-DDRlowDriveStrength.patch \
+"
# generate a bootstrap file padded with the header needed for 4-bit PMECC
# The padded file can be flashed via u-boot without any need to set the PMECC header using SAM-BA
diff --git a/recipes-bsp/multitech/mts-io/mts-io.init b/recipes-bsp/multitech/mts-io/mts-io.init
index aaf4cd4..ee127a5 100644
--- a/recipes-bsp/multitech/mts-io/mts-io.init
+++ b/recipes-bsp/multitech/mts-io/mts-io.init
@@ -196,7 +196,7 @@ set_gpslink() {
return
fi
- if [[ ${hw_name} == MTR ]] || [[ ${hw_name} == MTRV1 ]] ; then
+ if [[ ${hw_name} == MTR ]] || [[ ${hw_name} == MTRV1 ]] || [[ ${hw_name} == MTHS ]] ; then
ln -sf /dev/ttyS1 /dev/gps0
return
fi
diff --git a/recipes-bsp/u-boot/u-boot-2016.09.01/mtr.patch b/recipes-bsp/u-boot/u-boot-2016.09.01/mtr.patch
new file mode 100644
index 0000000..3ef68f2
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-2016.09.01/mtr.patch
@@ -0,0 +1,270 @@
+diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+index b0d440d..13cc9a3 100644
+--- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c
++++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+@@ -44,7 +44,8 @@ static void at91sam9x5ek_nand_hw_init(void)
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+ /* NAND flash on D16 */
+- csa |= AT91_MATRIX_NFD0_ON_D16;
++ /* MTR: nand flash is set up by bootstrap, so leave it alone here */
++ /* csa |= AT91_MATRIX_NFD0_ON_D16; */
+
+ /* Configure IO drive */
+ csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+@@ -256,6 +257,9 @@ int board_early_init_f(void)
+
+ int board_init(void)
+ {
++ /* Set Status LED High */
++ at91_set_gpio_output(BOOT_STATUS_LED, 0);
++
+ /* arch number of AT91SAM9X5EK-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
+
+@@ -363,3 +367,60 @@ void mem_init(void)
+ ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+ }
+ #endif
++
++/* on-board EEPROM */
++struct mts_id_eeprom_layout {
++ char vendor_id[32];
++ char product_id[32];
++ char device_id[32];
++ char hw_version[32];
++ uint8_t mac_addr[6];
++ char imei[32];
++ uint8_t capa[32];
++ uint8_t mac_bluetooth[6];
++ uint8_t mac_wifi[6];
++ uint8_t reserved[302];
++};
++
++int board_get_enetaddr(uchar *enetaddr)
++{
++ struct mts_id_eeprom_layout eeprom_buffer = {0};
++
++ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, &eeprom_buffer, sizeof(eeprom_buffer))) {
++ printf("EEPROM: read error\n");
++ return 0;
++ }
++
++ if (eeprom_buffer.vendor_id[0] == 0x00 || eeprom_buffer.vendor_id[0] == 0xFF) {
++ printf("EEPROM: uninitialized\n");
++ return 0;
++ }
++
++ printf("vendor-id: %s\n", eeprom_buffer.vendor_id);
++ printf("product-id: %s\n", eeprom_buffer.product_id);
++ printf("device-id: %s\n", eeprom_buffer.device_id);
++ printf("hw-version: %s\n", eeprom_buffer.hw_version);
++ printf("mac-addr: %02x:%02x:%02x:%02x:%02x:%02x\n", eeprom_buffer.mac_addr[0],
++ eeprom_buffer.mac_addr[1],
++ eeprom_buffer.mac_addr[2],
++ eeprom_buffer.mac_addr[3],
++ eeprom_buffer.mac_addr[4],
++ eeprom_buffer.mac_addr[5]);
++
++ memcpy(enetaddr, eeprom_buffer.mac_addr, 6);
++
++ return 1;
++}
++
++int misc_init_r(void)
++{
++ uchar enetaddr[6];
++
++ /* set MAC address from EEPROM if read successful */
++ if (board_get_enetaddr(enetaddr)) {
++ eth_setenv_enetaddr("ethaddr", enetaddr);
++ }
++
++ return 0;
++}
++
+diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
+index c276795..9ba415d 100644
+--- a/configs/at91sam9x5ek_nandflash_defconfig
++++ b/configs/at91sam9x5ek_nandflash_defconfig
+@@ -31,4 +31,3 @@ CONFIG_CMD_USB=y
+ CONFIG_CMD_NAND=y
+ CONFIG_CMD_BOOTZ=y
+ CONFIG_CMD_MII=y
+-CONFIG_CMD_I2C=y
+diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
+index 637c403..693feee 100644
+--- a/include/configs/at91sam9x5ek.h
++++ b/include/configs/at91sam9x5ek.h
+@@ -9,8 +9,10 @@
+ #ifndef __CONFIG_H__
+ #define __CONFIG_H__
+
++#include <linux/kconfig.h>
+ #include <asm/hardware.h>
+
++#define USE_MTR
+ #define CONFIG_SYS_TEXT_BASE 0x26f00000
+
+ /* ARM asynchronous clock */
+@@ -26,6 +28,8 @@
+ #define CONFIG_BOARD_EARLY_INIT_F
+ #define CONFIG_DISPLAY_CPUINFO
+
++#define CONFIG_MISC_INIT_R /* enable platform-dependent misc_init_r() */
++
+ /* general purpose I/O */
+ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+ #define CONFIG_AT91_GPIO
+@@ -36,6 +40,8 @@
+ #define CONFIG_USART_ID ATMEL_ID_SYS
+
+ /* LCD */
++/* MTR has no LCD */
++#if !defined(MTR)
+ #define CONFIG_LCD
+ #define LCD_BPP LCD_COLOR16
+ #define LCD_OUTPUT_BPP 24
+@@ -46,7 +52,13 @@
+ #define CONFIG_ATMEL_HLCD
+ #define CONFIG_ATMEL_LCD_RGB565
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV
++#endif /* !defined(MTR) */
++
++/* check for keypress even if bootdelay is 0 */
++#define CONFIG_ZERO_BOOTDELAY_CHECK
+
++/*STATUS LED*/
++#define BOOT_STATUS_LED AT91_PIN_PC21
+
+ /*
+ * BOOTP options
+@@ -59,10 +71,7 @@
+ /* no NOR flash */
+ #define CONFIG_SYS_NO_FLASH
+
+-/*
+- * Command line configuration.
+- */
+-#define CONFIG_CMD_NAND
++#define CONFIG_SYS_I2C
+
+ /*
+ * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
+@@ -94,13 +103,30 @@
+ /* our CLE is AD22 */
+ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
+-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
++/* MTR nand ready is PC31 */
++#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC31
+
+ /* PMECC & PMERRLOC */
+ #define CONFIG_ATMEL_NAND_HWECC 1
+ #define CONFIG_ATMEL_NAND_HW_PMECC 1
+-#define CONFIG_PMECC_CAP 2
++
++/* MTR: 4-bit PMECC */
++#define CONFIG_PMECC_CAP 4
+ #define CONFIG_PMECC_SECTOR_SIZE 512
++/*
++ * CONFIG_PMECC_INDEX_TABLE_OFFSET has been replaced by:
++ * ATMEL_PMECC_INDEX_OFFSET_512 and
++ * ATMEL_PMECC_INDEX_OFFSET_1024
++ *
++ * Which as used depends on:
++ * host->pmecc_sector_size == 512
++ *
++ * 2012.10:
++ * #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
++ * 2016.03 (at91sam9x5.h):
++ * 182:#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
++ */
++
+
+ #define CONFIG_CMD_NAND_TRIMFFS
+
+@@ -127,9 +153,11 @@
+
+ /* Ethernet */
+ #define CONFIG_MACB
+-#define CONFIG_RMII
++#undef CONFIG_RMII
+ #define CONFIG_NET_RETRY_COUNT 20
+ #define CONFIG_MACB_SEARCH_PHY
++/* enable MII command */
++#define CONFIG_CMD_MII 1
+
+ /* USB */
+ #ifdef CONFIG_CMD_USB
+@@ -147,6 +175,22 @@
+ #endif
+ #endif
+
++#define CONFIG_SYS_I2C_SOFT
++#define CONFIG_SOFT_I2C
++#define CONFIG_SOFT_I2C_GPIO_SCL AT91_PIN_PA31
++#define CONFIG_SOFT_I2C_GPIO_SDA AT91_PIN_PA30
++#define CONFIG_SYS_I2C_SOFT_SPEED 50000
++#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED
++/* Values from previous levels of Conduit U-Boot */
++#define CONFIG_SYS_I2C_SLAVE 0xfe
++#define I2C_RXTX_LEN 128
++
++/* I2C eeprom support */
++#define CONFIG_CMD_EEPROM
++#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* at24c04 */
++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address<---><------>*/
++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
++
+ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
+
+ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+@@ -156,11 +200,11 @@
+ /* bootstrap + u-boot + env + linux in nandflash */
+ #define CONFIG_ENV_IS_IN_NAND
+ #define CONFIG_ENV_OFFSET 0xc0000
+-#define CONFIG_ENV_OFFSET_REDUND 0x100000
++#define CONFIG_ENV_OFFSET_REDUND 0x160000
+ #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
+-#define CONFIG_BOOTCOMMAND "nand read " \
+- "0x22000000 0x200000 0x300000; " \
+- "bootm 0x22000000"
++/* MTR: read from env variables for boot */
++#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
++
+ #elif defined(CONFIG_SYS_USE_SPIFLASH)
+ /* bootstrap + u-boot + env + linux in spi flash */
+ #define CONFIG_ENV_IS_IN_SPI_FLASH
+@@ -197,6 +241,9 @@
+ "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
+ "root=/dev/mmcblk0p2 " \
+ "rw rootfstype=ext4 rootwait"
++#elif defined(USE_MTR)
++/* MTR uses jffs2 */
++#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2"
+ #else
+ #define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+@@ -274,4 +321,21 @@
+
+ #endif
+
++/* MTR defaults */
++#define CONFIG_ENV_OVERWRITE 1 /* Allow Overwrite of serial# & ethaddr */
++#define CONFIG_ETHADDR 00:08:00:87:00:02
++#define CONFIG_IPADDR 192.168.2.1
++#define CONFIG_NETMASK 255.255.255.0
++#define CONFIG_SERVERIP 192.168.2.2
++#define CONFIG_HOSTNAME AT91SAM9G25
++#define CONFIG_LOADADDR 0x22000000
++
++/* MTR - enable watchdog */
++#define CONFIG_AT91SAM9_WATCHDOG 1
++#define CONFIG_HW_WATCHDOG 1
++#define CONFIG_AT91_HW_WDT_TIMEOUT 16
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "kernel_addr=0x200000\0" \
++ ""
++
+ #endif
diff --git a/recipes-bsp/u-boot/u-boot-2016.09.01/mtrv1.patch b/recipes-bsp/u-boot/u-boot-2016.09.01/mtrv1.patch
new file mode 100644
index 0000000..53b4995
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-2016.09.01/mtrv1.patch
@@ -0,0 +1,259 @@
+diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+index b0d440d..5640cef 100644
+--- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c
++++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+@@ -44,7 +44,8 @@ static void at91sam9x5ek_nand_hw_init(void)
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+ /* NAND flash on D16 */
+- csa |= AT91_MATRIX_NFD0_ON_D16;
++ /* MTR: nand flash is set up by bootstrap, so leave it alone here */
++ /* csa |= AT91_MATRIX_NFD0_ON_D16; */
+
+ /* Configure IO drive */
+ csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+@@ -256,6 +257,9 @@ int board_early_init_f(void)
+
+ int board_init(void)
+ {
++ /* Set Status LED High */
++ at91_set_gpio_output(BOOT_STATUS_LED, 0);
++
+ /* arch number of AT91SAM9X5EK-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
+
+@@ -362,4 +366,61 @@ void mem_init(void)
+ /* DDRAM2 Controller initialize */
+ ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+ }
++
+ #endif
++
++/* on-board EEPROM */
++struct mts_id_eeprom_layout {
++ char vendor_id[32];
++ char product_id[32];
++ char device_id[32];
++ char hw_version[32];
++ uint8_t mac_addr[6];
++ char imei[32];
++ uint8_t capa[32];
++ uint8_t mac_bluetooth[6];
++ uint8_t mac_wifi[6];
++ uint8_t reserved[302];
++};
++
++int board_get_enetaddr(uchar *enetaddr)
++{
++ struct mts_id_eeprom_layout eeprom_buffer = {0};
++
++ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, &eeprom_buffer, sizeof(eeprom_buffer))) {
++ printf("EEPROM: read error\n");
++ return 0;
++ }
++
++ if (eeprom_buffer.vendor_id[0] == 0x00 || eeprom_buffer.vendor_id[0] == 0xFF) {
++ printf("EEPROM: uninitialized\n");
++ return 0;
++ }
++
++ printf("vendor-id: %s\n", eeprom_buffer.vendor_id);
++ printf("product-id: %s\n", eeprom_buffer.product_id);
++ printf("device-id: %s\n", eeprom_buffer.device_id);
++ printf("hw-version: %s\n", eeprom_buffer.hw_version);
++ printf("mac-addr: %02x:%02x:%02x:%02x:%02x:%02x\n", eeprom_buffer.mac_addr[0],
++ eeprom_buffer.mac_addr[1],
++ eeprom_buffer.mac_addr[2],
++ eeprom_buffer.mac_addr[3],
++ eeprom_buffer.mac_addr[4],
++ eeprom_buffer.mac_addr[5]);
++
++ memcpy(enetaddr, eeprom_buffer.mac_addr, 6);
++
++ return 1;
++}
++
++int misc_init_r(void)
++{
++ uchar enetaddr[6];
++
++ /* set MAC address from EEPROM if read successful */
++ if (board_get_enetaddr(enetaddr)) {
++ eth_setenv_enetaddr("ethaddr", enetaddr);
++ }
++
++ return 0;
++}
+diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
+index c276795..9ba415d 100644
+--- a/configs/at91sam9x5ek_nandflash_defconfig
++++ b/configs/at91sam9x5ek_nandflash_defconfig
+@@ -31,4 +31,3 @@ CONFIG_CMD_USB=y
+ CONFIG_CMD_NAND=y
+ CONFIG_CMD_BOOTZ=y
+ CONFIG_CMD_MII=y
+-CONFIG_CMD_I2C=y
+diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
+index 637c403..eff48d6 100644
+--- a/include/configs/at91sam9x5ek.h
++++ b/include/configs/at91sam9x5ek.h
+@@ -9,8 +9,10 @@
+ #ifndef __CONFIG_H__
+ #define __CONFIG_H__
+
++#include <linux/kconfig.h>
+ #include <asm/hardware.h>
+
++#define USE_MTR
+ #define CONFIG_SYS_TEXT_BASE 0x26f00000
+
+ /* ARM asynchronous clock */
+@@ -26,6 +28,8 @@
+ #define CONFIG_BOARD_EARLY_INIT_F
+ #define CONFIG_DISPLAY_CPUINFO
+
++#define CONFIG_MISC_INIT_R /* enable platform-dependent misc_init_r() */
++
+ /* general purpose I/O */
+ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+ #define CONFIG_AT91_GPIO
+@@ -36,6 +40,8 @@
+ #define CONFIG_USART_ID ATMEL_ID_SYS
+
+ /* LCD */
++/* MTR has no LCD */
++#if !defined(MTR)
+ #define CONFIG_LCD
+ #define LCD_BPP LCD_COLOR16
+ #define LCD_OUTPUT_BPP 24
+@@ -46,7 +52,13 @@
+ #define CONFIG_ATMEL_HLCD
+ #define CONFIG_ATMEL_LCD_RGB565
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV
++#endif /* !defined(MTR) */
++
++/* check for keypress even if bootdelay is 0 */
++#define CONFIG_ZERO_BOOTDELAY_CHECK
+
++/*STATUS LED*/
++#define BOOT_STATUS_LED AT91_PIN_PC21
+
+ /*
+ * BOOTP options
+@@ -59,10 +71,7 @@
+ /* no NOR flash */
+ #define CONFIG_SYS_NO_FLASH
+
+-/*
+- * Command line configuration.
+- */
+-#define CONFIG_CMD_NAND
++#define CONFIG_SYS_I2C
+
+ /*
+ * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
+@@ -94,13 +103,30 @@
+ /* our CLE is AD22 */
+ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
+-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
++/* MTR nand ready is PC31 */
++#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC31
+
+ /* PMECC & PMERRLOC */
+ #define CONFIG_ATMEL_NAND_HWECC 1
+ #define CONFIG_ATMEL_NAND_HW_PMECC 1
+-#define CONFIG_PMECC_CAP 2
++
++/* MTR: 4-bit PMECC */
++#define CONFIG_PMECC_CAP 4
+ #define CONFIG_PMECC_SECTOR_SIZE 512
++/*
++ * CONFIG_PMECC_INDEX_TABLE_OFFSET has been replaced by:
++ * ATMEL_PMECC_INDEX_OFFSET_512 and
++ * ATMEL_PMECC_INDEX_OFFSET_1024
++ *
++ * Which as used depends on:
++ * host->pmecc_sector_size == 512
++ *
++ * 2012.10:
++ * #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
++ * 2016.03 (at91sam9x5.h):
++ * 182:#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
++ */
++
+
+ #define CONFIG_CMD_NAND_TRIMFFS
+
+@@ -147,6 +173,23 @@
+ #endif
+ #endif
+
++#define CONFIG_SYS_I2C_SOFT
++#define CONFIG_SOFT_I2C
++#define CONFIG_SOFT_I2C_GPIO_SCL AT91_PIN_PA31
++#define CONFIG_SOFT_I2C_GPIO_SDA AT91_PIN_PA30
++#define CONFIG_SYS_I2C_SOFT_SPEED 50000
++#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED
++/* Values from previous levels of Conduit U-Boot */
++#define CONFIG_SYS_I2C_SLAVE 0xfe
++#define I2C_RXTX_LEN 128
++
++/* I2C eeprom support */
++#define CONFIG_CMD_EEPROM
++#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* at24c04 */
++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address<---><------>*/
++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
++
++
+ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
+
+ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+@@ -156,11 +199,11 @@
+ /* bootstrap + u-boot + env + linux in nandflash */
+ #define CONFIG_ENV_IS_IN_NAND
+ #define CONFIG_ENV_OFFSET 0xc0000
+-#define CONFIG_ENV_OFFSET_REDUND 0x100000
++#define CONFIG_ENV_OFFSET_REDUND 0x160000
+ #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
+-#define CONFIG_BOOTCOMMAND "nand read " \
+- "0x22000000 0x200000 0x300000; " \
+- "bootm 0x22000000"
++/* MTR: read from env variables for boot */
++#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
++
+ #elif defined(CONFIG_SYS_USE_SPIFLASH)
+ /* bootstrap + u-boot + env + linux in spi flash */
+ #define CONFIG_ENV_IS_IN_SPI_FLASH
+@@ -197,6 +240,9 @@
+ "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
+ "root=/dev/mmcblk0p2 " \
+ "rw rootfstype=ext4 rootwait"
++#elif defined(USE_MTR)
++/* MTR uses jffs2 */
++#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2"
+ #else
+ #define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+@@ -274,4 +320,21 @@
+
+ #endif
+
++/* MTR defaults */
++#define CONFIG_ENV_OVERWRITE 1 /* Allow Overwrite of serial# & ethaddr */
++#define CONFIG_ETHADDR 00:08:00:87:00:02
++#define CONFIG_IPADDR 192.168.2.1
++#define CONFIG_NETMASK 255.255.255.0
++#define CONFIG_SERVERIP 192.168.2.2
++#define CONFIG_HOSTNAME AT91SAM9G25
++#define CONFIG_LOADADDR 0x22000000
++
++/* MTR - enable watchdog */
++#define CONFIG_AT91SAM9_WATCHDOG 1
++#define CONFIG_HW_WATCHDOG 1
++#define CONFIG_AT91_HW_WDT_TIMEOUT 16
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "kernel_addr=0x200000\0" \
++ ""
++
+ #endif
diff --git a/recipes-bsp/u-boot/u-boot_2016.09.01.bb b/recipes-bsp/u-boot/u-boot_2016.09.01.bb
index a7281a4..d68960c 100644
--- a/recipes-bsp/u-boot/u-boot_2016.09.01.bb
+++ b/recipes-bsp/u-boot/u-boot_2016.09.01.bb
@@ -17,6 +17,13 @@ SRC_URI_append_mtcdt = " \
SRC_URI_append_mtcap = " \
file://mtcdt.patch"
+SRC_URI_append_mtr = "\
+ file://mtr.patch \
+"
+SRC_URI_append_mtrv1 = "\
+ file://mtrv1.patch \
+"
+
SRC_URI[md5sum] = "61c628f8034477c946e173ed174efeb4"
SRC_URI[sha256sum] = "95728e89dd476d17428f94080752ab48884be477b6a678941582aeef618b70bb"