initial commit with MTCDT support

47 files changed, 5397 insertions, 0 deletions

diff --git a/COPYING.MIT b/COPYING.MIT
new file mode 100644
index 0000000..fb950dc
--- /dev/null
+++ b/COPYING.MIT
@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy 
+of this software and associated documentation files (the "Software"), to deal 
+in the Software without restriction, including without limitation the rights 
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 
+copies of the Software, and to permit persons to whom the Software is 
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in 
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 
+THE SOFTWARE.
diff --git a/README b/README
new file mode 100644
index 0000000..c473bb3
--- /dev/null
+++ b/README
@@ -0,0 +1,8 @@
+MultiTech hardware support OpenEmbedded layer
+
+This layer depends on:
+
+URI: git://git.openembedded.org/openembedded-core
+branch: daisy
+revision: HEAD
+
diff --git a/classes/linux-append-dtb.bbclass b/classes/linux-append-dtb.bbclass
new file mode 100644
index 0000000..6d3e52d
--- /dev/null
+++ b/classes/linux-append-dtb.bbclass
@@ -0,0 +1,8 @@
+# build devicetree blob, append to kernel, and create uImage
+do_compile_append() {
+    if [ -n "${DTB_APPEND}" ]; then
+        oe_runmake ${DTB_APPEND}.dtb
+        cat arch/${ARCH}/boot/zImage arch/${ARCH}/boot/dts/${DTB_APPEND}.dtb > arch/${ARCH}/boot/zImage.dtb
+        uboot-mkimage -A ${UBOOT_ARCH} -O linux -T kernel -C none -a ${UBOOT_LOADADDRESS} -e ${UBOOT_ENTRYPOINT} -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d arch/${ARCH}/boot/zImage.dtb arch/${ARCH}/boot/uImage
+    fi
+}
diff --git a/conf/layer.conf b/conf/layer.conf
new file mode 100644
index 0000000..f33c49f
--- /dev/null
+++ b/conf/layer.conf
@@ -0,0 +1,10 @@
+# We have a conf and classes directory, add to BBPATH
+BBPATH .= ":${LAYERDIR}"
+
+# We have a recipes-* directories, add to BBFILES
+BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
+	${LAYERDIR}/recipes-*/*/*.bbappend"
+
+BBFILE_COLLECTIONS += "multitech"
+BBFILE_PATTERN_multitech = "^${LAYERDIR}/"
+BBFILE_PRIORITY_multitech = "6"
diff --git a/conf/machine/mtcdt.conf b/conf/machine/mtcdt.conf
new file mode 100644
index 0000000..59aac2b
--- /dev/null
+++ b/conf/machine/mtcdt.conf
@@ -0,0 +1,39 @@
+#@TYPE: Machine
+#@Name: Multi-Tech MTCDT
+#@DESCRIPTION: Machine configuration for the MultiConnect Conduit MTCDT hardware
+
+require conf/machine/include/tune-arm926ejs.inc
+
+MACHINE_FEATURES = "ext2 ext3 usbhost usbgadget ppp"
+PREFERRED_PROVIDER_virtual/kernel = "linux"
+PREFERRED_VERSION_linux = "3.12.27"
+PREFERRED_VERSION_mts-io ?= "0.9.1"
+PREFERRED_VERSION_mts-id-eeprom ?= "0.2.4"
+
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS = "kernel-module-vizzini"
+PREFERRED_VERSION_kernel-module-vizzini ?= "1.1"
+
+DEFAULTTUNE = "arm926ejs"
+
+# used by sysvinit_2
+SERIAL_CONSOLES = "115200;ttyS0"
+#don't try to access tty1
+USE_VT = "0"
+
+UBOOT_MACHINE = "at91sam9x5ek_nandflash_config"
+PREFERRED_VERSION_u-boot = "2012.10"
+
+AT91BOOTSTRAP_BOARD = "at91sam9x5eknf_uboot"
+PREFERRED_VERSION_at91bootstrap = "3.5.3"
+
+KERNEL_IMAGETYPE = "uImage"
+# remove kernel-image from rootfs by overriding kernel-base DEPS
+RDEPENDS_kernel-base = ""
+
+EXTRA_IMAGEDEPENDS += "at91bootstrap u-boot"
+
+IMAGE_FSTYPES =+ "jffs2 tar.gz"
+EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 -n"
+
+UBOOT_ENTRYPOINT = "0x20008000"
+UBOOT_LOADADDRESS = "0x20008000"
diff --git a/contrib/uboot-setenv-mtcdt.minicom b/contrib/uboot-setenv-mtcdt.minicom
new file mode 100644
index 0000000..200a7a4
--- /dev/null
+++ b/contrib/uboot-setenv-mtcdt.minicom
@@ -0,0 +1,60 @@
+print setting U-Boot variables...
+send setenv bootargs              \'mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2\'
+send setenv bootcmd               \'nboot.jffs2 ${loadaddr} 0 ${kernel_addr} && bootm ${loadaddr}\'
+send setenv bootdelay             1
+send setenv serverip              192.168.2.2
+send setenv ipaddr                192.168.2.1
+send setenv netmask               255.255.255.0
+send setenv loadaddr              0x22000000
+send setenv tftpaddr              0x20000000
+send setenv stdin                 serial
+send setenv stdout                serial
+send setenv stderr                serial
+send setenv ethact                macb0
+send setenv mtdids                nand0=nand0
+send setenv mtdparts              mtdparts=nand0:256k(bootstrap),512k(u-boot),640k(u-boot-env1),640k(u-boot-env2),6M(kernel),8M(config),8M(oem),-(rootfs)
+send setenv bootstrap_file        oe_bootstrap_pmecc_padded.bin
+send setenv uboot_file            oe_u-boot.bin
+send setenv uboot_env1_file       oe_uboot_env1.bin
+send setenv uboot_env2_file       oe_uboot_env2.bin
+send setenv kernel_file           oe_uImage.bin
+send setenv config_file           oe_config.tar.gz
+send setenv oem_file              oe_oem.tar.gz
+send setenv rootfs_file           oe_rootfs.jffs2
+send setenv bootstrap_addr        0x00000000
+send setenv uboot_addr            0x00040000
+send setenv uboot_env1_addr       0x000C0000
+send setenv uboot_env2_addr       0x00160000
+send setenv kernel_addr           0x00200000
+send setenv config_addr           0x00800000
+send setenv oem_addr              0x01000000
+send setenv rootfs_addr           0x01800000
+send setenv bootstrap_size        0x00040000
+send setenv uboot_size            0x00080000
+send setenv uboot_env1_size       0x000A0000
+send setenv uboot_env2_size       0x000A0000
+send setenv kernel_size           0x00600000
+send setenv config_size           0x00800000
+send setenv oem_size              0x00800000
+send setenv erase_bootstrap       \'nand erase.part bootstrap\'
+send setenv erase_uboot           \'nand erase.part u-boot\'
+send setenv erase_uboot_env1      \'nand erase.part u-boot-env1\'
+send setenv erase_uboot_env2      \'nand erase.part u-boot-env2\'
+send setenv erase_kernel          \'nand erase.part kernel\'
+send setenv erase_config          \'nand erase.part config\'
+send setenv erase_oem             \'nand erase.part oem\'
+send setenv erase_rootfs          \'nand erase.part rootfs\'
+send setenv tftp_bootstrap        \'tftp ${tftpaddr} ${bootstrap_file} && run erase_bootstrap && nand write.jffs2 ${fileaddr} bootstrap ${filesize}\'
+send setenv tftp_uboot            \'tftp ${tftpaddr} ${uboot_file} && run erase_uboot && nand write.jffs2 ${fileaddr} u-boot ${filesize}\'
+send setenv tftp_uboot_env1       \'tftp ${tftpaddr} ${uboot_env1_file} && run erase_uboot_env1 && nand write.jffs2 ${fileaddr} u-boot-env1 ${filesize}\'
+send setenv tftp_uboot_env2       \'tftp ${tftpaddr} ${uboot_env2_file} && run erase_uboot_env2 && nand write.jffs2 ${fileaddr} u-boot-env2 ${filesize}\'
+send setenv tftp_kernel           \'tftp ${tftpaddr} ${kernel_file} && run erase_kernel && nand write.jffs2 ${fileaddr} kernel ${filesize}\'
+send setenv tftp_config           \'tftp ${tftpaddr} ${config_file} && run erase_config && nand write.jffs2 ${fileaddr} config ${filesize}\'
+send setenv tftp_oem              \'tftp ${tftpaddr} ${oem_file} && run erase_oem && nand write.jffs2 ${fileaddr} oem ${filesize}\'
+send setenv tftp_rootfs           \'tftp ${tftpaddr} ${rootfs_file} && run erase_rootfs && nand write.jffs2 ${fileaddr} rootfs ${filesize}\'
+send setenv krb                   \'run tftp_kernel && run tftp_rootfs && boot\'
+send setenv rb                    \'run tftp_rootfs && boot\'
+print saving...
+send saveenv
+send saveenv
+send printenv
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.2-add-install.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.2-add-install.patch
new file mode 100644
index 0000000..6f007b9
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.2-add-install.patch
@@ -0,0 +1,20 @@
+Index: at91bootstrap-3.5.2/Makefile
+===================================================================
+--- at91bootstrap-3.5.2.orig/Makefile	2013-02-08 14:38:40.660054339 -0600
++++ at91bootstrap-3.5.2/Makefile	2013-02-08 14:41:30.626272862 -0600
+@@ -359,4 +359,15 @@
+ 
+ PHONY+=tarball tarballx
+ 
++install:
++	-install -d $(DESTDIR)
++	install $(AT91BOOTSTRAP) $(DESTDIR)/$(IMAGE)
++	-rm -f $(DESTDIR)/$(SYMLINK)
++	(cd ${DESTDIR} ; \
++	ln -sf ${IMAGE} ${SYMLINK} \
++	)
++
++
++PHONY+=install
++
+ .PHONY: $(PHONY)
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.2-onetime-slow-clock-switch.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.2-onetime-slow-clock-switch.patch
new file mode 100644
index 0000000..98ccd41
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.2-onetime-slow-clock-switch.patch
@@ -0,0 +1,91 @@
+Index: at91bootstrap-3.5.2/driver/at91_slowclk.c
+===================================================================
+--- at91bootstrap-3.5.2.orig/driver/at91_slowclk.c	2013-01-30 04:01:20.000000000 -0600
++++ at91bootstrap-3.5.2/driver/at91_slowclk.c	2013-04-24 11:35:44.369827054 -0500
+@@ -33,12 +33,17 @@
+ {
+ 	unsigned int reg;
+ 
+-	/*
+-	 * Enable the 32768 Hz oscillator by setting the bit OSC32EN to 1
+-	 */
++
+ 	reg = readl(AT91C_BASE_SCKCR);
+-	reg |= AT91C_SLCKSEL_OSC32EN;
+-	writel(reg, AT91C_BASE_SCKCR);
++
++	/* Only enable 32768 Hz oscillator if needed */
++	if ( !(reg & AT91C_SLCKSEL_OSC32EN) ) {
++		/*
++	 	 * Enable the 32768 Hz oscillator by setting the bit OSC32EN to 1
++	 	 */
++		reg |= AT91C_SLCKSEL_OSC32EN;
++		writel(reg, AT91C_BASE_SCKCR);
++	}
+ 
+ 	/* start a internal timer */
+ 	start_interval_timer();
+@@ -50,32 +55,40 @@
+ {
+ 	unsigned int reg;
+ 
+-	/*
+-	 * Wait 32768 Hz Startup Time for clock stabilization (software loop)
+-	 * wait about 1s (1000ms)
+-	 */
+-	wait_interval_timer(1000);
+-
+-	/*
+-	 * Switching from internal 32kHz RC oscillator to 32768 Hz oscillator
+-	 * by setting the bit OSCSEL to 1
+-	 */
+ 	reg = readl(AT91C_BASE_SCKCR);
+-	reg |= AT91C_SLCKSEL_OSCSEL;
+-	writel(reg, AT91C_BASE_SCKCR);
+ 
+-	/*
+-	 * Waiting 5 slow clock cycles for internal resynchronization
+-	 * 5 slow clock cycles = ~153 us (5 / 32768)
+-	 */
+-	udelay(153);
+-
+-	/*
+-	 * Disable the 32kHz RC oscillator by setting the bit RCEN to 0
+-	 */
++	/* Only switch clock source if needed */
++	if ( !(reg & AT91C_SLCKSEL_OSCSEL) ) {
++		dbgu_print("Switching slow clock to external oscillator...\n\r");
++		/*
++		 * Wait 32768 Hz Startup Time for clock stabilization (software loop)
++		 * wait about 1s (1000ms)
++		 */
++		wait_interval_timer(1000);
++
++		/*
++		 * Switching from internal 32kHz RC oscillator to 32768 Hz oscillator
++		 * by setting the bit OSCSEL to 1
++		 */
++		reg |= AT91C_SLCKSEL_OSCSEL;
++		writel(reg, AT91C_BASE_SCKCR);
++
++		/*
++		 * Waiting 5 slow clock cycles for internal resynchronization
++		 * 5 slow clock cycles = ~153 us (5 / 32768)
++		 */
++		udelay(153);
++	}
++
++	/* Only disable internal RC oscillator if needed */
+ 	reg = readl(AT91C_BASE_SCKCR);
+-	reg &= ~AT91C_SLCKSEL_RCEN;
+-	writel(reg, AT91C_BASE_SCKCR);
++	if (reg | AT91C_SLCKSEL_RCEN) {
++		/*
++		 * Disable the 32kHz RC oscillator by setting the bit RCEN to 0
++		 */
++		reg &= ~AT91C_SLCKSEL_RCEN;
++		writel(reg, AT91C_BASE_SCKCR);
++	}
+ 
+ 	return 0;
+ }
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtcdt.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtcdt.patch
new file mode 100644
index 0000000..24c27a0
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtcdt.patch
@@ -0,0 +1,60 @@
+Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig
+===================================================================
+--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig	2013-04-11 05:07:35.000000000 -0500
++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig	2013-04-29 15:13:01.390913836 -0500
+@@ -42,7 +42,8 @@
+ ALLOW_PIO3=y
+ CONFIG_HAS_PIO3=y
+ CPU_HAS_PMECC=y
+-CONFIG_LOAD_ONE_WIRE=y
++# MTS: don't load one wire
++# CONFIG_LOAD_ONE_WIRE is not set
+ # CONFIG_MMC_SUPPORT is not set
+ 
+ #
+@@ -81,8 +82,8 @@
+ #
+ # PMECC Configuration
+ #
+-CONFIG_PMECC_CORRECT_BITS_2=y
+-# CONFIG_PMECC_CORRECT_BITS_4 is not set
++# CONFIG_PMECC_CORRECT_BITS_2 is not set
++CONFIG_PMECC_CORRECT_BITS_4=y
+ # CONFIG_PMECC_CORRECT_BITS_8 is not set
+ # CONFIG_PMECC_CORRECT_BITS_12 is not set
+ # CONFIG_PMECC_CORRECT_BITS_24 is not set
+@@ -116,4 +117,5 @@
+ # CONFIG_USER_HW_INIT is not set
+ CONFIG_THUMB=y
+ CONFIG_SCLK=y
+-CONFIG_DISABLE_WATCHDOG=y
++# MTS: don't disable watchdog
++# CONFIG_DISABLE_WATCHDOG is not set
+Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c
+===================================================================
+--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5ek.c	2013-04-11 05:07:35.000000000 -0500
++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c	2013-04-29 15:14:44.578915819 -0500
+@@ -312,10 +312,8 @@
+ 
+ 	reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA);
+ 	reg |= AT91C_EBI_CS3A_SM;
+-	if (get_cm_rev() == 'A')
+-		reg &= ~AT91C_EBI_NFD0_ON_D16;
+-	else
+-		reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
++	/* MTCDT */
++	reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
+ 
+ 	reg &= ~AT91C_EBI_DRV;
+ 	writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA);
+@@ -345,9 +343,7 @@
+ 		AT91C_BASE_SMC + SMC_CTRL3);
+ 
+ 	/* Configure the PIO controller */
+-	if (get_cm_rev() == 'A')
+-		pio_configure(nand_pins_lo);
+-	else
++	/* MTCDT */
+ 		pio_configure(nand_pins_hi);
+ 
+ 	writel((1 << AT91C_ID_PIOC_D), (PMC_PCER + AT91C_BASE_PMC));
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91sam9x5_4bit_pmecc_header.bin b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91sam9x5_4bit_pmecc_header.bin
new file mode 100644
index 0000000..f8d6073
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91sam9x5_4bit_pmecc_header.bin
@@ -0,0 +1 @@
+$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��$��
\ No newline at end of file
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/create_4bit_pmecc_header.rb b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/create_4bit_pmecc_header.rb
new file mode 100755
index 0000000..780d728
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/create_4bit_pmecc_header.rb
@@ -0,0 +1,5 @@
+#!/usr/bin/env ruby
+
+52.times do 
+	print ["052490c0"].pack('H*')
+end
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb b/recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb
new file mode 100644
index 0000000..447d77f
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap_3.5.3.bb
@@ -0,0 +1,28 @@
+require at91bootstrap_3.5.inc
+
+PR = "r1"
+
+LICENSE = "custom-freely-distributable"
+LIC_FILES_CHKSUM = "file://main.c;beginline=6;endline=26;md5=6fca71334c9e8b7d033296123c91437f"
+
+SRCREV = "v${PV}"
+SRC_URI = "git://github.com/linux4sam/at91bootstrap \
+		file://at91bootstrap-3.5.2-add-install.patch \
+		file://at91bootstrap-3.5.2-onetime-slow-clock-switch.patch \
+        file://at91sam9x5_4bit_pmecc_header.bin "
+
+S = "${WORKDIR}/git"
+
+SRC_URI_append_mtcdt = " file://at91bootstrap-3.5.3-mtcdt.patch "
+
+# generate a bootstrap file padded with the header needed for 4-bit PMECC
+# The padded file can be flashed via u-boot without any need to set the PMECC header using SAM-BA
+do_pad_4bit_pmecc() {
+	cp -f ${WORKDIR}/at91sam9x5_4bit_pmecc_header.bin ${DEPLOY_DIR_IMAGE}/at91bootstrap_pmecc_padded.bin
+	cat ${DEPLOY_DIR_IMAGE}/at91bootstrap.bin >> ${DEPLOY_DIR_IMAGE}/at91bootstrap_pmecc_padded.bin
+}
+
+do_install_append() {
+	do_pad_4bit_pmecc
+}
+
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap_3.5.inc b/recipes-bsp/at91bootstrap/at91bootstrap_3.5.inc
new file mode 100644
index 0000000..ac147c0
--- /dev/null
+++ b/recipes-bsp/at91bootstrap/at91bootstrap_3.5.inc
@@ -0,0 +1,27 @@
+DESCRIPTION = "at91bootstrap: loaded into internal SRAM by AT91 BootROM"
+SECTION = "bootloaders"
+
+PARALLEL_MAKE = ""
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+EXTRA_OEMAKE = "CROSS_COMPILE=${TARGET_PREFIX} DESTDIR=${DEPLOY_DIR_IMAGE} REVISION=${PR}"
+
+do_compile () {
+	unset LDFLAGS
+	unset CFLAGS
+	unset CPPFLAGS
+
+	rm -Rf ${S}/binaries
+	for board in ${AT91BOOTSTRAP_BOARD} ; do
+		oe_runmake mrproper
+		filename=`find board -name ${board}_defconfig`
+		if ! [ "x$filename" == "x" ] ; then 
+			cp $filename .config
+			oe_runmake 
+			oe_runmake install
+		else
+			echo "${board} could not be built"
+			exit 1
+		fi
+	done
+}
diff --git a/recipes-bsp/multitech/mts-id-eeprom.inc b/recipes-bsp/multitech/mts-id-eeprom.inc
new file mode 100644
index 0000000..d0510b4
--- /dev/null
+++ b/recipes-bsp/multitech/mts-id-eeprom.inc
@@ -0,0 +1,15 @@
+DESCRIPTION = "ID EEPROM tool for MTCDP"
+HOMEPAGE = "http://www.multitech.net/"
+SECTION = "console/utils"
+PRIORITY = "optional"
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=94d55d512a9ba36caa9b7df079bae19f"
+INC_PR = "r0"
+DEPENDS = "mts-io"
+
+SRC_URI = "git://git.multitech.net/mts-id-eeprom.git;protocol=git;tag=${PV}"
+S = "${WORKDIR}/git"
+
+inherit autotools
+
+PARALLEL_MAKE = ""
diff --git a/recipes-bsp/multitech/mts-id-eeprom_0.2.4.bb b/recipes-bsp/multitech/mts-id-eeprom_0.2.4.bb
new file mode 100644
index 0000000..ccf3521
--- /dev/null
+++ b/recipes-bsp/multitech/mts-id-eeprom_0.2.4.bb
@@ -0,0 +1,3 @@
+require mts-id-eeprom.inc
+
+PR = "${INC_PR}.0"
diff --git a/recipes-bsp/multitech/mts-io.inc b/recipes-bsp/multitech/mts-io.inc
new file mode 100644
index 0000000..484124e
--- /dev/null
+++ b/recipes-bsp/multitech/mts-io.inc
@@ -0,0 +1,76 @@
+DESCRIPTION = "mts-io controller and sysfs wrapper"
+HOMEPAGE = "http://www.multitech.net/"
+SECTION = "base"
+PRIORITY = "optional"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://io-module/COPYING;md5=94d55d512a9ba36caa9b7df079bae19f \
+                    file://io-tool/COPYING;md5=94d55d512a9ba36caa9b7df079bae19f \
+"
+DEPENDS = "virtual/kernel"
+INC_PR = "r5"
+
+SRCREV = "v${PV}"
+
+SRC_URI = " \
+    file://mts-io.init \
+    git://git.multitech.net/mts-io.git;protocol=git \
+    file://led-a_heartbeat_trigger \
+"
+S = "${WORKDIR}/git"
+
+inherit module-base
+inherit update-rc.d
+
+# add this since we aren't using module.bbclass
+addtask make_scripts after do_patch before do_compile
+do_make_scripts[lockfiles] = "${TMPDIR}/kernel-scripts.lock"
+do_make_scripts[deptask] = "do_populate_sysroot"
+
+EXTRA_OEMAKE = " -C ${STAGING_KERNEL_DIR} \
+                KBUILD_VERBOSE=1 \
+                M=${S}/io-module \
+                modules \
+                "
+
+do_compile () {
+    unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS
+    oe_runmake
+}
+
+PACKAGES = "${PN}"
+
+FILES_${PN} = "${base_libdir}/modules/${KERNEL_VERSION}/extra/mts_io.ko"
+FILES_${PN} += "${sysconfdir}/init.d/mts-io"
+FILES_${PN} += "${libdir}/mts-io-sysfs*"
+FILES_${PN} += "${sbindir}/mts-io-sysfs"
+FILES_${PN} += "${sysconfdir}/init.d/led-a_heartbeat_trigger"
+FILES_${PN} += "${sysconfdir}/rc5.d/S99led-a_heartbeat_trigger"
+
+INITSCRIPT_NAME = "mts-io"
+INITSCRIPT_PARAMS = "start 39 S ."
+
+PARALLEL_MAKE = ""
+
+fakeroot do_install () {
+    install -m 0755 -d ${D}${base_libdir}/modules/${KERNEL_VERSION}/extra
+    # use cp instead of install so the driver doesn't get stripped
+    cp io-module/mts_io.ko ${D}${base_libdir}/modules/${KERNEL_VERSION}/extra
+    cp io-module/mts_io.h ${STAGING_KERNEL_DIR}/include/linux/
+    cp io-module/mts_io.h ${STAGING_INCDIR}/linux/
+    if [ -f io-module/mts_eeprom.h ]; then
+        cp io-module/mts_eeprom.h ${STAGING_KERNEL_DIR}/include/linux/
+        cp io-module/mts_eeprom.h ${STAGING_INCDIR}/linux/
+    fi
+
+    install -d ${D}${sysconfdir}/init.d
+    install -m 0755 ${WORKDIR}/mts-io.init ${D}${sysconfdir}/init.d/mts-io
+
+    install -d ${D}/${sysconfdir}/rc5.d
+    install -m 0755 ${WORKDIR}/led-a_heartbeat_trigger ${D}/${sysconfdir}/init.d/
+    ln -sf ${sysconfdir}/init.d/led-a_heartbeat_trigger ${D}/${sysconfdir}/rc5.d/S99led-a_heartbeat_trigger
+
+    install -m 0755 -d ${D}${sbindir}
+    install -d ${D}${libdir}/mts-io-sysfs
+    install -m 0755 io-tool/mts-io-sysfs-inc.sh ${D}${libdir}/mts-io-sysfs
+    install -m 0755 io-tool/mts-io-sysfs ${D}${sbindir}/mts-io-sysfs
+}
diff --git a/recipes-bsp/multitech/mts-io/led-a_heartbeat_trigger b/recipes-bsp/multitech/mts-io/led-a_heartbeat_trigger
new file mode 100755
index 0000000..9633dcf
--- /dev/null
+++ b/recipes-bsp/multitech/mts-io/led-a_heartbeat_trigger
@@ -0,0 +1,6 @@
+#!/bin/bash
+
+TRIGGER="/sys/class/leds/led-a/trigger"
+
+echo "setting $TRIGGER to heartbeat"
+echo "heartbeat" > $TRIGGER
diff --git a/recipes-bsp/multitech/mts-io/mts-io.init b/recipes-bsp/multitech/mts-io/mts-io.init
new file mode 100644
index 0000000..77dd0e2
--- /dev/null
+++ b/recipes-bsp/multitech/mts-io/mts-io.init
@@ -0,0 +1,20 @@
+#!/bin/sh
+
+case $1 in
+  start)
+    echo "Loading mts-io module"
+    modprobe mts_io
+    ;;
+
+  stop)
+    echo "Unloading mts-io module"
+    modprobe -r mts_io
+    ;;
+
+  *)
+    echo "U