/*
*
* This is base DTS file for all AT91 SAM9g25 the MTS devices
* composed by manual merging of:
*    #include "at91sam9g25.dtsi"
*    #include "at91sam9x5ek.dtsi"
* and sub-includes into one big file.
*
*/

/dts-v1/;

#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>


/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "Multi-Tech Systems MTCAP";
	compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &uart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		ssc0 = &ssc0;
		pwm0 = &pwm0;
	};

	chosen {
		bootargs = "mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2";
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x20000000 0x8000000>;
	};

	clocks {
		slow_xtal: slow_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};

		main_xtal: main_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <12000000>;
		};

		adc_op_clk: adc_op_clk{
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <1000000>;
		};
	};

	sram: sram@300000 {
		compatible = "mmio-sram";
		reg = <0x00300000 0x8000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			matrix: matrix@ffffde00 {
				compatible = "atmel,at91sam9x5-matrix", "syscon";
				reg = <0xffffde00 0x100>;
			};

			pmecc: ecc-engine@ffffe000 {
				compatible = "atmel,at91sam9g45-pmecc";
				reg = <0xffffe000 0x600>,
				      <0xffffe600 0x200>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
				clock-names = "ddrck";
			};

			smc: smc@ffffea00 {
				compatible = "atmel,at91sam9260-smc", "syscon";
				reg = <0xffffea00 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon";
				reg = <0xfffffc00 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				#clock-cells = <2>;
				clocks = <&clk32k>, <&main_xtal>;
				clock-names = "slow_clk", "main_xtal";
			};

			reset_controller: rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
				clocks = <&clk32k>;
			};

			shutdown_controller: shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
				clocks = <&clk32k>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			};

			clk32k: sckc@fffffe50 {
				compatible = "atmel,at91sam9x5-sckc";
				reg = <0xfffffe50 0x4>;
				clocks = <&slow_xtal>;
				#clock-cells = <0>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xf8008000 0x100>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
				clock-names = "t0_clk", "slow_clk";


				timer@0 {
					compatible = "atmel,tcb-timer";
					reg = <0>;
				};

				timer@1 {
					compatible = "atmel,tcb-timer";
					reg = <1>;
				};
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0xf800c000 0x100>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
				clock-names = "t0_clk", "slow_clk";
			};

			dma0: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
				#dma-cells = <2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
				clock-names = "dma_clk";
			};

			dma1: dma-controller@ffffee00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffee00 0x200>;
				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
				#dma-cells = <2>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
				clock-names = "dma_clk";
			};

			pinctrl: pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				atmel,mux-mask = <
				      /*    A         B          C     */
				       0xffffffff 0xffe0399f 0xc000001c  /* pioA */
				       0x0007ffff 0x00047e3f 0x00000000  /* pioB */
				       0x80000000 0x07c0ffff 0xb83fffff  /* pioC */
				       0x003fffff 0x003f8000 0x00000000  /* pioD */
				      >;

				macb0 {
					pinctrl_macb0_rmii: macb0_rmii-0 {
						atmel,pins =
							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB0 periph A */
							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB1 periph A */
							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB2 periph A */
							 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB3 periph A */
							 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB4 periph A */
							 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB5 periph A */
							 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
							 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB10 periph A */
					};

					pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
						atmel,pins =
							<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB8 periph A */
							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB11 periph A */
							 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A */
							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A */
							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A */
							 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB15 periph A */
							 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB16 periph A */
							 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB17 periph A */
					};
				};

				camera_sensor {
					pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 {
						atmel,pins =
							<AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* ISI_MCK */
					};

					pinctrl_sensor_power: sensor_power-0 {
						atmel,pins =
							<AT91_PIOA 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};

					pinctrl_sensor_reset: sensor_reset-0 {
						atmel,pins =
							<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
				};

				isi {
					pinctrl_isi_data_0_7: isi-0-data-0-7 {
						atmel,pins =
							<AT91_PIOC 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D0, conflicts with LCDDAT0 */
							AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D1, conflicts with LCDDAT1 */
							AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D2, conflicts with LCDDAT2 */
							AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D3, conflicts with LCDDAT3 */
							AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D4, conflicts with LCDDAT4 */
							AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D5, conflicts with LCDDAT5 */
							AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D6, conflicts with LCDDAT6 */
							AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D7, conflicts with LCDDAT7 */
							AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_PCK, conflicts with LCDDAT12 */
							AT91_PIOC 14 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_HSYNC, conflicts with LCDDAT14 */
							AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* ISI_VSYNC, conflicts with LCDDAT13 */
					};

					pinctrl_isi_data_8_9: isi-0-data-8-9 {
						atmel,pins =
							<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D8, conflicts with LCDDAT8 */
							AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* ISI_D9, conflicts with LCDDAT9 */
					};

					pinctrl_isi_data_10_11: isi-0-data-10-11 {
						atmel,pins =
							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D10, conflicts with LCDDAT10 */
							AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* ISI_D11, conflicts with LCDDAT11 */
					};
				};

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				ebi {
					pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
						atmel,pins =
							<AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_ebi_addr_nand: ebi-addr-0 {
						atmel,pins =
							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_ebi_led_cd: led-cd-0 {
						atmel,pins =
							<AT91_PIOC 16 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC16 LED-CD (modem normally controls) */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA2 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA3 periph A */
					};

					pinctrl_usart0_sck: usart0_sck-0 {
						atmel,pins =
							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA4 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
							 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC27 periph C */
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC28 periph C */
					};

					pinctrl_usart1_sck: usart1_sck-0 {
						atmel,pins =
							<AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC29 periph C */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB0 periph B */
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB1 periph B */
					};

					pinctrl_usart2_sck: usart2_sck-0 {
						atmel,pins =
							<AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE
							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC24 periph B */
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC25 periph B */
					};

					pinctrl_usart3_sck: usart3_sck-0 {
						atmel,pins =
							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC26 periph B */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC8 periph C */
							 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC9 periph C with pullup */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC16 periph C */
							 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC17 periph C with pullup */
					};
				};

				nand {
					pinctrl_nand_oe_we: nand-oe-we-0 {
						atmel,pins =
							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_nand_rb: nand-rb-0 {
						atmel,pins =
							<AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};

					pinctrl_nand_cs: nand-cs-0 {
						atmel,pins =
							<AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
					};
				};

				/*
				 * Pin D21 will be left floating when the power goes off on the radio.
				 * We need to pull it down to ensure it is low during radio power-off.
				 * pinctrl is loaded during the call to platform_device_register() in mts-io.
				 * If we need to customize this for various hardware revisions, these can
				 * be loaded as overlays prior to loading the mts-io module, overwriting the
				 * atmel,pins section.
				*/

                                /* Atmel pinctrl driver ignores output-high, output-low */
				mts_io {
					pinctrl_mts_io: mts_io-0 {
						atmel,pins =
							<AT91_PIOA 21 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))  /* PA21 GPIO output high radio-power */
							AT91_PIOA 22 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))   /* PA22 GPIO output high radio-reset */
							AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN /* PD21 GPIO pull-down radio-monitor */
							AT91_PIOD 19 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))   /* PD19 GNSS Int */
							AT91_PIOA 8 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))     /* PA8 LORA_RESET */
							AT91_PIOC 16 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))      /* PC16 ETH_NRST */
							AT91_PIOD 15 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))>;    /* PD15 N_GNSS_RESET */
					};
				};

				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA15 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
					};

					pinctrl_board_mmc0: mmc0-board {
						atmel,pins =
							<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD15 gpio CD pin pull up and deglitch */
					};
				};

				mmc1 {
					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA13 periph B */
							 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA12 periph B with pullup */
							 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA11 periph B with pullup */
					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA2 periph B with pullup */
							 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA3 periph B with pullup */
							 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA4 periph B with pullup */
					};

					pinctrl_board_mmc1: mmc1-board {
						atmel,pins =
							<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD14 gpio CD pin pull up and deglitch */
					};
				};

				usb2 {
					pinctrl_board_usb2: usb2-board {
						atmel,pins =
							<AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB16 gpio vbus sense, deglitch */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA24 periph B */
							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA26 periph B */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
					};
				};

				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA21 periph B SPI1_MISO pin */
							 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B SPI1_MOSI pin */
							 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B SPI1_SPCK pin */
					};
				};

				i2c0 {
					pinctrl_i2c0: i2c0-0 {
						atmel,pins =
							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA30 periph A I2C0 data */
							 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA31 periph A I2C0 clock */
					};
				};

				i2c1 {
					pinctrl_i2c1: i2c1-0 {
						atmel,pins =
							<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC0 periph C I2C1 data */
							 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC1 periph C I2C1 clock */
					};
				};

				i2c2 {
					pinctrl_i2c2: i2c2-0 {
						atmel,pins =
							<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B I2C2 data */
							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B I2C2 clock */
					};
				};

				i2c_gpio0 {
					pinctrl_i2c_gpio0: i2c_gpio0-0 {
						atmel,pins =
							<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PA30 gpio multidrive I2C0 data */
							 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PA31 gpio multidrive I2C0 clock */
					};
				};

				i2c_gpio1 {
					pinctrl_i2c_gpio1: i2c_gpio1-0 {
						atmel,pins =
							<AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PC0 gpio multidrive I2C1 data */
							 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PC1 gpio multidrive I2C1 clock */
					};
				};

				i2c_gpio2 {
					pinctrl_i2c_gpio2: i2c_gpio2-0 {
						atmel,pins =
							<AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PB4 gpio multidrive I2C2 data */
							 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PB5 gpio multidrive I2C2 clock */
					};
				};

				pwm0 {
					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
						atmel,pins =
							<AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
						atmel,pins =
							<AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};
					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
						atmel,pins =
							<AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
						atmel,pins =
							<AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
						atmel,pins =
							<AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};
					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
						atmel,pins =
							<AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
						atmel,pins =
							<AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
						atmel,pins =
							<AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
						atmel,pins =
							<AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
						atmel,pins =
							<AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};
				};

				tcb0 {
					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
						atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
						atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
						atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
						atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
						atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
						atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
						atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
						atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
					};
				};

				tcb1 {
					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
						atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
						atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
						atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
						atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
						atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
						atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};

					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
						atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
					};
				};

				1wire_cm {
					pinctrl_1wire_cm: 1wire_cm-0 {
						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <19>;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <22>;
					interrupt-controller;
					#interrupt-cells = <2>;
					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
				};
			};

			isi: isi@f8048000 {
				compatible = "atmel,at91sam9g45-isi";
				reg = <0xf8048000 0x4000>;
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_isi_data_0_7>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
				clock-names = "isi_clk";
				status = "disabled";
				port {
					#address-cells = <1>;
					#size-cells = <0>;
				};
			};

			macb0: ethernet@f802c000 {
				compatible = "cdns,at91sam9260-macb", "cdns,macb";
				reg = <0xf802c000 0x100>;
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb0_rmii>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>;
				clock-names = "hclk", "pclk";

				phy-mode = "rmii";
				status = "okay";
			};

			ssc0: ssc@f0010000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xf0010000 0x4000>;
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
				       <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
				dma-names = "tx", "rx";
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
				clock-names = "pclk";

				status = "disabled";
			};

			mmc0: mmc@f0008000 {
				compatible = "atmel,hsmci";
				reg = <0xf0008000 0x600>;
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
				dma-names = "rxtx";
				pinctrl-names = "default";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
				clock-names = "mci_clk";
				#address-cells = <1>;
				#size-cells = <0>;

				pinctrl-0 = <
					&pinctrl_board_mmc0
					&pinctrl_mmc0_slot0_clk_cmd_dat0
					&pinctrl_mmc0_slot0_dat1_3>;
				status = "disabled";

				slot@0 {
					reg = <0>;
					bus-width = <4>;
					cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
				};
			};

			mmc1: mmc@f000c000 {
				compatible = "atmel,hsmci";
				reg = <0xf000c000 0x600>;
				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
				dma-names = "rxtx";
				pinctrl-names = "default";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
				clock-names = "mci_clk";
				#address-cells = <1>;
				#size-cells = <0>;


				pinctrl-0 = <
					&pinctrl_board_mmc1
					&pinctrl_mmc1_slot0_clk_cmd_dat0
					&pinctrl_mmc1_slot0_dat1_3>;
				status = "disabled";

				slot@0 {
					reg = <0>;
					bus-width = <4>;
					cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
				       <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
				dma-names = "tx", "rx";
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
				clock-names = "usart";

				status = "okay";
				atmel,use-dma-rx;
				atmel,use-dma-tx;
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x200>;
				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
				       <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
				dma-names = "tx", "rx";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
				clock-names = "usart";

				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x200>;
				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
				       <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
				dma-names = "tx", "rx";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
				clock-names = "usart";
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x200>;
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
				       <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
				dma-names = "tx", "rx";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
				clock-names = "usart";
				status = "disabled";
			};

			usart3: serial@f8028000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8028000 0x200>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart3>;
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
				       <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
				dma-names = "tx", "rx";
				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
				clock-names = "usart";
				status = "disabled";
			};

			/* uart0 is GNSS on MTCDTIP2, enabled by overlay */
			uart0: serial@f8040000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8040000 0x200>;
				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
				clock-names = "usart";

				status = "disabled";
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				/* Table 30-1 of the SAM9G25 datasheet specifies the dma channel numbers
				 * for TWI0 (I2C).  Note that a channel number is a slot in a table
				 * in the kernel when printed in the kernel log.  It has nothing to do
				 * with the channel numbers specified here which correspond to the
				 * SAM9G25 datasheet.
				 * In atmel-dma.txt kernel documentation the SAM9G25 channel number
				 * is referred to as:
				 *     peripheral identifier for the hardware handshaking interface
				 */
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(11)>,
				       <&dma0 1 (AT91_DMA_CFG_PER_ID(12) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
				dma-names = "tx", "rx";
			};

			uart1: serial@f8044000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8044000 0x200>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
				clock-names = "usart";
				status = "disabled";
			};

			adc0: adc@f804c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91sam9x5-adc";
				reg = <0xf804c000 0x100>;
				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
					 <&adc_op_clk>;
				clock-names = "adc_clk", "adc_op_clk";
				atmel,adc-use-external-triggers;
				atmel,adc-channels-used = <0xffff>;
				atmel,adc-vref = <3300>;
				atmel,adc-startup-time = <40>;
				atmel,adc-sample-hold-time = <11>;
				atmel,adc-res = <8 10>;
				atmel,adc-res-names = "lowres", "highres";
				atmel,adc-use-res = "highres";

				atmel,adc-ts-wires = <4>;
				atmel,adc-ts-pressure-threshold = <10000>;
				status = "disabled";

				trigger0 {
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};

				trigger1 {
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger2 {
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger3 {
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};

			spi0: spi@f0000000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0000000 0x100>;
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
				       <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
				dma-names = "tx", "rx";
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
				clock-names = "spi_clk";


				status = "okay";
				cs-gpios = <&pioA 7 0>, <&pioA 1 0>, <0>, <0>;

				lora-spi@0 {
					compatible = "mts,mtac";
					spi-max-frequency = <2000000>;
					reg = <0>;
				};
				lora-spi@1 {
					compatible = "mts,mtac";
					spi-max-frequency = <2000000>;
					reg = <1>;
				};
			};

			spi1: spi@f0004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0004000 0x100>;
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
				       <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
				dma-names = "tx", "rx";
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
				clock-names = "spi_clk";
				status = "disabled";
			};

			usb2: gadget@f803c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91sam9g45-udc";
				reg = <0x00500000 0x80000
				       0xf803c000 0x400>;
				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
				clock-names = "hclk", "pclk";

				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_board_usb2>;
				/* atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;		mtcdt: no vbus-gpio */
				status = "disabled";

				ep@0 {
					reg = <0>;
					atmel,fifo-size = <64>;
					atmel,nb-banks = <1>;
				};

				ep@1 {
					reg = <1>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <2>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep@2 {
					reg = <2>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <2>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep@3 {
					reg = <3>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
				};

				ep@4 {
					reg = <4>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
				};

				ep@5 {
					reg = <5>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
					atmel,can-isoc;
				};

				ep@6 {
					reg = <6>;
					atmel,fifo-size = <1024>;
					atmel,nb-banks = <3>;
					atmel,can-dma;
					atmel,can-isoc;
				};
			};

			watchdog: watchdog@fffffe40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffe40 0x10>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				atmel,watchdog-type = "hardware";
				atmel,reset-type = "all";
				atmel,dbg-halt;

				status = "okay";
			};

			rtc: rtc@fffffeb0 {
				compatible = "atmel,at91sam9x5-rtc";
				reg = <0xfffffeb0 0x40>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				clocks = <&clk32k>;
				status = "okay";
			};

			pwm0: pwm@f8034000 {
				compatible = "atmel,at91sam9rl-pwm";
				reg = <0xf8034000 0x300>;
				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
				#pwm-cells = <3>;
				status = "disabled";
			};
		};

		usb0: ohci@600000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00600000 0x100000>;
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
			clock-names = "ohci_clk", "hclk", "uhpck";

			num-ports = <3>;
			//mtcdt: no vbus-gpio
			//atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
			//		   &pioD 19 GPIO_ACTIVE_LOW
			//		   &pioD 20 GPIO_ACTIVE_LOW
			//		  >;
			status = "okay";
		};

		usb1: ehci@700000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
			clock-names = "usb_clk", "ehci_clk";

			status = "okay";
		};

		ebi: ebi@10000000 {
			compatible = "atmel,at91sam9x5-ebi";
			#address-cells = <2>;
			#size-cells = <1>;
			atmel,smc = <&smc>;
			atmel,matrix = <&matrix>;
			reg = <0x10000000 0x60000000>;
			ranges = <0x0 0x0 0x10000000 0x10000000
				  0x1 0x0 0x20000000 0x10000000
				  0x2 0x0 0x30000000 0x10000000
				  0x3 0x0 0x40000000 0x10000000
				  0x4 0x0 0x50000000 0x10000000
				  0x5 0x0 0x60000000 0x10000000>;
			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;

			pinctrl-0 = <&pinctrl_ebi_addr_nand
				     &pinctrl_ebi_data_0_7>;
			pinctrl-names = "default";
			status = "okay";

			nand_controller: nand-controller {
				compatible = "atmel,at91sam9g45-nand-controller";
				ecc-engine = <&pmecc>;
				#address-cells = <2>;
				#size-cells = <1>;
				ranges;


				status = "okay";
				pinctrl-0 = <&pinctrl_nand_oe_we
					     &pinctrl_nand_cs
					     &pinctrl_nand_rb>;
				pinctrl-names = "default";

				nand@3 {
					reg = <0x3 0x0 0x800000>;
					rb-gpios = <&pioC 31 GPIO_ACTIVE_HIGH>;
					cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
					nand-bus-width = <8>;
					nand-ecc-mode = "hw";
					nand-ecc-strength = <4>;
					nand-ecc-step-size = <512>;
					/* nand-on-flash-bbt; */
					label = "atmel_nand";

					partitions {
						compatible = "fixed-partitions";
						#address-cells = <1>;
						#size-cells = <1>;

						nand@0 {
							label = "NANDFlash";
							reg = <0x0 0x10000000>;
						};

						at91bootstrap@0 {
							label = "at91bootstrap";
							reg = <0x0 0x40000>;
						};

						uboot@40000 {
							label = "u-Boot";
							reg = <0x40000 0x80000>;
						};
					
						ubootconfig0@c0000 {
							label = "u-Boot Config";
							reg = <0xc0000 0xa0000>;
						};
					
						ubootconfig1@160000 {
							label = "u-Boot Redundant Config";
							reg = <0x160000 0xa0000>;
						};
					
						uImage@200000 {
							label = "uImage";
							reg = <0x200000 0x600000>;
						};

						config0@800000 {
							label = "Config";
							reg = <0x800000 0x800000>;
						};

						config1@1000000 {
							label = "OEM Config";
							reg = <0x1000000 0x800000>;
						};

						rootfs@1800000 {
							label = "Rootfs";
							reg = <0x1800000 0x8000000>;
						};

						user@9800000 {
							label = "User data";
							reg = <0x9800000 0x6800000>;
						};
					};
				};
			};
		};
	};

	i2c-gpio-0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
			 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio0>;
		status = "disabled";
	};

	i2c-gpio-1 {
		compatible = "i2c-gpio";
		gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
			 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio1>;
		status = "disabled";
	};

	i2c-gpio-2 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio2>;
		status = "disabled";
	};

	mts-io {
		status = "okay";
		compatible = "mts,mts-io";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_mts_io>;
	};

	leds {
		compatible = "gpio-leds";

		pc25 {
			label = "led-status";
			gpios = <&pioC 25 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "default-on";
		};
		pc15 {
			label = "led-lora";
			gpios = <&pioC 15 GPIO_ACTIVE_LOW>;
		};
		pc16 {
			label = "led-cd";
			gpios = <&pioC 16 GPIO_ACTIVE_LOW>;
		};
		pc20 {
			label = "led-wifi";
			gpios = <&pioC 20 GPIO_ACTIVE_LOW>;
		};
	};

	1wire_cm {
		compatible = "w1-gpio";
		gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
		linux,open-drain;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_1wire_cm>;
		status = "disabled";
	};

	/* GPS-PPS input on MTCDTIP2 - enabled by overlay*/
	pps-0 {
		compatible = "pps-gpio";
		gpios = <&pioC 10 0>;
		capture-clear;
		status = "disabled";
	};

	i2c0: i2c@f8010000 {
		compatible = "atmel,at91sam9x5-i2c";
		reg = <0xf8010000 0x100>;
		interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
		dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
			<&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c0>;
		clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
		status = "okay";
		id_eeprom@56 {
			compatible = "atmel,24c04";
			reg = <0x56>;
			pagesize = <16>;
			status = "okay";
		};
		board_temp@48 {
			compatible = "ti,tmp102";
			reg = <0x48>;
			status = "okay";
		};
	};
};