Index: git/include/configs/at91sam9x5ek.h =================================================================== --- git.orig/include/configs/at91sam9x5ek.h 2015-03-31 17:07:08.258060132 -0500 +++ git/include/configs/at91sam9x5ek.h 2015-03-31 17:07:09.086047272 -0500 @@ -40,6 +40,7 @@ #define CONFIG_INITRD_TAG #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R /* enable platform-dependent misc_init_r() */ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_OF_LIBFDT @@ -54,6 +55,7 @@ #define CONFIG_USART_ID ATMEL_ID_SYS /* LCD */ +/* MTCDT has no LCD #define CONFIG_LCD #define LCD_BPP LCD_COLOR16 #define LCD_OUTPUT_BPP 24 @@ -65,8 +67,14 @@ #define CONFIG_ATMEL_HLCD #define CONFIG_ATMEL_LCD_RGB565 #define CONFIG_SYS_CONSOLE_IS_IN_ENV +*/ -#define CONFIG_BOOTDELAY 3 +/*STATUS LED*/ +#define BOOT_STATUS_LED AT91_PIN_PA24 + +#define CONFIG_BOOTDELAY 0 +/* check for keypress even if bootdelay is 0 */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* * BOOTP options @@ -90,10 +98,22 @@ #define CONFIG_CMD_NAND #define CONFIG_CMD_SF +#define CONFIG_CMD_I2C +#define CONFIG_SOFT_I2C +#define CONFIG_SOFT_I2C_GPIO_SCL AT91_PIN_PA31 +#define CONFIG_SOFT_I2C_GPIO_SDA AT91_PIN_PA30 +#define CONFIG_SYS_I2C_SPEED 50000 + +/* I2C eeprom support */ +#define CONFIG_CMD_EEPROM +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* at24c04 */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 + /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) @@ -120,12 +140,14 @@ /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 +/* MTCDT nand ready is PC31 */ +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC31 /* PMECC & PMERRLOC */ #define CONFIG_ATMEL_NAND_HWECC 1 #define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 +/* MTCDT: 4-bit PMECC */ +#define CONFIG_PMECC_CAP 4 #define CONFIG_PMECC_SECTOR_SIZE 512 #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 @@ -143,21 +165,22 @@ #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_MACB_SEARCH_PHY +/* enable MII command */ +#define CONFIG_CMD_MII 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x26e00000 +#define CONFIG_SYS_MEMTEST_END 0x2ee00000 #ifdef CONFIG_SYS_USE_NANDFLASH /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0xc0000 -#define CONFIG_ENV_OFFSET_REDUND 0x100000 +#define CONFIG_ENV_OFFSET_REDUND 0x160000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ -#define CONFIG_BOOTCOMMAND "nand read " \ - "0x22000000 0x200000 0x300000; " \ - "bootm 0x22000000" +/* MTCDT: read from env variables for boot */ +#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}" #else #ifdef CONFIG_SYS_USE_SPIFLASH /* bootstrap + u-boot + env + linux in spi flash */ @@ -172,11 +195,8 @@ #endif #endif -#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ - "mtdparts=atmel_nand:" \ - "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ - "root=/dev/mtdblock1 rw " \ - "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs" +/* MTCDT uses jffs2 */ +#define CONFIG_BOOTARGS "mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2" #define CONFIG_BAUDRATE 115200 @@ -199,4 +219,22 @@ #error CONFIG_USE_IRQ not supported #endif +/* MTCDT defaults */ +#define CONFIG_ENV_OVERWRITE 1 /* Allow Overwrite of serial# & ethaddr */ +#define CONFIG_ETHADDR 00:08:00:87:00:02 +#define CONFIG_IPADDR 192.168.2.1 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_SERVERIP 192.168.2.2 +#define CONFIG_HOSTNAME AT91SAM9G25 +#define CONFIG_LOADADDR 0x22000000 + +/* MTCDT - enable watchdog */ +#define CONFIG_AT91SAM9_WATCHDOG 1 +#define CONFIG_HW_WATCHDOG 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr=0x200000\0" \ + "" + + #endif Index: git/board/atmel/at91sam9x5ek/at91sam9x5ek.c =================================================================== --- git.orig/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2015-03-31 17:07:03.950127041 -0500 +++ git/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2015-03-31 17:16:49.269015984 -0500 @@ -61,7 +61,8 @@ csa = readl(&matrix->ebicsa); csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA; /* NAND flash on D16 */ - csa |= AT91_MATRIX_NFD0_ON_D16; + /* MTCDT: nand flash is set up by bootstrap, so leave it alone here */ + /* csa |= AT91_MATRIX_NFD0_ON_D16; */ /* Configure IO drive */ csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL; @@ -266,6 +267,9 @@ int board_init(void) { + /* Set Status LED High */ + at91_set_gpio_output(BOOT_STATUS_LED, 0); + /* arch number of AT91SAM9X5EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK; @@ -288,6 +292,63 @@ #ifdef CONFIG_LCD at91sam9x5ek_lcd_hw_init(); #endif + + return 0; +} + +/* on-board EEPROM */ +struct mts_id_eeprom_layout { + char vendor_id[32]; + char product_id[32]; + char device_id[32]; + char hw_version[32]; + uint8_t mac_addr[6]; + char imei[32]; + uint8_t capa[32]; + uint8_t mac_bluetooth[6]; + uint8_t mac_wifi[6]; + uint8_t reserved[302]; +}; + +int board_get_enetaddr(uchar *enetaddr) +{ + struct mts_id_eeprom_layout eeprom_buffer = {0}; + + if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, &eeprom_buffer, sizeof(eeprom_buffer))) { + printf("EEPROM: read error\n"); + return 0; + } + + if (eeprom_buffer.vendor_id[0] == 0x00 || eeprom_buffer.vendor_id[0] == 0xFF) { + printf("EEPROM: uninitialized\n"); + return 0; + } + + printf("vendor-id: %s\n", eeprom_buffer.vendor_id); + printf("product-id: %s\n", eeprom_buffer.product_id); + printf("device-id: %s\n", eeprom_buffer.device_id); + printf("hw-version: %s\n", eeprom_buffer.hw_version); + printf("mac-addr: %02x:%02x:%02x:%02x:%02x:%02x\n", eeprom_buffer.mac_addr[0], + eeprom_buffer.mac_addr[1], + eeprom_buffer.mac_addr[2], + eeprom_buffer.mac_addr[3], + eeprom_buffer.mac_addr[4], + eeprom_buffer.mac_addr[5]); + + memcpy(enetaddr, eeprom_buffer.mac_addr, 6); + + return 1; +} + +int misc_init_r(void) +{ + uchar enetaddr[6]; + + /* set MAC address from EEPROM if read successful */ + if (board_get_enetaddr(enetaddr)) { + eth_setenv_enetaddr("ethaddr", enetaddr); + } + return 0; } @@ -297,3 +358,4 @@ CONFIG_SYS_SDRAM_SIZE); return 0; } + Index: git/board/atmel/at91sam9x5ek/config.mk =================================================================== --- git.orig/board/atmel/at91sam9x5ek/config.mk 2015-03-31 17:07:03.950127041 -0500 +++ git/board/atmel/at91sam9x5ek/config.mk 2015-03-31 17:07:09.086047272 -0500 @@ -1 +1 @@ -CONFIG_SYS_TEXT_BASE = 0x26f00000 +CONFIG_SYS_TEXT_BASE = 0x2ef00000 Index: git/drivers/gpio/at91_gpio.c =================================================================== --- git.orig/drivers/gpio/at91_gpio.c 2015-03-31 17:07:04.822113498 -0500 +++ git/drivers/gpio/at91_gpio.c 2015-03-31 17:07:09.086047272 -0500 @@ -40,6 +40,7 @@ #include #include #include +#include int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) { @@ -343,3 +344,39 @@ } return pdsr != 0; } + +int gpio_request(unsigned gpio, const char *label) +{ + return 0; +} + +int gpio_free(unsigned gpio) +{ + return 0; +} + +int gpio_is_valid(int number) +{ + return 0; +} + +int gpio_direction_input(unsigned gpio) +{ + // input with no pullup + return at91_set_gpio_input(gpio, 0); +} + +int gpio_direction_output(unsigned gpio, int value) +{ + return at91_set_gpio_output(gpio, value); +} + +int gpio_get_value(unsigned gpio) +{ + return at91_get_gpio_value(gpio); +} + +void gpio_set_value(unsigned gpio, int value) +{ + return at91_set_gpio_value(gpio, value); +}