From 4bb6f26b05450777d14aa96e10783066c2503dc2 Mon Sep 17 00:00:00 2001 From: John Klug Date: Wed, 11 Nov 2020 16:17:52 -0600 Subject: Add new BSP submodule for Atmel Processors. --- .../vizzini-1.1/vizzini-1.1-enable-cts.patch | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-enable-cts.patch (limited to 'recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-enable-cts.patch') diff --git a/recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-enable-cts.patch b/recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-enable-cts.patch new file mode 100644 index 0000000..12e6d04 --- /dev/null +++ b/recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-enable-cts.patch @@ -0,0 +1,32 @@ +Index: xr21v141x-lnx3.10-3.11/vizzini.c +=================================================================== +--- xr21v141x-lnx3.10-3.11.orig/vizzini.c 2014-04-04 19:58:55.000000000 -0500 ++++ xr21v141x-lnx3.10-3.11/vizzini.c 2014-04-16 15:05:16.470621233 -0500 +@@ -61,6 +61,9 @@ + #define DRIVER_AUTHOR "Ravi Reddy" + #define DRIVER_DESC "Exar USB UART Driver for XR21V141x " + ++#define UART_PIN_RTS 0x020 ++#define UART_GPIO_DIR 0x01b ++ + static struct usb_driver xr21v141x_driver; + static struct tty_driver *xr21v141x_tty_driver; + static struct xr21v141x *xr21v141x_table[XR21V141X_TTY_MINORS]; +@@ -1172,6 +1175,17 @@ + vizzini_set_reg(xr21v141x, block, UART_FLOW, flow); + vizzini_set_reg(xr21v141x, block, UART_GPIO_MODE, gpio_mode); + ++ /* if flow control hasn't been turned on, enable RTS for modem-like functionality */ ++ if (flow == UART_FLOW_MODE_NONE) { ++ char value; ++ vizzini_get_reg(xr21v141x, block, UART_GPIO_DIR, &value); ++ value |= UART_PIN_RTS; ++ vizzini_set_reg(xr21v141x, block, UART_GPIO_DIR, value); ++ vizzini_get_reg(xr21v141x, block, UART_GPIO_CLR, &value); ++ value |= UART_PIN_RTS; ++ vizzini_set_reg(xr21v141x, block, UART_GPIO_CLR, value); ++ } ++ + if (xr21v141x->trans9) { + /* Turn on wide mode if we're 9-bit transparent. */ + vizzini_set_reg(xr21v141x, EPLOCALS_REG_BLOCK, (block * MEM_EP_LOCALS_SIZE) + EP_WIDE_MODE, 1); -- cgit v1.2.3