From 4bb6f26b05450777d14aa96e10783066c2503dc2 Mon Sep 17 00:00:00 2001 From: John Klug Date: Wed, 11 Nov 2020 16:17:52 -0600 Subject: Add new BSP submodule for Atmel Processors. --- COPYING.MIT | 17 + README | 10 + classes/linux-append-dtb.bbclass | 8 + conf/layer.conf | 10 + conf/machine/mtcap.conf | 45 + conf/machine/mtcdt.conf | 46 + conf/machine/mtr.conf | 47 + conf/machine/mtrv1.conf | 46 + contrib/uboot-setenv-mtcdt.minicom | 61 + contrib/uboot-setenv-mtcdt.ttl | 149 + contrib/uboot-setenv-mtr.minicom | 61 + contrib/uboot-setenv-mtrv1.minicom | 61 + .../at91bootstrap-3.8-mtcdt.patch | 82 + .../at91bootstrap-3.8-mtr.patch | 414 ++ .../at91sam9x5_4bit_pmecc_header.bin | 1 + .../create_4bit_pmecc_header.rb | 5 + .../at91bootstrap/at91bootstrap-3.8.12/defconfig | 228 + .../at91bootstrap-3.8.12/defconfig.mtr | 228 + .../disable-rtc-interrupts.patch | 32 + .../mtrv1-DDRlowDriveStrength.patch | 22 + .../onetime-slow-clock-switch.patch | 89 + recipes-bsp/at91bootstrap/at91bootstrap.inc | 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recipes-kernel/wilc1000/files/wilc1000.conf create mode 100644 recipes-kernel/wilc1000/files/wilcp1000_3.18_to_3.12_kernel.patch create mode 100644 recipes-kernel/wilc1000/wilc1000_3.12.27.bb.obsolete diff --git a/COPYING.MIT b/COPYING.MIT new file mode 100644 index 0000000..fb950dc --- /dev/null +++ b/COPYING.MIT @@ -0,0 +1,17 @@ +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. diff --git a/README b/README new file mode 100644 index 0000000..b8db2bf --- /dev/null +++ b/README @@ -0,0 +1,10 @@ +MultiTech hardware support OpenEmbedded layer + +This layer depends on: + +URI: git://git.openembedded.org/openembedded-core +branch: thud +revision: HEAD + +This is the Yocto-Thud version of mLinux which uses +Atmel linux-at91 4.9.87. diff --git a/classes/linux-append-dtb.bbclass b/classes/linux-append-dtb.bbclass new file mode 100644 index 0000000..6d3e52d --- /dev/null +++ b/classes/linux-append-dtb.bbclass @@ -0,0 +1,8 @@ +# build devicetree blob, append to kernel, and create uImage +do_compile_append() { + if [ -n "${DTB_APPEND}" ]; then + oe_runmake ${DTB_APPEND}.dtb + cat arch/${ARCH}/boot/zImage arch/${ARCH}/boot/dts/${DTB_APPEND}.dtb > arch/${ARCH}/boot/zImage.dtb + uboot-mkimage -A ${UBOOT_ARCH} -O linux -T kernel -C none -a ${UBOOT_LOADADDRESS} -e ${UBOOT_ENTRYPOINT} -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d arch/${ARCH}/boot/zImage.dtb arch/${ARCH}/boot/uImage + fi +} diff --git a/conf/layer.conf b/conf/layer.conf new file mode 100644 index 0000000..8eb15ce --- /dev/null +++ b/conf/layer.conf @@ -0,0 +1,10 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have a recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "meta-multitech-atmel" +BBFILE_PATTERN_meta-multitech-atmel = "^${LAYERDIR}/" +BBFILE_PRIORITY_meta-multitech-atmel = "10" diff --git a/conf/machine/mtcap.conf b/conf/machine/mtcap.conf new file mode 100644 index 0000000..01c508b --- /dev/null +++ b/conf/machine/mtcap.conf @@ -0,0 +1,45 @@ +#@TYPE: Machine +#@Name: MTCAP +#@DESCRIPTION: Machine configuration for the MTCAP hardware + +require conf/machine/include/tune-arm926ejs.inc + +MACHINE_FEATURES = "ext2 ext3 usbhost usbgadget ppp" +PREFERRED_PROVIDER_virtual/kernel = "linux-at91" +PREFERRED_VERSION_linux = "4.9.%" + +# No EXAR chip present on an MTCAP + +DEFAULTTUNE = "arm926ejs" +TUNE_CCARGS = " -march=armv5te -marm -mthumb-interwork -mtune=arm926ej-s" +TUNE_FEATURES = "arm armv5 thumb dsp arm926ejs" +ARMPKGSFX_THUMB="t" + +# used by sysvinit_2 +SERIAL_CONSOLES = "115200;ttyS0" +#don't try to access tty1 +USE_VT = "0" + +UBOOT_MACHINE = "at91sam9x5ek_nandflash_config" +PREFERRED_VERSION_u-boot = "2016.09.01" + +AT91BOOTSTRAP_BOARD = "at91sam9x5eknf_uboot" +PREFERRED_VERSION_at91bootstrap = "3.8.12" + +KERNEL_IMAGETYPE = "uImage" +# remove kernel-image from rootfs by overriding kernel-base DEPS +RDEPENDS_kernel-base = "" + +EXTRA_IMAGEDEPENDS += "at91bootstrap u-boot" + +IMAGE_FSTYPES =+ "jffs2 tar.gz" +EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 -n" + +UBOOT_ENTRYPOINT = "0x20008000" +UBOOT_LOADADDRESS = "0x20008000" + +PREFERRED_VERSION_rs9113 = '1.6.1' + +PRINC ?= "0" + +PACKAGECONFIG_append_pn-boost = " python" diff --git a/conf/machine/mtcdt.conf b/conf/machine/mtcdt.conf new file mode 100644 index 0000000..30761df --- /dev/null +++ b/conf/machine/mtcdt.conf @@ -0,0 +1,46 @@ +#@TYPE: Machine +#@Name: Multi-Tech MTCDT +#@DESCRIPTION: Machine configuration for the MultiConnect Conduit MTCDT hardware + +require conf/machine/include/tune-arm926ejs.inc + +MACHINE_FEATURES = "ext2 ext3 usbhost usbgadget ppp" +PREFERRED_PROVIDER_virtual/kernel = "linux-at91" +PREFERRED_VERSION_linux = "4.9.%" + +MACHINE_ESSENTIAL_EXTRA_RDEPENDS = "kernel-module-vizzini" +PREFERRED_VERSION_kernel-module-vizzini ?= "1.1" + +DEFAULTTUNE = "arm926ejs" +TUNE_CCARGS = " -march=armv5te -marm -mthumb-interwork -mtune=arm926ej-s" +TUNE_FEATURES = "arm armv5 thumb dsp arm926ejs" +ARMPKGSFX_THUMB="t" + +# used by sysvinit_2 +SERIAL_CONSOLES = "115200;ttyS0" +#don't try to access tty1 +USE_VT = "0" + +UBOOT_MACHINE = "at91sam9x5ek_nandflash_config" +PREFERRED_VERSION_u-boot = "2016.09.01" + +AT91BOOTSTRAP_BOARD = "at91sam9x5eknf_uboot" +PREFERRED_VERSION_at91bootstrap = "3.8.12" + +KERNEL_IMAGETYPE = "uImage" +# remove kernel-image from rootfs by overriding kernel-base DEPS +RDEPENDS_kernel-base = "" + +EXTRA_IMAGEDEPENDS += "at91bootstrap u-boot" + +IMAGE_FSTYPES =+ "jffs2 tar.gz" +EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 -n" + +UBOOT_ENTRYPOINT = "0x20008000" +UBOOT_LOADADDRESS = "0x20008000" + +PREFERRED_VERSION_rs9113 = '1.6.1' + +PRINC ?= "0" + +PACKAGECONFIG_append_pn-boost = " python" diff --git a/conf/machine/mtr.conf b/conf/machine/mtr.conf new file mode 100644 index 0000000..e5c68e5 --- /dev/null +++ b/conf/machine/mtr.conf @@ -0,0 +1,47 @@ +#@TYPE: Machine +#@Name: Multi-Tech MTCDT +#@DESCRIPTION: Machine configuration for the MTR hardware + +require conf/machine/include/tune-arm926ejs.inc + +MACHINE_FEATURES = "ext2 ext3 usbhost usbgadget ppp" +PREFERRED_PROVIDER_virtual/kernel = "linux-at91" +PREFERRED_VERSION_linux = "4.9.%" + +MACHINE_ESSENTIAL_EXTRA_RDEPENDS = "kernel-module-vizzini" +PREFERRED_VERSION_kernel-module-vizzini ?= "1.1" + +DEFAULTTUNE = "arm926ejs" +TUNE_CCARGS = " -march=armv5te -marm -mthumb-interwork -mtune=arm926ej-s" +TUNE_FEATURES = "arm armv5 thumb dsp arm926ejs" +ARMPKGSFX_THUMB="t" + +# used by sysvinit_2 +SERIAL_CONSOLES = "115200;ttyS0" +#don't try to access tty1 +USE_VT = "0" + +UBOOT_MACHINE = "at91sam9x5ek_nandflash_config" +PREFERRED_VERSION_u-boot = "2016.09.01" + +AT91BOOTSTRAP_BOARD = "at91sam9x5eknf_uboot" +PREFERRED_VERSION_at91bootstrap = "3.8.12" + +KERNEL_IMAGETYPE = "uImage" +# remove kernel-image from rootfs by overriding kernel-base DEPS +RDEPENDS_kernel-base = "" + +EXTRA_IMAGEDEPENDS += "at91bootstrap u-boot" + +IMAGE_FSTYPES =+ "jffs2 tar.gz" +EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 -n" + +UBOOT_ENTRYPOINT = "0x20008000" +UBOOT_LOADADDRESS = "0x20008000" + +# No rs9113 for mtr +PREFERRED_VERSION_rs9113 = '1.6.1' + +PRINC ?= "0" + +PACKAGECONFIG_append_pn-boost = " python" diff --git a/conf/machine/mtrv1.conf b/conf/machine/mtrv1.conf new file mode 100644 index 0000000..e350664 --- /dev/null +++ b/conf/machine/mtrv1.conf @@ -0,0 +1,46 @@ +#@TYPE: Machine +#@Name: Multi-Tech MTCDT +#@DESCRIPTION: Machine configuration for the MTRv1 hardware + +require conf/machine/include/tune-arm926ejs.inc + +MACHINE_FEATURES = "ext2 ext3 usbhost usbgadget ppp" +PREFERRED_PROVIDER_virtual/kernel = "linux-at91" +PREFERRED_VERSION_linux = "4.9.%" + +MACHINE_ESSENTIAL_EXTRA_RDEPENDS = "kernel-module-vizzini" +PREFERRED_VERSION_kernel-module-vizzini ?= "1.1" + +DEFAULTTUNE = "arm926ejs" +TUNE_CCARGS = " -march=armv5te -marm -mthumb-interwork -mtune=arm926ej-s" +TUNE_FEATURES = "arm armv5 thumb dsp arm926ejs" +ARMPKGSFX_THUMB="t" + +# used by sysvinit_2 +SERIAL_CONSOLES = "115200;ttyS0" +#don't try to access tty1 +USE_VT = "0" + +UBOOT_MACHINE = "at91sam9x5ek_nandflash_config" +PREFERRED_VERSION_u-boot = "2016.09.01" + +AT91BOOTSTRAP_BOARD = "at91sam9x5eknf_uboot" +PREFERRED_VERSION_at91bootstrap = "3.8.12" + +KERNEL_IMAGETYPE = "uImage" +# remove kernel-image from rootfs by overriding kernel-base DEPS +RDEPENDS_kernel-base = "" + +EXTRA_IMAGEDEPENDS += "at91bootstrap u-boot" + +IMAGE_FSTYPES =+ "jffs2 tar.gz" +EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 -n" + +UBOOT_ENTRYPOINT = "0x20008000" +UBOOT_LOADADDRESS = "0x20008000" + +PREFERRED_VERSION_rs9113 = '1.6.1' + +PRINC ?= "0" + +PACKAGECONFIG_append_pn-boost = " python" diff --git a/contrib/uboot-setenv-mtcdt.minicom b/contrib/uboot-setenv-mtcdt.minicom new file mode 100644 index 0000000..5ab6c6c --- /dev/null +++ b/contrib/uboot-setenv-mtcdt.minicom @@ -0,0 +1,61 @@ +print setting U-Boot variables... +send setenv bootargs \'mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2\' +send setenv bootcmd \'nboot.jffs2 ${loadaddr} 0 ${kernel_addr} && bootm ${loadaddr}\' +send setenv bootdelay 1 +send setenv serverip 192.168.2.2 +send setenv ipaddr 192.168.2.1 +send setenv netmask 255.255.255.0 +send setenv loadaddr 0x22000000 +send setenv tftpaddr 0x20000000 +send setenv stdin serial +send setenv stdout serial +send setenv stderr serial +send setenv ethact macb0 +send setenv mtdids nand0=nand0 +send setenv mtdparts mtdparts=nand0:256k(bootstrap),512k(u-boot),640k(u-boot-env1),640k(u-boot-env2),6M(kernel),8M(config),8M(oem),128M(rootfs),-(user) +send setenv bootstrap_file oe_bootstrap_pmecc_padded.bin +send setenv uboot_file oe_u-boot.bin +send setenv uboot_env1_file oe_uboot_env1.bin +send setenv uboot_env2_file oe_uboot_env2.bin +send setenv kernel_file oe_uImage.bin +send setenv config_file oe_config.tar.gz +send setenv oem_file oe_oem.tar.gz +send setenv rootfs_file oe_rootfs.jffs2 +send setenv bootstrap_addr 0x00000000 +send setenv uboot_addr 0x00040000 +send setenv uboot_env1_addr 0x000C0000 +send setenv uboot_env2_addr 0x00160000 +send setenv kernel_addr 0x00200000 +send setenv config_addr 0x00800000 +send setenv oem_addr 0x01000000 +send setenv rootfs_addr 0x01800000 +send setenv bootstrap_size 0x00040000 +send setenv uboot_size 0x00080000 +send setenv uboot_env1_size 0x000A0000 +send setenv uboot_env2_size 0x000A0000 +send setenv kernel_size 0x00600000 +send setenv config_size 0x00800000 +send setenv oem_size 0x00800000 +send setenv erase_bootstrap \'nand erase.part bootstrap\' +send setenv erase_uboot \'nand erase.part u-boot\' +send setenv erase_uboot_env1 \'nand erase.part u-boot-env1\' +send setenv erase_uboot_env2 \'nand erase.part u-boot-env2\' +send setenv erase_kernel \'nand erase.part kernel\' +send setenv erase_config \'nand erase.part config\' +send setenv erase_oem \'nand erase.part oem\' +send setenv erase_rootfs \'nand erase.part rootfs\' +send setenv erase_user_data \'nand erase.part user\' +send setenv tftp_bootstrap \'tftpb ${tftpaddr} ${bootstrap_file} && run erase_bootstrap && nand write.jffs2 ${fileaddr} bootstrap ${filesize}\' +send setenv tftp_uboot \'tftpb ${tftpaddr} ${uboot_file} && run erase_uboot && nand write.jffs2 ${fileaddr} u-boot ${filesize}\' +send setenv tftp_uboot_env1 \'tftpb ${tftpaddr} ${uboot_env1_file} && run erase_uboot_env1 && nand write.jffs2 ${fileaddr} u-boot-env1 ${filesize}\' +send setenv tftp_uboot_env2 \'tftpb ${tftpaddr} ${uboot_env2_file} && run erase_uboot_env2 && nand write.jffs2 ${fileaddr} u-boot-env2 ${filesize}\' +send setenv tftp_kernel \'tftpb ${tftpaddr} ${kernel_file} && run erase_kernel && nand write.jffs2 ${fileaddr} kernel ${filesize}\' +send setenv tftp_config \'tftpb ${tftpaddr} ${config_file} && run erase_config && nand write.jffs2 ${fileaddr} config ${filesize}\' +send setenv tftp_oem \'tftpb ${tftpaddr} ${oem_file} && run erase_oem && nand write.jffs2 ${fileaddr} oem ${filesize}\' +send setenv tftp_rootfs \'tftpb ${tftpaddr} ${rootfs_file} && run erase_rootfs && run erase_user_data && nand write.jffs2 ${fileaddr} rootfs ${filesize}\' +send setenv krb \'run tftp_kernel && run tftp_rootfs && boot\' +send setenv rb \'run tftp_rootfs && boot\' +print saving... +send saveenv +send saveenv +send printenv diff --git a/contrib/uboot-setenv-mtcdt.ttl b/contrib/uboot-setenv-mtcdt.ttl new file mode 100644 index 0000000..2b5dc54 --- /dev/null +++ b/contrib/uboot-setenv-mtcdt.ttl @@ -0,0 +1,149 @@ +;; Teraterm script to set the u-boot environmnet for flashing MTCDT or MTCAP +;; +;; setting U-Boot variables... +;; Prompt 'U-Boot> ' +;; 39 below translates to an apostrophe. +P = 'U-Boot> ' +K1 = 'mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2' +K2 = 'nboot.jffs2 ${loadaddr} 0 ${kernel_addr} && bootm ${loadaddr}' +BOOTSTRAP = 'nand erase.part bootstrap' +UBOOT0 = 'nand erase.part u-boot' +UBOOT1 = 'nand erase.part u-boot-env1' +UBOOT2 = 'nand erase.part u-boot-env2' +EKERN = 'nand erase.part kernel' +ECONF = 'nand erase.part config' +EOEM = 'nand erase.part oem' +EROOT = 'nand erase.part rootfs' +EUSER = 'nand erase.part user' +TBOOT = 'tftpb ${tftpaddr} ${bootstrap_file} && run erase_bootstrap && nand write.jffs2 ${fileaddr} bootstrap ${filesize}' +TUBOOT = 'tftpb ${tftpaddr} ${uboot_file} && run erase_uboot && nand write.jffs2 ${fileaddr} u-boot ${filesize}' +TUBOOTE1 = 'tftpb ${tftpaddr} ${uboot_env1_file} && run erase_uboot_env1 && nand write.jffs2 ${fileaddr} u-boot-env1 ${filesize}' +TUBOOTE2 = 'tftpb ${tftpaddr} ${uboot_env2_file} && run erase_uboot_env2 && nand write.jffs2 ${fileaddr} u-boot-env2 ${filesize}' +TKERN = 'tftpb ${tftpaddr} ${kernel_file} && run erase_kernel && nand write.jffs2 ${fileaddr} kernel ${filesize}' +TCONF = 'tftpb ${tftpaddr} ${config_file} && run erase_config && nand write.jffs2 ${fileaddr} config ${filesize}' +TOEM = 'tftpb ${tftpaddr} ${oem_file} && run erase_oem && nand write.jffs2 ${fileaddr} oem ${filesize}' +TROOT = 'tftpb ${tftpaddr} ${rootfs_file} && run erase_rootfs && run erase_user_data && nand write.jffs2 ${fileaddr} rootfs ${filesize}' +KRB = 'run tftp_kernel && run tftp_rootfs && boot' +RB = 'run tftp_rootfs && boot' + +sendln 'setenv bootargs '39 K1 39 +wait P +sendln 'setenv bootcmd '39 K2 39 +wait P +sendln 'setenv bootdelay 1' +wait P +sendln 'setenv serverip 192.168.2.2' +wait P +sendln 'setenv ipaddr 192.168.2.1' +wait P +sendln 'setenv netmask 255.255.255.0' +wait P +sendln 'setenv loadaddr 0x22000000' +wait P +sendln 'setenv tftpaddr 0x20000000' +wait P +sendln 'setenv stdin serial' +wait P +sendln 'setenv stdout serial' +wait P +sendln 'setenv stderr serial' +wait P +sendln 'setenv ethact macb0' +wait P +sendln 'setenv mtdids nand0=nand0' +wait P +sendln 'setenv mtdparts mtdparts=nand0:256k(bootstrap),512k(u-boot),640k(u-boot-env1),640k(u-boot-env2),6M(kernel),8M(config),8M(oem),128M(rootfs),-(user)' +wait P +sendln 'setenv bootstrap_file oe_bootstrap_pmecc_padded.bin' +wait P +sendln 'setenv uboot_file oe_u-boot.bin' +wait P +sendln 'setenv uboot_env1_file oe_uboot_env1.bin' +wait P +sendln 'setenv uboot_env2_file oe_uboot_env2.bin' +wait P +sendln 'setenv kernel_file oe_uImage.bin' +wait P +sendln 'setenv config_file oe_config.tar.gz' +wait P +sendln 'setenv oem_file oe_oem.tar.gz' +wait P +sendln 'setenv rootfs_file oe_rootfs.jffs2' +wait P +sendln 'setenv bootstrap_addr 0x00000000' +wait P +sendln 'setenv uboot_addr 0x00040000' +wait P +sendln 'setenv uboot_env1_addr 0x000C0000' +wait P +sendln 'saveenv' +wait P +sendln 'setenv uboot_env2_addr 0x00160000' +wait P +sendln 'setenv kernel_addr 0x00200000' +wait P +sendln 'setenv config_addr 0x00800000' +wait P +sendln 'setenv oem_addr 0x01000000' +wait P +sendln 'setenv rootfs_addr 0x01800000' +wait P +sendln 'setenv bootstrap_size 0x00040000' +wait P +sendln 'setenv uboot_size 0x00080000' +wait P +sendln 'setenv uboot_env1_size 0x000A0000' +wait P +sendln 'setenv uboot_env2_size 0x000A0000' +wait P +sendln 'setenv kernel_size 0x00600000' +wait P +sendln 'setenv config_size 0x00800000' +wait P +sendln 'setenv oem_size 0x00800000' +wait P +sendln 'setenv erase_bootstrap ' 39 BOOTSTRAP 39 +wait P +sendln 'setenv erase_uboot ' 39 UBOOT0 39 +wait P +sendln 'setenv erase_uboot_env1 ' 39 UBOOT1 39 +wait P +sendln 'setenv erase_uboot_env2 ' 39 UBOOT2 39 +wait P +sendln 'setenv erase_kernel ' 39 EKERN 39 +wait P +sendln 'setenv erase_config ' 39 ECONF 39 +wait P +sendln 'setenv erase_oem ' 39 EOEM 39 +wait P +sendln 'setenv erase_rootfs ' 39 EROOT 39 +wait P +sendln 'setenv erase_user_data ' 39 EUSER 39 +wait P +sendln 'setenv tftp_bootstrap ' 39 TBOOT 39 +wait P +sendln 'setenv tftp_uboot ' 39 TUBOOT 39 +wait P +sendln 'setenv tftp_uboot_env1 ' 39 TUBOOTE1 39 +wait P +sendln 'setenv tftp_uboot_env2 ' 39 TUBOOTE2 39 +wait P +sendln 'setenv tftp_kernel ' 39 TKERN 39 +wait P +sendln 'setenv tftp_config ' 39 TCONF 39 +wait P +sendln 'setenv tftp_oem ' 39 TOEM 39 +wait P +sendln 'setenv tftp_rootfs ' 39 TROOT 39 +wait P +sendln 'setenv krb ' 39 KRB 39 +wait P +sendln 'setenv rb ' 39 RB 39 +wait P +;; print saving... +sendln 'saveenv' +wait P +sendln 'saveenv' +wait P +sendln 'printenv' +wait P diff --git a/contrib/uboot-setenv-mtr.minicom b/contrib/uboot-setenv-mtr.minicom new file mode 100644 index 0000000..340e4f0 --- /dev/null +++ b/contrib/uboot-setenv-mtr.minicom @@ -0,0 +1,61 @@ +print setting U-Boot variables... +send setenv bootargs \'mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2\' +send setenv bootcmd \'nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}\' +send setenv bootdelay 1 +send setenv serverip 192.168.2.2 +send setenv ipaddr 192.168.2.1 +send setenv netmask 255.255.255.0 +send setenv loadaddr 0x22000000 +send setenv stdin serial +send setenv stdout serial +send setenv stderr serial +send setenv ethact macb0 +send setenv ethaddr 00:08:00:87:00:02 +send setenv mtdids nand0=nand0 +send setenv mtdparts mtdparts=nand0:256k(bootstrap),512k(u-boot),640k(u-boot-env1),640k(u-boot-env2),6M(kernel),8M(config),8M(oem),128M(rootfs),-(user) +send setenv bootstrap_file oe_bootstrap_pmecc_padded.bin +send setenv uboot_file oe_u-boot.bin +send setenv uboot_env1_file oe_uboot_env1.bin +send setenv uboot_env2_file oe_uboot_env2.bin +send setenv kernel_file oe_uImage.bin +send setenv config_file oe_config.tar.gz +send setenv oem_file oe_oem.tar.gz +send setenv rootfs_file oe_rootfs.jffs2 +send setenv bootstrap_addr 0x00000000 +send setenv uboot_addr 0x00040000 +send setenv uboot_env1_addr 0x000C0000 +send setenv uboot_env2_addr 0x00160000 +send setenv kernel_addr 0x00200000 +send setenv config_addr 0x00800000 +send setenv oem_addr 0x01000000 +send setenv rootfs_addr 0x01800000 +send setenv bootstrap_size 0x00040000 +send setenv uboot_size 0x00080000 +send setenv uboot_env1_size 0x000A0000 +send setenv uboot_env2_size 0x000A0000 +send setenv kernel_size 0x00600000 +send setenv config_size 0x00800000 +send setenv oem_size 0x00800000 +send setenv erase_bootstrap \'nand erase.part bootstrap\' +send setenv erase_uboot \'nand erase.part u-boot\' +send setenv erase_uboot_env1 \'nand erase.part u-boot-env1\' +send setenv erase_uboot_env2 \'nand erase.part u-boot-env2\' +send setenv erase_kernel \'nand erase.part kernel\' +send setenv erase_config \'nand erase.part config\' +send setenv erase_oem \'nand erase.part oem\' +send setenv erase_rootfs \'nand erase.part rootfs\' +send setenv erase_user_data \'nand erase.part user\' +send setenv tftp_bootstrap \'tftpboot ${loadaddr} ${bootstrap_file} && run erase_bootstrap && nand write.jffs2 ${fileaddr} bootstrap ${filesize}\' +send setenv tftp_uboot \'tftpboot ${loadaddr} ${uboot_file} && run erase_uboot && nand write.jffs2 ${fileaddr} u-boot ${filesize}\' +send setenv tftp_uboot_env1 \'tftpboot ${loadaddr} ${uboot_env1_file} && run erase_uboot_env1 && nand write.jffs2 ${fileaddr} u-boot-env1 ${filesize}\' +send setenv tftp_uboot_env2 \'tftpboot ${loadaddr} ${uboot_env2_file} && run erase_uboot_env2 && nand write.jffs2 ${fileaddr} u-boot-env2 ${filesize}\' +send setenv tftp_kernel \'tftpboot ${loadaddr} ${kernel_file} && run erase_kernel && nand write.jffs2 ${fileaddr} kernel ${filesize}\' +send setenv tftp_config \'tftpboot ${loadaddr} ${config_file} && run erase_config && nand write.jffs2 ${fileaddr} config ${filesize}\' +send setenv tftp_oem \'tftpboot ${loadaddr} ${oem_file} && run erase_oem && nand write.jffs2 ${fileaddr} oem ${filesize}\' +send setenv tftp_rootfs \'tftpboot ${loadaddr} ${rootfs_file} && run erase_rootfs && run erase_user_data && nand write.jffs2 ${fileaddr} rootfs ${filesize}\' +send setenv krb \'run tftp_kernel && run tftp_rootfs && boot\' +send setenv rb \'run tftp_rootfs && boot\' +print saving... +send saveenv +send saveenv +send printenv diff --git a/contrib/uboot-setenv-mtrv1.minicom b/contrib/uboot-setenv-mtrv1.minicom new file mode 100644 index 0000000..340e4f0 --- /dev/null +++ b/contrib/uboot-setenv-mtrv1.minicom @@ -0,0 +1,61 @@ +print setting U-Boot variables... +send setenv bootargs \'mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2\' +send setenv bootcmd \'nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}\' +send setenv bootdelay 1 +send setenv serverip 192.168.2.2 +send setenv ipaddr 192.168.2.1 +send setenv netmask 255.255.255.0 +send setenv loadaddr 0x22000000 +send setenv stdin serial +send setenv stdout serial +send setenv stderr serial +send setenv ethact macb0 +send setenv ethaddr 00:08:00:87:00:02 +send setenv mtdids nand0=nand0 +send setenv mtdparts mtdparts=nand0:256k(bootstrap),512k(u-boot),640k(u-boot-env1),640k(u-boot-env2),6M(kernel),8M(config),8M(oem),128M(rootfs),-(user) +send setenv bootstrap_file oe_bootstrap_pmecc_padded.bin +send setenv uboot_file oe_u-boot.bin +send setenv uboot_env1_file oe_uboot_env1.bin +send setenv uboot_env2_file oe_uboot_env2.bin +send setenv kernel_file oe_uImage.bin +send setenv config_file oe_config.tar.gz +send setenv oem_file oe_oem.tar.gz +send setenv rootfs_file oe_rootfs.jffs2 +send setenv bootstrap_addr 0x00000000 +send setenv uboot_addr 0x00040000 +send setenv uboot_env1_addr 0x000C0000 +send setenv uboot_env2_addr 0x00160000 +send setenv kernel_addr 0x00200000 +send setenv config_addr 0x00800000 +send setenv oem_addr 0x01000000 +send setenv rootfs_addr 0x01800000 +send setenv bootstrap_size 0x00040000 +send setenv uboot_size 0x00080000 +send setenv uboot_env1_size 0x000A0000 +send setenv uboot_env2_size 0x000A0000 +send setenv kernel_size 0x00600000 +send setenv config_size 0x00800000 +send setenv oem_size 0x00800000 +send setenv erase_bootstrap \'nand erase.part bootstrap\' +send setenv erase_uboot \'nand erase.part u-boot\' +send setenv erase_uboot_env1 \'nand erase.part u-boot-env1\' +send setenv erase_uboot_env2 \'nand erase.part u-boot-env2\' +send setenv erase_kernel \'nand erase.part kernel\' +send setenv erase_config \'nand erase.part config\' +send setenv erase_oem \'nand erase.part oem\' +send setenv erase_rootfs \'nand erase.part rootfs\' +send setenv erase_user_data \'nand erase.part user\' +send setenv tftp_bootstrap \'tftpboot ${loadaddr} ${bootstrap_file} && run erase_bootstrap && nand write.jffs2 ${fileaddr} bootstrap ${filesize}\' +send setenv tftp_uboot \'tftpboot ${loadaddr} ${uboot_file} && run erase_uboot && nand write.jffs2 ${fileaddr} u-boot ${filesize}\' +send setenv tftp_uboot_env1 \'tftpboot ${loadaddr} ${uboot_env1_file} && run erase_uboot_env1 && nand write.jffs2 ${fileaddr} u-boot-env1 ${filesize}\' +send setenv tftp_uboot_env2 \'tftpboot ${loadaddr} ${uboot_env2_file} && run erase_uboot_env2 && nand write.jffs2 ${fileaddr} u-boot-env2 ${filesize}\' +send setenv tftp_kernel \'tftpboot ${loadaddr} ${kernel_file} && run erase_kernel && nand write.jffs2 ${fileaddr} kernel ${filesize}\' +send setenv tftp_config \'tftpboot ${loadaddr} ${config_file} && run erase_config && nand write.jffs2 ${fileaddr} config ${filesize}\' +send setenv tftp_oem \'tftpboot ${loadaddr} ${oem_file} && run erase_oem && nand write.jffs2 ${fileaddr} oem ${filesize}\' +send setenv tftp_rootfs \'tftpboot ${loadaddr} ${rootfs_file} && run erase_rootfs && run erase_user_data && nand write.jffs2 ${fileaddr} rootfs ${filesize}\' +send setenv krb \'run tftp_kernel && run tftp_rootfs && boot\' +send setenv rb \'run tftp_rootfs && boot\' +print saving... +send saveenv +send saveenv +send printenv diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.8.12/at91bootstrap-3.8-mtcdt.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.8.12/at91bootstrap-3.8-mtcdt.patch new file mode 100644 index 0000000..8710ee5 --- /dev/null +++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.8.12/at91bootstrap-3.8-mtcdt.patch @@ -0,0 +1,82 @@ +diff -aNru orig/board/at91sam9x5ek/at91sam9x5ek.c new/board/at91sam9x5ek/at91sam9x5ek.c +--- orig/board/at91sam9x5ek/at91sam9x5ek.c 2019-04-16 14:20:15.036823256 -0500 ++++ new/board/at91sam9x5ek/at91sam9x5ek.c 2019-04-16 14:26:10.648812728 -0500 +@@ -44,6 +44,37 @@ + #include "at91sam9x5ek.h" + #include "board_hw_info.h" + ++ ++static void initialize_mt_gpio(void) ++{ ++ /* Configure DBGU pins */ ++ const struct pio_desc mt_gpio_pins[] = { ++ /* Misc. pins -- Pins PD15-PD18 belong to PERIPH ++ * B A20-A25 until bootstrap shuts them down. ++ * This code prevents these pins from being used ++ * during boot, since we do not ++ * need these pins to boot the system and we ++ * do not want resets to toggle needlessly. ++ * GNSS-RESET is held low because the EXAR ++ * rarely will display the wrong VID/PID on the ++ * USB bus, which prevents the vizzini driver ++ * from loading. Once the VID/PID is bad, a ++ * reboot will preserve the bad VID/PID, so ++ * a power cycle is then required. ++ */ ++ {"GNSS-RESET",AT91C_PIN_PD(15), 0, PIO_PULLUP, PIO_OUTPUT}, ++ {"SECURE-RESET",AT91C_PIN_PD(16), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"MTQ-RESET",AT91C_PIN_PD(17), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"USBHUB-RESET",AT91C_PIN_PD(18), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"GNSS-INT",AT91C_PIN_PD(19), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"WIFI-BT-LPMODE",AT91C_PIN_PD(20), 0, PIO_PULLUP, PIO_INPUT}, ++ {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, ++ }; ++ ++ pio_configure(mt_gpio_pins); ++} ++ ++ + static void at91_dbgu_hw_init(void) + { + /* Configure DBGU pins */ +@@ -185,6 +210,9 @@ + /* Init timer */ + timer_init(); + ++ /* Initialize MT GPIO */ ++ initialize_mt_gpio(); ++ + /* Initialize dbgu */ + initialize_dbgu(); + +@@ -298,10 +326,14 @@ + + reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA); + reg |= AT91C_EBI_CS3A_SM; ++#ifdef NOTMTCDT + if (get_cm_rev() == 'A') + reg &= ~AT91C_EBI_NFD0_ON_D16; + else + reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16); ++#endif /* NOTMTCDT */ ++ /* MTCDT */ ++ reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16); + + reg &= ~AT91C_EBI_DRV; + writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA); +@@ -331,11 +363,15 @@ + AT91C_BASE_SMC + SMC_CTRL3); + + /* Configure the PIO controller */ ++#ifdef NOTMTCDT + if (get_cm_rev() == 'A') + pio_configure(nand_pins_lo); + else ++#endif /* NOTMTCDT */ ++ /* MTCDT */ + pio_configure(nand_pins_hi); + ++ + pmc_enable_periph_clock(AT91C_ID_PIOC_D); + } + #endif /* #ifdef CONFIG_NANDFLASH */ diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.8.12/at91bootstrap-3.8-mtr.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.8.12/at91bootstrap-3.8-mtr.patch new file mode 100644 index 0000000..2993323 --- /dev/null +++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.8.12/at91bootstrap-3.8-mtr.patch @@ -0,0 +1,414 @@ +diff -aNru orig/board/at91sam9x5ek/at91sam9x5ek.c new/board/at91sam9x5ek/at91sam9x5ek.c +--- orig/board/at91sam9x5ek/at91sam9x5ek.c 2019-04-16 14:20:15.036823256 -0500 ++++ new/board/at91sam9x5ek/at91sam9x5ek.c 2019-04-16 14:42:16.920784122 -0500 +@@ -44,6 +44,31 @@ + #include "at91sam9x5ek.h" + #include "board_hw_info.h" + ++ ++static void initialize_mt_gpio(void) ++{ ++ /* Configure DBGU pins */ ++ const struct pio_desc mt_gpio_pins[] = { ++ /* Misc. pins -- Pins PD15-PD18 belong to PERIPH ++ * B A20-A25 until bootstrap shuts them down. ++ * This code prevents these pins from being used ++ * during boot, since we do not ++ * need these pins to boot the system and we ++ * do not want resets to toggle needlessly. ++ */ ++ {"PD15",AT91C_PIN_PD(15), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"PD16",AT91C_PIN_PD(16), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"PD17",AT91C_PIN_PD(17), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"PD18",AT91C_PIN_PD(18), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"PD19",AT91C_PIN_PD(19), 1, PIO_PULLUP, PIO_OUTPUT}, ++ {"PD20IN",AT91C_PIN_PD(20), 0, PIO_PULLUP, PIO_INPUT}, ++ {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, ++ }; ++ ++ pio_configure(mt_gpio_pins); ++} ++ ++ + static void at91_dbgu_hw_init(void) + { + /* Configure DBGU pins */ +@@ -185,6 +210,9 @@ + /* Init timer */ + timer_init(); + ++ /* Initialize MT GPIO */ ++ initialize_mt_gpio(); ++ + /* Initialize dbgu */ + initialize_dbgu(); + +@@ -298,10 +326,8 @@ + + reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA); + reg |= AT91C_EBI_CS3A_SM; +- if (get_cm_rev() == 'A') +- reg &= ~AT91C_EBI_NFD0_ON_D16; +- else +- reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16); ++ /* MTR */ ++ reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16); + + reg &= ~AT91C_EBI_DRV; + writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA); +@@ -331,9 +357,7 @@ + AT91C_BASE_SMC + SMC_CTRL3); + + /* Configure the PIO controller */ +- if (get_cm_rev() == 'A') +- pio_configure(nand_pins_lo); +- else ++ /* MTR2 */ + pio_configure(nand_pins_hi); + + pmc_enable_periph_clock(AT91C_ID_PIOC_D); +diff -aNru orig/board/at91sam9x5ek/at91sam9x5ek.c.orig new/board/at91sam9x5ek/at91sam9x5ek.c.orig +--- orig/board/at91sam9x5ek/at91sam9x5ek.c.orig 1969-12-31 18:00:00.000000000 -0600 ++++ new/board/at91sam9x5ek/at91sam9x5ek.c.orig 2019-04-16 14:20:15.036823256 -0500 +@@ -0,0 +1,341 @@ ++/* ---------------------------------------------------------------------------- ++ * ATMEL Microcontroller Software Support ++ * ---------------------------------------------------------------------------- ++ * Copyright (c) 2008, Atmel Corporation ++ * ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * ++ * - Redistributions of source code must retain the above copyright notice, ++ * this list of conditions and the disclaimer below. ++ * ++ * Atmel's name may not be used to endorse or promote products derived from ++ * this software without specific prior written permission. ++ * ++ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE ++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, ++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, ++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++#include "common.h" ++#include "hardware.h" ++#include "arch/at91_ccfg.h" ++#include "arch/at91_rstc.h" ++#include "arch/at91_pmc.h" ++#include "arch/at91_smc.h" ++#include "arch/at91_pio.h" ++#include "arch/at91_ddrsdrc.h" ++#include "gpio.h" ++#include "pmc.h" ++#include "usart.h" ++#include "debug.h" ++#include "ddramc.h" ++#include "timer.h" ++#include "watchdog.h" ++#include "string.h" ++#include "at91sam9x5ek.h" ++#include "board_hw_info.h" ++ ++static void at91_dbgu_hw_init(void) ++{ ++ /* Configure DBGU pins */ ++ const struct pio_desc dbgu_pins[] = { ++ {"RXD", AT91C_PIN_PA(9), 0, PIO_DEFAULT, PIO_PERIPH_A}, ++ {"TXD", AT91C_PIN_PA(10), 0, PIO_DEFAULT, PIO_PERIPH_A}, ++ {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, ++ }; ++ ++ pmc_enable_periph_clock(AT91C_ID_PIOA_B); ++ pio_configure(dbgu_pins); ++} ++ ++static void initialize_dbgu(void) ++{ ++ at91_dbgu_hw_init(); ++ usart_init(BAUDRATE(MASTER_CLOCK, BAUD_RATE)); ++} ++ ++#ifdef CONFIG_DDR2 ++/* Using the Micron MT47H64M16HR-3 */ ++static void ddramc_reg_config(struct ddramc_register *ddramc_config) ++{ ++ ddramc_config->mdr = (AT91C_DDRC2_DBW_16_BITS ++ | AT91C_DDRC2_MD_DDR2_SDRAM); ++ ++ ddramc_config->cr = (AT91C_DDRC2_NC_DDR10_SDR9 /* 10 column bits(1K) */ ++ | AT91C_DDRC2_NR_13 /* 13 row bits (8K) */ ++ | AT91C_DDRC2_CAS_3 /* CAS Latency 3 */ ++ | AT91C_DDRC2_NB_BANKS_8 /* 8 banks */ ++ | AT91C_DDRC2_DISABLE_RESET_DLL ++ | AT91C_DDRC2_DECOD_INTERLEAVED);/*Interleaved decode*/ ++ ++ /* ++ * Make sure to uncomment the following line if the DDR controller ++ * shares the EBI with another memory controller (SMC, NAND,..). ++ * For instance, AT91C_DDRC2_EBISHARE shall be set if NAND flash ++ * data line 0 is positioned on EBI data line 0 (AT91C_EBI_NFD0_ON_D16 bit ++ * cleared in CCFG_EBICSA register). ++ * ++ * For Atmel AT91SAM9x5-EK revision B onwards, this AT91C_DDRC2_EBISHARE bit ++ * is cleared because the NAND flash data line 0 is positioned on EBI ++ * data line number 16 (AT91C_EBI_NFD0_ON_D16 bit set in CCFG_EBICSA ++ * register). Only the DDR controller function is thus used on lower ++ * EBI data lines. ++ */ ++ //ddramc_config->cr |= AT91C_DDRC2_EBISHARE; /* DQM is shared with other controller */ ++ ++ ++ /* ++ * The DDR2-SDRAM device requires a refresh every 15.625 us or 7.81 us. ++ * With a 133 MHz frequency, the refresh timer count register must to be ++ * set with (15.625 x 133 MHz) ~ 2084 i.e. 0x824 ++ * or (7.81 x 133 MHz) ~ 1040 i.e. 0x410. ++ */ ++ ddramc_config->rtr = 0x411; /* Refresh timer: 7.8125us */ ++ ++ /* One clock cycle @ 133 MHz = 7.5 ns */ ++ ddramc_config->t0pr = (AT91C_DDRC2_TRAS_(6) /* 6 * 7.5 = 45 ns */ ++ | AT91C_DDRC2_TRCD_(2) /* 2 * 7.5 = 22.5 ns */ ++ | AT91C_DDRC2_TWR_(2) /* 2 * 7.5 = 15 ns */ ++ | AT91C_DDRC2_TRC_(8) /* 8 * 7.5 = 75 ns */ ++ | AT91C_DDRC2_TRP_(2) /* 2 * 7.5 = 15 ns */ ++ | AT91C_DDRC2_TRRD_(2) /* 2 * 7.5 = 15 ns */ ++ | AT91C_DDRC2_TWTR_(2) /* 2 clock cycles min */ ++ | AT91C_DDRC2_TMRD_(2)); /* 2 clock cycles */ ++ ++ ddramc_config->t1pr = (AT91C_DDRC2_TXP_(2) /* 2 clock cycles */ ++ | AT91C_DDRC2_TXSRD_(200) /* 200 clock cycles */ ++ | AT91C_DDRC2_TXSNR_(19) /* 19 * 7.5 = 142.5 ns*/ ++ | AT91C_DDRC2_TRFC_(18)); /* 18 * 7.5 = 135 ns */ ++ ++ ddramc_config->t2pr = (AT91C_DDRC2_TFAW_(7) /* 7 * 7.5 = 52.5 ns */ ++ | AT91C_DDRC2_TRTP_(2) /* 2 clock cycles min */ ++ | AT91C_DDRC2_TRPA_(3) /* 3 * 7.5 = 22.5 ns */ ++ | AT91C_DDRC2_TXARDS_(7) /* 7 clock cycles */ ++ | AT91C_DDRC2_TXARD_(2)); /* 2 clock cycles */ ++} ++ ++static void ddramc_init(void) ++{ ++ unsigned long csa; ++ struct ddramc_register ddramc_reg; ++ ++ ddramc_reg_config(&ddramc_reg); ++ ++ /* ENABLE DDR2 clock */ ++ pmc_enable_system_clock(AT91C_PMC_DDR); ++ ++ /* Chip select 1 is for DDR2/SDRAM */ ++ csa = readl(AT91C_BASE_CCFG + CCFG_EBICSA); ++ csa |= AT91C_EBI_CS1A_SDRAMC; ++ csa &= ~AT91C_EBI_DBPUC; ++ csa |= AT91C_EBI_DBPDC; ++ csa |= AT91C_EBI_DRV_HD; ++ ++ writel(csa, AT91C_BASE_CCFG + CCFG_EBICSA); ++ ++ /* DDRAM2 Controller initialize */ ++ ddram_initialize(AT91C_BASE_DDRSDRC, AT91C_BASE_CS1, &ddramc_reg); ++} ++#endif /* #ifdef