diff options
Diffstat (limited to 'recipes-kernel/linux/linux-at91-4.9.87/mtcdt/mtcdt.dts')
-rw-r--r-- | recipes-kernel/linux/linux-at91-4.9.87/mtcdt/mtcdt.dts | 435 |
1 files changed, 435 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-at91-4.9.87/mtcdt/mtcdt.dts b/recipes-kernel/linux/linux-at91-4.9.87/mtcdt/mtcdt.dts new file mode 100644 index 0000000..2ee2e86 --- /dev/null +++ b/recipes-kernel/linux/linux-at91-4.9.87/mtcdt/mtcdt.dts @@ -0,0 +1,435 @@ +/* + * DTS file for Multi-Tech Systems MTCDT Hardware + */ + +/dts-v1/; +#include "at91sam9g25.dtsi" +#include "at91sam9x5ek.dtsi" +#include <dt-bindings/gpio/mt-at91.h> + + +/ { + model = "Multi-Tech Systems MTCDT"; + compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; + + aliases { + /delete-property/ i2c0; + /delete-property/ i2c1; + /delete-property/ i2c2; + /delete-property/ ssc0; + // serial2, usart1 is AP1 serial + serial4 = &usart3; // AP2 serial + serial5 = &uart0; // GNSS on MTCDT-0.2 + /delete-property/ serial1; // usart0 + /delete-property/ serial3; // usart2 + }; + + /delete-node/ 1wire_cm; + ahb { + apb { + /delete-node/ i2c@f8010000; + /delete-node/ i2c@f8014000; + /delete-node/ i2c@f8018000; + /delete-node/ mmc@f000c000; + /delete-node/ adc@f804c000; + /delete-node/ ssc@f0010000; + /delete-node/ serial@f801c000; + macb0: ethernet@f802c000 { + phy-mode = "rmii"; + status = "okay"; + }; + + pinctrl@fffff400 { + /delete-node/ 1wire_cm; + usart1 { + /delete-node/ usart1_sck-0; + pinctrl_usart1_rng: usart1_rng-0 { + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_usart1_dcd: usart1_dcd-0 { + atmel,pins = <AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_usart1_dtr: usart1_dtr-0 { + atmel,pins = <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + }; + usart3 { + /delete-node/ usart3_sck-0; + pinctrl_usart3_rng: usart3_rng-0 { + atmel,pins = <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_usart3_dcd: usart3_dcd-0 { + atmel,pins = <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_usart3_dtr: usart3_dtr-0 { + atmel,pins = <AT91_PIOC 12 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + }; + + mmc0 { + pinctrl_board_mmc0: mmc0-board { + atmel,pins = + <AT91_PIOA 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA1 gpio SD card pin pull up and deglitch */ + }; + /* /delete-property/ cd-gpios; */ + }; + /delete-node/ mmc@f000c000; + + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A Read Enable */ + AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD1 periph A Write Enable */ + AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A Address Latch Enable */ + AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A Command Latch Enable */ + AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */ + AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC31 gpio RDY/BUSY pin pull_up */ + AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A Data bit 0 */ + AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A Data bit 1 */ + AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD8 periph A Data bit 2 */ + AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD9 periph A Data bit 3 */ + AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD10 periph A Data bit 4 */ + AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD11 periph A Data bit 5 */ + AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD12 periph A Data bit 6 */ + AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD13 periph A Data bit 7 */ + }; + + /delete-node/ nand_16bits-0; + }; + mts-io { + pinctrl_mts_io_out: mts_io-0 { + // gpio4 and gpio5 are reset in at91bootstrap. They should not be touched in Linux. + atmel,pins = + <AT91_PIOD 14 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1)) /* PD14 WiFi BT reset */ + AT91_PIOD 16 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1)) /* PD16 Secure reset or gpio4 reset */ + AT91_PIOD 17 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1)) /* PD17 MTQ reset */ + AT91_PIOD 18 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(1))>; /* PD18 USB Hub reset */ + output-high; // ignored by at91_pinctrl + }; + pinctrl_mts_io_in: mts_io-1 { + atmel,pins = + <AT91_PIOD 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD19 GNSS Int */ + AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD20 WiFi_BT_LPMode Input */ + }; + // GNSS kept in reset to prevent EXAR from hanging + pinctrl_mts_io_gnss: mts_io-2 { + atmel,pins = + <AT91_PIOC 4 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(0)) /* PC16 ETH_NRST */ + AT91_PIOD 15 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT|AT91_PINCTRL_OUTPUT_VAL(0))>; /* PD15 N_GNSS_RESET */ + output-low; // ignored by at91_pinctrl + }; + }; + + mmc1 { + pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { + atmel,pins = + <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */ + AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ + AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */ + }; + + pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { + atmel,pins = + <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */ + AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */ + AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */ + }; + + /delete-node/ mmc1-board; + }; + }; + + rtc@fffffeb0 { + status = "okay"; + }; + + dbgu: serial@fffff200 { + status = "okay"; + atmel,use-dma-rx; + atmel,use-dma-tx; + }; + /* runs to Accessory Port 1 */ + spi0: spi@f0000000 { + /delete-node/ m25p80@0; + }; + +#ifdef NO_OVERLAY + status = "disabled"; + // A5->A28 for MTCDT 0.2 + // cs-gpios = <&pioA 4 0>, <&pioA 2 0>, <&pioA 3 0>, <&pioA 5 0>; + ap1-adc@0 { + spi-max-frequency = <20000000>; + reg = <0>; + }; + ap1-dout@1 { + spi-max-frequency = <1000000>; + reg = <1>; + }; + ap1-spi@2 { + spi-max-frequency = <2000000>; + reg = <2>; + }; + ap1-din@3 { + spi-max-frequency = <1000000>; + reg = <3>; + }; + }; + + /* runs to Accessory Port 2 */ + spi1: spi@f0004000 { + status = "disabled"; + + cs-gpios = <&pioC 15 0>, <&pioC 16 0>, <&pioC 17 0>, <&pioC 18 0>; + + ap2-adc@0 { + compatible = "mts-io-ap2-adc"; + spi-max-frequency = <20000000>; + reg = <0>; + }; + ap2-dout@1 { + compatible = "mts-io-ap2-dout"; + spi-max-frequency = <1000000>; + reg = <1>; + }; + ap2-spi@2 { + compatible = "mts,mtac"; + spi-max-frequency = <2000000>; + reg = <2>; + }; + ap2-din@3 { + compatible = "mts-io-ap2-din"; + spi-max-frequency = <1000000>; + reg = <3>; + }; + }; +#endif // NO_OVERLAY + }; + + nand0: nand@40000000 { + /delete-property/ nand-on-flash-bbt; + reg = < 0x40000000 0x10000000 + 0xffffe000 0x600 /* PMECC Registers */ + 0xffffe600 0x200 /* PMECC Error Location Registers */ + 0x00100000 0x100000 /* PMECC looup table in ROM code */ + >; + atmel,pmecc-lookup-table-offset = <0x8000 0x10000>; + gpios = < &pioC 31 GPIO_ACTIVE_HIGH + &pioD 4 GPIO_ACTIVE_HIGH + 0 + >; + atmel,pmecc-cap = <4>; + atmel,nand-has-dma; + + nand@0 { + label = "NANDFlash"; + reg = <0x0 0x10000000>; + }; + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; + uboot@40000 { + label = "u-Boot"; + reg = <0x40000 0x80000>; + }; + /delete-node/ ubootenv@c0000; + ubootconfig0@c0000 { + label = "u-Boot Config"; + reg = <0xc0000 0xa0000>; + }; + ubootconfig1@160000 { + label = "u-Boot Redundant Config"; + reg = <0x160000 0xa0000>; + }; + /delete-node/ kernel@200000; + uImage@200000 { + label = "uImage"; + reg = <0x200000 0x600000>; + }; + config0@800000 { + label = "Config"; + reg = <0x800000 0x800000>; + }; + config1@1000000 { + label = "OEM Config"; + reg = <0x1000000 0x800000>; + }; + /delete-node/ rootfs@800000; + rootfs@1800000 { + label = "Rootfs"; + reg = <0x1800000 0x8000000>; + }; + user@9800000 { + label = "User data"; + reg = <0x9800000 0x6800000>; + }; + }; + }; + + leds { + status = "disabled"; + /delete-node/ pb18; + /delete-node/ pd21; + + led-status { + label = "led-status"; // LED2 + gpios = <&pioA 24 GPIO_ACTIVE_LOW>; // All + linux,default-trigger = "default-on"; + }; + }; + + /* GPS-PPS input on AP1 */ + pps-0 { + compatible = "pps-gpio"; + gpios = <&pioA 29 0>; + capture-clear; + status = "okay"; + }; + + /* pca953x driver wants a regulator + * This dummy regulator prevents warnings */ + dummy_reg: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "dummy-supply"; + }; + + i2c-gpio-0 { + status = "okay"; + + id_eeprom@56 { + compatible = "atmel,24c04"; + reg = <0x56>; + pagesize = <16>; + status = "okay"; + }; + board_temp@48 { + compatible = "ti,tmp102"; + reg = <0x48>; + status = "okay"; + /* tempsensor_alert line running to pin PC19 on processor + set up an interrupt for this? */ + }; + /* gpio0 through gpio3 are integrated into the SAM9G25 and defined + * in at91sam9x5.dtsi + * pioA == gpio0 + * pioB == gpio1 + * pioC == gpio2 + * pioC == gpio3 + * gpio4 and gpio5 for MTCDT-0.2 follow: + */ + gpio4: pca9557@18 { + compatible = "nxp,pca9557"; + reg = <0x18>; + gpio-controller; + #gpio-cells = <2>; + vcc-supply = <&dummy_reg>; + }; + gpio5: pca9557@19 { + compatible = "nxp,pca9557"; + reg = <0x19>; + gpio-controller; + #gpio-cells = <2>; + vcc-supply = <&dummy_reg>; + }; + }; + i2c-gpio-1 { + status = "okay"; + + ap1_eeprom@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + pagesize = <16>; + status = "okay"; + }; + ap2_eeprom@52 { + compatible = "atmel,24c04"; + reg = <0x52>; + pagesize = <16>; + status = "okay"; + }; + }; + mts-io-0 { + status = "okay"; + compatible = "mts,mts-io"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mts_io_out>, <&pinctrl_mts_io_in>, <&pinctrl_mts_io_gnss>; + }; + /delete-node/ sound; + /delete-node/ ssc@f0010000; + /delete-node/ adc@f804c000; +}; + +&usb0 { + /delete-property/ atmel,vbus-gpio; +}; + +&usb2 { + /delete-property/ atmel,vbus-gpio; + status = "okay"; +}; + +&uart0 { + // GNSS on MTCDT-0.2 + status = "disabled"; + dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(11)>, + <&dma0 1 (AT91_DMA_CFG_PER_ID(12) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; +}; + +&usart1 { + status = "disabled"; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts + &pinctrl_usart1_rng &pinctrl_usart1_dcd &pinctrl_usart1_dtr>; + rng-gpios = <&pioA 27 GPIO_ACTIVE_LOW>; + dcd-gpios = <&pioA 26 GPIO_ACTIVE_LOW>; + dtr-gpios = <&pioA 25 GPIO_ACTIVE_LOW>; + dma-names = "tx", "rx"; +}; + + +&usart3 { + status = "disabled"; + atmel,use-dma-rx; + atmel,use-dma-tx; + pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts &pinctrl_usart3_cts + &pinctrl_usart3_rng &pinctrl_usart3_dcd &pinctrl_usart3_dtr>; + rng-gpios = <&pioC 14 GPIO_ACTIVE_LOW>; + dcd-gpios = <&pioC 13 GPIO_ACTIVE_LOW>; + dtr-gpios = <&pioC 12 GPIO_ACTIVE_LOW>; + dma-names = "tx", "rx"; +}; + +/* Explicit phandles for overlays + * Compiler generated low values + */ +&pioA { + phandle = <GPIO0_PH>; + phandle,linux = <GPIO0_PH>; +}; +&pioB { + phandle = <GPIO1_PH>; + phandle,linux = <GPIO1_PH>; +}; +&pioC { + phandle = <GPIO2_PH>; + phandle,linux = <GPIO2_PH>; +}; +&pioD { + phandle = <GPIO3_PH>; + phandle,linux = <GPIO3_PH>; +}; +// gpio-base is in the doc but does not work. +&gpio4 { + phandle = <GPIO4_PCA9557_PH>; + phandle,linux = <GPIO4_PCA9557_PH>; + // gpio-base = <128>; +}; +&gpio5 { + phandle = <GPIO5_PCA9557_PH>; + phandle,linux = <GPIO5_PCA9557_PH>; + // gpio-base = <136>; +}; |