Add new BSP submodule for Atmel Processors.5.3.0b5.3.0a

1 files changed, 342 insertions, 0 deletions

diff --git a/recipes-kernel/linux/linux-3.12.70/mtr/linux-3.12-mtr-device-tree.patch b/recipes-kernel/linux/linux-3.12.70/mtr/linux-3.12-mtr-device-tree.patch
new file mode 100644
index 0000000..a31c642
--- /dev/null
+++ b/recipes-kernel/linux/linux-3.12.70/mtr/linux-3.12-mtr-device-tree.patch
@@ -0,0 +1,342 @@
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 802720e..4767358 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
++dtb-$(CONFIG_ARCH_AT91) += mtr.dtb
+ # sama5d3
+ dtb-$(CONFIG_ARCH_AT91)	+= sama5d31ek.dtb
+ dtb-$(CONFIG_ARCH_AT91)	+= sama5d33ek.dtb
+diff --git a/arch/arm/boot/dts/mtr.dts b/linux-3.12.27.mtr/arch/arm/boot/dts/mtr.dts
+new file mode 100644
+index 0000000..edbbe37
+--- /dev/null
++++ b/arch/arm/boot/dts/mtr.dts
+@@ -0,0 +1,252 @@
++/*
++ * DTS file for Multi-Tech Systems MTR Hardware
++ *
++ * Copyright (C) 2016 by Multi-Tech Systems,
++ *
++ * Licensed under GPLv2 or later.
++ */
++
++/dts-v1/;
++#include "at91sam9g25.dtsi"
++
++/ {
++	model = "Multi-Tech Systems MTR";
++	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
++
++	chosen {
++		bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2";
++	};
++
++	memory {
++		reg = <0x20000000 0x8000000>;
++	};
++
++	clocks {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++
++		main_clock: clock@0 {
++			compatible = "atmel,osc", "fixed-clock";
++			clock-frequency = <12000000>;
++		};
++	};
++
++	ahb {
++		apb {
++			macb0: ethernet@f802c000 {
++				compatible = "cdns,at32ap7000-macb", "cdns,macb";
++				reg = <0xf802c000 0x4000>;
++				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
++				pinctrl-names = "default";
++				pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_rmii_mii>;
++				phy-mode = "mii";
++				status = "okay";
++			};
++
++			/* WiFi (wl12xx) */
++			mmc0: mmc@f0008000 {
++				pinctrl-names = "default";
++				pinctrl-0 = <
++					&pinctrl_board_mmc0
++					&pinctrl_mmc0_slot0_clk_cmd_dat0
++					&pinctrl_mmc0_slot0_dat1_3>;
++				status = "okay";
++				slot@0 {
++					reg = <0>;
++					bus-width = <4>;
++					/*cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;*/
++				};
++			};
++
++			pinctrl@fffff400 {
++				mmc0 {
++					pinctrl_board_mmc0: mmc0-board {
++						atmel,pins =
++							<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;  /* PD15 gpio CD pin pull up and deglitch */
++					};
++				};
++
++				nand {
++					pinctrl_nand: nand-0 {
++						atmel,pins =
++							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD0 periph A Read Enable */
++							AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD1 periph A Write Enable */
++							AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD2 periph A Address Latch Enable */
++							AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD3 periph A Command Latch Enable */
++							AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP  /* PD4 gpio Chip Enable pin pull_up */
++							AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC31 gpio RDY/BUSY pin pull_up */
++							AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD6 periph A Data bit 0 */
++							AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD7 periph A Data bit 1 */
++							AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD8 periph A Data bit 2 */
++							AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD9 periph A Data bit 3 */
++							AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD10 periph A Data bit 4 */
++							AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD11 periph A Data bit 5 */
++							AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD12 periph A Data bit 6 */
++							AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;  /* PD13 periph A Data bit 7 */
++					};
++
++					pinctrl_nand_16bits: nand_16bits-0 {
++						atmel,pins =
++							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP   /* PD14 periph A Data bit 8 */
++							AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD15 periph A Data bit 9 */
++							AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD16 periph A Data bit 10 */
++							AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD17 periph A Data bit 11 */
++							AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD18 periph A Data bit 12 */
++							AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD19 periph A Data bit 13 */
++							AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD20 periph A Data bit 14 */
++							AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;  /* PD21 periph A Data bit 15 */
++					};
++				};
++
++				1wire_cm {
++					pinctrl_1wire_cm: 1wire_cm-0 {
++						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
++					};
++				};
++			};
++
++			rtc@fffffeb0 {
++				status = "okay";
++			};
++
++			i2c0: i2c@f8010000 {
++				compatible = "i2c-gpio";
++				status = "okay";
++
++				id_eeprom@56 {
++					compatible = "atmel,24c04";
++					reg = <0x56>;
++					pagesize = <16>;
++				};
++			};
++
++			dbgu: serial@fffff200 {
++				status = "okay";
++			};
++
++			uart0: serial@f8040000 {
++				status = "okay";
++			};
++
++			watchdog@fffffe40 {
++				status = "okay";
++			};
++		};
++
++		nand0: nand@40000000 {
++			nand-bus-width = <8>;
++			nand-ecc-mode = "hw";
++			atmel,has-pmecc;	/* Enable PMECC */
++			atmel,pmecc-sector-size = <512>;
++			status = "okay";
++			reg = < 0x40000000 0x10000000
++				0xffffe000 0x600    /* PMECC Registers */
++				0xffffe600 0x200    /* PMECC Error Location Registers */
++				0x00100000 0x100000 /* PMECC looup table in ROM code  */
++			      >;
++			atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
++			gpios = < &pioC 31 GPIO_ACTIVE_HIGH
++				  &pioD 4 GPIO_ACTIVE_HIGH
++				  0
++				>;
++			atmel,pmecc-cap = <4>;
++			atmel,nand-has-dma;
++
++			nand@0 {
++				label = "NANDFlash";
++				reg = <0x0 0x10000000>;
++			};
++			at91bootstrap@0 {
++				label = "at91bootstrap";
++				reg = <0x0 0x40000>;
++			};
++			uboot@40000 {
++				label = "u-Boot";
++				reg = <0x40000 0x80000>;
++			};
++			ubootconfig0@c0000 {
++				label = "u-Boot Config";
++				reg = <0xc0000 0xa0000>;
++			};
++			ubootconfig1@160000 {
++				label = "u-Boot Redundant Config";
++				reg = <0x160000 0xa0000>;
++			};
++			uImage@200000 {
++				label = "uImage";
++				reg = <0x200000 0x600000>;
++			};
++			config0@800000 {
++				label = "Config";
++				reg = <0x800000 0x800000>;
++			};
++			config1@1000000 {
++				label = "OEM Config";
++				reg = <0x1000000 0x800000>;
++			};
++			rootfs@1800000 {
++				label = "Rootfs";
++				reg = <0x1800000 0xe800000>;
++			};
++		};
++
++		usb0: ohci@00600000 {
++			status = "okay";
++			num-ports = <3>;
++		};
++
++		usb1: ehci@00700000 {
++			status = "okay";
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		pc21 {
++			label = "led-status";
++			gpios = <&pioC 21 GPIO_ACTIVE_LOW>;
++			linux,default-trigger = "default-on";
++		};
++		pc15 {
++			label = "led-b";
++			gpios = <&pioC 15 GPIO_ACTIVE_LOW>;
++		};
++		pc20 {
++			label = "led-c";
++			gpios = <&pioC 20 GPIO_ACTIVE_LOW>;
++		};
++		pc19 {
++			label = "led-d";
++			gpios = <&pioC 19 GPIO_ACTIVE_LOW>;
++		};
++		pc18 {
++			label = "led-e";
++			gpios = <&pioC 18 GPIO_ACTIVE_LOW>;
++		};
++		pc17 {
++			label = "led-f";
++			gpios = <&pioC 17 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	1wire_cm {
++		compatible = "w1-gpio";
++		gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
++		linux,open-drain;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_1wire_cm>;
++		status = "okay";
++	};
++
++	i2c@0 {
++		status = "okay";
++
++		id_eeprom@56 {
++			compatible = "atmel,24c04";
++			reg = <0x56>;
++			pagesize = <16>;
++		};
++	};
++};
+diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c
+index 8db3013..49ae83d 100644
+--- a/arch/arm/mach-at91/board-dt-sam9.c
++++ b/arch/arm/mach-at91/board-dt-sam9.c
+@@ -14,6 +14,8 @@
+ #include <linux/of.h>
+ #include <linux/of_irq.h>
+ #include <linux/of_platform.h>
++#include <linux/wl12xx.h>
++#include <linux/delay.h>
+ 
+ #include <asm/setup.h>
+ #include <asm/irq.h>
+@@ -37,11 +39,51 @@ static void __init at91_dt_init_irq(void)
+ 	of_irq_init(irq_of_match);
+ }
+ 
++static void mtr_wl12xx_set_power(bool enable)
++{
++	if (enable) {
++		gpio_set_value(AT91_PIN_PA27, 0);
++		msleep(10);
++		gpio_set_value(AT91_PIN_PA27, 1);
++		msleep(100);
++		pr_info("sam9x5: WLAN Enabled\n");
++	}
++	else {
++		gpio_set_value(AT91_PIN_PA27, 0);
++		msleep(10);
++		pr_info("sam9x5: WLAN Disabled\n");
++	}
++};
++
++static struct wl12xx_platform_data mtr_wl12xx_wlan_data __initdata = {
++	.set_power = mtr_wl12xx_set_power,
++	.irq = -1,
++	.board_ref_clock = WL12XX_REFCLOCK_38,
++	.platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
++};
++
++static void __init mtr_wl12xx_init(void) {
++	if (gpio_request_one(AT91_PIN_PA26, GPIOF_IN_DEGLITCH, "wlan-irq"))
++		pr_err("error request wl12xx irq gpio\n");
++
++	mtr_wl12xx_wlan_data.irq = gpio_to_irq(AT91_PIN_PA26);
++	if (mtr_wl12xx_wlan_data.irq < 0)
++		pr_err("error setting wl12xx irq\n");
++
++	if (wl12xx_set_platform_data(&mtr_wl12xx_wlan_data))
++		pr_err("error setting wl12xx data\n");
++}
++
+ static void __init at91_dt_device_init(void)
+ {
+ 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+ 
++static void __init at91_dt_device_init_late(void)
++{
++	mtr_wl12xx_init();
++}
++
+ static const char *at91_dt_board_compat[] __initdata = {
+ 	"atmel,at91sam9",
+ 	NULL
+@@ -55,5 +97,6 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
+ 	.init_early	= at91_dt_initialize,
+ 	.init_irq	= at91_dt_init_irq,
+ 	.init_machine	= at91_dt_device_init,
++	.init_late	= at91_dt_device_init_late,
+ 	.dt_compat	= at91_dt_board_compat,
+ MACHINE_END