Merge branch 'mtre-dunfell' into 'dunfell'

Add  MTRE support

See merge request !12

14 files changed, 2450 insertions, 5 deletions

diff --git a/conf/machine/mtre.conf b/conf/machine/mtre.conf
new file mode 100644
index 0000000..8e588f8
--- /dev/null
+++ b/conf/machine/mtre.conf
@@ -0,0 +1,44 @@
+#@TYPE: Machine
+#@Name: Multi-Tech MTRE
+#@DESCRIPTION: Machine configuration for the MTRE hardware
+
+require conf/machine/include/tune-arm926ejs.inc
+
+MACHINE_FEATURES = "ext2 ext3 usbhost usbgadget ppp"
+PREFERRED_PROVIDER_virtual/kernel = "linux-at91"
+PREFERRED_VERSION_linux = "4.9.%"
+
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS = "kernel-module-vizzini"
+PREFERRED_VERSION_kernel-module-vizzini ?= "1.1"
+
+DEFAULTTUNE = "arm926ejs"
+TUNE_CCARGS = " -march=armv5te -marm -mthumb-interwork -mtune=arm926ej-s"
+TUNE_FEATURES = "arm armv5 thumb dsp arm926ejs"
+ARMPKGSFX_THUMB="t"
+
+# used by sysvinit_2
+SERIAL_CONSOLES = "115200;ttyS0"
+#don't try to access tty1
+USE_VT = "0"
+
+UBOOT_MACHINE = "at91sam9x5ek_nandflash_config"
+PREFERRED_VERSION_u-boot = "2016.09.01"
+
+AT91BOOTSTRAP_BOARD = "at91sam9x5eknf_uboot"
+PREFERRED_VERSION_at91bootstrap = "3.8.12"
+
+KERNEL_IMAGETYPE = "uImage"
+# remove kernel-image from rootfs by overriding kernel-base DEPS
+RDEPENDS_kernel-base = ""
+
+EXTRA_IMAGEDEPENDS += "at91bootstrap u-boot"
+
+IMAGE_FSTYPES =+ "jffs2 tar.gz"
+EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 -n"
+
+UBOOT_ENTRYPOINT = "0x20008000"
+UBOOT_LOADADDRESS = "0x20008000"
+
+PRINC ?= "0"
+
+PACKAGECONFIG_append_pn-boost = " python"
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap.inc b/recipes-bsp/at91bootstrap/at91bootstrap.inc
index 25d72ee..07dfda4 100644
--- a/recipes-bsp/at91bootstrap/at91bootstrap.inc
+++ b/recipes-bsp/at91bootstrap/at91bootstrap.inc
@@ -31,6 +31,10 @@ SRC_URI_append_mtrv1 = " file://0001-mtrv1-DDRlowDriveStrength.patch \
 SRC_URI_append_mtr = " file://defconfig.mtr \
 	file://0005-at91bootstrap-3.8-mtr.patch \
 "
+SRC_URI_append_mtre = " file://0001-mtrv1-DDRlowDriveStrength.patch \
+	file://defconfig.mtr \
+	file://0005-at91bootstrap-3.8-mtr.patch \
+"
 
 SRC_URI_append_mtcdt = " file://0005-at91bootstrap-3.8-mtcdt.patch "
 SRC_URI_append_mtcap = " file://0005-at91bootstrap-3.8-mtcap.patch "
@@ -78,7 +82,7 @@ do_configure() {
 	# Copy defconfig to .config if .config does not exist. This allows
 	# recipes to manage the .config themselves in do_configure_prepend()
 	# and to override default settings with a custom file.
-	if [[ ${MACHINE} == mtr ]] || [[ ${MACHINE} == mtrv1 ]] ; then
+	if [[ ${MACHINE} == mtr ]] || [[ ${MACHINE} == mtrv1 ]] || [[ ${MACHINE} == mtre ]] ; then
             CTYPE=".mtr"
         fi
 	
diff --git a/recipes-bsp/u-boot/u-boot-2016.09.01/mtre.patch b/recipes-bsp/u-boot/u-boot-2016.09.01/mtre.patch
new file mode 100644
index 0000000..887a6bc
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-2016.09.01/mtre.patch
@@ -0,0 +1,259 @@
+diff -raNu a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+--- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c	2016-09-19 17:45:12.000000000 +0300
++++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c	2021-01-12 17:40:47.185029658 +0200
+@@ -44,7 +44,8 @@
+ 	csa = readl(&matrix->ebicsa);
+ 	csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+ 	/* NAND flash on D16 */
+-	csa |= AT91_MATRIX_NFD0_ON_D16;
++	/* MTR: nand flash is set up by bootstrap, so leave it alone here */
++	/* csa |= AT91_MATRIX_NFD0_ON_D16; */
+ 
+ 	/* Configure IO drive */
+ 	csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+@@ -256,6 +257,9 @@
+ 
+ int board_init(void)
+ {
++	/* Set Status LED High */
++	/* at91_set_gpio_output(BOOT_STATUS_LED, 0); */
++
+ 	/* arch number of AT91SAM9X5EK-Board */
+ 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
+ 
+@@ -362,4 +366,61 @@
+ 	/* DDRAM2 Controller initialize */
+ 	ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+ }
++
+ #endif
++
++/* on-board EEPROM */
++struct mts_id_eeprom_layout {
++    char vendor_id[32];
++    char product_id[32];
++    char device_id[32];
++    char hw_version[32];
++    uint8_t mac_addr[6];
++    char imei[32];
++    uint8_t capa[32];
++    uint8_t mac_bluetooth[6];
++    uint8_t mac_wifi[6];
++    uint8_t reserved[302];
++};
++
++int board_get_enetaddr(uchar *enetaddr)
++{
++	struct mts_id_eeprom_layout eeprom_buffer = {0};
++
++	if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, &eeprom_buffer, sizeof(eeprom_buffer))) {
++		printf("EEPROM: read error\n");
++		return 0;
++	}
++
++	if (eeprom_buffer.vendor_id[0] == 0x00 || eeprom_buffer.vendor_id[0] == 0xFF) {
++		printf("EEPROM: uninitialized\n");
++		return 0;
++	}
++
++	printf("vendor-id:  %s\n", eeprom_buffer.vendor_id);
++	printf("product-id: %s\n", eeprom_buffer.product_id);
++	printf("device-id:  %s\n", eeprom_buffer.device_id);
++	printf("hw-version: %s\n", eeprom_buffer.hw_version);
++	printf("mac-addr:   %02x:%02x:%02x:%02x:%02x:%02x\n", eeprom_buffer.mac_addr[0],
++		eeprom_buffer.mac_addr[1],
++		eeprom_buffer.mac_addr[2],
++		eeprom_buffer.mac_addr[3],
++		eeprom_buffer.mac_addr[4],
++		eeprom_buffer.mac_addr[5]);
++
++	memcpy(enetaddr, eeprom_buffer.mac_addr, 6);
++
++	return 1;
++}
++
++int misc_init_r(void)
++{
++	uchar enetaddr[6];
++
++	/* set MAC address from EEPROM if read successful */
++	if (board_get_enetaddr(enetaddr)) {
++		eth_setenv_enetaddr("ethaddr", enetaddr);
++	}
++
++	return 0;
++}
+diff -raNu a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
+--- a/configs/at91sam9x5ek_nandflash_defconfig	2021-01-09 18:01:02.000000000 +0200
++++ b/configs/at91sam9x5ek_nandflash_defconfig	2021-01-09 18:24:57.023488603 +0200
+@@ -30,7 +30,6 @@
+ CONFIG_CMD_NAND=y
+ CONFIG_CMD_BOOTZ=y
+ CONFIG_CMD_MII=y
+-CONFIG_CMD_I2C=y
+ 
+ # The config option CONFIG_SILENT_CONSOLE can be used to quiet messages
+ # on the console.  If the option has been enabled, the output can be
+diff -raNu a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
+--- a/include/configs/at91sam9x5ek.h	2016-09-19 17:45:12.000000000 +0300
++++ b/include/configs/at91sam9x5ek.h	2021-01-09 18:38:28.231749990 +0200
+@@ -9,8 +9,10 @@
+ #ifndef __CONFIG_H__
+ #define __CONFIG_H__
+ 
++#include <linux/kconfig.h>
+ #include <asm/hardware.h>
+ 
++#define USE_MTR
+ #define CONFIG_SYS_TEXT_BASE		0x26f00000
+ 
+ /* ARM asynchronous clock */
+@@ -26,6 +28,8 @@
+ #define CONFIG_BOARD_EARLY_INIT_F
+ #define CONFIG_DISPLAY_CPUINFO
+ 
++#define CONFIG_MISC_INIT_R       /* enable platform-dependent misc_init_r() */
++
+ /* general purpose I/O */
+ #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
+ #define CONFIG_AT91_GPIO
+@@ -36,6 +40,8 @@
+ #define CONFIG_USART_ID		ATMEL_ID_SYS
+ 
+ /* LCD */
++/* MTR has no LCD */
++#if !defined(MTR)
+ #define CONFIG_LCD
+ #define LCD_BPP			LCD_COLOR16
+ #define LCD_OUTPUT_BPP		24
+@@ -46,7 +52,13 @@
+ #define CONFIG_ATMEL_HLCD
+ #define CONFIG_ATMEL_LCD_RGB565
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV
++#endif  /* !defined(MTR) */
++
++/* check for keypress even if bootdelay is 0 */
++#define CONFIG_ZERO_BOOTDELAY_CHECK
+ 
++/*STATUS LED*/
++#define BOOT_STATUS_LED AT91_PIN_PC21
+ 
+ /*
+  * BOOTP options
+@@ -59,10 +71,7 @@
+ /* no NOR flash */
+ #define CONFIG_SYS_NO_FLASH
+ 
+-/*
+- * Command line configuration.
+- */
+-#define CONFIG_CMD_NAND
++#define CONFIG_SYS_I2C
+ 
+ /*
+  * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
+@@ -94,13 +103,30 @@
+ /* our CLE is AD22 */
+ #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
+ #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
+-#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
++/* MTR nand ready is PC31 */
++#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC31
+ 
+ /* PMECC & PMERRLOC */
+ #define CONFIG_ATMEL_NAND_HWECC		1
+ #define CONFIG_ATMEL_NAND_HW_PMECC	1
+-#define CONFIG_PMECC_CAP		2
++
++/* MTR: 4-bit PMECC */
++#define CONFIG_PMECC_CAP		4
+ #define CONFIG_PMECC_SECTOR_SIZE	512
++/* 
++ * CONFIG_PMECC_INDEX_TABLE_OFFSET has been replaced by:
++ *  ATMEL_PMECC_INDEX_OFFSET_512 and
++ *  ATMEL_PMECC_INDEX_OFFSET_1024
++ *
++ * Which as used depends on:
++ * host->pmecc_sector_size == 512
++ *
++ * 2012.10:
++ * #define CONFIG_PMECC_INDEX_TABLE_OFFSET	0x8000
++ * 2016.03 (at91sam9x5.h):
++ * 182:#define ATMEL_PMECC_INDEX_OFFSET_512	0x8000
++ */
++
+ 
+ #define CONFIG_CMD_NAND_TRIMFFS
+ 
+@@ -147,6 +173,23 @@
+ #endif
+ #endif
+ 
++#define CONFIG_SYS_I2C_SOFT
++#define CONFIG_SOFT_I2C
++#define CONFIG_SOFT_I2C_GPIO_SCL AT91_PIN_PA31
++#define CONFIG_SOFT_I2C_GPIO_SDA AT91_PIN_PA30
++#define CONFIG_SYS_I2C_SOFT_SPEED		50000
++#define CONFIG_SYS_I2C_SPEED		CONFIG_SYS_I2C_SOFT_SPEED
++/* Values from previous levels of Conduit U-Boot */
++#define CONFIG_SYS_I2C_SLAVE    0xfe
++#define I2C_RXTX_LEN	128
++
++/* I2C eeprom support */
++#define CONFIG_CMD_EEPROM
++#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56			/* at24c04 */
++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1		/* Bytes of address<---><------>*/
++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
++
++
+ #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
+ 
+ #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+@@ -156,11 +199,11 @@
+ /* bootstrap + u-boot + env + linux in nandflash */
+ #define CONFIG_ENV_IS_IN_NAND
+ #define CONFIG_ENV_OFFSET		0xc0000
+-#define CONFIG_ENV_OFFSET_REDUND	0x100000
++#define CONFIG_ENV_OFFSET_REDUND	0x160000
+ #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
+-#define CONFIG_BOOTCOMMAND	"nand read " \
+-				"0x22000000 0x200000 0x300000; " \
+-				"bootm 0x22000000"
++/* MTR: read from env variables for boot */
++#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
++
+ #elif defined(CONFIG_SYS_USE_SPIFLASH)
+ /* bootstrap + u-boot + env + linux in spi flash */
+ #define CONFIG_ENV_IS_IN_SPI_FLASH
+@@ -197,6 +240,9 @@
+ 				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
+ 				"root=/dev/mmcblk0p2 " \
+ 				"rw rootfstype=ext4 rootwait"
++#elif defined(USE_MTR)
++/* MTR uses jffs2 */
++#define CONFIG_BOOTARGS        "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2"
+ #else
+ #define CONFIG_BOOTARGS							\
+ 	"console=ttyS0,115200 earlyprintk "				\
+@@ -274,4 +320,21 @@
+ 
+ #endif
+ 
++/* MTR defaults */
++#define CONFIG_ENV_OVERWRITE   1 /* Allow Overwrite of serial# & ethaddr */
++#define CONFIG_ETHADDR     00:08:00:87:00:02
++#define CONFIG_IPADDR      192.168.2.1
++#define CONFIG_NETMASK     255.255.255.0
++#define CONFIG_SERVERIP    192.168.2.2
++#define CONFIG_HOSTNAME    AT91SAM9G25
++#define CONFIG_LOADADDR    0x22000000
++
++/* MTR - enable watchdog */
++#define CONFIG_AT91SAM9_WATCHDOG 1
++#define CONFIG_HW_WATCHDOG 1
++#define CONFIG_AT91_HW_WDT_TIMEOUT 16
++#define CONFIG_EXTRA_ENV_SETTINGS          \
++   "kernel_addr=0x200000\0"          \
++   ""
++
+ #endif
diff --git a/recipes-bsp/u-boot/u-boot_2016.09.01.bb b/recipes-bsp/u-boot/u-boot_2016.09.01.bb
index 59b3c4c..3f4d2d5 100644
--- a/recipes-bsp/u-boot/u-boot_2016.09.01.bb
+++ b/recipes-bsp/u-boot/u-boot_2016.09.01.bb
@@ -27,6 +27,9 @@ SRC_URI_append_mtr = "\
 SRC_URI_append_mtrv1 = "\
            file://mtrv1.patch \
 "
+SRC_URI_append_mtre = "\
+           file://mtre.patch \
+"
 
 SRC_URI[md5sum] = "61c628f8034477c946e173ed174efeb4"
 SRC_URI[sha256sum] = "95728e89dd476d17428f94080752ab48884be477b6a678941582aeef618b70bb"
diff --git a/recipes-kernel/linux/crypto.inc b/recipes-kernel/linux/crypto.inc
index a557ded..1d8e2ba 100644
--- a/recipes-kernel/linux/crypto.inc
+++ b/recipes-kernel/linux/crypto.inc
@@ -15,3 +15,7 @@ KERNEL_MODULE_AUTOLOAD_mtr += " \
 KERNEL_MODULE_AUTOLOAD_mtcap += " \
 	sha512_generic \
 "
+
+KERNEL_MODULE_AUTOLOAD_mtre += " \
+	sha512_generic \
+"
diff --git a/recipes-kernel/linux/driver.inc b/recipes-kernel/linux/driver.inc
index 5e21ed6..82c4747 100644
--- a/recipes-kernel/linux/driver.inc
+++ b/recipes-kernel/linux/driver.inc
@@ -20,3 +20,5 @@ KERNEL_MODULE_AUTOLOAD_mtcap += "${DRIVER_LOAD_ALL_MACHINES}"
 KERNEL_MODULE_AUTOLOAD_mtrv1 += "${DRIVER_LOAD_ALL_MACHINES}"
 
 KERNEL_MODULE_AUTOLOAD_mtr += "${DRIVER_LOAD_ALL_MACHINES}"
+
+KERNEL_MODULE_AUTOLOAD_mtre += "${DRIVER_LOAD_ALL_MACHINES}"
\ No newline at end of file
diff --git a/recipes-kernel/linux/linux-at91-4.9.87/defconfig b/recipes-kernel/linux/linux-at91-4.9.87/defconfig
index 79285b4..10aae27 100644
--- a/recipes-kernel/linux/linux-at91-4.9.87/defconfig
+++ b/recipes-kernel/linux/linux-at91-4.9.87/defconfig
@@ -3050,7 +3050,7 @@ CONFIG_LEDS_GPIO=y
 # CONFIG_LEDS_LP5562 is not set
 # CONFIG_LEDS_LP8501 is not set
 # CONFIG_LEDS_LP8860 is not set
-# CONFIG_LEDS_PCA955X is not set
+CONFIG_LEDS_PCA955X=m
 # CONFIG_LEDS_PCA963X is not set
 # CONFIG_LEDS_DAC124S085 is not set
 CONFIG_LEDS_PWM=y
@@ -3115,7 +3115,7 @@ CONFIG_RTC_INTF_DEV=y
 #
 # CONFIG_RTC_DRV_ABB5ZES3 is not set
 # CONFIG_RTC_DRV_ABX80X is not set
-# CONFIG_RTC_DRV_DS1307 is not set
+CONFIG_RTC_DRV_DS1307=m
 # CONFIG_RTC_DRV_DS1374 is not set
 # CONFIG_RTC_DRV_DS1672 is not set
 # CONFIG_RTC_DRV_HYM8563 is not set
diff --git a/recipes-kernel/linux/linux-at91-4.9.87/mtre/linux-4.9-mtre-device-tree.patch b/recipes-kernel/linux/linux-at91-4.9.87/mtre/linux-4.9-mtre-device-tree.patch
new file mode 100644
index 0000000..77f6caa
--- /dev/null
+++ b/recipes-kernel/linux/linux-at91-4.9.87/mtre/linux-4.9-mtre-device-tree.patch
@@ -0,0 +1,517 @@
+diff -Naru linux-4.9.87.orig/arch/arm/boot/dts/mtre.dts linux-4.9.87/arch/arm/boot/dts/mtre.dts
+--- linux-4.9.87.orig/arch/arm/boot/dts/mtre.dts	1969-12-31 18:00:00.000000000 -0600
++++ linux-4.9.87/arch/arm/boot/dts/mtre.dts	2019-05-07 19:03:19.378605555 -0500
+@@ -0,0 +1,266 @@
++/*
++ * DTS file for Multi-Tech Systems MTRE Hardware
++ *
++ * Copyright (C) 2016 by Multi-Tech Systems,
++ *
++ * Licensed under GPLv2 or later.
++ */
++
++/dts-v1/;
++#include "at91sam9g25.dtsi"
++#include "at91sam9x5ek.dtsi"
++
++/ {
++	model = "Multi-Tech Systems MTRE";
++	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
++	aliases {
++		serial1 = &uart0;
++	};	
++
++	chosen {
++		bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2";
++	};
++
++	memory {
++		reg = <0x20000000 0x8000000>;
++	};
++
++	clocks {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++
++		main_clock: clock@0 {
++			compatible = "atmel,osc", "fixed-clock";
++			clock-frequency = <12000000>;
++		};
++	};
++
++	ahb {
++		apb {
++			/delete-node/ spi@f0004000;
++			macb0: ethernet@f802c000 {
++				phy-mode = "rmii";
++				status = "okay";
++			};
++
++
++			pinctrl@fffff400 {
++				nand {
++					pinctrl_nand: nand-0 {
++						atmel,pins =
++							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD0 periph A Read Enable */
++							AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD1 periph A Write Enable */
++							AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD2 periph A Address Latch Enable */
++							AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD3 periph A Command Latch Enable */
++							AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP  /* PD4 gpio Chip Enable pin pull_up */
++							AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC31 gpio RDY/BUSY pin pull_up */
++							AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD6 periph A Data bit 0 */
++							AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD7 periph A Data bit 1 */
++							AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD8 periph A Data bit 2 */
++							AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD9 periph A Data bit 3 */
++							AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD10 periph A Data bit 4 */
++							AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD11 periph A Data bit 5 */
++							AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD12 periph A Data bit 6 */
++							AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;  /* PD13 periph A Data bit 7 */
++					};
++					/delete-node/ nand_16bits-0;
++				};
++
++				/delete-node/ spi1;
++				/delete-node/ mmc0;
++				mts-io {
++				    pinctrl_mts_io_out: mts_io-0 {
++					atmel,pins =
++						<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD14 WiFi BT reset */
++						AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD16 Secure reset */
++						AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD17 MTQ reset */
++						AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD18 USB Hub reset */
++						AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;   /* PD19 GNSS Int */
++					   output-high;
++				    };
++				    pinctrl_mts_io_in: mts_io-1 {
++					atmel,pins =
++					    <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;   /* PD20 WiFi_BT_LPMode Input */
++				    };
++				    pinctrl_mts_io_gnss: mts_io-2 {
++					atmel,pins =
++					    <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;   /* PD20 WiFi_BT_LPMode Input */
++					   output-low;
++				    };
++                                };
++				/*
++				 * Pin A23 will be left floating when the power goes off on the radio.
++				 * We need to pull it down to ensure it is low during radio power-off.
++                                 * pinctrl is loaded during the call to platform_device_register() in mts-io.
++                                 * If we need to customize this for various hardware revisions, these can
++                                 * be loaded as overlays prior to loading the mts-io module, overwriting the
++                                 * atmel,pins section.
++				 */
++				mts_io {
++					pinctrl_mts_io: mts_io-0 {
++						atmel,pins =
++							<AT91_PIOA 21 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP  /* PA21 GPIO pull-up radio-power */
++							AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP   /* PA22 GPIO pull-up radio-reset */
++							AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* PA23 GPIO pull-down radio-monitor */
++						};
++				};
++
++				1wire_cm {
++					pinctrl_1wire_cm: 1wire_cm-0 {
++						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
++					};
++				};
++			};
++
++			rtc@fffffeb0 {
++				/* use mcp79410 rtc instead */
++				status = "disabled";
++			};
++
++			dbgu: serial@fffff200 {
++				status = "okay";
++				atmel,use-dma-rx;
++				atmel,use-dma-tx;
++			};
++   
++     spi@f0000000 {
++       /delete-node/ m25p80@0;
++     };
++
++			/delete-node/ serial@f801c000;
++			/delete-node/ mmc@f0008000;
++
++			uart0: serial@f8040000 {
++				status = "okay";
++				atmel,use-dma-rx;
++				atmel,use-dma-tx;
++       dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(11)>,
++              <&dma0 1 (AT91_DMA_CFG_PER_ID(12) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
++       dma-names = "tx", "rx";
++			};
++
++			usb2: gadget@f803c000 {
++				/delete-property/ atmel,vbus-gpio; /* mtrv1 has no vbus-gpio */
++				status = "okay";
++			};
++			watchdog@fffffe40 {
++				status = "okay";
++			};
++		};
++
++		nand0: nand@40000000 {
++			nand-bus-width = <8>;
++			nand-ecc-mode = "hw";
++			atmel,has-pmecc;	/* Enable PMECC */
++			atmel,pmecc-sector-size = <512>;
++			status = "okay";
++			reg = < 0x40000000 0x10000000
++				0xffffe000 0x600    /* PMECC Registers */
++				0xffffe600 0x200    /* PMECC Error Location Registers */
++				0x00100000 0x100000 /* PMECC looup table in ROM code  */
++			      >;
++			atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
++			gpios = < &pioC 31 GPIO_ACTIVE_HIGH
++				  &pioD 4 GPIO_ACTIVE_HIGH
++				  0
++				>;
++			atmel,pmecc-cap = <4>;
++			atmel,nand-has-dma;
++
++			nand@0 {
++				label = "NANDFlash";
++				reg = <0x0 0x10000000>;
++			};
++			at91bootstrap@0 {
++				label = "at91bootstrap";
++				reg = <0x0 0x40000>;
++			};
++			uboot@40000 {
++				label = "u-Boot";
++				reg = <0x40000 0x80000>;
++			};
++			ubootconfig0@c0000 {
++				label = "u-Boot Config";
++				reg = <0xc0000 0xa0000>;
++			};
++			ubootconfig1@160000 {
++				label = "u-Boot Redundant Config";
++				reg = <0x160000 0xa0000>;
++			};
++			uImage@200000 {
++				label = "uImage";
++				reg = <0x200000 0x600000>;
++			};
++			config0@800000 {
++				label = "Config";
++				reg = <0x800000 0x4000000>;
++			};
++			config1@4800000 {
++				label = "OEM Config";
++				reg = <0x4800000 0x800000>;
++			};
++			rootfs@5000000 {
++				label = "Rootfs";
++				reg = <0x5000000 0x8000000>;
++			};
++			user@D000000 {
++				label = "User data";
++				reg = <0xD000000 0x3000000>;
++			};
++		};
++
++		usb0: ohci@00600000 {
++			status = "okay";
++			num-ports = <3>;
++		};
++
++		usb1: ehci@00700000 {
++			status = "okay";
++		};
++	};
++
++
++        i2c-gpio-0 {
++                status = "okay";
++
++                id_eeprom@56 {
++                        compatible = "atmel,24c04";
++                        reg = <0x56>;
++                        pagesize = <16>;
++                        status = "okay";
++                };
++        };
++
++	i2c-gpio-1 {
++		status = "okay";
++
++		pca9552@60 {
++			/* 16-bit I2C LED blinker */
++			compatible = "nxp,pca9552";
++			reg = <0x66>;
++		};
++
++		mcp79410@6f {
++			/* Battery-backed I2C Real-Time Clock/Calendar */
++			compatible = "microchip,mcp7941x";
++			reg = <0x6f>;
++		};
++	};
++
++        pps-0 {
++            compatible = "pps-gpio";
++            gpios = <&pioB 18 0>;  /* MTRV1-0.0 */
++            capture-clear;
++            status = "okay";
++        };
++
++        mts-io-0 {
++            status = "okay";
++            compatible = "mts,mts-io";
++            pinctrl-names = "default";
++            pinctrl-0 = <&pinctrl_mts_io_out>;
++            pinctrl-1 = <&pinctrl_mts_io_in>;
++            pinctrl-2 = <&pinctrl_mts_io_gnss>;
++        };
++};
+diff -Naru linux-4.9.87.orig/arch/arm/boot/dts/at91sam9x5cm.dtsi linux-4.9.87/arch/arm/boot/dts/at91sam9x5cm.dtsi
+--- linux-4.9.87.orig/arch/arm/boot/dts/at91sam9x5cm.dtsi	2019-01-03 15:21:25.339570341 -0600
++++ linux-4.9.87/arch/arm/boot/dts/at91sam9x5cm.dtsi	2019-01-03 15:17:51.911576659 -0600
+@@ -43,48 +43,8 @@
+ 			atmel,has-pmecc;	/* Enable PMECC */
+ 			atmel,pmecc-cap = <2>;
+ 			atmel,pmecc-sector-size = <512>;
+-			nand-on-flash-bbt;
++			/* nand-on-flash-bbt; */
+ 			status = "okay";
+-
+-			at91bootstrap@0 {
+-				label = "at91bootstrap";
+-				reg = <0x0 0x40000>;
+-			};
+-
+-			uboot@40000 {
+-				label = "u-boot";
+-				reg = <0x40000 0x80000>;
+-			};
+-
+-			ubootenv@c0000 {
+-				label = "U-Boot Env";
+-				reg = <0xc0000 0x140000>;
+-			};
+-
+-			kernel@200000 {
+-				label = "kernel";
+-				reg = <0x200000 0x600000>;
+-			};
+-
+-			rootfs@800000 {
+-				label = "rootfs";
+-				reg = <0x800000 0x1f800000>;
+-			};
+-		};
+-	};
+-
+-	leds {
+-		compatible = "gpio-leds";
+-
+-		pb18 {
+-			label = "pb18";
+-			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
+-			linux,default-trigger = "heartbeat";
+-		};
+-
+-		pd21 {
+-			label = "pd21";
+-			gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
+ 		};
+ 	};
+ 
+@@ -96,5 +56,4 @@
+ 		pinctrl-0 = <&pinctrl_1wire_cm>;
+ 		status = "okay";
+ 	};
+-
+ };
+diff -Naru linux-4.9.87.orig/arch/arm/boot/dts/at91sam9x5ek.dtsi linux-4.9.87/arch/arm/boot/dts/at91sam9x5ek.dtsi
+--- linux-4.9.87.orig/arch/arm/boot/dts/at91sam9x5ek.dtsi	2018-03-27 11:05:05.000000000 -0500
++++ linux-4.9.87/arch/arm/boot/dts/at91sam9x5ek.dtsi	2019-01-23 19:14:23.443999491 -0600
+@@ -25,23 +25,11 @@
+ 					&pinctrl_mmc0_slot0_clk_cmd_dat0
+ 					&pinctrl_mmc0_slot0_dat1_3>;
+ 				status = "okay";
++                                /* external micro SD slot */
+ 				slot@0 {
+ 					reg = <0>;
+ 					bus-width = <4>;
+-					cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
+-				};
+-			};
+-
+-			mmc1: mmc@f000c000 {
+-				pinctrl-0 = <
+-					&pinctrl_board_mmc1
+-					&pinctrl_mmc1_slot0_clk_cmd_dat0
+-					&pinctrl_mmc1_slot0_dat1_3>;
+-				status = "okay";
+-				slot@0 {
+-					reg = <0>;
+-					bus-width = <4>;
+-					cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
++					cd-gpios = <&pioA 1 GPIO_ACTIVE_HIGH>;
+ 				};
+ 			};
+ 
+@@ -58,25 +46,12 @@
+ 			usb2: gadget@f803c000 {
+ 				pinctrl-names = "default";
+ 				pinctrl-0 = <&pinctrl_board_usb2>;
+-				atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
+-				status = "okay";
+-			};
+-
+-			i2c0: i2c@f8010000 {
+-				status = "okay";
+-
+-				wm8731: wm8731@1a {
+-					compatible = "wm8731";
+-					reg = <0x1a>;
+-				};
+-			};
+-
+-			adc0: adc@f804c000 {
+-				atmel,adc-ts-wires = <4>;
+-				atmel,adc-ts-pressure-threshold = <10000>;
++				/* atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;		mtcdt: no vbus-gpio */
+ 				status = "okay";
+ 			};
+ 
++                        /* A/D convertor is unusable on Conduit */
++                        
+ 			pinctrl@fffff400 {
+ 				camera_sensor {
+ 					pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 {
+@@ -118,7 +93,7 @@
+ 			};
+ 
+ 			spi0: spi@f0000000 {
+-				status = "disabled";	/* conflict with mmc1 */
++                                status = "okay";
+ 				cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
+ 				m25p80@0 {
+ 					compatible = "atmel,at25df321a";
+@@ -131,37 +106,20 @@
+ 				status = "okay";
+ 			};
+ 
+-			ssc0: ssc@f0010000 {
+-				status = "okay";
+-			};
+ 		};
+ 
+ 		usb0: ohci@00600000 {
+ 			status = "okay";
+ 			num-ports = <3>;
+-			atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
+-					   &pioD 19 GPIO_ACTIVE_LOW
+-					   &pioD 20 GPIO_ACTIVE_LOW
+-					  >;
++			//mtcdt: no vbus-gpio
++			// atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
++			//		   &pioD 19 GPIO_ACTIVE_LOW
++			//		   &pioD 20 GPIO_ACTIVE_LOW
++			//		  >;
+ 		};
+ 
+ 		usb1: ehci@00700000 {
+ 			status = "okay";
+ 		};
+ 	};
+-
+-	sound {
+-		compatible = "atmel,sam9x5-wm8731-audio";
+-
+-		atmel,model = "wm8731 @ AT91SAM9X5EK";
+-
+-		atmel,audio-routing =
+-			"Headphone Jack", "RHPOUT",
+-			"Headphone Jack", "LHPOUT",
+-			"LLINEIN", "Line In Jack",
+-			"RLINEIN", "Line In Jack";
+-
+-		atmel,ssc-controller = <&ssc0>;
+-		atmel,audio-codec = <&wm8731>;
+-	};
+ };
+diff -Naru linux-4.9.87.orig/arch/arm/boot/dts/Makefile linux-4.9.87/arch/arm/boot/dts/Makefile
+--- linux-4.9.87.orig/arch/arm/boot/dts/Makefile	2019-01-03 15:21:25.339570341 -0600
++++ linux-4.9.87/arch/arm/boot/dts/Makefile	2019-01-03 15:17:51.911576659 -0600
+@@ -43,7 +43,8 @@
+ 	at91sam9g25ek.dtb \
+ 	at91sam9g35ek.dtb \
+ 	at91sam9x25ek.dtb \
+-	at91sam9x35ek.dtb
++	at91sam9x35ek.dtb \
++	mtre.dtb
+ dtb-$(CONFIG_SOC_SAM_V7) += \
+ 	at91-kizbox2.dtb \
+ 	at91-sama5d2_ptc_ek.dtb \
+diff -Naru linux-4.9.87.orig/arch/arm/boot/dts/at91sam9x5.dtsi linux-4.9.87/arch/arm/boot/dts/at91sam9x5.dtsi
+--- linux-4.9.87.orig/arch/arm/boot/dts/at91sam9x5.dtsi	2019-01-03 15:21:25.339570341 -0600
++++ linux-4.9.87/arch/arm/boot/dts/at91sam9x5.dtsi	2019-01-03 15:17:51.911576659 -0600
+@@ -32,9 +32,6 @@
+ 		gpio3 = &pioD;
+ 		tcb0 = &tcb0;
+ 		tcb1 = &tcb1;
+-		i2c0 = &i2c0;
+-		i2c1 = &i2c1;
+-		i2c2 = &i2c2;
+ 		ssc0 = &ssc0;
+ 		pwm0 = &pwm0;
+ 	};
+@@ -963,50 +960,7 @@
+ 				status = "disabled";
+ 			};
+ 
+-			i2c0: i2c@f8010000 {
+-				compatible = "atmel,at91sam9x5-i2c";
+-				reg = <0xf8010000 0x100>;
+-				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
+-				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
+-				       <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
+-				dma-names = "tx", "rx";
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-				pinctrl-names = "default";
+-				pinctrl-0 = <&pinctrl_i2c0>;
+-				clocks = <&twi0_clk>;
+-				status = "disabled";
+-			};
+-
+-			i2c1: i2c@f8014000 {
+-				compatible = "atmel,at91sam9x5-i2c";
+-				reg = <0xf8014000 0x100>;
+-				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
+-				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
+-				       <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
+-				dma-names = "tx", "rx";
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-				pinctrl-names = "default";
+-				pinctrl-0 = <&pinctrl_i2c1>;
+-				clocks = <&twi1_clk>;
+-				status = "disabled";
+-			};
+-
+-			i2c2: i2c@f8018000 {
+-				compatible = "atmel,at91sam9x5-i2c";
+-				reg = <0xf8018000 0x100>;
+-				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
+-				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
+-				       <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
+-				dma-names = "tx", "rx";
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-				pinctrl-names = "default";
+-				pinctrl-0 = <&pinctrl_i2c2>;
+-				clocks = <&twi2_clk>;
+-				status = "disabled";
+-			};
++			/* /delete_node/ command does not work. */
+ 
+ 			uart0: serial@f8040000 {
+ 				compatible = "atmel,at91sam9260-usart";
diff --git a/recipes-kernel/linux/linux-at91-5.4.81/mts-dts/mtre.dts b/recipes-kernel/linux/linux-at91-5.4.81/mts-dts/mtre.dts
new file mode 100644
index 0000000..7153e59
--- /dev/null
+++ b/recipes-kernel/linux/linux-at91-5.4.81/mts-dts/mtre.dts
@@ -0,0 +1,1476 @@
+/*
+*
+* This is base DTS file for all AT91 SAM9g25 the MTS devices
+* composed by manual merging of:
+*    #include "at91sam9g25.dtsi"
+*    #include "at91sam9x5ek.dtsi"
+* and sub-includes into one big file.
+*
+*/
+
+/dts-v1/;
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	model = "Multi-Tech Systems MTRE";
+	compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+	interrupt-parent = <&aic>;
+
+	aliases {
+		serial0 = &dbgu;
+		serial1 = &uart0;
+		serial2 = &usart1;
+		serial3 = &usart2;
+		gpio0 = &pioA;
+		gpio1 = &pioB;
+		gpio2 = &pioC;
+		gpio3 = &pioD;
+		tcb0 = &tcb0;
+		tcb1 = &tcb1;
+		ssc0 = &ssc0;
+		pwm0 = &pwm0;
+	};
+
+	chosen {
+		bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2";
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpus {
+		#address-cells = <0>;
+		#size-cells = <0>;
+
+		cpu {
+			compatible = "arm,arm926ej-s";
+			device_type = "cpu";
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x20000000 0x8000000>;
+	};
+
+	clocks {
+		slow_xtal: slow_xtal {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+		};
+
+		main_xtal: main_xtal {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <12000000>;
+		};
+
+		adc_op_clk: adc_op_clk{
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1000000>;
+		};
+	};
+
+	sram: sram@300000 {
+		compatible = "mmio-sram";
+		reg = <0x00300000 0x8000>;
+	};
+
+	ahb {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		apb {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			aic: interrupt-controller@fffff000 {
+				#interrupt-cells = <3>;
+				compatible = "atmel,at91rm9200-aic";
+				interrupt-controller;
+				reg = <0xfffff000 0x200>;
+				atmel,external-irqs = <31>;
+			};
+
+			matrix: matrix@ffffde00 {
+				compatible = "atmel,at91sam9x5-matrix", "syscon";
+				reg = <0xffffde00 0x100>;
+			};
+
+			pmecc: ecc-engine@ffffe000 {
+				compatible = "atmel,at91sam9g45-pmecc";
+				reg = <0xffffe000 0x600>,
+				      <0xffffe600 0x200>;
+			};
+
+			ramc0: ramc@ffffe800 {
+				compatible = "atmel,at91sam9g45-ddramc";
+				reg = <0xffffe800 0x200>;
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
+				clock-names = "ddrck";
+			};
+
+			smc: smc@ffffea00 {
+				compatible = "atmel,at91sam9260-smc", "syscon";
+				reg = <0xffffea00 0x200>;
+			};
+
+			pmc: pmc@fffffc00 {
+				compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon";
+				reg = <0xfffffc00 0x200>;
+				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+				#clock-cells = <2>;
+				clocks = <&clk32k>, <&main_xtal>;
+				clock-names = "slow_clk", "main_xtal";
+			};
+
+			reset_controller: rstc@fffffe00 {
+				compatible = "atmel,at91sam9g45-rstc";
+				reg = <0xfffffe00 0x10>;
+				clocks = <&clk32k>;
+			};
+
+			shutdown_controller: shdwc@fffffe10 {
+				compatible = "atmel,at91sam9x5-shdwc";
+				reg = <0xfffffe10 0x10>;
+				clocks = <&clk32k>;
+			};
+
+			pit: timer@fffffe30 {
+				compatible = "atmel,at91sam9260-pit";
+				reg = <0xfffffe30 0xf>;
+				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+			};
+
+			clk32k: sckc@fffffe50 {
+				compatible = "atmel,at91sam9x5-sckc";
+				reg = <0xfffffe50 0x4>;
+				clocks = <&slow_xtal>;
+				#clock-cells = <0>;
+			};
+
+			tcb0: timer@f8008000 {
+				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0xf8008000 0x100>;
+				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
+				clock-names = "t0_clk", "slow_clk";
+
+
+				timer@0 {
+					compatible = "atmel,tcb-timer";
+					reg = <0>;
+				};
+
+				timer@1 {
+					compatible = "atmel,tcb-timer";
+					reg = <1>;
+				};
+			};
+
+			tcb1: timer@f800c000 {
+				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0xf800c000 0x100>;
+				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
+				clock-names = "t0_clk", "slow_clk";
+			};
+
+			dma0: dma-controller@ffffec00 {
+				compatible = "atmel,at91sam9g45-dma";
+				reg = <0xffffec00 0x200>;
+				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
+				#dma-cells = <2>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
+				clock-names = "dma_clk";
+			};
+
+			dma1: dma-controller@ffffee00 {
+				compatible = "atmel,at91sam9g45-dma";
+				reg = <0xffffee00 0x200>;
+				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
+				#dma-cells = <2>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
+				clock-names = "dma_clk";
+			};
+
+			pinctrl: pinctrl@fffff400 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
+				ranges = <0xfffff400 0xfffff400 0x800>;
+
+				atmel,mux-mask = <
+				      /*    A         B          C     */
+				       0xffffffff 0xffe0399f 0xc000001c  /* pioA */
+				       0x0007ffff 0x00047e3f 0x00000000  /* pioB */
+				       0x80000000 0x07c0ffff 0xb83fffff  /* pioC */
+				       0x003fffff 0x003f8000 0x00000000  /* pioD */
+				      >;
+
+				macb0 {
+					pinctrl_macb0_rmii: macb0_rmii-0 {
+						atmel,pins =
+							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB0 periph A */
+							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB1 periph A */
+							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB2 periph A */
+							 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB3 periph A */
+							 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB4 periph A */
+							 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB5 periph A */
+							 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
+							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
+							 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
+							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB10 periph A */
+					};
+
+					pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
+						atmel,pins =
+							<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB8 periph A */
+							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB11 periph A */
+							 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A */
+							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A */
+							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A */
+							 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB15 periph A */
+							 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB16 periph A */
+							 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB17 periph A */
+					};
+				};
+
+				camera_sensor {
+					pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 {
+						atmel,pins =
+							<AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* ISI_MCK */
+					};
+
+					pinctrl_sensor_power: sensor_power-0 {
+						atmel,pins =
+							<AT91_PIOA 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_sensor_reset: sensor_reset-0 {
+						atmel,pins =
+							<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+					};
+				};
+
+				isi {
+					pinctrl_isi_data_0_7: isi-0-data-0-7 {
+						atmel,pins =
+							<AT91_PIOC 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D0, conflicts with LCDDAT0 */
+							AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D1, conflicts with LCDDAT1 */
+							AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D2, conflicts with LCDDAT2 */
+							AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D3, conflicts with LCDDAT3 */
+							AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D4, conflicts with LCDDAT4 */
+							AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D5, conflicts with LCDDAT5 */
+							AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D6, conflicts with LCDDAT6 */
+							AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D7, conflicts with LCDDAT7 */
+							AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_PCK, conflicts with LCDDAT12 */
+							AT91_PIOC 14 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_HSYNC, conflicts with LCDDAT14 */
+							AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* ISI_VSYNC, conflicts with LCDDAT13 */
+					};
+
+					pinctrl_isi_data_8_9: isi-0-data-8-9 {
+						atmel,pins =
+							<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D8, conflicts with LCDDAT8 */
+							AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* ISI_D9, conflicts with LCDDAT9 */
+					};
+
+					pinctrl_isi_data_10_11: isi-0-data-10-11 {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE	/* ISI_D10, conflicts with LCDDAT10 */
+							AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* ISI_D11, conflicts with LCDDAT11 */
+					};
+				};
+
+				/* shared pinctrl settings */
+				dbgu {
+					pinctrl_dbgu: dbgu-0 {
+						atmel,pins =
+							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+				};
+
+				ebi {
+					pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
+						atmel,pins =
+							<AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_ebi_addr_nand: ebi-addr-0 {
+						atmel,pins =
+							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+					};
+				};
+
+				usart0 {
+					pinctrl_usart0: usart0-0 {
+						atmel,pins =
+							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_usart0_rts: usart0_rts-0 {
+						atmel,pins =
+							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA2 periph A */
+					};
+
+					pinctrl_usart0_cts: usart0_cts-0 {
+						atmel,pins =
+							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA3 periph A */
+					};
+
+					pinctrl_usart0_sck: usart0_sck-0 {
+						atmel,pins =
+							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA4 periph A */
+					};
+				};
+
+				usart1 {
+					pinctrl_usart1: usart1-0 {
+						atmel,pins =
+							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_usart1_rts: usart1_rts-0 {
+						atmel,pins =
+							<AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC27 periph C */
+					};
+
+					pinctrl_usart1_cts: usart1_cts-0 {
+						atmel,pins =
+							<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC28 periph C */
+					};
+
+					pinctrl_usart1_sck: usart1_sck-0 {
+						atmel,pins =
+							<AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC29 periph C */
+					};
+				};
+
+				usart2 {
+					pinctrl_usart2: usart2-0 {
+						atmel,pins =
+							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_usart2_rts: usart2_rts-0 {
+						atmel,pins =
+							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB0 periph B */
+					};
+
+					pinctrl_usart2_cts: usart2_cts-0 {
+						atmel,pins =
+							<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB1 periph B */
+					};
+
+					pinctrl_usart2_sck: usart2_sck-0 {
+						atmel,pins =
+							<AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
+					};
+				};
+
+				usart3 {
+					pinctrl_usart3: usart3-0 {
+						atmel,pins =
+							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE
+							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_usart3_rts: usart3_rts-0 {
+						atmel,pins =
+							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC24 periph B */
+					};
+
+					pinctrl_usart3_cts: usart3_cts-0 {
+						atmel,pins =
+							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC25 periph B */
+					};
+
+					pinctrl_usart3_sck: usart3_sck-0 {
+						atmel,pins =
+							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;		/* PC26 periph B */
+					};
+				};
+
+				uart0 {
+					pinctrl_uart0: uart0-0 {
+						atmel,pins =
+							<AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC8 periph C */
+							 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC9 periph C with pullup */
+					};
+				};
+
+				uart1 {
+					pinctrl_uart1: uart1-0 {
+						atmel,pins =
+							<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC16 periph C */
+							 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;	/* PC17 periph C with pullup */
+					};
+				};
+
+				nand {
+					pinctrl_nand_oe_we: nand-oe-we-0 {
+						atmel,pins =
+							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_nand_rb: nand-rb-0 {
+						atmel,pins =
+							<AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_nand_cs: nand-cs-0 {
+						atmel,pins =
+							<AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+					};
+				};
+
+				mts-io {
+				    pinctrl_mts_io_out: mts_io-0 {
+					atmel,pins =
+					    <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP    /* PD14 WiFi BT reset */
+					    AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD16 Secure reset */
+					    AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD17 MTQ reset */
+					    AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP     /* PD18 USB Hub reset */
+					    AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;   /* PD19 GNSS Int */
+					    output-high;
+				    };
+				    pinctrl_mts_io_in: mts_io-1 {
+					atmel,pins =
+					    <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;   /* PD20 WiFi_BT_LPMode Input */
+				    };
+				    pinctrl_mts_io_gnss: mts_io-2 {
+					atmel,pins =
+					    <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;   /* PD15 GNSS Reset */
+					    output-low;
+				    };
+				};
+		
+				/*
+				 * Pin A23 will be left floating when the power goes off on the radio.
+				 * We need to pull it down to ensure it is low during radio power-off.
+				 * pinctrl is loaded during the call to platform_device_register() in mts-io.
+				 * If we need to customize this for various hardware revisions, these can
+				 * be loaded as overlays prior to loading the mts-io module, overwriting the
+				 * atmel,pins section.
+				 */
+				mts_io {
+				    pinctrl_mts_io: mts_io-0 {
+					atmel,pins =
+					    <AT91_PIOA 21 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP  /* PA21 GPIO pull-up radio-power */
+					    AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP   /* PA22 GPIO pull-up radio-reset */
+					    AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* PA23 GPIO pull-down radio-monitor */
+					};
+				};
+
+				mmc0 {
+					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
+						atmel,pins =
+							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
+							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
+							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA15 periph A with pullup */
+					};
+
+					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+						atmel,pins =
+							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
+							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
+							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
+					};
+
+					pinctrl_board_mmc0: mmc0-board {
+						atmel,pins =
+							<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD15 gpio CD pin pull up and deglitch */
+					};
+				};
+
+				mmc1 {
+					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
+						atmel,pins =
+							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA13 periph B */
+							 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA12 periph B with pullup */
+							 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA11 periph B with pullup */
+					};
+
+					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
+						atmel,pins =
+							<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA2 periph B with pullup */
+							 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA3 periph B with pullup */
+							 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA4 periph B with pullup */
+					};
+
+					pinctrl_board_mmc1: mmc1-board {
+						atmel,pins =
+							<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD14 gpio CD pin pull up and deglitch */
+					};
+				};
+
+				usb2 {
+					pinctrl_board_usb2: usb2-board {
+						atmel,pins =
+							<AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB16 gpio vbus sense, deglitch */
+					};
+				};
+
+				ssc0 {
+					pinctrl_ssc0_tx: ssc0_tx-0 {
+						atmel,pins =
+							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA24 periph B */
+							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
+							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA26 periph B */
+					};
+
+					pinctrl_ssc0_rx: ssc0_rx-0 {
+						atmel,pins =
+							<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
+							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
+							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
+					};
+				};
+
+				spi0 {
+					pinctrl_spi0: spi0-0 {
+						atmel,pins =
+							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
+							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
+							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
+					};
+				};
+
+				spi1 {
+					pinctrl_spi1: spi1-0 {
+						atmel,pins =
+							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA21 periph B SPI1_MISO pin */
+							 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B SPI1_MOSI pin */
+							 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B SPI1_SPCK pin */
+					};
+				};
+
+				i2c0 {
+					pinctrl_i2c0: i2c0-0 {
+						atmel,pins =
+							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA30 periph A I2C0 data */
+							 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA31 periph A I2C0 clock */
+					};
+				};
+
+				i2c1 {
+					pinctrl_i2c1: i2c1-0 {
+						atmel,pins =
+							<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE	/* PC0 periph C I2C1 data */
+							 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC1 periph C I2C1 clock */
+					};
+				};
+
+				i2c2 {
+					pinctrl_i2c2: i2c2-0 {
+						atmel,pins =
+							<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B I2C2 data */
+							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B I2C2 clock */
+					};
+				};
+
+				i2c_gpio0 {
+					pinctrl_i2c_gpio0: i2c_gpio0-0 {
+						atmel,pins =
+							<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PA30 gpio multidrive I2C0 data */
+							 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PA31 gpio multidrive I2C0 clock */
+					};
+				};
+
+				i2c_gpio1 {
+					pinctrl_i2c_gpio1: i2c_gpio1-0 {
+						atmel,pins =
+							<AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PC0 gpio multidrive I2C1 data */
+							 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PC1 gpio multidrive I2C1 clock */
+					};
+				};
+
+				i2c_gpio2 {
+					pinctrl_i2c_gpio2: i2c_gpio2-0 {
+						atmel,pins =
+							<AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE	/* PB4 gpio multidrive I2C2 data */
+							 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;	/* PB5 gpio multidrive I2C2 clock */
+					};
+				};
+
+				pwm0 {
+					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
+						atmel,pins =
+							<AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
+						atmel,pins =
+							<AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
+						atmel,pins =
+							<AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
+						atmel,pins =
+							<AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
+						atmel,pins =
+							<AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
+						atmel,pins =
+							<AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
+						atmel,pins =
+							<AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
+						atmel,pins =
+							<AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
+						atmel,pins =
+							<AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+				};
+
+				tcb0 {
+					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+						atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+						atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+						atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+						atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+						atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+						atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+						atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+						atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+						atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+				};
+
+				tcb1 {
+					pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+						atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+						atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+						atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+						atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+						atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+						atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+						atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+					};
+				};
+
+				1wire_cm {
+					pinctrl_1wire_cm: 1wire_cm-0 {
+						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
+					};
+				};
+
+				pioA: gpio@fffff400 {
+					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+					reg = <0xfffff400 0x200>;
+					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+					#gpio-cells = <2>;
+					gpio-controller;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
+				};
+
+				pioB: gpio@fffff600 {
+					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+					reg = <0xfffff600 0x200>;
+					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+					#gpio-cells = <2>;
+					gpio-controller;
+					#gpio-lines = <19>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
+				};
+
+				pioC: gpio@fffff800 {
+					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+					reg = <0xfffff800 0x200>;
+					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+					#gpio-cells = <2>;
+					gpio-controller;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
+				};
+
+				pioD: gpio@fffffa00 {
+					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+					reg = <0xfffffa00 0x200>;
+					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+					#gpio-cells = <2>;
+					gpio-controller;
+					#gpio-lines = <22>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
+				};
+			};
+
+			isi: isi@f8048000 {
+				compatible = "atmel,at91sam9g45-isi";
+				reg = <0xf8048000 0x4000>;
+				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_isi_data_0_7>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
+				clock-names = "isi_clk";
+				status = "disabled";
+				port {
+					#address-cells = <1>;
+					#size-cells = <0>;
+				};
+			};
+
+			macb0: ethernet@f802c000 {
+				compatible = "cdns,at91sam9260-macb", "cdns,macb";
+				reg = <0xf802c000 0x100>;
+				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_macb0_rmii>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>;
+				clock-names = "hclk", "pclk";
+
+				phy-mode = "rmii";
+				status = "okay";
+			};
+
+			ssc0: ssc@f0010000 {
+				compatible = "atmel,at91sam9g45-ssc";
+				reg = <0xf0010000 0x4000>;
+				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
+				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
+				       <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
+				dma-names = "tx", "rx";
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
+				clock-names = "pclk";
+
+				status = "disabled";
+			};
+
+			mmc0: mmc@f0008000 {
+				compatible = "atmel,hsmci";
+				reg = <0xf0008000 0x600>;
+				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
+				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
+				dma-names = "rxtx";
+				pinctrl-names = "default";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
+				clock-names = "mci_clk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				pinctrl-0 = <
+					&pinctrl_board_mmc0
+					&pinctrl_mmc0_slot0_clk_cmd_dat0
+					&pinctrl_mmc0_slot0_dat1_3>;
+				status = "disabled";
+
+				slot@0 {
+					reg = <0>;
+					bus-width = <4>;
+					cd-gpios = <&pioA 1 GPIO_ACTIVE_HIGH>;
+				};
+			};
+
+			mmc1: mmc@f000c000 {
+				compatible = "atmel,hsmci";
+				reg = <0xf000c000 0x600>;
+				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
+				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
+				dma-names = "rxtx";
+				pinctrl-names = "default";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
+				clock-names = "mci_clk";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+
+				pinctrl-0 = <
+					&pinctrl_board_mmc1
+					&pinctrl_mmc1_slot0_clk_cmd_dat0
+					&pinctrl_mmc1_slot0_dat1_3>;
+				status = "disabled";
+
+				slot@0 {
+					reg = <0>;
+					bus-width = <4>;
+					cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
+				};
+			};
+
+			dbgu: serial@fffff200 {
+				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
+				reg = <0xfffff200 0x200>;
+				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_dbgu>;
+				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
+				       <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+				dma-names = "tx", "rx";
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clock-names = "usart";
+				status = "okay";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+			};
+
+			usart0: serial@f801c000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xf801c000 0x200>;
+				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usart0>;
+				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
+				       <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+				dma-names = "tx", "rx";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
+				clock-names = "usart";
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				status = "disabled";
+			};
+
+			usart1: serial@f8020000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xf8020000 0x200>;
+				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usart1>;
+				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
+				       <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+				dma-names = "tx", "rx";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
+				clock-names = "usart";
+				status = "disabled";
+			};
+
+			usart2: serial@f8024000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xf8024000 0x200>;
+				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usart2>;
+				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
+				       <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+				dma-names = "tx", "rx";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
+				clock-names = "usart";
+				status = "disabled";
+			};
+
+			usart3: serial@f8028000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xf8028000 0x200>;
+				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_usart3>;
+				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
+				       <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+				dma-names = "tx", "rx";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
+				clock-names = "usart";
+				status = "disabled";
+			};
+
+			uart0: serial@f8040000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xf8040000 0x200>;
+				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_uart0>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
+				clock-names = "usart";
+
+				atmel,use-dma-rx;
+				atmel,use-dma-tx;
+				status = "okay";
+				dmas =  <&dma0 1 AT91_DMA_CFG_PER_ID(11)>,
+				       <&dma0 1 (AT91_DMA_CFG_PER_ID(12) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+				dma-names = "tx", "rx";
+			};
+
+			uart1: serial@f8044000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xf8044000 0x200>;
+				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_uart1>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
+				clock-names = "usart";
+				status = "disabled";
+			};
+
+			adc0: adc@f804c000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91sam9x5-adc";
+				reg = <0xf804c000 0x100>;
+				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
+					 <&adc_op_clk>;
+				clock-names = "adc_clk", "adc_op_clk";
+				atmel,adc-use-external-triggers;
+				atmel,adc-channels-used = <0xffff>;
+				atmel,adc-vref = <3300>;
+				atmel,adc-startup-time = <40>;
+				atmel,adc-sample-hold-time = <11>;
+				atmel,adc-res = <8 10>;
+				atmel,adc-res-names = "lowres", "highres";
+				atmel,adc-use-res = "highres";
+
+				trigger0 {
+					trigger-name = "external-rising";
+					trigger-value = <0x1>;
+					trigger-external;
+				};
+
+				trigger1 {
+					trigger-name = "external-falling";
+					trigger-value = <0x2>;
+					trigger-external;
+				};
+
+				trigger2 {
+					trigger-name = "external-any";
+					trigger-value = <0x3>;
+					trigger-external;
+				};
+
+				trigger3 {
+					trigger-name = "continuous";
+					trigger-value = <0x6>;
+				};
+			};
+
+			spi0: spi@f0000000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0xf0000000 0x100>;
+				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
+				       <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
+				dma-names = "tx", "rx";
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_spi0>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
+				clock-names = "spi_clk";
+
+				cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
+				status = "disabled";
+			};
+
+			spi1: spi@f0004000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0xf0004000 0x100>;
+				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
+				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
+				       <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
+				dma-names = "tx", "rx";
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_spi1>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
+				clock-names = "spi_clk";
+				status = "disabled";
+			};
+
+			usb2: gadget@f803c000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91sam9g45-udc";
+				reg = <0x00500000 0x80000
+				       0xf803c000 0x400>;
+				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
+				clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
+				clock-names = "hclk", "pclk";
+
+
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_board_usb2>;
+				/* atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;		mtrv1: no vbus-gpio */
+				status = "disabled";
+
+				ep@0 {
+					reg = <0>;
+					atmel,fifo-size = <64>;
+					atmel,nb-banks = <1>;
+				};
+
+				ep@1 {
+					reg = <1>;
+					atmel,fifo-size = <1024>;
+					atmel,nb-banks = <2>;
+					atmel,can-dma;
+					atmel,can-isoc;
+				};
+
+				ep@2 {
+					reg = <2>;
+					atmel,fifo-size = <1024>;
+					atmel,nb-banks = <2>;
+					atmel,can-dma;
+					atmel,can-isoc;
+				};
+
+				ep@3 {
+					reg = <3>;
+					atmel,fifo-size = <1024>;
+					atmel,nb-banks = <3>;
+					atmel,can-dma;
+				};
+
+				ep@4 {
+					reg = <4>;
+					atmel,fifo-size = <1024>;
+					atmel,nb-banks = <3>;
+					atmel,can-dma;
+				};
+
+				ep@5 {
+					reg = <5>;
+					atmel,fifo-size = <1024>;
+					atmel,nb-banks = <3>;
+					atmel,can-dma;
+					atmel,can-isoc;
+				};
+
+				ep@6 {
+					reg = <6>;
+					atmel,fifo-size = <1024>;
+					atmel,nb-banks = <3>;
+					atmel,can-dma;
+					atmel,can-isoc;
+				};
+			};
+
+			watchdog: watchdog@fffffe40 {
+				compatible = "atmel,at91sam9260-wdt";
+				reg = <0xfffffe40 0x10>;
+				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+				clocks = <&clk32k>;
+				atmel,watchdog-type = "hardware";
+				atmel,reset-type = "all";
+				atmel,dbg-halt;
+
+
+				status = "okay";
+			};
+
+			rtc: rtc@fffffeb0 {
+				compatible = "atmel,at91sam9x5-rtc";
+				reg = <0xfffffeb0 0x40>;
+				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+				clocks = <&clk32k>;
+				/* use mcp79410 rtc instead */
+				status = "disabled";
+			};
+
+			pwm0: pwm@f8034000 {
+				compatible = "atmel,at91sam9rl-pwm";
+				reg = <0xf8034000 0x300>;
+				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
+				#pwm-cells = <3>;
+				status = "disabled";
+			};
+		};
+
+		usb0: ohci@600000 {
+			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+			reg = <0x00600000 0x100000>;
+			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
+			clock-names = "ohci_clk", "hclk", "uhpck";
+
+			num-ports = <3>;
+			//mtcdt: no vbus-gpio
+			//atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
+			//		   &pioD 19 GPIO_ACTIVE_LOW
+			//		   &pioD 20 GPIO_ACTIVE_LOW
+			//		  >;
+			status = "okay";
+		};
+
+		usb1: ehci@700000 {
+			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+			reg = <0x00700000 0x100000>;
+			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
+			clock-names = "usb_clk", "ehci_clk";
+
+
+			status = "okay";
+		};
+
+		ebi: ebi@10000000 {
+			compatible = "atmel,at91sam9x5-ebi";
+			#address-cells = <2>;
+			#size-cells = <1>;
+			atmel,smc = <&smc>;
+			atmel,matrix = <&matrix>;
+			reg = <0x10000000 0x60000000>;
+			ranges = <0x0 0x0 0x10000000 0x10000000
+				  0x1 0x0 0x20000000 0x10000000
+				  0x2 0x0 0x30000000 0x10000000
+				  0x3 0x0 0x40000000 0x10000000
+				  0x4 0x0 0x50000000 0x10000000
+				  0x5 0x0 0x60000000 0x10000000>;
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+
+			pinctrl-0 = <&pinctrl_ebi_addr_nand
+				     &pinctrl_ebi_data_0_7>;
+			pinctrl-names = "default";
+			status = "okay";
+
+			nand_controller: nand-controller {
+				compatible = "atmel,at91sam9g45-nand-controller";
+				ecc-engine = <&pmecc>;
+				#address-cells = <2>;
+				#size-cells = <1>;
+				ranges;
+
+
+				status = "okay";
+				pinctrl-0 = <&pinctrl_nand_oe_we
+					     &pinctrl_nand_cs
+					     &pinctrl_nand_rb>;
+				pinctrl-names = "default";
+
+				nand@3 {
+					reg = <0x3 0x0 0x800000>;
+					rb-gpios = <&pioC 31 GPIO_ACTIVE_HIGH>;
+					cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
+					nand-bus-width = <8>;
+					nand-ecc-mode = "hw";
+					nand-ecc-strength = <4>;
+					nand-ecc-step-size = <512>;
+					/* nand-on-flash-bbt; */
+					label = "atmel_nand";
+
+					partitions {
+						compatible = "fixed-partitions";
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						nand@0 {
+							label = "NANDFlash";
+							reg = <0x0 0x10000000>;
+						};
+
+						at91bootstrap@0 {
+							label = "at91bootstrap";
+							reg = <0x0 0x40000>;
+						};
+
+						uboot@40000 {
+							label = "u-Boot";
+							reg = <0x40000 0x80000>;
+						};
+					
+						ubootconfig0@c0000 {
+							label = "u-Boot Config";
+							reg = <0xc0000 0xa0000>;
+						};
+					
+						ubootconfig1@160000 {
+							label = "u-Boot Redundant Config";
+							reg = <0x160000 0xa0000>;
+						};
+					
+						uImage@200000 {
+							label = "uImage";
+							reg = <0x200000 0x600000>;
+						};
+
+						config0@800000 {
+							label = "Config";
+							reg = <0x800000 0x4000000>;
+						};
+
+						config1@4800000 {
+							label = "OEM Config";
+							reg = <0x4800000 0x800000>;
+						};
+
+						rootfs@5000000 {
+							label = "Rootfs";
+							reg = <0x5000000 0x8000000>;
+						};
+
+						user@D000000 {
+							label = "User data";
+							reg = <0xD000000 0x3000000>;
+						};
+					};
+				};
+			};
+		};
+	};
+
+	i2c-gpio-0 {
+		compatible = "i2c-gpio";
+		gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
+			 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
+			>;
+		i2c-gpio,sda-open-drain;
+		i2c-gpio,scl-open-drain;
+		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c_gpio0>;
+		status = "okay";
+
+		id_eeprom@56 {
+		    compatible = "atmel,24c04";
+		    reg = <0x56>;
+		    pagesize = <16>;
+		    status = "okay";
+		};
+	};
+
+	i2c-gpio-1 {
+		compatible = "i2c-gpio";
+		gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
+			 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
+			>;
+		i2c-gpio,sda-open-drain;
+		i2c-gpio,scl-open-drain;
+		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c_gpio1>;
+		status = "okay";
+
+		pca9552@60 {
+			/* 16-bit I2C LED blinker */
+			compatible = "nxp,pca9552";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x66>;
+
+			led@0 {
+				label = "0";
+				reg = <0>;
+			};
+
+			led@1 {
+				label = "1";
+				reg = <1>;
+			};
+
+			led@2 {
+				label = "2";
+				reg = <2>;
+			};
+
+			led@3 {
+				label = "3";
+				reg = <3>;
+			};
+
+			led@4 {
+				label = "4";
+				reg = <4>;
+			};
+
+			led@5 {
+				label = "5";
+				reg = <5>;
+			};
+
+			led@6 {
+				label = "6";
+				reg = <6>;
+			};
+
+			led@7 {
+				label = "7";
+				reg = <7>;
+			};
+
+			led@8 {
+				label = "8";
+				reg = <8>;
+			};
+
+			led@9 {
+				label = "9";
+				reg = <9>;
+			};
+
+			led@10 {
+				label = "10";
+				reg = <10>;
+			};
+
+			led@11 {
+				label = "11";
+				reg = <11>;
+			};
+
+			led@12 {
+				label = "12";
+				reg = <12>;
+			};
+
+			led@13 {
+				label = "13";
+				reg = <13>;
+			};
+
+			led@14 {
+				label = "14";
+				reg = <14>;
+			};
+
+			led@15 {
+				label = "15";
+				reg = <15>;
+			};
+		};
+
+		mcp79410@6f {
+			/* Battery-backed I2C Real-Time Clock/Calendar */
+			compatible = "microchip,mcp7941x";
+			reg = <0x6f>;
+		};
+	};
+
+	i2c-gpio-2 {
+		compatible = "i2c-gpio";
+		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
+			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
+			>;
+		i2c-gpio,sda-open-drain;
+		i2c-gpio,scl-open-drain;
+		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c_gpio2>;
+		status = "disabled";
+	};
+
+	mts-io-0 {
+		status = "okay";
+		compatible = "mts,mts-io";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_mts_io_out>;
+		pinctrl-1 = <&pinctrl_mts_io_in>;
+		pinctrl-2 = <&pinctrl_mts_io_gnss>;
+	};
+
+	1wire_cm {
+		compatible = "w1-gpio";
+		gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
+		linux,open-drain;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_1wire_cm>;
+		status = "disabled";
+	};
+
+	pps-0 {
+		compatible = "pps-gpio";
+		gpios = <&pioB 18 0>;  /* MTRV1-0.0 */
+		capture-clear;
+		status = "okay";
+	};
+};
diff --git a/recipes-kernel/linux/linux-at91_4.9.87.bb b/recipes-kernel/linux/linux-at91_4.9.87.bb
index ba3c1de..b546c2e 100644
--- a/recipes-kernel/linux/linux-at91_4.9.87.bb
+++ b/recipes-kernel/linux/linux-at91_4.9.87.bb
@@ -76,6 +76,10 @@ SRC_URI_append_mtr = "\
             file://fix-atmel-mci-reg-overloading.patch \
             file://wl12xx_enable_disable.patch \
             "
+SRC_URI_append_mtre = "\
+            ${COMMON_PATCHES} \
+            file://linux-4.9-mtre-device-tree.patch \
+            "
 KERNEL_MODULE_AUTOLOAD_mtcap_append += "i2c-dev"
 KERNEL_MODULE_AUTOLOAD_mtcdt_append += "i2c-dev"
 KERNEL_MODULE_AUTOLOAD_append += "softdog"
@@ -84,6 +88,7 @@ DTB_APPEND_mtcdt = "mtcdt"
 DTB_APPEND_mtrv1 = "mtrv1"
 DTB_APPEND_mtcap = "mtcap"
 DTB_APPEND_mtr = "mtr"
+DTB_APPEND_mtre = "mtre"
 
 python __anonymous () {
 	if d.getVar('UBOOT_FIT_IMAGE', True) == 'xyes':
@@ -122,7 +127,7 @@ kernel_do_configure_append() {
 
 KERNEL_MODULE_PACKAGE_SUFFIX=""
 
-COMPATIBLE_MACHINE = "(mtcdt|mtrv1|mtr|mtcap|mths)"
+COMPATIBLE_MACHINE = "(mtcdt|mtrv1|mtr|mtcap|mths|mtre)"
 
 pkg_preinst_kernel-image-uimage() {
     set -x
diff --git a/recipes-kernel/linux/linux-at91_5.4.81.bb b/recipes-kernel/linux/linux-at91_5.4.81.bb
index acb0272..89fda1c 100644
--- a/recipes-kernel/linux/linux-at91_5.4.81.bb
+++ b/recipes-kernel/linux/linux-at91_5.4.81.bb
@@ -61,6 +61,9 @@ SRC_URI_append_mtr = "\
             file://linux-5.4-fix-atmel-mci-reg-overloading.patch \
             file://linux-5.4-wl12xx_enable_disable.patch \
             "
+SRC_URI_append_mtre = "\
+            ${COMMON_PATCHES} \
+            "
 
 python __anonymous () {
     if d.getVar('UBOOT_FIT_IMAGE', True) == 'xyes':
@@ -135,8 +138,9 @@ DTB_APPEND_mtcdt = "mtcdt"
 DTB_APPEND_mtrv1 = "mtrv1"
 DTB_APPEND_mtcap = "mtcap"
 DTB_APPEND_mtr = "mtr"
+DTB_APPEND_mtre = "mtre"
 
-COMPATIBLE_MACHINE = "(mtcdt|mtrv1|mtr|mtcap|mths)"
+COMPATIBLE_MACHINE = "(mtcdt|mtrv1|mtr|mtcap|mths|mtre)"
 
 NET_LOAD_ALL_MACHINES += " \
 	8021q \
@@ -258,3 +262,7 @@ KERNEL_MODULE_AUTOLOAD_mtcap += " \
 	${NET_LOAD_ALL_MACHINES} \
 	${DRIVER_LOAD_ALL_MACHINES} \
 "
+KERNEL_MODULE_AUTOLOAD_mtre += " \
+	${NET_LOAD_ALL_MACHINES} \
+	${DRIVER_LOAD_ALL_MACHINES} \
+"
diff --git a/recipes-kernel/linux/net.inc b/recipes-kernel/linux/net.inc
index 5a78b44..655d172 100644
--- a/recipes-kernel/linux/net.inc
+++ b/recipes-kernel/linux/net.inc
@@ -105,4 +105,8 @@ KERNEL_MODULE_AUTOLOAD_mtr += " \
 KERNEL_MODULE_AUTOLOAD_mtcap += " \
 	${NET_LOAD_ALL_MACHINES} \
 "
+KERNEL_MODULE_AUTOLOAD_mtre += " \
+	${NET_LOAD_ALL_MACHINES} \
+"
+
 
diff --git a/recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-ledrtig.patch b/recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-ledrtig.patch
new file mode 100644
index 0000000..7d8e03a
--- /dev/null
+++ b/recipes-kernel/vizzini/vizzini-1.1/vizzini-1.1-ledrtig.patch
@@ -0,0 +1,117 @@
+diff -ur orig/vizzini.c new/vizzini.c
+--- orig/vizzini.c	2017-07-21 13:55:37.000000000 +0300
++++ new/vizzini.c	2017-07-20 15:37:52.000000000 +0300
+@@ -54,6 +54,8 @@
+ #include <linux/fcntl.h>
+ #include <asm/uaccess.h>
+ 
++#include <linux/leds.h>
++
+ 
+ #include "vizzini.h"
+ #include "vzioctl.h"
+@@ -71,6 +73,38 @@
+ static DEFINE_MUTEX(xr21v141x_table_lock);
+ 
+ /*
++ * LED triggers
++ */
++
++static void xr21v141x_register_led_triggers(struct xr21v141x *xr21v141x)
++{
++#ifdef CONFIG_LEDS_TRIGGERS
++	xr21v141x->led_trigger_rx_delay_on = 50;
++	xr21v141x->led_trigger_rx_delay_off = 1;
++	sprintf(xr21v141x->led_trigger_rx_name, "vizzini%d-rx", xr21v141x->minor);
++	led_trigger_register_simple(xr21v141x->led_trigger_rx_name, &xr21v141x->led_trigger_rx);
++
++	xr21v141x->led_trigger_tx_delay_on = 50;
++	xr21v141x->led_trigger_tx_delay_off = 1;
++	sprintf(xr21v141x->led_trigger_tx_name, "vizzini%d-tx", xr21v141x->minor);
++	led_trigger_register_simple(xr21v141x->led_trigger_tx_name, &xr21v141x->led_trigger_tx);
++
++	dev_info(&xr21v141x->control->dev, "%s and %s led triggers registered\n",
++		xr21v141x->led_trigger_rx_name, xr21v141x->led_trigger_tx_name);
++#endif
++}
++
++static void xr21v141x_unregister_led_triggers(struct xr21v141x *xr21v141x)
++{
++#ifdef CONFIG_LEDS_TRIGGERS
++	led_trigger_unregister_simple(xr21v141x->led_trigger_rx);
++	led_trigger_unregister_simple(xr21v141x->led_trigger_tx);
++	dev_info(&xr21v141x->control->dev, "led triggers unregistered\n");
++#endif
++}
++
++
++/*
+  * Functions for ACM control messages.
+  */
+ 
+@@ -330,6 +364,11 @@
+ 	if (!urb->actual_length)
+ 		return;
+ 
++#ifdef CONFIG_LEDS_TRIGGERS
++	led_trigger_blink_oneshot(xr21v141x->led_trigger_rx,
++		&xr21v141x->led_trigger_rx_delay_on,
++		&xr21v141x->led_trigger_rx_delay_off, 0);
++#endif
+ 
+ 	tty_insert_flip_string(&xr21v141x->port, urb->transfer_buffer, urb->actual_length);
+ 	tty_flip_buffer_push(&xr21v141x->port);
+@@ -653,6 +692,12 @@
+ 	
+ 	spin_unlock_irqrestore(&xr21v141x->write_lock, flags);
+ 
++#ifdef CONFIG_LEDS_TRIGGERS
++	led_trigger_blink_oneshot(xr21v141x->led_trigger_tx,
++		&xr21v141x->led_trigger_tx_delay_on,
++		&xr21v141x->led_trigger_tx_delay_off, 0);
++#endif
++
+ 	
+ 	if (stat < 0)
+ 		return stat;
+@@ -1723,6 +1768,9 @@
+ 	}
+ #endif		
+      
++
++	xr21v141x_register_led_triggers(xr21v141x);
++
+ 	return 0;
+ alloc_fail8:
+ 		if (xr21v141x->country_codes) {
+@@ -1817,6 +1865,8 @@
+ 					xr21v141x->data : xr21v141x->control);
+ 
+ 	tty_port_put(&xr21v141x->port);
++
++	xr21v141x_unregister_led_triggers(xr21v141x);
+ }
+ 
+ #ifdef CONFIG_PM
+diff -ur orig/vizzini.h new/vizzini.h
+--- orig/vizzini.h	2017-07-21 13:55:37.000000000 +0300
++++ new/vizzini.h	2017-07-20 15:36:57.000000000 +0300
+@@ -282,6 +282,18 @@
+ #ifdef VIZZINI_IWA
+         int           iwa;
+ #endif
++
++#ifdef CONFIG_LEDS_TRIGGERS
++	char led_trigger_rx_name[32];
++	unsigned long led_trigger_rx_delay_on;
++	unsigned long led_trigger_rx_delay_off;
++	struct led_trigger *led_trigger_rx;
++	char led_trigger_tx_name[32];
++	unsigned long led_trigger_tx_delay_on;
++	unsigned long led_trigger_tx_delay_off;
++	struct led_trigger *led_trigger_tx;
++#endif
++
+ 	struct serial_rs485 rs485;
+ };
+ 
diff --git a/recipes-kernel/vizzini/vizzini_1.1.bb b/recipes-kernel/vizzini/vizzini_1.1.bb
index 17bbe39..93eb74b 100644
--- a/recipes-kernel/vizzini/vizzini_1.1.bb
+++ b/recipes-kernel/vizzini/vizzini_1.1.bb
@@ -7,5 +7,7 @@ SRC_URI += "file://xr21v141x-lnx3.10-3.11.tar.gz \
 			file://vizzini-1.1-enable-cts-v2.patch \
 			file://vizzini-1.1-rs485.patch \
 			"
+SRC_URI_append_mtre = "file://vizzini-1.1-ledrtig.patch \
+                      "
 S = "${WORKDIR}/xr21v141x-lnx3.10-3.11"