diff options
Diffstat (limited to 'recipes-connectivity/lora/lora-gateway/lora-gateway-semtech-sf12.patch')
| -rw-r--r-- | recipes-connectivity/lora/lora-gateway/lora-gateway-semtech-sf12.patch | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/recipes-connectivity/lora/lora-gateway/lora-gateway-semtech-sf12.patch b/recipes-connectivity/lora/lora-gateway/lora-gateway-semtech-sf12.patch new file mode 100644 index 0000000..7ea09d2 --- /dev/null +++ b/recipes-connectivity/lora/lora-gateway/lora-gateway-semtech-sf12.patch @@ -0,0 +1,16 @@ +t a/libloragw/src/loragw_hal.c b/libloragw/src/loragw_hal.c +index 7271eac..e5770df 100644 +--- a/libloragw/src/loragw_hal.c ++++ b/libloragw/src/loragw_hal.c +@@ -305,6 +305,11 @@ void lgw_constant_adjust(void) { + // lgw_reg_w(LGW_MBWSSF_TRACKING_INTEGRAL,0); /* default 0 */ + // lgw_reg_w(LGW_MBWSSF_AGC_FREEZE_ON_DETECT,1); /* default 1 */ + ++ /* Improvement of reference clock frequency error tolerance */ ++ lgw_reg_w(LGW_ADJUST_MODEM_START_OFFSET_RDX4, 1); /* default 0 */ ++ lgw_reg_w(LGW_ADJUST_MODEM_START_OFFSET_SF12_RDX4, 4094); /* default 4092 */ ++ lgw_reg_w(LGW_CORR_MAC_GAIN, 7); /* default 5 */ ++ + /* FSK datapath setup */ + lgw_reg_w(LGW_FSK_RX_INVERT,1); /* default 0 */ + lgw_reg_w(LGW_FSK_MODEM_INVERT_IQ,1); /* default 0 */ |