From 408ecd322635e37c710006c95a22dddc455e7f08 Mon Sep 17 00:00:00 2001
From: Harsh Sharma <harsh.sharma@multitech.com>
Date: Thu, 31 Oct 2019 11:17:13 -0500
Subject: Fixed lora attenuator mode

---
 libloragw/src/loragw_fpga.c | 30 ++++++++++++++++++++----------
 libloragw/src/loragw_hal.c  |  4 ++--
 2 files changed, 22 insertions(+), 12 deletions(-)

(limited to 'libloragw/src')

diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c
index 279a3b8..368fe37 100644
--- a/libloragw/src/loragw_fpga.c
+++ b/libloragw/src/loragw_fpga.c
@@ -175,9 +175,14 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) {
             DEBUG_MSG("ERROR: Failed to configure FPGA polarity\n");
             return LGW_REG_ERROR;
         }
-        /* Set Attenuator mode to be used for the full card*/
-        if (fpga_supports_attenuator()) {
-            lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_MODE, 0);
+    }
+
+    /* Set Attenuator mode to 1 to allow it to use it*/
+    if (fpga_supports_attenuator()) {
+        x = lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_MODE, 1);
+        if (x != LGW_REG_SUCCESS) {
+            DEBUG_MSG("ERROR: Failed to configure Attenuator mode\n");
+            return LGW_REG_ERROR;
         }
     }
 
@@ -361,17 +366,22 @@ int lgw_fpga_reg_rb(uint16_t register_id, uint8_t *data, uint16_t size) {
 
 /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
 
-int lgw_set_attenuation(float attenuation) {
-    int i;
-    int32_t val;
-    if (attenuation > 31.75 || attenuation < 0) {
+int lgw_set_attenuation(float *attn) {
+    if (*attn < 0) {
         return LGW_HAL_ERROR;
     }
-    i = lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_VALUE, (uint8_t)(attenuation * LGW_RF_ATTN_CONV_CONST));
+    int i;
+    int32_t val;
+    /* The max value allowed for 7 bits of a register */
+    uint8_t max_attn = 127;
+
+    /* Shifting the float value to apply get the adjusted integer */
+    uint8_t shifted_attn = (uint8_t)(*attn * LGW_RF_ATTN_CONV_CONST);
 
-    i = lgw_fpga_reg_r(LGW_FPGA_RF_ATTN_VALUE, &val);
+    /* The attenuator value is bit 0-6 of the register hence must be limited to 127 */
+    uint8_t reg_attn = max_attn ^ ((shifted_attn ^ max_attn) & -(shifted_attn < max_attn));
+    i = lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_VALUE, reg_attn);
     if (i == LGW_REG_SUCCESS) {
-        DEBUG_PRINTF("INFO: Attenuator set to %u \n", (uint8_t)val);
         return LGW_HAL_SUCCESS;
     } else {
         return LGW_HAL_ERROR;
diff --git a/libloragw/src/loragw_hal.c b/libloragw/src/loragw_hal.c
index 88bd874..386bd6d 100644
--- a/libloragw/src/loragw_hal.c
+++ b/libloragw/src/loragw_hal.c
@@ -426,7 +426,6 @@ int lgw_board_setconf(struct lgw_conf_board_s conf) {
     rf_clkout = conf.clksrc;
     if (fpga_supports_attenuator()) {
         max_tx_power = conf.max_tx_power;
-        printf("-------MAX TX POWER %d\n", max_tx_power);
         DEBUG_PRINTF("Note: board configuration; lorawan_public:%d, clksrc:%d, max_tx_power:%d\n", lorawan_public, rf_clkout, max_tx_power);        
     } else {
         DEBUG_PRINTF("Note: board configuration; lorawan_public:%d, clksrc:%d \n", lorawan_public, rf_clkout);
@@ -1424,7 +1423,8 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) {
         /* Power is set to max and the attenuator brings down the level to match the packet's request */
         target_mix_gain = 15;  /* Mixer gain is not used for setting power*/
         lgw_reg_w(LGW_TX_GAIN, 0);  /* Dig gain is not used for setting power */
-        x = lgw_set_attenuation((float)(max_tx_power - pkt_data.rf_power));
+        float attn = (float)(max_tx_power - pkt_data.rf_power);
+        x = lgw_set_attenuation(&attn);
         if (x != LGW_HAL_SUCCESS) {
             DEBUG_MSG("ERROR: Failed to set attenuation value\n");
             return LGW_HAL_ERROR;
-- 
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