From 1e66084295f37f0d7f5f0a3518e43ae0cc613898 Mon Sep 17 00:00:00 2001 From: Harsh Sharma Date: Thu, 9 Aug 2018 15:10:43 -0500 Subject: Changed attenuation setup to be the difference between the LUT power and the tx packet power and make it automatically set --- libloragw/src/loragw_fpga.c | 33 ++++++++++++++++++++++----------- libloragw/src/loragw_hal.c | 38 ++++++++++++++++++++------------------ libloragw/src/loragw_reg.c | 4 ++-- 3 files changed, 44 insertions(+), 31 deletions(-) (limited to 'libloragw/src') diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c index 1379679..ce1c9c6 100644 --- a/libloragw/src/loragw_fpga.c +++ b/libloragw/src/loragw_fpga.c @@ -130,7 +130,7 @@ float lgw_fpga_get_tx_notch_delay(void) { /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ -int lgw_fpga_configure(uint32_t tx_notch_freq, bool fpga_attn_used) { +int lgw_fpga_configure(uint32_t tx_notch_freq) { int x; int32_t val; bool spectral_scan_support, lbt_support; @@ -175,17 +175,9 @@ int lgw_fpga_configure(uint32_t tx_notch_freq, bool fpga_attn_used) { DEBUG_MSG("ERROR: Failed to configure FPGA polarity\n"); return LGW_REG_ERROR; } - /* Set Attenuator mode to be used or not depending on if a full card with valid conf settings are given*/ + /* Set Attenuator mode to be used for the full card*/ if (fpga_version == 32) { - if (fpga_attn_used == true) { - lgw_reg_w(LGW_FPGA_RF_ATTN_MODE, 0); - printf("INFO: Valid attenuation settings detected. Using Attenuator mode\n"); - } else { - printf("INFO: Valid attenuation settings not detected. Using Legacy mode\n"); - lgw_reg_w(LGW_FPGA_RF_ATTN_MODE, 1); - } - } else { - lgw_reg_w(LGW_FPGA_RF_ATTN_MODE, 1); + lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_MODE, 0); } } @@ -367,4 +359,23 @@ int lgw_fpga_reg_rb(uint16_t register_id, uint8_t *data, uint16_t size) { } } +/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ + +int lgw_set_attenuation(float attenuation) { + int i; + int32_t val; + if (attenuation > 31.75 || attenuation < 0) { + return LGW_HAL_ERROR; + } + i = lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_VALUE, (uint8_t)(attenuation * LGW_RF_ATTN_CONV_CONST)); + + i = lgw_fpga_reg_r(LGW_FPGA_RF_ATTN_VALUE, &val); + if (i == LGW_REG_SUCCESS) { + DEBUG_PRINTF("INFO: Attenuator set to %u \n", (uint8_t)val); + return LGW_HAL_SUCCESS; + } else { + return LGW_HAL_ERROR; + } +} + /* --- EOF ------------------------------------------------------------------ */ diff --git a/libloragw/src/loragw_hal.c b/libloragw/src/loragw_hal.c index a835aa3..a891fbf 100644 --- a/libloragw/src/loragw_hal.c +++ b/libloragw/src/loragw_hal.c @@ -136,14 +136,13 @@ static uint64_t fsk_sync_word= 0xC194C1; /* default FSK sync word (ALIGNED RIGHT static bool lorawan_public = false; static uint8_t rf_clkout = 0; -struct lgw_tx_gain_lut_s txgain_lut = { +static struct lgw_tx_gain_lut_s txgain_lut = { .size = 2, .lut[0] = { .dig_gain = 0, .pa_gain = 2, .dac_gain = 3, .mix_gain = 10, - .attenuation = -1.0, .rf_power = 14 }, .lut[1] = { @@ -151,7 +150,6 @@ struct lgw_tx_gain_lut_s txgain_lut = { .pa_gain = 3, .dac_gain = 3, .mix_gain = 14, - .attenuation = -1.0, .rf_power = 27 }}; @@ -681,16 +679,12 @@ int lgw_txgain_setconf(struct lgw_tx_gain_lut_s *conf) { DEBUG_MSG("ERROR: TX gain LUT: External PA gain must not exceed 3\n"); return LGW_HAL_ERROR; } - if (conf->lut[i].attenuation > 31.75) { - DEBUG_MSG("ERROR: TX gain LUT: External Attenuation gain must not exceed 31.75\n"); - return LGW_HAL_ERROR; - } + /* Set internal LUT */ txgain_lut.lut[i].dig_gain = conf->lut[i].dig_gain; txgain_lut.lut[i].dac_gain = conf->lut[i].dac_gain; txgain_lut.lut[i].mix_gain = conf->lut[i].mix_gain; txgain_lut.lut[i].pa_gain = conf->lut[i].pa_gain; - txgain_lut.lut[i].attenuation = conf->lut[i].attenuation; txgain_lut.lut[i].rf_power = conf->lut[i].rf_power; } @@ -716,7 +710,7 @@ int lgw_start(void) { if (lgw_is_started == true) { DEBUG_MSG("Note: LoRa concentrator already started, restarting it now\n"); } - reg_stat = lgw_connect(false, rf_tx_notch_freq[rf_tx_enable[1]?1:0], txgain_lut.lut[0].attenuation > -1.0?true:false); + reg_stat = lgw_connect(false, rf_tx_notch_freq[rf_tx_enable[1]?1:0]); if (reg_stat == LGW_REG_ERROR) { DEBUG_MSG("ERROR: FAIL TO CONNECT BOARD\n"); return LGW_HAL_ERROR; @@ -1419,9 +1413,23 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { tx_start_delay = lgw_get_tx_start_delay(tx_notch_enable, pkt_data.bandwidth); /* interpretation of TX power */ - for (pow_index = txgain_lut.size-1; pow_index > 0; pow_index--) { - if (txgain_lut.lut[pow_index].rf_power <= pkt_data.rf_power) { - break; + + if (read_fpga_version() == 32) { + for (pow_index = 0; pow_index < txgain_lut.size-1; pow_index++) { + if (txgain_lut.lut[pow_index].rf_power >= pkt_data.rf_power) { + x = lgw_set_attenuation((float)(txgain_lut.lut[pow_index].rf_power - pkt_data.rf_power)); + if (x != LGW_HAL_SUCCESS) { + DEBUG_MSG("ERROR: Failed to set attenuation value\n"); + return LGW_HAL_ERROR; + } + break; + } + } + } else { + for (pow_index = txgain_lut.size-1; pow_index > 0; pow_index--) { + if (txgain_lut.lut[pow_index].rf_power <= pkt_data.rf_power) { + break; + } } } @@ -1438,12 +1446,6 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { /* Set digital gain from LUT */ lgw_reg_w(LGW_TX_GAIN, txgain_lut.lut[pow_index].dig_gain); - int32_t read_value; - lgw_reg_r(LGW_FPGA_RF_ATTN_MODE, &read_value); - if (read_value == 0) { - lgw_reg_w(LGW_FPGA_RF_ATTN_VALUE, txgain_lut.lut[pow_index].attenuation * 4); - } - /* fixed metadata, useful payload and misc metadata compositing */ transfer_size = TX_METADATA_NB + pkt_data.size; /* */ payload_offset = TX_METADATA_NB; /* start the payload just after the metadata */ diff --git a/libloragw/src/loragw_reg.c b/libloragw/src/loragw_reg.c index e040942..4d689da 100644 --- a/libloragw/src/loragw_reg.c +++ b/libloragw/src/loragw_reg.c @@ -511,7 +511,7 @@ bool check_fpga_version(uint8_t version) { } /* Concentrator connect */ -int lgw_connect(bool spi_only, uint32_t tx_notch_freq, bool fpga_attn_used) { +int lgw_connect(bool spi_only, uint32_t tx_notch_freq) { int spi_stat = LGW_SPI_SUCCESS; uint8_t u = 0; int x; @@ -548,7 +548,7 @@ int lgw_connect(bool spi_only, uint32_t tx_notch_freq, bool fpga_attn_used) { lgw_spi_w(lgw_spi_target, lgw_spi_mux_mode, LGW_SPI_MUX_TARGET_FPGA, 0, 1); lgw_spi_w(lgw_spi_target, lgw_spi_mux_mode, LGW_SPI_MUX_TARGET_FPGA, 0, 0); /* FPGA configure */ - x = lgw_fpga_configure(tx_notch_freq, fpga_attn_used); + x = lgw_fpga_configure(tx_notch_freq); if (x != LGW_REG_SUCCESS) { DEBUG_MSG("ERROR CONFIGURING FPGA\n"); return LGW_REG_ERROR; -- cgit v1.2.3