From 04036d3f88d5fa2077cbd9f3c59c1f2811b08ae3 Mon Sep 17 00:00:00 2001
From: Harsh Sharma <92harshsharma@gmail.com>
Date: Wed, 13 Jun 2018 15:20:25 -0500
Subject: Compiler warning fixes

---
 libloragw/src/loragw_fpga.c       |  5 ++--
 libloragw/src/loragw_reg.c        | 48 +++++++++++++++++++--------------------
 libloragw/src/loragw_spi.native.c |  2 +-
 3 files changed, 28 insertions(+), 27 deletions(-)

(limited to 'libloragw/src')

diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c
index 90fb9b7..832152b 100644
--- a/libloragw/src/loragw_fpga.c
+++ b/libloragw/src/loragw_fpga.c
@@ -134,6 +134,7 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) {
     int x;
     int32_t val;
     bool spectral_scan_support, lbt_support;
+    uint8_t fpga_version;
 
     /* Check input parameters */
     if ((tx_notch_freq < LGW_MIN_NOTCH_FREQ) || (tx_notch_freq > LGW_MAX_NOTCH_FREQ)) {
@@ -166,8 +167,8 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) {
         return LGW_REG_ERROR;
     }
 
-
-    if (read_fpga_version() > 28) {
+    fpga_version = read_fpga_version();
+    if (fpga_version > 28) {
         /* Required for Semtech AP2 reference design and AP1.5 > v28 */
         x  = lgw_fpga_reg_w(LGW_FPGA_CTRL_INVERT_IQ, 1);
         if (x != LGW_REG_SUCCESS) {
diff --git a/libloragw/src/loragw_reg.c b/libloragw/src/loragw_reg.c
index aef9749..4d689da 100644
--- a/libloragw/src/loragw_reg.c
+++ b/libloragw/src/loragw_reg.c
@@ -407,30 +407,6 @@ int page_switch(uint8_t target) {
 
 /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
 
-bool check_fpga_version(uint8_t version) {
-    int i;
-
-    for (i = 0; i < (int)(sizeof FPGA_VERSION); i++) {
-        if (FPGA_VERSION[i] == version ) {
-            return true;
-        }
-    }
-
-    return false;
-}
-
-uint8_t read_fpga_version() {
-       uint8_t u = 0;
-       uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u);
-        if (spi_stat != LGW_SPI_SUCCESS) {
-            DEBUG_MSG("ERROR READING VERSION REGISTER\n");
-            return LGW_REG_ERROR;
-        }
-       return u;
-}
-
-/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
-
 int reg_w_align32(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, struct lgw_reg_s r, int32_t reg_value) {
     int spi_stat = LGW_REG_SUCCESS;
     int i, size_byte;
@@ -510,6 +486,30 @@ int reg_r_align32(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target
 /* -------------------------------------------------------------------------- */
 /* --- PUBLIC FUNCTIONS DEFINITION ------------------------------------------ */
 
+/* Read the FPGA version */
+uint8_t read_fpga_version() {
+       uint8_t u = 0;
+       uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u);
+        if (spi_stat != LGW_SPI_SUCCESS) {
+            DEBUG_MSG("ERROR READING VERSION REGISTER\n");
+            return LGW_REG_ERROR;
+        }
+       return u;
+}
+
+/* Verify the FPGA version is supported */
+bool check_fpga_version(uint8_t version) {
+    int i;
+
+    for (i = 0; i < (int)(sizeof FPGA_VERSION); i++) {
+        if (FPGA_VERSION[i] == version ) {
+            return true;
+        }
+    }
+
+    return false;
+}
+
 /* Concentrator connect */
 int lgw_connect(bool spi_only, uint32_t tx_notch_freq) {
     int spi_stat = LGW_SPI_SUCCESS;
diff --git a/libloragw/src/loragw_spi.native.c b/libloragw/src/loragw_spi.native.c
index a146e8b..56c9d94 100644
--- a/libloragw/src/loragw_spi.native.c
+++ b/libloragw/src/loragw_spi.native.c
@@ -64,7 +64,7 @@ char* spi_dev_path = SPI_DEV_PATH;
 /* set SPI device */
 int lgw_spi_set_path(const char *path) {
     if (path) {
-        spi_dev_path = path;
+        strncpy(spi_dev_path, path, sizeof(path)-1);
         return LGW_SPI_SUCCESS;
     }
     else {
-- 
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