diff options
Diffstat (limited to 'libloragw/src')
-rw-r--r-- | libloragw/src/loragw_fpga.c | 29 | ||||
-rw-r--r-- | libloragw/src/loragw_gps.c | 3 | ||||
-rw-r--r-- | libloragw/src/loragw_hal.c | 39 | ||||
-rw-r--r-- | libloragw/src/loragw_reg.c | 38 | ||||
-rw-r--r-- | libloragw/src/loragw_spi.native.c | 2 |
5 files changed, 68 insertions, 43 deletions
diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c index ce1c9c6..63c6d3b 100644 --- a/libloragw/src/loragw_fpga.c +++ b/libloragw/src/loragw_fpga.c @@ -175,9 +175,14 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) { DEBUG_MSG("ERROR: Failed to configure FPGA polarity\n"); return LGW_REG_ERROR; } - /* Set Attenuator mode to be used for the full card*/ - if (fpga_version == 32) { - lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_MODE, 0); + } + + /* Set Attenuator mode to 1 to allow it to use it*/ + if (fpga_supports_attenuator()) { + x = lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_MODE, 1); + if (x != LGW_REG_SUCCESS) { + DEBUG_MSG("ERROR: Failed to configure Attenuator mode\n"); + return LGW_REG_ERROR; } } @@ -361,17 +366,21 @@ int lgw_fpga_reg_rb(uint16_t register_id, uint8_t *data, uint16_t size) { /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ -int lgw_set_attenuation(float attenuation) { - int i; - int32_t val; - if (attenuation > 31.75 || attenuation < 0) { +int lgw_set_attenuation(uint8_t *attn) { + if (*attn > 127) { return LGW_HAL_ERROR; } - i = lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_VALUE, (uint8_t)(attenuation * LGW_RF_ATTN_CONV_CONST)); + int i; + /* The max value allowed for 7 bits of a register */ + uint8_t max_attn = 127; + + /* Shifting the float value to apply get the adjusted integer */ + uint8_t shifted_attn = (uint8_t)(*attn * LGW_RF_ATTN_CONV_CONST); - i = lgw_fpga_reg_r(LGW_FPGA_RF_ATTN_VALUE, &val); + /* The attenuator value is bit 0-6 of the register hence must be limited to 127 */ + uint8_t reg_attn = max_attn ^ ((shifted_attn ^ max_attn) & -(shifted_attn < max_attn)); + i = lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_VALUE, reg_attn); if (i == LGW_REG_SUCCESS) { - DEBUG_PRINTF("INFO: Attenuator set to %u \n", (uint8_t)val); return LGW_HAL_SUCCESS; } else { return LGW_HAL_ERROR; diff --git a/libloragw/src/loragw_gps.c b/libloragw/src/loragw_gps.c index 3aad031..19c2f83 100644 --- a/libloragw/src/loragw_gps.c +++ b/libloragw/src/loragw_gps.c @@ -89,8 +89,6 @@ static bool gps_lock_ok = false; static char gps_mod = 'N'; /* GPS mode (N no fix, A autonomous, D differential) */ static short gps_sat = 0; /* number of satellites used for fix */ -static struct termios ttyopt_restore; - /* -------------------------------------------------------------------------- */ /* --- PRIVATE FUNCTIONS DECLARATION ---------------------------------------- */ @@ -255,7 +253,6 @@ int str_chop(char *s, int buff_size, char separator, int *idx_ary, int max_idx) int lgw_gps_enable(struct gps_data_t *gpsdata, struct fixsource_t *source) { unsigned int flags; - fd_set fds; flags = WATCH_ENABLE; flags |= WATCH_RAW; flags |= WATCH_NMEA; diff --git a/libloragw/src/loragw_hal.c b/libloragw/src/loragw_hal.c index d77c693..c723be9 100644 --- a/libloragw/src/loragw_hal.c +++ b/libloragw/src/loragw_hal.c @@ -135,6 +135,7 @@ static uint64_t fsk_sync_word= 0xC194C1; /* default FSK sync word (ALIGNED RIGHT static bool lorawan_public = false; static uint8_t rf_clkout = 0; +static uint8_t max_tx_power = 32; /* default uncalibrated max tx power */ static struct lgw_tx_gain_lut_s txgain_lut = { .size = 2, @@ -423,8 +424,12 @@ int lgw_board_setconf(struct lgw_conf_board_s conf) { /* set internal config according to parameters */ lorawan_public = conf.lorawan_public; rf_clkout = conf.clksrc; - - DEBUG_PRINTF("Note: board configuration; lorawan_public:%d, clksrc:%d\n", lorawan_public, rf_clkout); + if (fpga_supports_attenuator()) { + max_tx_power = conf.max_tx_power; + DEBUG_PRINTF("Note: board configuration; lorawan_public:%d, clksrc:%d, max_tx_power:%d\n", lorawan_public, rf_clkout, max_tx_power); + } else { + DEBUG_PRINTF("Note: board configuration; lorawan_public:%d, clksrc:%d \n", lorawan_public, rf_clkout); + } return LGW_HAL_SUCCESS; } @@ -1414,27 +1419,30 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { /* interpretation of TX power */ - if (read_fpga_version() == 32) { - for (pow_index = 0; pow_index < txgain_lut.size-1; pow_index++) { - if (txgain_lut.lut[pow_index].rf_power >= pkt_data.rf_power) { - x = lgw_set_attenuation((float)(txgain_lut.lut[pow_index].rf_power - pkt_data.rf_power)); - if (x != LGW_HAL_SUCCESS) { - DEBUG_MSG("ERROR: Failed to set attenuation value\n"); - return LGW_HAL_ERROR; - } - break; - } + if (fpga_supports_attenuator()) { + /* Power is set to max and the attenuator brings down the level to match the packet's request */ + target_mix_gain = 15; /* Mixer gain is not used for setting power*/ + lgw_reg_w(LGW_TX_GAIN, 0); /* Dig gain is not used for setting power */ + uint8_t attn = (uint8_t)(max_tx_power - pkt_data.rf_power); + x = lgw_set_attenuation(&attn); + if (x != LGW_HAL_SUCCESS) { + DEBUG_MSG("ERROR: Failed to set attenuation value\n"); + return LGW_HAL_ERROR; } } else { + /* Power is matched from the txgain_lut */ for (pow_index = txgain_lut.size-1; pow_index > 0; pow_index--) { if (txgain_lut.lut[pow_index].rf_power <= pkt_data.rf_power) { break; } } + + /* loading TX imbalance correction */ + target_mix_gain = txgain_lut.lut[pow_index].mix_gain; + /* Set digital gain from LUT */ + lgw_reg_w(LGW_TX_GAIN, txgain_lut.lut[pow_index].dig_gain); } - /* loading TX imbalance correction */ - target_mix_gain = txgain_lut.lut[pow_index].mix_gain; if (pkt_data.rf_chain == 0) { /* use radio A calibration table */ lgw_reg_w(LGW_TX_OFFSET_I, cal_offset_a_i[target_mix_gain - 8]); lgw_reg_w(LGW_TX_OFFSET_Q, cal_offset_a_q[target_mix_gain - 8]); @@ -1443,9 +1451,6 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { lgw_reg_w(LGW_TX_OFFSET_Q, cal_offset_b_q[target_mix_gain - 8]); } - /* Set digital gain from LUT */ - lgw_reg_w(LGW_TX_GAIN, txgain_lut.lut[pow_index].dig_gain); - /* fixed metadata, useful payload and misc metadata compositing */ transfer_size = TX_METADATA_NB + pkt_data.size; /* */ payload_offset = TX_METADATA_NB; /* start the payload just after the metadata */ diff --git a/libloragw/src/loragw_reg.c b/libloragw/src/loragw_reg.c index e707838..5991384 100644 --- a/libloragw/src/loragw_reg.c +++ b/libloragw/src/loragw_reg.c @@ -48,7 +48,8 @@ Maintainer: Sylvain Miermont #define PAGE_ADDR 0x00 #define PAGE_MASK 0x03 -const uint8_t FPGA_VERSION[] = { 28, 31, 32, 33 , 34, 35, 37 }; /* several versions could be supported */ +const uint8_t FPGA_VERSIONS_SUPPORTED[] = { 28, 31, 32, 33, 34, 35, 37 }; /* several versions could be supported */ +const uint8_t FPGA_VERSIONS_SUPPORTING_ATTENUATOR[] = { 32, 34, 35, 37 }; /* defines lgw_send power interpretation */ /* auto generated register mapping for C code : 11-Jul-2013 13:20:40 @@ -488,21 +489,34 @@ int reg_r_align32(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target /* Read the FPGA version */ uint8_t read_fpga_version() { - uint8_t u = 0; - uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u); - if (spi_stat != LGW_SPI_SUCCESS) { - DEBUG_MSG("ERROR READING VERSION REGISTER\n"); - return LGW_REG_ERROR; - } - return u; + uint8_t u = 0; + uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u); + if (spi_stat != LGW_SPI_SUCCESS) { + DEBUG_MSG("ERROR READING VERSION REGISTER\n"); + return LGW_REG_ERROR; + } + return u; } /* Verify the FPGA version is supported */ -bool check_fpga_version(uint8_t version) { +bool fpga_version_supported() { + int i; + + for (i = 0; i < (int)(sizeof FPGA_VERSIONS_SUPPORTED); i++) { + if (FPGA_VERSIONS_SUPPORTED[i] == read_fpga_version() ) { + return true; + } + } + + return false; +} + +/* Check if the FPGA uses an attenuator for transmitting packets*/ +bool fpga_supports_attenuator() { int i; - for (i = 0; i < (int)(sizeof FPGA_VERSION); i++) { - if (FPGA_VERSION[i] == version ) { + for (i = 0; i < (int)(sizeof FPGA_VERSIONS_SUPPORTING_ATTENUATOR); i++) { + if (FPGA_VERSIONS_SUPPORTING_ATTENUATOR[i] == read_fpga_version() ) { return true; } } @@ -537,7 +551,7 @@ int lgw_connect(bool spi_only, uint32_t tx_notch_freq) { DEBUG_MSG("ERROR READING VERSION REGISTER\n"); return LGW_REG_ERROR; } - if (check_fpga_version(u) != true) { + if (fpga_version_supported(u) != true) { /* We failed to read expected FPGA version, so let's assume there is no FPGA */ DEBUG_PRINTF("INFO: no FPGA detected or version not supported (v%u)\n", u); lgw_spi_mux_mode = LGW_SPI_MUX_MODE0; diff --git a/libloragw/src/loragw_spi.native.c b/libloragw/src/loragw_spi.native.c index 2380ecb..a26fc22 100644 --- a/libloragw/src/loragw_spi.native.c +++ b/libloragw/src/loragw_spi.native.c @@ -73,7 +73,7 @@ int lgw_spi_set_path(const char *path) { } } - +/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ /* SPI initialization and configuration */ int lgw_spi_open(void **spi_target_ptr) { |