#  / _____)             _              | |
# ( (____  _____ ____ _| |_ _____  ____| |__
#  \____ \| ___ |    (_   _) ___ |/ ___)  _ \
#  _____) ) ____| | | || |_| ____( (___| | | |
# (______/|_____)_|_|_| \__)_____)\____)_| |_|
#     ©2013 Semtech-Cycleo
#
# Description:
#	Lora gateway Hardware Abstraction Layer library configuration


# Set the DEBUG_* to 1 to activate debug mode in individual modules.
# Warning: that makes the module *very verbose*, do not use for production
FLAG_AUX= -D DEBUG_AUX=0
FLAG_SPI= -D DEBUG_SPI=0
FLAG_REG= -D DEBUG_REG=0
FLAG_HAL= -D DEBUG_HAL=0
FLAG_GPS= -D DEBUG_GPS=0

# The flags bellow define which physical link to the nano board will be used
# Pick one and comment the other(s)

# FTDI SPI-over-USB bridge
LGW_PHY= ftdi

# Pcduino native SPI (Linux device in /dev)
#LGW_PHY= native